1 ; RUN: llc < %s -mtriple=thumbv6m-eabi -verify-machineinstrs -o - | FileCheck %s
2 target datalayout = "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:64-v128:64:128-a:0:32-n32-S64"
3 target triple = "thumbv6m-none--eabi"
5 @a = external global ptr
6 @b = external global ptr
8 ; Function Attrs: nounwind
9 define void @foo24() #0 {
12 ; CHECK: ldr r[[LB:[0-9]]], .LCPI
13 ; CHECK: adds r[[NLB:[0-9]]], r[[LB]], #4
14 ; CHECK: ldr r[[SB:[0-9]]], .LCPI
15 ; CHECK: adds r[[NSB:[0-9]]], r[[SB]], #4
16 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]]}
17 ; CHECK-NEXT: stm r[[NSB]]!, {r[[R1]], r[[R2]], r[[R3]]}
18 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]]}
19 ; CHECK-NEXT: stm r[[NSB]]!, {r[[R1]], r[[R2]], r[[R3]]}
20 %0 = load ptr, ptr @a, align 4
21 %arrayidx = getelementptr inbounds i32, ptr %0, i32 1
22 %1 = load ptr, ptr @b, align 4
23 %arrayidx1 = getelementptr inbounds i32, ptr %1, i32 1
24 tail call void @llvm.memcpy.p0.p0.i32(ptr align 4 %arrayidx, ptr align 4 %arrayidx1, i32 24, i1 false)
28 define void @foo28() #0 {
31 ; CHECK: ldr r[[LB:[0-9]]], .LCPI
32 ; CHECK: adds r[[NLB:[0-9]]], r[[LB]], #4
33 ; CHECK: ldr r[[SB:[0-9]]], .LCPI
34 ; CHECK: adds r[[NSB:[0-9]]], r[[SB]], #4
35 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]]}
36 ; CHECK-NEXT: stm r[[NSB]]!, {r[[R1]], r[[R2]], r[[R3]]}
37 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]], r[[R4:[0-9]]]}
38 ; CHECK-NEXT: stm r[[NSB]]!, {r[[R1]], r[[R2]], r[[R3]], r[[R4]]}
39 %0 = load ptr, ptr @a, align 4
40 %arrayidx = getelementptr inbounds i32, ptr %0, i32 1
41 %1 = load ptr, ptr @b, align 4
42 %arrayidx1 = getelementptr inbounds i32, ptr %1, i32 1
43 tail call void @llvm.memcpy.p0.p0.i32(ptr align 4 %arrayidx, ptr align 4 %arrayidx1, i32 28, i1 false)
47 define void @foo32() #0 {
50 ; CHECK: ldr r[[LB:[0-9]]], .LCPI
51 ; CHECK: adds r[[NLB:[0-9]]], r[[LB]], #4
52 ; CHECK: ldr r[[SB:[0-9]]], .LCPI
53 ; CHECK: adds r[[NSB:[0-9]]], r[[SB]], #4
54 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]], r[[R4:[0-9]]]}
55 ; CHECK-NEXT: stm r[[NSB]]!, {r[[R1]], r[[R2]], r[[R3]], r[[R4]]}
56 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]], r[[R4:[0-9]]]}
57 ; CHECK-NEXT: stm r[[NSB]]!, {r[[R1]], r[[R2]], r[[R3]], r[[R4]]}
58 %0 = load ptr, ptr @a, align 4
59 %arrayidx = getelementptr inbounds i32, ptr %0, i32 1
60 %1 = load ptr, ptr @b, align 4
61 %arrayidx1 = getelementptr inbounds i32, ptr %1, i32 1
62 tail call void @llvm.memcpy.p0.p0.i32(ptr align 4 %arrayidx, ptr align 4 %arrayidx1, i32 32, i1 false)
66 define void @foo36() #0 {
69 ; CHECK: ldr r[[LB:[0-9]]], .LCPI
70 ; CHECK: adds r[[NLB:[0-9]]], r[[LB]], #4
71 ; CHECK: ldr r[[SB:[0-9]]], .LCPI
72 ; CHECK: adds r[[NSB:[0-9]]], r[[SB]], #4
73 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]]}
74 ; CHECK-NEXT: stm r[[NSB]]!, {r[[R1]], r[[R2]], r[[R3]]}
75 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]]}
76 ; CHECK-NEXT: stm r[[NSB]]!, {r[[R1]], r[[R2]], r[[R3]]}
77 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]]}
78 ; CHECK-NEXT: stm r[[NSB]]!, {r[[R1]], r[[R2]], r[[R3]]}
79 %0 = load ptr, ptr @a, align 4
80 %arrayidx = getelementptr inbounds i32, ptr %0, i32 1
81 %1 = load ptr, ptr @b, align 4
82 %arrayidx1 = getelementptr inbounds i32, ptr %1, i32 1
83 tail call void @llvm.memcpy.p0.p0.i32(ptr align 4 %arrayidx, ptr align 4 %arrayidx1, i32 36, i1 false)
87 ; Function Attrs: nounwind
88 declare void @llvm.memcpy.p0.p0.i32(ptr nocapture, ptr nocapture readonly, i32, i1) #1