1 # RUN: llc -mtriple=thumbv8.1m.main %s -run-pass=arm-low-overhead-loops --verify-machineinstrs -o - | FileCheck %s
5 # CHECK-NOT: t2LEUpdate
8 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
9 target triple = "thumbv8.1m.main"
11 define i32 @mov_between_dec_end(i32 %n) #0 {
13 %cmp6 = icmp eq i32 %n, 0
14 br i1 %cmp6, label %while.end, label %while.body.preheader
16 while.body.preheader: ; preds = %entry
17 %start = call i32 @llvm.start.loop.iterations.i32(i32 %n)
20 while.body: ; preds = %while.body, %while.body.preheader
21 %0 = phi i32 [ %start, %while.body.preheader ], [ %1, %while.body ]
22 %1 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %0, i32 1)
24 %2 = icmp ne i32 %1, 0
25 br i1 %2, label %while.body, label %while.end
27 while.end: ; preds = %while.body, %entry
28 %res.0.lcssa = phi i32 [ 0, %entry ], [ %add, %while.body ]
32 declare i32 @llvm.start.loop.iterations.i32(i32) #1
33 declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32) #1
35 attributes #0 = { "target-features"="+mve.fp" }
36 attributes #1 = { noduplicate nounwind }
37 attributes #2 = { nounwind }
41 name: mov_between_dec_end
43 exposesReturnsTwice: false
45 regBankSelected: false
48 tracksRegLiveness: true
52 - { reg: '$r0', virtual-reg: '' }
54 isFrameAddressTaken: false
55 isReturnAddressTaken: false
65 cvBytesOfCalleeSavedRegisters: 0
66 hasOpaqueSPAdjustment: false
68 hasMustTailInVarArgFunc: false
74 - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
75 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,
76 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
77 - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
78 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,
79 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
82 machineFunctionInfo: {}
85 successors: %bb.4(0x30000000), %bb.1(0x50000000)
86 liveins: $r0, $r7, $lr
88 frame-setup tPUSH 14, $noreg, killed $r7, killed $lr, implicit-def $sp, implicit $sp
89 frame-setup CFI_INSTRUCTION def_cfa_offset 8
90 frame-setup CFI_INSTRUCTION offset $lr, -4
91 frame-setup CFI_INSTRUCTION offset $r7, -8
94 bb.1.while.body.preheader:
95 successors: %bb.2(0x80000000)
98 $lr = tMOVr $r0, 14, $noreg
99 $lr = t2DoLoopStart killed $r0
102 successors: %bb.2(0x7c000000), %bb.3(0x04000000)
105 renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r4, 14, $noreg
106 renamable $lr = t2LoopDec killed renamable $lr, 1
107 renamable $r4 = tMOVr $lr, 14, $noreg
108 t2LoopEnd renamable $lr, %bb.2, implicit-def dead $cpsr
114 $r0 = tMOVr killed $lr, 14, $noreg
115 tPOP_RET 14, $noreg, def $r7, def $pc, implicit killed $r0
118 renamable $lr = t2MOVi 0, 14, $noreg, $noreg
119 $r0 = tMOVr killed $lr, 14, $noreg
120 tPOP_RET 14, $noreg, def $r7, def $pc, implicit killed $r0