1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve %s -o - | FileCheck %s
4 ; This test was getting the offset of a store's pointer info incorrect, leading to the
5 ; incorrect aliasing info an the store moving past a dependant load.
7 define arm_aapcs_vfpcc double @zero(double %a, double %b, double %c) {
9 ; CHECK: @ %bb.0: @ %entry
10 ; CHECK-NEXT: .save {r4, lr}
11 ; CHECK-NEXT: push {r4, lr}
12 ; CHECK-NEXT: .vsave {d8, d9}
13 ; CHECK-NEXT: vpush {d8, d9}
15 ; CHECK-NEXT: sub sp, #8
16 ; CHECK-NEXT: vmov.f32 s16, s2
17 ; CHECK-NEXT: vmov.f32 s18, s0
18 ; CHECK-NEXT: vmov.f32 s17, s3
19 ; CHECK-NEXT: vmov.f32 s19, s1
21 ; CHECK-NEXT: vmov r2, r3, d8
22 ; CHECK-NEXT: vmov r0, r1, d0
23 ; CHECK-NEXT: bl __aeabi_dadd
24 ; CHECK-NEXT: str r1, [sp, #4]
25 ; CHECK-NEXT: mov r4, r0
26 ; CHECK-NEXT: ldrb.w r0, [sp, #7]
27 ; CHECK-NEXT: eor r0, r0, #128
28 ; CHECK-NEXT: strb.w r0, [sp, #7]
29 ; CHECK-NEXT: vmov r0, r1, d9
30 ; CHECK-NEXT: mov r2, r0
31 ; CHECK-NEXT: mov r3, r1
32 ; CHECK-NEXT: bl __aeabi_dadd
33 ; CHECK-NEXT: mov r3, r1
34 ; CHECK-NEXT: ldr r1, [sp, #4]
35 ; CHECK-NEXT: mov r2, r0
36 ; CHECK-NEXT: mov r0, r4
37 ; CHECK-NEXT: bl __aeabi_ddiv
38 ; CHECK-NEXT: vmov d0, r0, r1
39 ; CHECK-NEXT: add sp, #8
40 ; CHECK-NEXT: vpop {d8, d9}
41 ; CHECK-NEXT: pop {r4, pc}
43 %call = tail call nnan nsz arm_aapcs_vfpcc double @sqrt(double %a)
44 %0 = fadd nnan nsz double %call, %b
45 %sub3 = fneg nnan nsz double %0
46 %mul4 = fmul nnan nsz double %a, 2.000000e+00
47 %div = fdiv nnan nsz double %sub3, %mul4
51 declare arm_aapcs_vfpcc double @sqrt(double)