1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=CMOV
3 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-cmov | FileCheck %s --check-prefix=NO_CMOV
5 define i16 @cmov_zpromotion_8_to_16(i1 %c) {
6 ; CMOV-LABEL: cmov_zpromotion_8_to_16:
8 ; CMOV-NEXT: testb $1, %dil
9 ; CMOV-NEXT: movl $117, %ecx
10 ; CMOV-NEXT: movl $237, %eax
11 ; CMOV-NEXT: cmovnel %ecx, %eax
12 ; CMOV-NEXT: # kill: def $ax killed $ax killed $eax
15 ; NO_CMOV-LABEL: cmov_zpromotion_8_to_16:
17 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
18 ; NO_CMOV-NEXT: movl $117, %eax
19 ; NO_CMOV-NEXT: jne .LBB0_2
20 ; NO_CMOV-NEXT: # %bb.1:
21 ; NO_CMOV-NEXT: movl $237, %eax
22 ; NO_CMOV-NEXT: .LBB0_2:
23 ; NO_CMOV-NEXT: # kill: def $ax killed $ax killed $eax
25 %t0 = select i1 %c, i8 117, i8 -19
26 %ret = zext i8 %t0 to i16
30 define i32 @cmov_zpromotion_8_to_32(i1 %c) {
31 ; CMOV-LABEL: cmov_zpromotion_8_to_32:
33 ; CMOV-NEXT: testb $1, %dil
34 ; CMOV-NEXT: movl $126, %ecx
35 ; CMOV-NEXT: movl $255, %eax
36 ; CMOV-NEXT: cmovnel %ecx, %eax
39 ; NO_CMOV-LABEL: cmov_zpromotion_8_to_32:
41 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
42 ; NO_CMOV-NEXT: movl $126, %eax
43 ; NO_CMOV-NEXT: jne .LBB1_2
44 ; NO_CMOV-NEXT: # %bb.1:
45 ; NO_CMOV-NEXT: movl $255, %eax
46 ; NO_CMOV-NEXT: .LBB1_2:
48 %t0 = select i1 %c, i8 12414, i8 -1
49 %ret = zext i8 %t0 to i32
53 define i64 @cmov_zpromotion_8_to_64(i1 %c) {
54 ; CMOV-LABEL: cmov_zpromotion_8_to_64:
56 ; CMOV-NEXT: testb $1, %dil
57 ; CMOV-NEXT: movl $126, %ecx
58 ; CMOV-NEXT: movl $255, %eax
59 ; CMOV-NEXT: cmovneq %rcx, %rax
62 ; NO_CMOV-LABEL: cmov_zpromotion_8_to_64:
64 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
65 ; NO_CMOV-NEXT: movl $126, %eax
66 ; NO_CMOV-NEXT: jne .LBB2_2
67 ; NO_CMOV-NEXT: # %bb.1:
68 ; NO_CMOV-NEXT: movl $255, %eax
69 ; NO_CMOV-NEXT: .LBB2_2:
70 ; NO_CMOV-NEXT: xorl %edx, %edx
72 %t0 = select i1 %c, i8 12414, i8 -1
73 %ret = zext i8 %t0 to i64
77 define i32 @cmov_zpromotion_16_to_32(i1 %c) {
78 ; CMOV-LABEL: cmov_zpromotion_16_to_32:
80 ; CMOV-NEXT: testb $1, %dil
81 ; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E
82 ; CMOV-NEXT: movl $65535, %eax # imm = 0xFFFF
83 ; CMOV-NEXT: cmovnel %ecx, %eax
86 ; NO_CMOV-LABEL: cmov_zpromotion_16_to_32:
88 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
89 ; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
90 ; NO_CMOV-NEXT: jne .LBB3_2
91 ; NO_CMOV-NEXT: # %bb.1:
92 ; NO_CMOV-NEXT: movl $65535, %eax # imm = 0xFFFF
93 ; NO_CMOV-NEXT: .LBB3_2:
95 %t0 = select i1 %c, i16 12414, i16 -1
96 %ret = zext i16 %t0 to i32
100 define i64 @cmov_zpromotion_16_to_64(i1 %c) {
101 ; CMOV-LABEL: cmov_zpromotion_16_to_64:
103 ; CMOV-NEXT: testb $1, %dil
104 ; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E
105 ; CMOV-NEXT: movl $65535, %eax # imm = 0xFFFF
106 ; CMOV-NEXT: cmovneq %rcx, %rax
109 ; NO_CMOV-LABEL: cmov_zpromotion_16_to_64:
111 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
112 ; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
113 ; NO_CMOV-NEXT: jne .LBB4_2
114 ; NO_CMOV-NEXT: # %bb.1:
115 ; NO_CMOV-NEXT: movl $65535, %eax # imm = 0xFFFF
116 ; NO_CMOV-NEXT: .LBB4_2:
117 ; NO_CMOV-NEXT: xorl %edx, %edx
119 %t0 = select i1 %c, i16 12414, i16 -1
120 %ret = zext i16 %t0 to i64
124 define i64 @cmov_zpromotion_32_to_64(i1 %c) {
125 ; CMOV-LABEL: cmov_zpromotion_32_to_64:
127 ; CMOV-NEXT: testb $1, %dil
128 ; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E
129 ; CMOV-NEXT: movl $43107, %eax # imm = 0xA863
130 ; CMOV-NEXT: cmovnel %ecx, %eax
133 ; NO_CMOV-LABEL: cmov_zpromotion_32_to_64:
135 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
136 ; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
137 ; NO_CMOV-NEXT: jne .LBB5_2
138 ; NO_CMOV-NEXT: # %bb.1:
139 ; NO_CMOV-NEXT: movl $43107, %eax # imm = 0xA863
140 ; NO_CMOV-NEXT: .LBB5_2:
141 ; NO_CMOV-NEXT: xorl %edx, %edx
143 %t0 = select i1 %c, i32 12414, i32 43107
144 %ret = zext i32 %t0 to i64
148 define i16 @cmov_spromotion_8_to_16(i1 %c) {
149 ; CMOV-LABEL: cmov_spromotion_8_to_16:
151 ; CMOV-NEXT: testb $1, %dil
152 ; CMOV-NEXT: movl $117, %ecx
153 ; CMOV-NEXT: movl $65517, %eax # imm = 0xFFED
154 ; CMOV-NEXT: cmovnel %ecx, %eax
155 ; CMOV-NEXT: # kill: def $ax killed $ax killed $eax
158 ; NO_CMOV-LABEL: cmov_spromotion_8_to_16:
160 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
161 ; NO_CMOV-NEXT: movl $117, %eax
162 ; NO_CMOV-NEXT: jne .LBB6_2
163 ; NO_CMOV-NEXT: # %bb.1:
164 ; NO_CMOV-NEXT: movl $65517, %eax # imm = 0xFFED
165 ; NO_CMOV-NEXT: .LBB6_2:
166 ; NO_CMOV-NEXT: # kill: def $ax killed $ax killed $eax
168 %t0 = select i1 %c, i8 117, i8 -19
169 %ret = sext i8 %t0 to i16
173 define i32 @cmov_spromotion_8_to_32(i1 %c) {
174 ; CMOV-LABEL: cmov_spromotion_8_to_32:
176 ; CMOV-NEXT: testb $1, %dil
177 ; CMOV-NEXT: movl $126, %ecx
178 ; CMOV-NEXT: movl $99, %eax
179 ; CMOV-NEXT: cmovnel %ecx, %eax
182 ; NO_CMOV-LABEL: cmov_spromotion_8_to_32:
184 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
185 ; NO_CMOV-NEXT: movl $126, %eax
186 ; NO_CMOV-NEXT: jne .LBB7_2
187 ; NO_CMOV-NEXT: # %bb.1:
188 ; NO_CMOV-NEXT: movl $99, %eax
189 ; NO_CMOV-NEXT: .LBB7_2:
191 %t0 = select i1 %c, i8 12414, i8 43107
192 %ret = sext i8 %t0 to i32
196 define i64 @cmov_spromotion_8_to_64(i1 %c) {
197 ; CMOV-LABEL: cmov_spromotion_8_to_64:
199 ; CMOV-NEXT: testb $1, %dil
200 ; CMOV-NEXT: movl $126, %ecx
201 ; CMOV-NEXT: movl $99, %eax
202 ; CMOV-NEXT: cmovneq %rcx, %rax
205 ; NO_CMOV-LABEL: cmov_spromotion_8_to_64:
207 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
208 ; NO_CMOV-NEXT: movl $126, %eax
209 ; NO_CMOV-NEXT: jne .LBB8_2
210 ; NO_CMOV-NEXT: # %bb.1:
211 ; NO_CMOV-NEXT: movl $99, %eax
212 ; NO_CMOV-NEXT: .LBB8_2:
213 ; NO_CMOV-NEXT: xorl %edx, %edx
215 %t0 = select i1 %c, i8 12414, i8 43107
216 %ret = sext i8 %t0 to i64
220 define i32 @cmov_spromotion_16_to_32(i1 %c) {
221 ; CMOV-LABEL: cmov_spromotion_16_to_32:
223 ; CMOV-NEXT: testb $1, %dil
224 ; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E
225 ; CMOV-NEXT: movl $-22429, %eax # imm = 0xA863
226 ; CMOV-NEXT: cmovnel %ecx, %eax
229 ; NO_CMOV-LABEL: cmov_spromotion_16_to_32:
231 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
232 ; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
233 ; NO_CMOV-NEXT: jne .LBB9_2
234 ; NO_CMOV-NEXT: # %bb.1:
235 ; NO_CMOV-NEXT: movl $-22429, %eax # imm = 0xA863
236 ; NO_CMOV-NEXT: .LBB9_2:
238 %t0 = select i1 %c, i16 12414, i16 43107
239 %ret = sext i16 %t0 to i32
243 define i64 @cmov_spromotion_16_to_64(i1 %c) {
244 ; CMOV-LABEL: cmov_spromotion_16_to_64:
246 ; CMOV-NEXT: testb $1, %dil
247 ; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E
248 ; CMOV-NEXT: movq $-22429, %rax # imm = 0xA863
249 ; CMOV-NEXT: cmovneq %rcx, %rax
252 ; NO_CMOV-LABEL: cmov_spromotion_16_to_64:
254 ; NO_CMOV-NEXT: xorl %edx, %edx
255 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
256 ; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
257 ; NO_CMOV-NEXT: je .LBB10_1
258 ; NO_CMOV-NEXT: # %bb.2:
259 ; NO_CMOV-NEXT: je .LBB10_3
260 ; NO_CMOV-NEXT: .LBB10_4:
262 ; NO_CMOV-NEXT: .LBB10_1:
263 ; NO_CMOV-NEXT: movl $-22429, %eax # imm = 0xA863
264 ; NO_CMOV-NEXT: jne .LBB10_4
265 ; NO_CMOV-NEXT: .LBB10_3:
266 ; NO_CMOV-NEXT: movl $-1, %edx
268 %t0 = select i1 %c, i16 12414, i16 43107
269 %ret = sext i16 %t0 to i64
273 define i64 @cmov_spromotion_32_to_64(i1 %c) {
274 ; CMOV-LABEL: cmov_spromotion_32_to_64:
276 ; CMOV-NEXT: testb $1, %dil
277 ; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E
278 ; CMOV-NEXT: movl $43107, %eax # imm = 0xA863
279 ; CMOV-NEXT: cmovneq %rcx, %rax
282 ; NO_CMOV-LABEL: cmov_spromotion_32_to_64:
284 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
285 ; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
286 ; NO_CMOV-NEXT: jne .LBB11_2
287 ; NO_CMOV-NEXT: # %bb.1:
288 ; NO_CMOV-NEXT: movl $43107, %eax # imm = 0xA863
289 ; NO_CMOV-NEXT: .LBB11_2:
290 ; NO_CMOV-NEXT: xorl %edx, %edx
292 %t0 = select i1 %c, i32 12414, i32 43107
293 %ret = sext i32 %t0 to i64