| blob | 36daba63f08bc2f39e7d031f23f782550933414d |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+sse2 -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=SSE2
3 ; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX
4 ; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX
5 ; RUN: llc -mtriple=i686-unknown-unknown -mcpu=generic -mattr=+sse2 -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=SSE2_X86
6 ; RUN: llc -mtriple=i686-unknown-unknown -mcpu=generic -mattr=+avx -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX_X86
7 ; RUN: llc -mtriple=i686-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX_X86
10 define double @int_to_double_rr(i32 %a) {
11 ; SSE2-LABEL: int_to_double_rr:
12 ; SSE2: # %bb.0: # %entry
13 ; SSE2-NEXT: cvtsi2sd %edi, %xmm0
14 ; SSE2-NEXT: retq
15 ;
16 ; AVX-LABEL: int_to_double_rr:
17 ; AVX: # %bb.0: # %entry
18 ; AVX-NEXT: vcvtsi2sd %edi, %xmm0, %xmm0
19 ; AVX-NEXT: retq
20 ;
21 ; SSE2_X86-LABEL: int_to_double_rr:
22 ; SSE2_X86: # %bb.0: # %entry
23 ; SSE2_X86-NEXT: pushl %ebp
24 ; SSE2_X86-NEXT: .cfi_def_cfa_offset 8
25 ; SSE2_X86-NEXT: .cfi_offset %ebp, -8
26 ; SSE2_X86-NEXT: movl %esp, %ebp
27 ; SSE2_X86-NEXT: .cfi_def_cfa_register %ebp
28 ; SSE2_X86-NEXT: andl $-8, %esp
29 ; SSE2_X86-NEXT: subl $8, %esp
30 ; SSE2_X86-NEXT: cvtsi2sdl 8(%ebp), %xmm0
31 ; SSE2_X86-NEXT: movsd %xmm0, (%esp)
32 ; SSE2_X86-NEXT: fldl (%esp)
33 ; SSE2_X86-NEXT: movl %ebp, %esp
34 ; SSE2_X86-NEXT: popl %ebp
35 ; SSE2_X86-NEXT: .cfi_def_cfa %esp, 4
36 ; SSE2_X86-NEXT: retl
37 ;
38 ; AVX_X86-LABEL: int_to_double_rr:
39 ; AVX_X86: # %bb.0: # %entry
40 ; AVX_X86-NEXT: pushl %ebp
41 ; AVX_X86-NEXT: .cfi_def_cfa_offset 8
42 ; AVX_X86-NEXT: .cfi_offset %ebp, -8
43 ; AVX_X86-NEXT: movl %esp, %ebp
44 ; AVX_X86-NEXT: .cfi_def_cfa_register %ebp
45 ; AVX_X86-NEXT: andl $-8, %esp
46 ; AVX_X86-NEXT: subl $8, %esp
47 ; AVX_X86-NEXT: vcvtsi2sdl 8(%ebp), %xmm0, %xmm0
48 ; AVX_X86-NEXT: vmovsd %xmm0, (%esp)
49 ; AVX_X86-NEXT: fldl (%esp)
50 ; AVX_X86-NEXT: movl %ebp, %esp
51 ; AVX_X86-NEXT: popl %ebp
52 ; AVX_X86-NEXT: .cfi_def_cfa %esp, 4
53 ; AVX_X86-NEXT: retl
54 entry:
55 %0 = sitofp i32 %a to double
56 ret double %0
57 }
59 define double @int_to_double_rm(ptr %a) {
60 ; SSE2-LABEL: int_to_double_rm:
61 ; SSE2: # %bb.0: # %entry
62 ; SSE2-NEXT: cvtsi2sdl (%rdi), %xmm0
63 ; SSE2-NEXT: retq
64 ;
65 ; AVX-LABEL: int_to_double_rm:
66 ; AVX: # %bb.0: # %entry
67 ; AVX-NEXT: vcvtsi2sdl (%rdi), %xmm0, %xmm0
68 ; AVX-NEXT: retq
69 ;
70 ; SSE2_X86-LABEL: int_to_double_rm:
71 ; SSE2_X86: # %bb.0: # %entry
72 ; SSE2_X86-NEXT: pushl %ebp
73 ; SSE2_X86-NEXT: .cfi_def_cfa_offset 8
74 ; SSE2_X86-NEXT: .cfi_offset %ebp, -8
75 ; SSE2_X86-NEXT: movl %esp, %ebp
76 ; SSE2_X86-NEXT: .cfi_def_cfa_register %ebp
77 ; SSE2_X86-NEXT: andl $-8, %esp
78 ; SSE2_X86-NEXT: subl $8, %esp
79 ; SSE2_X86-NEXT: movl 8(%ebp), %eax
80 ; SSE2_X86-NEXT: cvtsi2sdl (%eax), %xmm0
81 ; SSE2_X86-NEXT: movsd %xmm0, (%esp)
82 ; SSE2_X86-NEXT: fldl (%esp)
83 ; SSE2_X86-NEXT: movl %ebp, %esp
84 ; SSE2_X86-NEXT: popl %ebp
85 ; SSE2_X86-NEXT: .cfi_def_cfa %esp, 4
86 ; SSE2_X86-NEXT: retl
87 ;
88 ; AVX_X86-LABEL: int_to_double_rm:
89 ; AVX_X86: # %bb.0: # %entry
90 ; AVX_X86-NEXT: pushl %ebp
91 ; AVX_X86-NEXT: .cfi_def_cfa_offset 8
92 ; AVX_X86-NEXT: .cfi_offset %ebp, -8
93 ; AVX_X86-NEXT: movl %esp, %ebp
94 ; AVX_X86-NEXT: .cfi_def_cfa_register %ebp
95 ; AVX_X86-NEXT: andl $-8, %esp
96 ; AVX_X86-NEXT: subl $8, %esp
97 ; AVX_X86-NEXT: movl 8(%ebp), %eax
98 ; AVX_X86-NEXT: vcvtsi2sdl (%eax), %xmm0, %xmm0
99 ; AVX_X86-NEXT: vmovsd %xmm0, (%esp)
100 ; AVX_X86-NEXT: fldl (%esp)
101 ; AVX_X86-NEXT: movl %ebp, %esp
102 ; AVX_X86-NEXT: popl %ebp
103 ; AVX_X86-NEXT: .cfi_def_cfa %esp, 4
104 ; AVX_X86-NEXT: retl
105 entry:
106 %0 = load i32, ptr %a
107 %1 = sitofp i32 %0 to double
108 ret double %1
109 }
111 define double @int_to_double_rm_optsize(ptr %a) optsize {
112 ; SSE2-LABEL: int_to_double_rm_optsize:
113 ; SSE2: # %bb.0: # %entry
114 ; SSE2-NEXT: cvtsi2sdl (%rdi), %xmm0
115 ; SSE2-NEXT: retq
116 ;
117 ; AVX-LABEL: int_to_double_rm_optsize:
118 ; AVX: # %bb.0: # %entry
119 ; AVX-NEXT: vcvtsi2sdl (%rdi), %xmm0, %xmm0
120 ; AVX-NEXT: retq
121 ;
122 ; SSE2_X86-LABEL: int_to_double_rm_optsize:
123 ; SSE2_X86: # %bb.0: # %entry
124 ; SSE2_X86-NEXT: pushl %ebp
125 ; SSE2_X86-NEXT: .cfi_def_cfa_offset 8
126 ; SSE2_X86-NEXT: .cfi_offset %ebp, -8
127 ; SSE2_X86-NEXT: movl %esp, %ebp
128 ; SSE2_X86-NEXT: .cfi_def_cfa_register %ebp
129 ; SSE2_X86-NEXT: andl $-8, %esp
130 ; SSE2_X86-NEXT: subl $8, %esp
131 ; SSE2_X86-NEXT: movl 8(%ebp), %eax
132 ; SSE2_X86-NEXT: cvtsi2sdl (%eax), %xmm0
133 ; SSE2_X86-NEXT: movsd %xmm0, (%esp)
134 ; SSE2_X86-NEXT: fldl (%esp)
135 ; SSE2_X86-NEXT: movl %ebp, %esp
136 ; SSE2_X86-NEXT: popl %ebp
137 ; SSE2_X86-NEXT: .cfi_def_cfa %esp, 4
138 ; SSE2_X86-NEXT: retl
139 ;
140 ; AVX_X86-LABEL: int_to_double_rm_optsize:
141 ; AVX_X86: # %bb.0: # %entry
142 ; AVX_X86-NEXT: pushl %ebp
143 ; AVX_X86-NEXT: .cfi_def_cfa_offset 8
144 ; AVX_X86-NEXT: .cfi_offset %ebp, -8
145 ; AVX_X86-NEXT: movl %esp, %ebp
146 ; AVX_X86-NEXT: .cfi_def_cfa_register %ebp
147 ; AVX_X86-NEXT: andl $-8, %esp
148 ; AVX_X86-NEXT: subl $8, %esp
149 ; AVX_X86-NEXT: movl 8(%ebp), %eax
150 ; AVX_X86-NEXT: vcvtsi2sdl (%eax), %xmm0, %xmm0
151 ; AVX_X86-NEXT: vmovsd %xmm0, (%esp)
152 ; AVX_X86-NEXT: fldl (%esp)
153 ; AVX_X86-NEXT: movl %ebp, %esp
154 ; AVX_X86-NEXT: popl %ebp
155 ; AVX_X86-NEXT: .cfi_def_cfa %esp, 4
156 ; AVX_X86-NEXT: retl
157 entry:
158 %0 = load i32, ptr %a
159 %1 = sitofp i32 %0 to double
160 ret double %1
161 }
163 define float @int_to_float_rr(i32 %a) {
164 ; SSE2-LABEL: int_to_float_rr:
165 ; SSE2: # %bb.0: # %entry
166 ; SSE2-NEXT: cvtsi2ss %edi, %xmm0
167 ; SSE2-NEXT: retq
168 ;
169 ; AVX-LABEL: int_to_float_rr:
170 ; AVX: # %bb.0: # %entry
171 ; AVX-NEXT: vcvtsi2ss %edi, %xmm0, %xmm0
172 ; AVX-NEXT: retq
173 ;
174 ; SSE2_X86-LABEL: int_to_float_rr:
175 ; SSE2_X86: # %bb.0: # %entry
176 ; SSE2_X86-NEXT: pushl %eax
177 ; SSE2_X86-NEXT: .cfi_def_cfa_offset 8
178 ; SSE2_X86-NEXT: cvtsi2ssl {{[0-9]+}}(%esp), %xmm0
179 ; SSE2_X86-NEXT: movss %xmm0, (%esp)
180 ; SSE2_X86-NEXT: flds (%esp)
181 ; SSE2_X86-NEXT: popl %eax
182 ; SSE2_X86-NEXT: .cfi_def_cfa_offset 4
183 ; SSE2_X86-NEXT: retl
184 ;
185 ; AVX_X86-LABEL: int_to_float_rr:
186 ; AVX_X86: # %bb.0: # %entry
187 ; AVX_X86-NEXT: pushl %eax
188 ; AVX_X86-NEXT: .cfi_def_cfa_offset 8
189 ; AVX_X86-NEXT: vcvtsi2ssl {{[0-9]+}}(%esp), %xmm0, %xmm0
190 ; AVX_X86-NEXT: vmovss %xmm0, (%esp)
191 ; AVX_X86-NEXT: flds (%esp)
192 ; AVX_X86-NEXT: popl %eax
193 ; AVX_X86-NEXT: .cfi_def_cfa_offset 4
194 ; AVX_X86-NEXT: retl
195 entry:
196 %0 = sitofp i32 %a to float
197 ret float %0
198 }
200 define float @int_to_float_rm(ptr %a) {
201 ; SSE2-LABEL: int_to_float_rm:
202 ; SSE2: # %bb.0: # %entry
203 ; SSE2-NEXT: cvtsi2ssl (%rdi), %xmm0
204 ; SSE2-NEXT: retq
205 ;
206 ; AVX-LABEL: int_to_float_rm:
207 ; AVX: # %bb.0: # %entry
208 ; AVX-NEXT: vcvtsi2ssl (%rdi), %xmm0, %xmm0
209 ; AVX-NEXT: retq
210 ;
211 ; SSE2_X86-LABEL: int_to_float_rm:
212 ; SSE2_X86: # %bb.0: # %entry
213 ; SSE2_X86-NEXT: pushl %eax
214 ; SSE2_X86-NEXT: .cfi_def_cfa_offset 8
215 ; SSE2_X86-NEXT: movl {{[0-9]+}}(%esp), %eax
216 ; SSE2_X86-NEXT: cvtsi2ssl (%eax), %xmm0
217 ; SSE2_X86-NEXT: movss %xmm0, (%esp)
218 ; SSE2_X86-NEXT: flds (%esp)
219 ; SSE2_X86-NEXT: popl %eax
220 ; SSE2_X86-NEXT: .cfi_def_cfa_offset 4
221 ; SSE2_X86-NEXT: retl
222 ;
223 ; AVX_X86-LABEL: int_to_float_rm:
224 ; AVX_X86: # %bb.0: # %entry
225 ; AVX_X86-NEXT: pushl %eax
226 ; AVX_X86-NEXT: .cfi_def_cfa_offset 8
227 ; AVX_X86-NEXT: movl {{[0-9]+}}(%esp), %eax
228 ; AVX_X86-NEXT: vcvtsi2ssl (%eax), %xmm0, %xmm0
229 ; AVX_X86-NEXT: vmovss %xmm0, (%esp)
230 ; AVX_X86-NEXT: flds (%esp)
231 ; AVX_X86-NEXT: popl %eax
232 ; AVX_X86-NEXT: .cfi_def_cfa_offset 4
233 ; AVX_X86-NEXT: retl
234 entry:
235 %0 = load i32, ptr %a
236 %1 = sitofp i32 %0 to float
237 ret float %1
238 }
240 define float @int_to_float_rm_optsize(ptr %a) optsize {
241 ; SSE2-LABEL: int_to_float_rm_optsize:
242 ; SSE2: # %bb.0: # %entry
243 ; SSE2-NEXT: cvtsi2ssl (%rdi), %xmm0
244 ; SSE2-NEXT: retq
245 ;
246 ; AVX-LABEL: int_to_float_rm_optsize:
247 ; AVX: # %bb.0: # %entry
248 ; AVX-NEXT: vcvtsi2ssl (%rdi), %xmm0, %xmm0
249 ; AVX-NEXT: retq
250 ;
251 ; SSE2_X86-LABEL: int_to_float_rm_optsize:
252 ; SSE2_X86: # %bb.0: # %entry
253 ; SSE2_X86-NEXT: pushl %eax
254 ; SSE2_X86-NEXT: .cfi_def_cfa_offset 8
255 ; SSE2_X86-NEXT: movl {{[0-9]+}}(%esp), %eax
256 ; SSE2_X86-NEXT: cvtsi2ssl (%eax), %xmm0
257 ; SSE2_X86-NEXT: movss %xmm0, (%esp)
258 ; SSE2_X86-NEXT: flds (%esp)
259 ; SSE2_X86-NEXT: popl %eax
260 ; SSE2_X86-NEXT: .cfi_def_cfa_offset 4
261 ; SSE2_X86-NEXT: retl
262 ;
263 ; AVX_X86-LABEL: int_to_float_rm_optsize:
264 ; AVX_X86: # %bb.0: # %entry
265 ; AVX_X86-NEXT: pushl %eax
266 ; AVX_X86-NEXT: .cfi_def_cfa_offset 8
267 ; AVX_X86-NEXT: movl {{[0-9]+}}(%esp), %eax
268 ; AVX_X86-NEXT: vcvtsi2ssl (%eax), %xmm0, %xmm0
269 ; AVX_X86-NEXT: vmovss %xmm0, (%esp)
270 ; AVX_X86-NEXT: flds (%esp)
271 ; AVX_X86-NEXT: popl %eax
272 ; AVX_X86-NEXT: .cfi_def_cfa_offset 4
273 ; AVX_X86-NEXT: retl
274 entry:
275 %0 = load i32, ptr %a
276 %1 = sitofp i32 %0 to float
277 ret float %1
278 }