| blob | 56618205ec7c1cfb72bbce618c718a3658270359 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -O3 < %s -mcpu=haswell -mtriple=x86_64 | FileCheck %s
4 ; Verify that we are not exponentially increasing compiling time.
5 define void @tester(float %0, float %1, float %2, float %3, float %4, float %5, float %6, float %7, float %8, float %9, float %10, float %11, float %12, float %13, float %14, float %15, float %16, float %17, float %18, float %19, float %20, float %21, float %22, float %23, float %24, float %25, float %26, float %27, float %28, float %29, float %30, float %31, float %32, float %33, float %34, float %35, float %36, float %37, float %38, float %39, float %40, float %41, float %42, float %43, float %44, float %45, float %46, float %47, float %48, float %49, float %50, float %51, float %52, float %53, float %54, float %55, float %56, float %57, float %58, float %59, float %60, float %61, float %62, float %63, float %64, float %65, float %66, float %67, float %68, float %69, float %70, float %71, float %72, float %73, float %74, float %75, float %76, float %77, float %78, float %79, ptr %80) {
6 ; CHECK-LABEL: tester:
7 ; CHECK: # %bb.0: # %entry
8 ; CHECK-NEXT: vmovaps %xmm3, %xmm13
9 ; CHECK-NEXT: vmovaps %xmm1, %xmm14
10 ; CHECK-NEXT: vmovss {{.*#+}} xmm11 = mem[0],zero,zero,zero
11 ; CHECK-NEXT: vmovss {{.*#+}} xmm8 = mem[0],zero,zero,zero
12 ; CHECK-NEXT: vmovss {{.*#+}} xmm9 = mem[0],zero,zero,zero
13 ; CHECK-NEXT: vsubss %xmm1, %xmm0, %xmm12
14 ; CHECK-NEXT: vmulss %xmm2, %xmm1, %xmm1
15 ; CHECK-NEXT: vfmsub213ss {{.*#+}} xmm1 = (xmm3 * xmm1) - xmm0
16 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm5 = -(xmm12 * xmm5) + xmm0
17 ; CHECK-NEXT: vmulss %xmm4, %xmm5, %xmm2
18 ; CHECK-NEXT: vmulss %xmm1, %xmm2, %xmm1
19 ; CHECK-NEXT: vmulss %xmm6, %xmm12, %xmm2
20 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm2 = -(xmm7 * xmm2) + xmm0
21 ; CHECK-NEXT: vmulss %xmm1, %xmm2, %xmm1
22 ; CHECK-NEXT: vmulss %xmm0, %xmm9, %xmm2
23 ; CHECK-NEXT: vmovss %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
24 ; CHECK-NEXT: vmulss %xmm2, %xmm8, %xmm2
25 ; CHECK-NEXT: vfnmadd132ss {{.*#+}} xmm2 = -(xmm2 * mem) + xmm0
26 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm7, %xmm3
27 ; CHECK-NEXT: vfnmadd132ss {{.*#+}} xmm3 = -(xmm3 * mem) + xmm0
28 ; CHECK-NEXT: vmulss %xmm2, %xmm3, %xmm2
29 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm0, %xmm3
30 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm3, %xmm4
31 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm4 = -(xmm11 * xmm4) + xmm0
32 ; CHECK-NEXT: vmulss %xmm1, %xmm4, %xmm4
33 ; CHECK-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
34 ; CHECK-NEXT: vfnmadd132ss {{.*#+}} xmm1 = -(xmm1 * mem) + xmm0
35 ; CHECK-NEXT: vmulss %xmm2, %xmm1, %xmm2
36 ; CHECK-NEXT: vmovss {{.*#+}} xmm6 = mem[0],zero,zero,zero
37 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm6, %xmm5
38 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm5 = -(xmm8 * xmm5) + xmm0
39 ; CHECK-NEXT: vmulss %xmm4, %xmm5, %xmm4
40 ; CHECK-NEXT: vmovss {{.*#+}} xmm5 = mem[0],zero,zero,zero
41 ; CHECK-NEXT: vmulss %xmm0, %xmm5, %xmm1
42 ; CHECK-NEXT: vmovss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
43 ; CHECK-NEXT: vmovaps %xmm5, %xmm15
44 ; CHECK-NEXT: vmulss %xmm1, %xmm11, %xmm5
45 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm5 = -(xmm12 * xmm5) + xmm0
46 ; CHECK-NEXT: vmulss %xmm2, %xmm5, %xmm2
47 ; CHECK-NEXT: vmovss {{.*#+}} xmm5 = mem[0],zero,zero,zero
48 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm5 = -(xmm9 * xmm5) + xmm0
49 ; CHECK-NEXT: vmulss %xmm4, %xmm5, %xmm4
50 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm3, %xmm9
51 ; CHECK-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
52 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm3 = -(xmm9 * xmm3) + xmm0
53 ; CHECK-NEXT: vmulss %xmm2, %xmm3, %xmm2
54 ; CHECK-NEXT: vmulss %xmm4, %xmm2, %xmm2
55 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm2, %xmm2
56 ; CHECK-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
57 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm3 = -(xmm13 * xmm3) + xmm0
58 ; CHECK-NEXT: vmulss %xmm2, %xmm3, %xmm2
59 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm2, %xmm3
60 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm14, %xmm5
61 ; CHECK-NEXT: vfnmadd132ss {{.*#+}} xmm5 = -(xmm5 * mem) + xmm0
62 ; CHECK-NEXT: vmovss {{.*#+}} xmm7 = mem[0],zero,zero,zero
63 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm7, %xmm10
64 ; CHECK-NEXT: vfnmadd132ss {{.*#+}} xmm10 = -(xmm10 * mem) + xmm0
65 ; CHECK-NEXT: vmulss %xmm5, %xmm10, %xmm5
66 ; CHECK-NEXT: vmulss %xmm3, %xmm5, %xmm3
67 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm3, %xmm3
68 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm3, %xmm3
69 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm3, %xmm3
70 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm8, %xmm5
71 ; CHECK-NEXT: vfnmadd132ss {{.*#+}} xmm5 = -(xmm5 * mem) + xmm0
72 ; CHECK-NEXT: vmulss %xmm3, %xmm5, %xmm3
73 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm3, %xmm3
74 ; CHECK-NEXT: vmovss {{.*#+}} xmm5 = mem[0],zero,zero,zero
75 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm5 = -(xmm14 * xmm5) + xmm0
76 ; CHECK-NEXT: vmovss {{.*#+}} xmm10 = mem[0],zero,zero,zero
77 ; CHECK-NEXT: vfnmadd132ss {{.*#+}} xmm10 = -(xmm10 * mem) + xmm0
78 ; CHECK-NEXT: vmulss %xmm5, %xmm10, %xmm5
79 ; CHECK-NEXT: vmulss %xmm3, %xmm5, %xmm3
80 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm3, %xmm3
81 ; CHECK-NEXT: vmovss {{.*#+}} xmm10 = mem[0],zero,zero,zero
82 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm15, %xmm1
83 ; CHECK-NEXT: vmovss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
84 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm10 = -(xmm1 * xmm10) + xmm0
85 ; CHECK-NEXT: vmulss %xmm3, %xmm10, %xmm3
86 ; CHECK-NEXT: vmulss %xmm0, %xmm12, %xmm15
87 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm15, %xmm10
88 ; CHECK-NEXT: vfnmadd132ss {{.*#+}} xmm10 = -(xmm10 * mem) + xmm0
89 ; CHECK-NEXT: vmovss {{.*#+}} xmm4 = mem[0],zero,zero,zero
90 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm4, %xmm12
91 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm12 = -(xmm6 * xmm12) + xmm0
92 ; CHECK-NEXT: vmulss %xmm10, %xmm12, %xmm10
93 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm3, %xmm3
94 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm3, %xmm3
95 ; CHECK-NEXT: vmulss %xmm3, %xmm10, %xmm12
96 ; CHECK-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
97 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm2 = -(xmm6 * xmm2) + xmm0
98 ; CHECK-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
99 ; CHECK-NEXT: vmulss %xmm3, %xmm15, %xmm1
100 ; CHECK-NEXT: vfnmadd132ss {{.*#+}} xmm1 = -(xmm1 * mem) + xmm0
101 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm0, %xmm8
102 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm8, %xmm5
103 ; CHECK-NEXT: vfnmadd132ss {{.*#+}} xmm5 = -(xmm5 * mem) + xmm0
104 ; CHECK-NEXT: vmulss %xmm2, %xmm1, %xmm1
105 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm3, %xmm2
106 ; CHECK-NEXT: vfnmadd132ss {{.*#+}} xmm2 = -(xmm2 * mem) + xmm0
107 ; CHECK-NEXT: vmulss %xmm1, %xmm5, %xmm1
108 ; CHECK-NEXT: vmulss %xmm1, %xmm2, %xmm1
109 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm3, %xmm2
110 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm2 = -(xmm4 * xmm2) + xmm0
111 ; CHECK-NEXT: vmulss %xmm1, %xmm2, %xmm1
112 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm12, %xmm2
113 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm2, %xmm2
114 ; CHECK-NEXT: vmulss %xmm2, %xmm1, %xmm4
115 ; CHECK-NEXT: vmovss {{.*#+}} xmm12 = mem[0],zero,zero,zero
116 ; CHECK-NEXT: vmovss {{.*#+}} xmm5 = mem[0],zero,zero,zero
117 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm5, %xmm3
118 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm3 = -(xmm12 * xmm3) + xmm0
119 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm15, %xmm1
120 ; CHECK-NEXT: vfnmadd132ss {{.*#+}} xmm1 = -(xmm1 * mem) + xmm0
121 ; CHECK-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 4-byte Reload
122 ; CHECK-NEXT: # xmm2 = mem[0],zero,zero,zero
123 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm2, %xmm2
124 ; CHECK-NEXT: vmulss %xmm3, %xmm1, %xmm1
125 ; CHECK-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
126 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm2 = -(xmm3 * xmm2) + xmm0
127 ; CHECK-NEXT: vmulss %xmm1, %xmm2, %xmm1
128 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm4, %xmm2
129 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm2, %xmm2
130 ; CHECK-NEXT: vmulss %xmm2, %xmm1, %xmm1
131 ; CHECK-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm10 # 4-byte Reload
132 ; CHECK-NEXT: # xmm10 = mem[0],zero,zero,zero
133 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm10, %xmm2
134 ; CHECK-NEXT: vfnmadd132ss {{.*#+}} xmm6 = -(xmm6 * mem) + xmm0
135 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm2 = -(xmm12 * xmm2) + xmm0
136 ; CHECK-NEXT: vmulss %xmm2, %xmm6, %xmm2
137 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm1, %xmm1
138 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm1, %xmm1
139 ; CHECK-NEXT: vfnmadd132ss {{.*#+}} xmm7 = -(xmm7 * mem) + xmm0
140 ; CHECK-NEXT: vmulss %xmm2, %xmm7, %xmm2
141 ; CHECK-NEXT: vmulss %xmm1, %xmm2, %xmm1
142 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm1, %xmm1
143 ; CHECK-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
144 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm2 = -(xmm13 * xmm2) + xmm0
145 ; CHECK-NEXT: vmulss %xmm1, %xmm2, %xmm2
146 ; CHECK-NEXT: vmulss %xmm0, %xmm5, %xmm1
147 ; CHECK-NEXT: vmulss %xmm3, %xmm1, %xmm1
148 ; CHECK-NEXT: vfnmadd132ss {{.*#+}} xmm1 = -(xmm1 * mem) + xmm0
149 ; CHECK-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
150 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm3 = -(xmm5 * xmm3) + xmm0
151 ; CHECK-NEXT: vmulss %xmm3, %xmm1, %xmm3
152 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm8, %xmm1
153 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm8, %xmm4
154 ; CHECK-NEXT: vfnmadd132ss {{.*#+}} xmm4 = -(xmm4 * mem) + xmm0
155 ; CHECK-NEXT: vmulss %xmm3, %xmm4, %xmm3
156 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm2, %xmm2
157 ; CHECK-NEXT: vmulss %xmm2, %xmm3, %xmm2
158 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm9 = -(xmm5 * xmm9) + xmm0
159 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm15, %xmm3
160 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm3 = -(xmm13 * xmm3) + xmm0
161 ; CHECK-NEXT: vmovss {{.*#+}} xmm4 = mem[0],zero,zero,zero
162 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm4, %xmm4
163 ; CHECK-NEXT: vfnmadd132ss {{.*#+}} xmm4 = -(xmm4 * mem) + xmm0
164 ; CHECK-NEXT: vmulss %xmm3, %xmm9, %xmm3
165 ; CHECK-NEXT: vmulss %xmm3, %xmm4, %xmm3
166 ; CHECK-NEXT: vfnmadd132ss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm11 # 4-byte Folded Reload
167 ; CHECK-NEXT: # xmm11 = -(xmm11 * mem) + xmm0
168 ; CHECK-NEXT: vmulss %xmm3, %xmm11, %xmm3
169 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm0, %xmm4
170 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm4, %xmm4
171 ; CHECK-NEXT: vfnmadd132ss {{.*#+}} xmm4 = -(xmm4 * mem) + xmm0
172 ; CHECK-NEXT: vmovss {{.*#+}} xmm5 = mem[0],zero,zero,zero
173 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm5, %xmm6
174 ; CHECK-NEXT: vmulss %xmm5, %xmm14, %xmm5
175 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm15, %xmm7
176 ; CHECK-NEXT: vmulss %xmm15, %xmm13, %xmm8
177 ; CHECK-NEXT: vmovss {{.*#+}} xmm11 = mem[0],zero,zero,zero
178 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm8 = -(xmm11 * xmm8) + xmm0
179 ; CHECK-NEXT: vmovss {{.*#+}} xmm9 = mem[0],zero,zero,zero
180 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm9, %xmm9
181 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm9 = -(xmm11 * xmm9) + xmm0
182 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm6 = -(xmm11 * xmm6) + xmm0
183 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm5 = -(xmm11 * xmm5) + xmm0
184 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm10, %xmm10
185 ; CHECK-NEXT: vmulss %xmm0, %xmm12, %xmm11
186 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm11, %xmm11
187 ; CHECK-NEXT: vmovss {{.*#+}} xmm12 = mem[0],zero,zero,zero
188 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm11 = -(xmm12 * xmm11) + xmm0
189 ; CHECK-NEXT: vfnmadd213ss {{.*#+}} xmm10 = -(xmm12 * xmm10) + xmm0
190 ; CHECK-NEXT: vfmsub213ss {{.*#+}} xmm7 = (xmm13 * xmm7) - xmm0
191 ; CHECK-NEXT: vfnmadd132ss {{.*#+}} xmm1 = -(xmm1 * mem) + xmm0
192 ; CHECK-NEXT: vmulss %xmm3, %xmm1, %xmm0
193 ; CHECK-NEXT: vmulss %xmm0, %xmm8, %xmm0
194 ; CHECK-NEXT: vmulss %xmm0, %xmm9, %xmm0
195 ; CHECK-NEXT: vmulss %xmm0, %xmm6, %xmm0
196 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm2, %xmm1
197 ; CHECK-NEXT: vmulss %xmm1, %xmm0, %xmm0
198 ; CHECK-NEXT: vmulss %xmm4, %xmm5, %xmm1
199 ; CHECK-NEXT: vmulss %xmm1, %xmm11, %xmm1
200 ; CHECK-NEXT: vmulss %xmm1, %xmm10, %xmm1
201 ; CHECK-NEXT: vmulss {{[0-9]+}}(%rsp), %xmm0, %xmm0
202 ; CHECK-NEXT: vmulss %xmm1, %xmm7, %xmm1
203 ; CHECK-NEXT: vmulss %xmm0, %xmm1, %xmm0
204 ; CHECK-NEXT: vmovss %xmm0, (%rdi)
205 ; CHECK-NEXT: retq
206 entry:
207 %81 = fsub reassoc nsz contract float %0, %1
208 %82 = fmul reassoc nsz contract float %1, %2
209 %83 = fmul reassoc nsz contract float %3, %82
210 %84 = fsub reassoc nsz contract float %0, %83
211 %85 = fmul reassoc nsz contract float %84, %4
212 %86 = fmul reassoc nsz contract float %81, %5
213 %87 = fsub reassoc nsz contract float %0, %86
214 %88 = fmul reassoc nsz contract float %87, %85
215 %89 = fmul reassoc nsz contract float %81, %6
216 %90 = fmul reassoc nsz contract float %89, %7
217 %91 = fsub reassoc nsz contract float %0, %90
218 %92 = fmul reassoc nsz contract float %91, %88
219 %93 = fmul reassoc nsz contract float %8, %0
220 %94 = fmul reassoc nsz contract float %93, %9
221 %95 = fmul reassoc nsz contract float %94, %10
222 %96 = fsub reassoc nsz contract float %0, %95
223 %97 = fmul reassoc nsz contract float %96, %92
224 %98 = fmul reassoc nsz contract float %11, %7
225 %99 = fmul reassoc nsz contract float %98, %12
226 %100 = fsub reassoc nsz contract float %0, %99
227 %101 = fmul reassoc nsz contract float %100, %97
228 %102 = fmul reassoc nsz contract float %13, %0
229 %103 = fmul reassoc nsz contract float %102, %14
230 %104 = fmul reassoc nsz contract float %103, %15
231 %105 = fsub reassoc nsz contract float %0, %104
232 %106 = fmul reassoc nsz contract float %105, %101
233 %107 = fmul reassoc nsz contract float %16, %17
234 %108 = fsub reassoc nsz contract float %0, %107
235 %109 = fmul reassoc nsz contract float %108, %106
236 %110 = fmul reassoc nsz contract float %18, %19
237 %111 = fmul reassoc nsz contract float %110, %9
238 %112 = fsub reassoc nsz contract float %0, %111
239 %113 = fmul reassoc nsz contract float %112, %109
240 %114 = fmul reassoc nsz contract float %20, %0
241 %115 = fmul reassoc nsz contract float %114, %15
242 %116 = fmul reassoc nsz contract float %81, %115
243 %117 = fsub reassoc nsz contract float %0, %116
244 %118 = fmul reassoc nsz contract float %117, %113
245 %119 = fmul reassoc nsz contract float %8, %21
246 %120 = fsub reassoc nsz contract float %0, %119
247 %121 = fmul reassoc nsz contract float %120, %118
248 %122 = fmul reassoc nsz contract float %102, %22
249 %123 = fmul reassoc nsz contract float %122, %23
250 %124 = fsub reassoc nsz contract float %0, %123
251 %125 = fmul reassoc nsz contract float %124, %121
252 %126 = fmul reassoc nsz contract float %125, %24
253 %127 = fmul reassoc nsz contract float %3, %25
254 %128 = fsub reassoc nsz contract float %0, %127
255 %129 = fmul reassoc nsz contract float %128, %126
256 %130 = fmul reassoc nsz contract float %129, %26
257 %131 = fmul reassoc nsz contract float %27, %1
258 %132 = fmul reassoc nsz contract float %131, %28
259 %133 = fsub reassoc nsz contract float %0, %132
260 %134 = fmul reassoc nsz contract float %133, %130
261 %135 = fmul reassoc nsz contract float %29, %30
262 %136 = fmul reassoc nsz contract float %135, %31
263 %137 = fsub reassoc nsz contract float %0, %136
264 %138 = fmul reassoc nsz contract float %137, %134
265 %139 = fmul reassoc nsz contract float %138, %32
266 %140 = fmul reassoc nsz contract float %139, %33
267 %141 = fmul reassoc nsz contract float %140, %34
268 %142 = fmul reassoc nsz contract float %35, %9
269 %143 = fmul reassoc nsz contract float %142, %36
270 %144 = fsub reassoc nsz contract float %0, %143
271 %145 = fmul reassoc nsz contract float %144, %141
272 %146 = fmul reassoc nsz contract float %145, %37
273 %147 = fmul reassoc nsz contract float %1, %38
274 %148 = fsub reassoc nsz contract float %0, %147
275 %149 = fmul reassoc nsz contract float %148, %146
276 %150 = fmul reassoc nsz contract float %39, %40
277 %151 = fsub reassoc nsz contract float %0, %150
278 %152 = fmul reassoc nsz contract float %151, %149
279 %153 = fmul reassoc nsz contract float %152, %41
280 %154 = fmul reassoc nsz contract float %20, %42
281 %155 = fmul reassoc nsz contract float %154, %43
282 %156 = fsub reassoc nsz contract float %0, %155
283 %157 = fmul reassoc nsz contract float %156, %153
284 %158 = fmul reassoc nsz contract float %157, %44
285 %159 = fmul reassoc nsz contract float %158, %45
286 %160 = fmul reassoc nsz contract float %81, %0
287 %161 = fmul reassoc nsz contract float %160, %46
288 %162 = fmul reassoc nsz contract float %161, %14
289 %163 = fsub reassoc nsz contract float %0, %162
290 %164 = fmul reassoc nsz contract float %163, %159
291 %165 = fmul reassoc nsz contract float %8, %47
292 %166 = fmul reassoc nsz contract float %18, %165
293 %167 = fsub reassoc nsz contract float %0, %166
294 %168 = fmul reassoc nsz contract float %167, %164
295 %169 = fmul reassoc nsz contract float %168, %48
296 %170 = fmul reassoc nsz contract float %169, %49
297 %171 = fmul reassoc nsz contract float %18, %50
298 %172 = fsub reassoc nsz contract float %0, %171
299 %173 = fmul reassoc nsz contract float %172, %170
300 %174 = fmul reassoc nsz contract float %16, %160
301 %175 = fmul reassoc nsz contract float %174, %12
302 %176 = fsub reassoc nsz contract float %0, %175
303 %177 = fmul reassoc nsz contract float %176, %173
304 %178 = fmul reassoc nsz contract float %51, %0
305 %179 = fmul reassoc nsz contract float %178, %22
306 %180 = fmul reassoc nsz contract float %179, %52
307 %181 = fsub reassoc nsz contract float %0, %180
308 %182 = fmul reassoc nsz contract float %181, %177
309 %183 = fmul reassoc nsz contract float %27, %16
310 %184 = fmul reassoc nsz contract float %183, %53
311 %185 = fsub reassoc nsz contract float %0, %184
312 %186 = fmul reassoc nsz contract float %185, %182
313 %187 = fmul reassoc nsz contract float %16, %54
314 %188 = fmul reassoc nsz contract float %8, %187
315 %189 = fsub reassoc nsz contract float %0, %188
316 %190 = fmul reassoc nsz contract float %189, %186
317 %191 = fmul reassoc nsz contract float %190, %55
318 %192 = fmul reassoc nsz contract float %191, %56
319 %193 = fmul reassoc nsz contract float %57, %58
320 %194 = fmul reassoc nsz contract float %193, %59
321 %195 = fsub reassoc nsz contract float %0, %194
322 %196 = fmul reassoc nsz contract float %195, %192
323 %197 = fmul reassoc nsz contract float %13, %160
324 %198 = fmul reassoc nsz contract float %197, %36
325 %199 = fsub reassoc nsz contract float %0, %198
326 %200 = fmul reassoc nsz contract float %199, %196
327 %201 = fmul reassoc nsz contract float %93, %60
328 %202 = fmul reassoc nsz contract float %201, %61
329 %203 = fsub reassoc nsz contract float %0, %202
330 %204 = fmul reassoc nsz contract float %203, %200
331 %205 = fmul reassoc nsz contract float %204, %62
332 %206 = fmul reassoc nsz contract float %205, %63
333 %207 = fmul reassoc nsz contract float %114, %9
334 %208 = fmul reassoc nsz contract float %207, %59
335 %209 = fsub reassoc nsz contract float %0, %208
336 %210 = fmul reassoc nsz contract float %209, %206
337 %211 = fmul reassoc nsz contract float %18, %64
338 %212 = fsub reassoc nsz contract float %0, %211
339 %213 = fmul reassoc nsz contract float %212, %210
340 %214 = fmul reassoc nsz contract float %29, %65
341 %215 = fsub reassoc nsz contract float %0, %214
342 %216 = fmul reassoc nsz contract float %215, %213
343 %217 = fmul reassoc nsz contract float %216, %66
344 %218 = fmul reassoc nsz contract float %3, %67
345 %219 = fsub reassoc nsz contract float %0, %218
346 %220 = fmul reassoc nsz contract float %219, %217
347 %221 = fmul reassoc nsz contract float %220, %68
348 %222 = fmul reassoc nsz contract float %57, %69
349 %223 = fsub reassoc nsz contract float %0, %222
350 %224 = fmul reassoc nsz contract float %223, %221
351 %225 = fmul reassoc nsz contract float %57, %0
352 %226 = fmul reassoc nsz contract float %225, %61
353 %227 = fmul reassoc nsz contract float %226, %12
354 %228 = fsub reassoc nsz contract float %0, %227
355 %229 = fmul reassoc nsz contract float %228, %224
356 %230 = fmul reassoc nsz contract float %178, %70
357 %231 = fmul reassoc nsz contract float %230, %46
358 %232 = fsub reassoc nsz contract float %0, %231
359 %233 = fmul reassoc nsz contract float %232, %229
360 %234 = fmul reassoc nsz contract float %233, %71
361 %235 = fmul reassoc nsz contract float %57, %122
362 %236 = fsub reassoc nsz contract float %0, %235
363 %237 = fmul reassoc nsz contract float %236, %234
364 %238 = fmul reassoc nsz contract float %20, %160
365 %239 = fmul reassoc nsz contract float %3, %238
366 %240 = fsub reassoc nsz contract float %0, %239
367 %241 = fmul reassoc nsz contract float %240, %237
368 %242 = fmul reassoc nsz contract float %16, %72
369 %243 = fmul reassoc nsz contract float %242, %73
370 %244 = fsub reassoc nsz contract float %0, %243
371 %245 = fmul reassoc nsz contract float %244, %241
372 %246 = fmul reassoc nsz contract float %154, %15
373 %247 = fsub reassoc nsz contract float %0, %246
374 %248 = fmul reassoc nsz contract float %247, %245
375 %249 = fmul reassoc nsz contract float %178, %23
376 %250 = fmul reassoc nsz contract float %249, %74
377 %251 = fsub reassoc nsz contract float %0, %250
378 %252 = fmul reassoc nsz contract float %251, %248
379 %253 = fmul reassoc nsz contract float %3, %160
380 %254 = fmul reassoc nsz contract float %51, %253
381 %255 = fsub reassoc nsz contract float %0, %254
382 %256 = fmul reassoc nsz contract float %255, %252
383 %257 = fmul reassoc nsz contract float %13, %75
384 %258 = fmul reassoc nsz contract float %257, %51
385 %259 = fsub reassoc nsz contract float %0, %258
386 %260 = fmul reassoc nsz contract float %259, %256
387 %261 = fmul reassoc nsz contract float %8, %76
388 %262 = fmul reassoc nsz contract float %51, %261
389 %263 = fsub reassoc nsz contract float %0, %262
390 %264 = fmul reassoc nsz contract float %263, %260
391 %265 = fmul reassoc nsz contract float %264, %77
392 %266 = fmul reassoc nsz contract float %39, %0
393 %267 = fmul reassoc nsz contract float %266, %78
394 %268 = fmul reassoc nsz contract float %267, %14
395 %269 = fsub reassoc nsz contract float %0, %268
396 %270 = fmul reassoc nsz contract float %269, %265
397 %271 = fmul reassoc nsz contract float %1, %76
398 %272 = fmul reassoc nsz contract float %51, %271
399 %273 = fsub reassoc nsz contract float %0, %272
400 %274 = fmul reassoc nsz contract float %273, %270
401 %275 = fmul reassoc nsz contract float %0, %59
402 %276 = fmul reassoc nsz contract float %275, %79
403 %277 = fmul reassoc nsz contract float %276, %36
404 %278 = fsub reassoc nsz contract float %0, %277
405 %279 = fmul reassoc nsz contract float %278, %274
406 %280 = fmul reassoc nsz contract float %114, %22
407 %281 = fmul reassoc nsz contract float %280, %36
408 %282 = fsub reassoc nsz contract float %0, %281
409 %283 = fmul reassoc nsz contract float %282, %279
410 %284 = fmul reassoc nsz contract float %0, %43
411 %285 = fmul reassoc nsz contract float %284, %81
412 %286 = fmul reassoc nsz contract float %3, %285
413 %287 = fsub reassoc nsz contract float %0, %286
414 %288 = fmul reassoc nsz contract float %287, %283
415 store float %288, ptr %80, align 4
416 ret void
417 }