| blob | b1576851ed0236d8f823c45fa170447d6058a8ee |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX1
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512
7 define i32 @PR63108() {
8 ; SSE-LABEL: PR63108:
9 ; SSE: # %bb.0: # %entry
10 ; SSE-NEXT: xorl %eax, %eax
11 ; SSE-NEXT: testb %al, %al
12 ; SSE-NEXT: je .LBB0_2
13 ; SSE-NEXT: # %bb.1:
14 ; SSE-NEXT: movd {{.*#+}} xmm0 = [57339,0,0,0]
15 ; SSE-NEXT: jmp .LBB0_5
16 ; SSE-NEXT: .LBB0_2: # %vector.body.preheader
17 ; SSE-NEXT: pxor %xmm0, %xmm0
18 ; SSE-NEXT: movd {{.*#+}} xmm1 = [57339,0,0,0]
19 ; SSE-NEXT: xorl %eax, %eax
20 ; SSE-NEXT: .p2align 4, 0x90
21 ; SSE-NEXT: .LBB0_3: # %vector.body
22 ; SSE-NEXT: # =>This Inner Loop Header: Depth=1
23 ; SSE-NEXT: movdqa %xmm1, %xmm2
24 ; SSE-NEXT: testb %al, %al
25 ; SSE-NEXT: pxor %xmm1, %xmm1
26 ; SSE-NEXT: jne .LBB0_3
27 ; SSE-NEXT: # %bb.4: # %middle.block
28 ; SSE-NEXT: pxor %xmm2, %xmm0
29 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
30 ; SSE-NEXT: pxor %xmm0, %xmm1
31 ; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,1,1]
32 ; SSE-NEXT: pxor %xmm1, %xmm2
33 ; SSE-NEXT: movdqa %xmm2, %xmm0
34 ; SSE-NEXT: psrld $16, %xmm0
35 ; SSE-NEXT: pxor %xmm2, %xmm0
36 ; SSE-NEXT: .LBB0_5: # %for.cond.cleanup
37 ; SSE-NEXT: movd %xmm0, %eax
38 ; SSE-NEXT: movsbl %al, %ecx
39 ; SSE-NEXT: shrl $8, %eax
40 ; SSE-NEXT: movsbl %al, %eax
41 ; SSE-NEXT: addl %ecx, %eax
42 ; SSE-NEXT: retq
43 ;
44 ; AVX1-LABEL: PR63108:
45 ; AVX1: # %bb.0: # %entry
46 ; AVX1-NEXT: xorl %eax, %eax
47 ; AVX1-NEXT: testb %al, %al
48 ; AVX1-NEXT: je .LBB0_2
49 ; AVX1-NEXT: # %bb.1:
50 ; AVX1-NEXT: vmovd {{.*#+}} xmm0 = [57339,0,0,0]
51 ; AVX1-NEXT: jmp .LBB0_5
52 ; AVX1-NEXT: .LBB0_2: # %vector.body.preheader
53 ; AVX1-NEXT: vmovss {{.*#+}} xmm0 = [57339,0,0,0]
54 ; AVX1-NEXT: xorl %eax, %eax
55 ; AVX1-NEXT: .p2align 4, 0x90
56 ; AVX1-NEXT: .LBB0_3: # %vector.body
57 ; AVX1-NEXT: # =>This Inner Loop Header: Depth=1
58 ; AVX1-NEXT: vmovaps %ymm0, %ymm1
59 ; AVX1-NEXT: vxorps %xmm0, %xmm0, %xmm0
60 ; AVX1-NEXT: testb %al, %al
61 ; AVX1-NEXT: jne .LBB0_3
62 ; AVX1-NEXT: # %bb.4: # %middle.block
63 ; AVX1-NEXT: vxorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm0
64 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
65 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
66 ; AVX1-NEXT: vshufps {{.*#+}} xmm1 = xmm0[2,3,2,3]
67 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
68 ; AVX1-NEXT: vshufps {{.*#+}} xmm1 = xmm0[1,1,1,1]
69 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
70 ; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
71 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
72 ; AVX1-NEXT: .LBB0_5: # %for.cond.cleanup
73 ; AVX1-NEXT: vmovd %xmm0, %eax
74 ; AVX1-NEXT: vpextrb $1, %xmm0, %ecx
75 ; AVX1-NEXT: movsbl %al, %edx
76 ; AVX1-NEXT: movsbl %cl, %eax
77 ; AVX1-NEXT: addl %edx, %eax
78 ; AVX1-NEXT: vzeroupper
79 ; AVX1-NEXT: retq
80 ;
81 ; AVX2-LABEL: PR63108:
82 ; AVX2: # %bb.0: # %entry
83 ; AVX2-NEXT: xorl %eax, %eax
84 ; AVX2-NEXT: testb %al, %al
85 ; AVX2-NEXT: je .LBB0_2
86 ; AVX2-NEXT: # %bb.1:
87 ; AVX2-NEXT: vpbroadcastw {{.*#+}} xmm0 = [251,223,251,223,251,223,251,223,251,223,251,223,251,223,251,223]
88 ; AVX2-NEXT: jmp .LBB0_5
89 ; AVX2-NEXT: .LBB0_2: # %vector.body.preheader
90 ; AVX2-NEXT: vmovd {{.*#+}} xmm0 = [57339,0,0,0]
91 ; AVX2-NEXT: xorl %eax, %eax
92 ; AVX2-NEXT: .p2align 4, 0x90
93 ; AVX2-NEXT: .LBB0_3: # %vector.body
94 ; AVX2-NEXT: # =>This Inner Loop Header: Depth=1
95 ; AVX2-NEXT: vmovdqa %ymm0, %ymm1
96 ; AVX2-NEXT: vpxor %xmm0, %xmm0, %xmm0
97 ; AVX2-NEXT: testb %al, %al
98 ; AVX2-NEXT: jne .LBB0_3
99 ; AVX2-NEXT: # %bb.4: # %middle.block
100 ; AVX2-NEXT: vpxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm0
101 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
102 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
103 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
104 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
105 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
106 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
107 ; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
108 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
109 ; AVX2-NEXT: .LBB0_5: # %for.cond.cleanup
110 ; AVX2-NEXT: vmovd %xmm0, %eax
111 ; AVX2-NEXT: vpextrb $1, %xmm0, %ecx
112 ; AVX2-NEXT: movsbl %al, %edx
113 ; AVX2-NEXT: movsbl %cl, %eax
114 ; AVX2-NEXT: addl %edx, %eax
115 ; AVX2-NEXT: vzeroupper
116 ; AVX2-NEXT: retq
117 ;
118 ; AVX512-LABEL: PR63108:
119 ; AVX512: # %bb.0: # %entry
120 ; AVX512-NEXT: xorl %eax, %eax
121 ; AVX512-NEXT: testb %al, %al
122 ; AVX512-NEXT: je .LBB0_2
123 ; AVX512-NEXT: # %bb.1:
124 ; AVX512-NEXT: vpbroadcastw {{.*#+}} xmm0 = [251,223,251,223,251,223,251,223,251,223,251,223,251,223,251,223]
125 ; AVX512-NEXT: jmp .LBB0_5
126 ; AVX512-NEXT: .LBB0_2: # %vector.body.preheader
127 ; AVX512-NEXT: vmovd {{.*#+}} xmm0 = [57339,0,0,0]
128 ; AVX512-NEXT: xorl %eax, %eax
129 ; AVX512-NEXT: .p2align 4, 0x90
130 ; AVX512-NEXT: .LBB0_3: # %vector.body
131 ; AVX512-NEXT: # =>This Inner Loop Header: Depth=1
132 ; AVX512-NEXT: vmovdqa %ymm0, %ymm1
133 ; AVX512-NEXT: vpxor %xmm0, %xmm0, %xmm0
134 ; AVX512-NEXT: testb %al, %al
135 ; AVX512-NEXT: jne .LBB0_3
136 ; AVX512-NEXT: # %bb.4: # %middle.block
137 ; AVX512-NEXT: vpxord {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm0
138 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
139 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
140 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
141 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
142 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
143 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
144 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
145 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
146 ; AVX512-NEXT: .LBB0_5: # %for.cond.cleanup
147 ; AVX512-NEXT: vmovd %xmm0, %eax
148 ; AVX512-NEXT: vpextrb $1, %xmm0, %ecx
149 ; AVX512-NEXT: movsbl %al, %edx
150 ; AVX512-NEXT: movsbl %cl, %eax
151 ; AVX512-NEXT: addl %edx, %eax
152 ; AVX512-NEXT: vzeroupper
153 ; AVX512-NEXT: retq
154 entry:
155 br i1 poison, label %for.cond.cleanup, label %vector.body
157 vector.body: ; preds = %vector.body, %entry
158 %vec.phi = phi <16 x i16> [ zeroinitializer, %vector.body ], [ <i16 -8197, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, %entry ]
159 %0 = icmp eq i32 poison, poison
160 br i1 %0, label %middle.block, label %vector.body
162 middle.block: ; preds = %vector.body
163 %bin.rdx22 = xor <16 x i16> %vec.phi, <i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256>
164 %1 = tail call i16 @llvm.vector.reduce.xor.v16i16(<16 x i16> %bin.rdx22)
165 %2 = bitcast i16 %1 to <2 x i8>
166 br label %for.cond.cleanup
168 for.cond.cleanup: ; preds = %middle.block, %entry
169 %id15142.0.lcssa = phi <2 x i8> [ <i8 -5, i8 -33>, %entry ], [ %2, %middle.block ]
170 %vecext = extractelement <2 x i8> %id15142.0.lcssa, i64 0
171 %vecext8 = extractelement <2 x i8> %id15142.0.lcssa, i64 1
172 %conv7 = sext i8 %vecext to i32
173 %conv9 = sext i8 %vecext8 to i32
174 %res = add i32 %conv7, %conv9
175 ret i32 %res
176 }
177 declare i16 @llvm.vector.reduce.xor.v16i16(<16 x i16>)