1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
2 ; RUN: llc < %s | FileCheck %s
3 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
4 target triple = "x86_64-unknown-linux-gnu"
6 define i32 @foo_noprotect() local_unnamed_addr {
7 ; CHECK-LABEL: foo_noprotect:
9 ; CHECK-NEXT: pushq %rbp
10 ; CHECK-NEXT: .cfi_def_cfa_offset 16
11 ; CHECK-NEXT: .cfi_offset %rbp, -16
12 ; CHECK-NEXT: movq %rsp, %rbp
13 ; CHECK-NEXT: .cfi_def_cfa_register %rbp
14 ; CHECK-NEXT: andq $-65536, %rsp # imm = 0xFFFF0000
15 ; CHECK-NEXT: subq $65536, %rsp # imm = 0x10000
16 ; CHECK-NEXT: movl $1, 392(%rsp)
17 ; CHECK-NEXT: movl (%rsp), %eax
18 ; CHECK-NEXT: movq %rbp, %rsp
19 ; CHECK-NEXT: popq %rbp
20 ; CHECK-NEXT: .cfi_def_cfa %rsp, 8
22 %a = alloca i32, i64 100, align 65536
23 %b = getelementptr inbounds i32, ptr %a, i64 98
24 store volatile i32 1, ptr %b
25 %c = load volatile i32, ptr %a
29 define i32 @foo_protect() local_unnamed_addr #0 {
30 ; CHECK-LABEL: foo_protect:
32 ; CHECK-NEXT: pushq %rbp
33 ; CHECK-NEXT: .cfi_def_cfa_offset 16
34 ; CHECK-NEXT: .cfi_offset %rbp, -16
35 ; CHECK-NEXT: movq %rsp, %rbp
36 ; CHECK-NEXT: .cfi_def_cfa_register %rbp
37 ; CHECK-NEXT: movq %rsp, %r11
38 ; CHECK-NEXT: andq $-65536, %r11 # imm = 0xFFFF0000
39 ; CHECK-NEXT: cmpq %rsp, %r11
40 ; CHECK-NEXT: je .LBB1_4
41 ; CHECK-NEXT: # %bb.1:
42 ; CHECK-NEXT: subq $4096, %rsp # imm = 0x1000
43 ; CHECK-NEXT: cmpq %r11, %rsp
44 ; CHECK-NEXT: jb .LBB1_3
45 ; CHECK-NEXT: .LBB1_2: # =>This Inner Loop Header: Depth=1
46 ; CHECK-NEXT: movq $0, (%rsp)
47 ; CHECK-NEXT: subq $4096, %rsp # imm = 0x1000
48 ; CHECK-NEXT: cmpq %rsp, %r11
49 ; CHECK-NEXT: jb .LBB1_2
50 ; CHECK-NEXT: .LBB1_3:
51 ; CHECK-NEXT: movq %r11, %rsp
52 ; CHECK-NEXT: movq $0, (%rsp)
53 ; CHECK-NEXT: .LBB1_4:
54 ; CHECK-NEXT: movq %rsp, %r11
55 ; CHECK-NEXT: subq $65536, %r11 # imm = 0x10000
56 ; CHECK-NEXT: .LBB1_5: # =>This Inner Loop Header: Depth=1
57 ; CHECK-NEXT: subq $4096, %rsp # imm = 0x1000
58 ; CHECK-NEXT: movq $0, (%rsp)
59 ; CHECK-NEXT: cmpq %r11, %rsp
60 ; CHECK-NEXT: jne .LBB1_5
61 ; CHECK-NEXT: # %bb.6:
62 ; CHECK-NEXT: movl $1, 392(%rsp)
63 ; CHECK-NEXT: movl (%rsp), %eax
64 ; CHECK-NEXT: movq %rbp, %rsp
65 ; CHECK-NEXT: popq %rbp
66 ; CHECK-NEXT: .cfi_def_cfa %rsp, 8
68 %a = alloca i32, i64 100, align 65536
69 %b = getelementptr inbounds i32, ptr %a, i64 98
70 store volatile i32 1, ptr %b
71 %c = load volatile i32, ptr %a
75 attributes #0 = {"probe-stack"="inline-asm"}