1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
4 define void @test64(i64 inreg %x) {
7 ; CHECK-NEXT: testl $2048, %edi # imm = 0x800
8 ; CHECK-NEXT: jne .LBB0_2
9 ; CHECK-NEXT: # %bb.1: # %yes
10 ; CHECK-NEXT: pushq %rax
11 ; CHECK-NEXT: .cfi_def_cfa_offset 16
12 ; CHECK-NEXT: callq bar@PLT
13 ; CHECK-NEXT: popq %rax
14 ; CHECK-NEXT: .cfi_def_cfa_offset 8
15 ; CHECK-NEXT: .LBB0_2: # %no
18 %s = icmp eq i64 %t, 0
19 br i1 %s, label %yes, label %no
28 define void @test64_optsize(i64 inreg %x) optsize {
29 ; CHECK-LABEL: test64_optsize:
31 ; CHECK-NEXT: btl $11, %edi
32 ; CHECK-NEXT: jb .LBB1_2
33 ; CHECK-NEXT: # %bb.1: # %yes
34 ; CHECK-NEXT: pushq %rax
35 ; CHECK-NEXT: .cfi_def_cfa_offset 16
36 ; CHECK-NEXT: callq bar@PLT
37 ; CHECK-NEXT: popq %rax
38 ; CHECK-NEXT: .cfi_def_cfa_offset 8
39 ; CHECK-NEXT: .LBB1_2: # %no
42 %s = icmp eq i64 %t, 0
43 br i1 %s, label %yes, label %no
52 define void @test64_pgso(i64 inreg %x) !prof !14 {
53 ; CHECK-LABEL: test64_pgso:
55 ; CHECK-NEXT: btl $11, %edi
56 ; CHECK-NEXT: jb .LBB2_2
57 ; CHECK-NEXT: # %bb.1: # %yes
58 ; CHECK-NEXT: pushq %rax
59 ; CHECK-NEXT: .cfi_def_cfa_offset 16
60 ; CHECK-NEXT: callq bar@PLT
61 ; CHECK-NEXT: popq %rax
62 ; CHECK-NEXT: .cfi_def_cfa_offset 8
63 ; CHECK-NEXT: .LBB2_2: # %no
66 %s = icmp eq i64 %t, 0
67 br i1 %s, label %yes, label %no
76 ; This test is identical to test64 above with only the destination of the br
77 ; reversed. This somehow causes the two functions to get slightly different
78 ; initial IR. One has an extra invert of the setcc. This previous caused one
79 ; the functions to use a BT while the other used a TEST due to another DAG
80 ; combine messing with an expected canonical form.
81 define void @test64_2(i64 inreg %x) {
82 ; CHECK-LABEL: test64_2:
84 ; CHECK-NEXT: testl $2048, %edi # imm = 0x800
85 ; CHECK-NEXT: je .LBB3_2
86 ; CHECK-NEXT: # %bb.1: # %yes
87 ; CHECK-NEXT: pushq %rax
88 ; CHECK-NEXT: .cfi_def_cfa_offset 16
89 ; CHECK-NEXT: callq bar@PLT
90 ; CHECK-NEXT: popq %rax
91 ; CHECK-NEXT: .cfi_def_cfa_offset 8
92 ; CHECK-NEXT: .LBB3_2: # %no
95 %s = icmp eq i64 %t, 0
96 br i1 %s, label %no, label %yes
105 define void @test64_optsize_2(i64 inreg %x) optsize {
106 ; CHECK-LABEL: test64_optsize_2:
108 ; CHECK-NEXT: btl $11, %edi
109 ; CHECK-NEXT: jae .LBB4_2
110 ; CHECK-NEXT: # %bb.1: # %yes
111 ; CHECK-NEXT: pushq %rax
112 ; CHECK-NEXT: .cfi_def_cfa_offset 16
113 ; CHECK-NEXT: callq bar@PLT
114 ; CHECK-NEXT: popq %rax
115 ; CHECK-NEXT: .cfi_def_cfa_offset 8
116 ; CHECK-NEXT: .LBB4_2: # %no
118 %t = and i64 %x, 2048
119 %s = icmp eq i64 %t, 0
120 br i1 %s, label %no, label %yes
129 define void @test64_pgso_2(i64 inreg %x) !prof !14 {
130 ; CHECK-LABEL: test64_pgso_2:
132 ; CHECK-NEXT: btl $11, %edi
133 ; CHECK-NEXT: jae .LBB5_2
134 ; CHECK-NEXT: # %bb.1: # %yes
135 ; CHECK-NEXT: pushq %rax
136 ; CHECK-NEXT: .cfi_def_cfa_offset 16
137 ; CHECK-NEXT: callq bar@PLT
138 ; CHECK-NEXT: popq %rax
139 ; CHECK-NEXT: .cfi_def_cfa_offset 8
140 ; CHECK-NEXT: .LBB5_2: # %no
142 %t = and i64 %x, 2048
143 %s = icmp eq i64 %t, 0
144 br i1 %s, label %no, label %yes
153 define void @test64_3(i64 inreg %x) {
154 ; CHECK-LABEL: test64_3:
156 ; CHECK-NEXT: btq $32, %rdi
157 ; CHECK-NEXT: jb .LBB6_2
158 ; CHECK-NEXT: # %bb.1: # %yes
159 ; CHECK-NEXT: pushq %rax
160 ; CHECK-NEXT: .cfi_def_cfa_offset 16
161 ; CHECK-NEXT: callq bar@PLT
162 ; CHECK-NEXT: popq %rax
163 ; CHECK-NEXT: .cfi_def_cfa_offset 8
164 ; CHECK-NEXT: .LBB6_2: # %no
166 %t = and i64 %x, 4294967296
167 %s = icmp eq i64 %t, 0
168 br i1 %s, label %yes, label %no
177 define void @test64_optsize_3(i64 inreg %x) optsize {
178 ; CHECK-LABEL: test64_optsize_3:
180 ; CHECK-NEXT: btq $32, %rdi
181 ; CHECK-NEXT: jb .LBB7_2
182 ; CHECK-NEXT: # %bb.1: # %yes
183 ; CHECK-NEXT: pushq %rax
184 ; CHECK-NEXT: .cfi_def_cfa_offset 16
185 ; CHECK-NEXT: callq bar@PLT
186 ; CHECK-NEXT: popq %rax
187 ; CHECK-NEXT: .cfi_def_cfa_offset 8
188 ; CHECK-NEXT: .LBB7_2: # %no
190 %t = and i64 %x, 4294967296
191 %s = icmp eq i64 %t, 0
192 br i1 %s, label %yes, label %no
201 define void @test64_pgso_3(i64 inreg %x) !prof !14 {
202 ; CHECK-LABEL: test64_pgso_3:
204 ; CHECK-NEXT: btq $32, %rdi
205 ; CHECK-NEXT: jb .LBB8_2
206 ; CHECK-NEXT: # %bb.1: # %yes
207 ; CHECK-NEXT: pushq %rax
208 ; CHECK-NEXT: .cfi_def_cfa_offset 16
209 ; CHECK-NEXT: callq bar@PLT
210 ; CHECK-NEXT: popq %rax
211 ; CHECK-NEXT: .cfi_def_cfa_offset 8
212 ; CHECK-NEXT: .LBB8_2: # %no
214 %t = and i64 %x, 4294967296
215 %s = icmp eq i64 %t, 0
216 br i1 %s, label %yes, label %no
225 define void @test64_4(i64 inreg %x) {
226 ; CHECK-LABEL: test64_4:
228 ; CHECK-NEXT: btq $32, %rdi
229 ; CHECK-NEXT: jae .LBB9_2
230 ; CHECK-NEXT: # %bb.1: # %yes
231 ; CHECK-NEXT: pushq %rax
232 ; CHECK-NEXT: .cfi_def_cfa_offset 16
233 ; CHECK-NEXT: callq bar@PLT
234 ; CHECK-NEXT: popq %rax
235 ; CHECK-NEXT: .cfi_def_cfa_offset 8
236 ; CHECK-NEXT: .LBB9_2: # %no
238 %t = and i64 %x, 4294967296
239 %s = icmp eq i64 %t, 0
240 br i1 %s, label %no, label %yes
249 define void @test64_optsize_4(i64 inreg %x) optsize {
250 ; CHECK-LABEL: test64_optsize_4:
252 ; CHECK-NEXT: btq $32, %rdi
253 ; CHECK-NEXT: jae .LBB10_2
254 ; CHECK-NEXT: # %bb.1: # %yes
255 ; CHECK-NEXT: pushq %rax
256 ; CHECK-NEXT: .cfi_def_cfa_offset 16
257 ; CHECK-NEXT: callq bar@PLT
258 ; CHECK-NEXT: popq %rax
259 ; CHECK-NEXT: .cfi_def_cfa_offset 8
260 ; CHECK-NEXT: .LBB10_2: # %no
262 %t = and i64 %x, 4294967296
263 %s = icmp eq i64 %t, 0
264 br i1 %s, label %no, label %yes
273 define void @test64_pgso_4(i64 inreg %x) !prof !14 {
274 ; CHECK-LABEL: test64_pgso_4:
276 ; CHECK-NEXT: btq $32, %rdi
277 ; CHECK-NEXT: jae .LBB11_2
278 ; CHECK-NEXT: # %bb.1: # %yes
279 ; CHECK-NEXT: pushq %rax
280 ; CHECK-NEXT: .cfi_def_cfa_offset 16
281 ; CHECK-NEXT: callq bar@PLT
282 ; CHECK-NEXT: popq %rax
283 ; CHECK-NEXT: .cfi_def_cfa_offset 8
284 ; CHECK-NEXT: .LBB11_2: # %no
286 %t = and i64 %x, 4294967296
287 %s = icmp eq i64 %t, 0
288 br i1 %s, label %no, label %yes
297 define void @test32(i32 inreg %x) {
298 ; CHECK-LABEL: test32:
300 ; CHECK-NEXT: testl $2048, %edi # imm = 0x800
301 ; CHECK-NEXT: jne .LBB12_2
302 ; CHECK-NEXT: # %bb.1: # %yes
303 ; CHECK-NEXT: pushq %rax
304 ; CHECK-NEXT: .cfi_def_cfa_offset 16
305 ; CHECK-NEXT: callq bar@PLT
306 ; CHECK-NEXT: popq %rax
307 ; CHECK-NEXT: .cfi_def_cfa_offset 8
308 ; CHECK-NEXT: .LBB12_2: # %no
310 %t = and i32 %x, 2048
311 %s = icmp eq i32 %t, 0
312 br i1 %s, label %yes, label %no
321 define void @test32_optsize(i32 inreg %x) optsize {
322 ; CHECK-LABEL: test32_optsize:
324 ; CHECK-NEXT: btl $11, %edi
325 ; CHECK-NEXT: jb .LBB13_2
326 ; CHECK-NEXT: # %bb.1: # %yes
327 ; CHECK-NEXT: pushq %rax
328 ; CHECK-NEXT: .cfi_def_cfa_offset 16
329 ; CHECK-NEXT: callq bar@PLT
330 ; CHECK-NEXT: popq %rax
331 ; CHECK-NEXT: .cfi_def_cfa_offset 8
332 ; CHECK-NEXT: .LBB13_2: # %no
334 %t = and i32 %x, 2048
335 %s = icmp eq i32 %t, 0
336 br i1 %s, label %yes, label %no
345 define void @test32_2(i32 inreg %x) {
346 ; CHECK-LABEL: test32_2:
348 ; CHECK-NEXT: testl $2048, %edi # imm = 0x800
349 ; CHECK-NEXT: je .LBB14_2
350 ; CHECK-NEXT: # %bb.1: # %yes
351 ; CHECK-NEXT: pushq %rax
352 ; CHECK-NEXT: .cfi_def_cfa_offset 16
353 ; CHECK-NEXT: callq bar@PLT
354 ; CHECK-NEXT: popq %rax
355 ; CHECK-NEXT: .cfi_def_cfa_offset 8
356 ; CHECK-NEXT: .LBB14_2: # %no
358 %t = and i32 %x, 2048
359 %s = icmp eq i32 %t, 0
360 br i1 %s, label %no, label %yes
369 define void @test32_optsize_2(i32 inreg %x) optsize {
370 ; CHECK-LABEL: test32_optsize_2:
372 ; CHECK-NEXT: btl $11, %edi
373 ; CHECK-NEXT: jae .LBB15_2
374 ; CHECK-NEXT: # %bb.1: # %yes
375 ; CHECK-NEXT: pushq %rax
376 ; CHECK-NEXT: .cfi_def_cfa_offset 16
377 ; CHECK-NEXT: callq bar@PLT
378 ; CHECK-NEXT: popq %rax
379 ; CHECK-NEXT: .cfi_def_cfa_offset 8
380 ; CHECK-NEXT: .LBB15_2: # %no
382 %t = and i32 %x, 2048
383 %s = icmp eq i32 %t, 0
384 br i1 %s, label %no, label %yes
393 define void @test32_pgso_2(i32 inreg %x) !prof !14 {
394 ; CHECK-LABEL: test32_pgso_2:
396 ; CHECK-NEXT: btl $11, %edi
397 ; CHECK-NEXT: jae .LBB16_2
398 ; CHECK-NEXT: # %bb.1: # %yes
399 ; CHECK-NEXT: pushq %rax
400 ; CHECK-NEXT: .cfi_def_cfa_offset 16
401 ; CHECK-NEXT: callq bar@PLT
402 ; CHECK-NEXT: popq %rax
403 ; CHECK-NEXT: .cfi_def_cfa_offset 8
404 ; CHECK-NEXT: .LBB16_2: # %no
406 %t = and i32 %x, 2048
407 %s = icmp eq i32 %t, 0
408 br i1 %s, label %no, label %yes
417 define void @test16(i16 inreg %x) {
418 ; CHECK-LABEL: test16:
420 ; CHECK-NEXT: testl $2048, %edi # imm = 0x800
421 ; CHECK-NEXT: jne .LBB17_2
422 ; CHECK-NEXT: # %bb.1: # %yes
423 ; CHECK-NEXT: pushq %rax
424 ; CHECK-NEXT: .cfi_def_cfa_offset 16
425 ; CHECK-NEXT: callq bar@PLT
426 ; CHECK-NEXT: popq %rax
427 ; CHECK-NEXT: .cfi_def_cfa_offset 8
428 ; CHECK-NEXT: .LBB17_2: # %no
430 %t = and i16 %x, 2048
431 %s = icmp eq i16 %t, 0
432 br i1 %s, label %yes, label %no
441 define void @test16_optsize(i16 inreg %x) optsize {
442 ; CHECK-LABEL: test16_optsize:
444 ; CHECK-NEXT: btl $11, %edi
445 ; CHECK-NEXT: jb .LBB18_2
446 ; CHECK-NEXT: # %bb.1: # %yes
447 ; CHECK-NEXT: pushq %rax
448 ; CHECK-NEXT: .cfi_def_cfa_offset 16
449 ; CHECK-NEXT: callq bar@PLT
450 ; CHECK-NEXT: popq %rax
451 ; CHECK-NEXT: .cfi_def_cfa_offset 8
452 ; CHECK-NEXT: .LBB18_2: # %no
454 %t = and i16 %x, 2048
455 %s = icmp eq i16 %t, 0
456 br i1 %s, label %yes, label %no
465 define void @test16_pgso(i16 inreg %x) !prof !14 {
466 ; CHECK-LABEL: test16_pgso:
468 ; CHECK-NEXT: btl $11, %edi
469 ; CHECK-NEXT: jb .LBB19_2
470 ; CHECK-NEXT: # %bb.1: # %yes
471 ; CHECK-NEXT: pushq %rax
472 ; CHECK-NEXT: .cfi_def_cfa_offset 16
473 ; CHECK-NEXT: callq bar@PLT
474 ; CHECK-NEXT: popq %rax
475 ; CHECK-NEXT: .cfi_def_cfa_offset 8
476 ; CHECK-NEXT: .LBB19_2: # %no
478 %t = and i16 %x, 2048
479 %s = icmp eq i16 %t, 0
480 br i1 %s, label %yes, label %no
489 define void @test16_2(i16 inreg %x) {
490 ; CHECK-LABEL: test16_2:
492 ; CHECK-NEXT: testl $2048, %edi # imm = 0x800
493 ; CHECK-NEXT: je .LBB20_2
494 ; CHECK-NEXT: # %bb.1: # %yes
495 ; CHECK-NEXT: pushq %rax
496 ; CHECK-NEXT: .cfi_def_cfa_offset 16
497 ; CHECK-NEXT: callq bar@PLT
498 ; CHECK-NEXT: popq %rax
499 ; CHECK-NEXT: .cfi_def_cfa_offset 8
500 ; CHECK-NEXT: .LBB20_2: # %no
502 %t = and i16 %x, 2048
503 %s = icmp eq i16 %t, 0
504 br i1 %s, label %no, label %yes
513 define void @test16_optsize_2(i16 inreg %x) optsize {
514 ; CHECK-LABEL: test16_optsize_2:
516 ; CHECK-NEXT: btl $11, %edi
517 ; CHECK-NEXT: jae .LBB21_2
518 ; CHECK-NEXT: # %bb.1: # %yes
519 ; CHECK-NEXT: pushq %rax
520 ; CHECK-NEXT: .cfi_def_cfa_offset 16
521 ; CHECK-NEXT: callq bar@PLT
522 ; CHECK-NEXT: popq %rax
523 ; CHECK-NEXT: .cfi_def_cfa_offset 8
524 ; CHECK-NEXT: .LBB21_2: # %no
526 %t = and i16 %x, 2048
527 %s = icmp eq i16 %t, 0
528 br i1 %s, label %no, label %yes
537 define void @test16_pgso_2(i16 inreg %x) !prof !14 {
538 ; CHECK-LABEL: test16_pgso_2:
540 ; CHECK-NEXT: btl $11, %edi
541 ; CHECK-NEXT: jae .LBB22_2
542 ; CHECK-NEXT: # %bb.1: # %yes
543 ; CHECK-NEXT: pushq %rax
544 ; CHECK-NEXT: .cfi_def_cfa_offset 16
545 ; CHECK-NEXT: callq bar@PLT
546 ; CHECK-NEXT: popq %rax
547 ; CHECK-NEXT: .cfi_def_cfa_offset 8
548 ; CHECK-NEXT: .LBB22_2: # %no
550 %t = and i16 %x, 2048
551 %s = icmp eq i16 %t, 0
552 br i1 %s, label %no, label %yes
561 define i64 @is_upper_bit_clear_i64(i64 %x) {
562 ; CHECK-LABEL: is_upper_bit_clear_i64:
564 ; CHECK-NEXT: xorl %eax, %eax
565 ; CHECK-NEXT: btq $37, %rdi
566 ; CHECK-NEXT: setae %al
568 %sh = lshr i64 %x, 37
574 define i32 @is_upper_bit_clear_i64_trunc(i64 %x) {
575 ; CHECK-LABEL: is_upper_bit_clear_i64_trunc:
577 ; CHECK-NEXT: xorl %eax, %eax
578 ; CHECK-NEXT: btq $42, %rdi
579 ; CHECK-NEXT: setae %al
581 %sh = lshr i64 %x, 42
582 %t = trunc i64 %sh to i32
588 define i64 @is_upper_bit_clear_i64_not(i64 %x) {
589 ; CHECK-LABEL: is_upper_bit_clear_i64_not:
591 ; CHECK-NEXT: xorl %eax, %eax
592 ; CHECK-NEXT: btq $39, %rdi
593 ; CHECK-NEXT: setae %al
596 %sh = lshr i64 %n, 39
601 define i64 @is_lower_bit_clear_i64(i64 %x) {
602 ; CHECK-LABEL: is_lower_bit_clear_i64:
604 ; CHECK-NEXT: xorl %eax, %eax
605 ; CHECK-NEXT: testl $134217728, %edi # imm = 0x8000000
606 ; CHECK-NEXT: sete %al
608 %sh = lshr i64 %x, 27
614 define i64 @is_lower_bit_clear_i64_not(i64 %x) {
615 ; CHECK-LABEL: is_lower_bit_clear_i64_not:
617 ; CHECK-NEXT: xorl %eax, %eax
618 ; CHECK-NEXT: testl $65536, %edi # imm = 0x10000
619 ; CHECK-NEXT: sete %al
622 %sh = lshr i64 %n, 16
627 define i32 @is_bit_clear_i32(i32 %x) {
628 ; CHECK-LABEL: is_bit_clear_i32:
630 ; CHECK-NEXT: xorl %eax, %eax
631 ; CHECK-NEXT: testl $134217728, %edi # imm = 0x8000000
632 ; CHECK-NEXT: sete %al
634 %sh = lshr i32 %x, 27
640 define i32 @is_bit_clear_i32_not(i32 %x) {
641 ; CHECK-LABEL: is_bit_clear_i32_not:
643 ; CHECK-NEXT: xorl %eax, %eax
644 ; CHECK-NEXT: testl $134217728, %edi # imm = 0x8000000
645 ; CHECK-NEXT: sete %al
648 %sh = lshr i32 %n, 27
653 define i16 @is_bit_clear_i16(i16 %x) {
654 ; CHECK-LABEL: is_bit_clear_i16:
656 ; CHECK-NEXT: xorl %eax, %eax
657 ; CHECK-NEXT: testb %dil, %dil
658 ; CHECK-NEXT: setns %al
659 ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
667 define i16 @is_bit_clear_i16_not(i16 %x) {
668 ; CHECK-LABEL: is_bit_clear_i16_not:
670 ; CHECK-NEXT: xorl %eax, %eax
671 ; CHECK-NEXT: testb $4, %dil
672 ; CHECK-NEXT: sete %al
673 ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
681 define i8 @is_bit_clear_i8(i8 %x) {
682 ; CHECK-LABEL: is_bit_clear_i8:
684 ; CHECK-NEXT: testb $8, %dil
685 ; CHECK-NEXT: sete %al
693 define i8 @is_bit_clear_i8_not(i8 %x) {
694 ; CHECK-LABEL: is_bit_clear_i8_not:
696 ; CHECK-NEXT: testb $4, %dil
697 ; CHECK-NEXT: sete %al
705 ; Use bt/test on the 64-bit value and truncate result.
707 define i8 @overshift(i64 %x) {
708 ; CHECK-LABEL: overshift:
710 ; CHECK-NEXT: btq $42, %rdi
711 ; CHECK-NEXT: setae %al
714 %t = trunc i64 %a to i8
720 define i32 @setcc_is_bit_clear(i32 %x) {
721 ; CHECK-LABEL: setcc_is_bit_clear:
723 ; CHECK-NEXT: xorl %eax, %eax
724 ; CHECK-NEXT: testl $1024, %edi # imm = 0x400
725 ; CHECK-NEXT: sete %al
727 %a1 = and i32 %x, 1024
728 %b1 = icmp eq i32 %a1, 0
729 %r = zext i1 %b1 to i32
733 define i32 @is_bit_set(i32 %x) {
734 ; CHECK-LABEL: is_bit_set:
736 ; CHECK-NEXT: movl %edi, %eax
737 ; CHECK-NEXT: shrl $10, %eax
738 ; CHECK-NEXT: andl $1, %eax
740 %sh = lshr i32 %x, 10
745 define i32 @setcc_is_bit_set(i32 %x) {
746 ; CHECK-LABEL: setcc_is_bit_set:
748 ; CHECK-NEXT: movl %edi, %eax
749 ; CHECK-NEXT: shrl $10, %eax
750 ; CHECK-NEXT: andl $1, %eax
752 %a1 = and i32 %x, 1024
753 %b1 = icmp ne i32 %a1, 0
754 %r = zext i1 %b1 to i32
760 !llvm.module.flags = !{!0}
761 !0 = !{i32 1, !"ProfileSummary", !1}
762 !1 = !{!2, !3, !4, !5, !6, !7, !8, !9}
763 !2 = !{!"ProfileFormat", !"InstrProf"}
764 !3 = !{!"TotalCount", i64 10000}
765 !4 = !{!"MaxCount", i64 10}
766 !5 = !{!"MaxInternalCount", i64 1}
767 !6 = !{!"MaxFunctionCount", i64 1000}
768 !7 = !{!"NumCounts", i64 3}
769 !8 = !{!"NumFunctions", i64 3}
770 !9 = !{!"DetailedSummary", !10}
771 !10 = !{!11, !12, !13}
772 !11 = !{i32 10000, i64 100, i32 1}
773 !12 = !{i32 999000, i64 100, i32 1}
774 !13 = !{i32 999999, i64 1, i32 2}
775 !14 = !{!"function_entry_count", i64 0}