1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s
3 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -DPOLYMORPHIC -emit-llvm -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s
5 // REQUIRES: aarch64-registered-target || arm-registered-target
9 // CHECK-LABEL: @test_vabavq_s8(
11 // CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.mve.vabav.v16i8(i32 0, i32 [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i8> [[C:%.*]])
12 // CHECK-NEXT: ret i32 [[TMP0]]
14 uint32_t test_vabavq_s8(uint32_t a
, int8x16_t b
, int8x16_t c
) {
16 return vabavq(a
, b
, c
);
18 return vabavq_s8(a
, b
, c
);
22 // CHECK-LABEL: @test_vabavq_s16(
24 // CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.mve.vabav.v8i16(i32 0, i32 [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i16> [[C:%.*]])
25 // CHECK-NEXT: ret i32 [[TMP0]]
27 uint32_t test_vabavq_s16(uint32_t a
, int16x8_t b
, int16x8_t c
) {
29 return vabavq(a
, b
, c
);
31 return vabavq_s16(a
, b
, c
);
35 // CHECK-LABEL: @test_vabavq_s32(
37 // CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.mve.vabav.v4i32(i32 0, i32 [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> [[C:%.*]])
38 // CHECK-NEXT: ret i32 [[TMP0]]
40 uint32_t test_vabavq_s32(uint32_t a
, int32x4_t b
, int32x4_t c
) {
42 return vabavq(a
, b
, c
);
44 return vabavq_s32(a
, b
, c
);
48 // CHECK-LABEL: @test_vabavq_u8(
50 // CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.mve.vabav.v16i8(i32 1, i32 [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i8> [[C:%.*]])
51 // CHECK-NEXT: ret i32 [[TMP0]]
53 uint32_t test_vabavq_u8(uint32_t a
, uint8x16_t b
, uint8x16_t c
) {
55 return vabavq(a
, b
, c
);
57 return vabavq_u8(a
, b
, c
);
61 // CHECK-LABEL: @test_vabavq_u16(
63 // CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.mve.vabav.v8i16(i32 1, i32 [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i16> [[C:%.*]])
64 // CHECK-NEXT: ret i32 [[TMP0]]
66 uint32_t test_vabavq_u16(uint32_t a
, uint16x8_t b
, uint16x8_t c
) {
68 return vabavq(a
, b
, c
);
70 return vabavq_u16(a
, b
, c
);
74 // CHECK-LABEL: @test_vabavq_u32(
76 // CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.mve.vabav.v4i32(i32 1, i32 [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> [[C:%.*]])
77 // CHECK-NEXT: ret i32 [[TMP0]]
79 uint32_t test_vabavq_u32(uint32_t a
, uint32x4_t b
, uint32x4_t c
) {
81 return vabavq(a
, b
, c
);
83 return vabavq_u32(a
, b
, c
);
87 // CHECK-LABEL: @test_vabavq_p_s8(
89 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
90 // CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
91 // CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.arm.mve.vabav.predicated.v16i8.v16i1(i32 0, i32 [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i8> [[C:%.*]], <16 x i1> [[TMP1]])
92 // CHECK-NEXT: ret i32 [[TMP2]]
94 uint32_t test_vabavq_p_s8(uint32_t a
, int8x16_t b
, int8x16_t c
, mve_pred16_t p
) {
96 return vabavq_p(a
, b
, c
, p
);
98 return vabavq_p_s8(a
, b
, c
, p
);
102 // CHECK-LABEL: @test_vabavq_p_s16(
103 // CHECK-NEXT: entry:
104 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
105 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
106 // CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.arm.mve.vabav.predicated.v8i16.v8i1(i32 0, i32 [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i16> [[C:%.*]], <8 x i1> [[TMP1]])
107 // CHECK-NEXT: ret i32 [[TMP2]]
109 uint32_t test_vabavq_p_s16(uint32_t a
, int16x8_t b
, int16x8_t c
, mve_pred16_t p
) {
111 return vabavq_p(a
, b
, c
, p
);
113 return vabavq_p_s16(a
, b
, c
, p
);
117 // CHECK-LABEL: @test_vabavq_p_s32(
118 // CHECK-NEXT: entry:
119 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
120 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
121 // CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.arm.mve.vabav.predicated.v4i32.v4i1(i32 0, i32 [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> [[C:%.*]], <4 x i1> [[TMP1]])
122 // CHECK-NEXT: ret i32 [[TMP2]]
124 uint32_t test_vabavq_p_s32(uint32_t a
, int32x4_t b
, int32x4_t c
, mve_pred16_t p
) {
126 return vabavq_p(a
, b
, c
, p
);
128 return vabavq_p_s32(a
, b
, c
, p
);
132 // CHECK-LABEL: @test_vabavq_p_u8(
133 // CHECK-NEXT: entry:
134 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
135 // CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
136 // CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.arm.mve.vabav.predicated.v16i8.v16i1(i32 1, i32 [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i8> [[C:%.*]], <16 x i1> [[TMP1]])
137 // CHECK-NEXT: ret i32 [[TMP2]]
139 uint32_t test_vabavq_p_u8(uint32_t a
, uint8x16_t b
, uint8x16_t c
, mve_pred16_t p
) {
141 return vabavq_p(a
, b
, c
, p
);
143 return vabavq_p_u8(a
, b
, c
, p
);
147 // CHECK-LABEL: @test_vabavq_p_u16(
148 // CHECK-NEXT: entry:
149 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
150 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
151 // CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.arm.mve.vabav.predicated.v8i16.v8i1(i32 1, i32 [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i16> [[C:%.*]], <8 x i1> [[TMP1]])
152 // CHECK-NEXT: ret i32 [[TMP2]]
154 uint32_t test_vabavq_p_u16(uint32_t a
, uint16x8_t b
, uint16x8_t c
, mve_pred16_t p
) {
156 return vabavq_p(a
, b
, c
, p
);
158 return vabavq_p_u16(a
, b
, c
, p
);
162 // CHECK-LABEL: @test_vabavq_p_u32(
163 // CHECK-NEXT: entry:
164 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
165 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
166 // CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.arm.mve.vabav.predicated.v4i32.v4i1(i32 1, i32 [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> [[C:%.*]], <4 x i1> [[TMP1]])
167 // CHECK-NEXT: ret i32 [[TMP2]]
169 uint32_t test_vabavq_p_u32(uint32_t a
, uint32x4_t b
, uint32x4_t c
, mve_pred16_t p
) {
171 return vabavq_p(a
, b
, c
, p
);
173 return vabavq_p_u32(a
, b
, c
, p
);