1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
3 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -disable-O0-optnone -DPOLYMORPHIC -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
5 // REQUIRES: aarch64-registered-target || arm-registered-target
9 // CHECK-LABEL: @test_vmaxnmq_f16(
11 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.maxnum.v8f16(<8 x half> [[A:%.*]], <8 x half> [[B:%.*]])
12 // CHECK-NEXT: ret <8 x half> [[TMP0]]
14 float16x8_t
test_vmaxnmq_f16(float16x8_t a
, float16x8_t b
)
18 #else /* POLYMORPHIC */
19 return vmaxnmq_f16(a
, b
);
20 #endif /* POLYMORPHIC */
23 // CHECK-LABEL: @test_vmaxnmq_f32(
25 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[A:%.*]], <4 x float> [[B:%.*]])
26 // CHECK-NEXT: ret <4 x float> [[TMP0]]
28 float32x4_t
test_vmaxnmq_f32(float32x4_t a
, float32x4_t b
)
32 #else /* POLYMORPHIC */
33 return vmaxnmq_f32(a
, b
);
34 #endif /* POLYMORPHIC */
37 // CHECK-LABEL: @test_vmaxnmq_m_f16(
39 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
40 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
41 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.max.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x half> [[B:%.*]], i32 0, <8 x i1> [[TMP1]], <8 x half> [[INACTIVE:%.*]])
42 // CHECK-NEXT: ret <8 x half> [[TMP2]]
44 float16x8_t
test_vmaxnmq_m_f16(float16x8_t inactive
, float16x8_t a
, float16x8_t b
, mve_pred16_t p
)
47 return vmaxnmq_m(inactive
, a
, b
, p
);
48 #else /* POLYMORPHIC */
49 return vmaxnmq_m_f16(inactive
, a
, b
, p
);
50 #endif /* POLYMORPHIC */
53 // CHECK-LABEL: @test_vmaxnmq_m_f32(
55 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
56 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
57 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.max.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x float> [[B:%.*]], i32 0, <4 x i1> [[TMP1]], <4 x float> [[INACTIVE:%.*]])
58 // CHECK-NEXT: ret <4 x float> [[TMP2]]
60 float32x4_t
test_vmaxnmq_m_f32(float32x4_t inactive
, float32x4_t a
, float32x4_t b
, mve_pred16_t p
)
63 return vmaxnmq_m(inactive
, a
, b
, p
);
64 #else /* POLYMORPHIC */
65 return vmaxnmq_m_f32(inactive
, a
, b
, p
);
66 #endif /* POLYMORPHIC */
69 // CHECK-LABEL: @test_vmaxnmq_x_f16(
71 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
72 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
73 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.max.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x half> [[B:%.*]], i32 0, <8 x i1> [[TMP1]], <8 x half> undef)
74 // CHECK-NEXT: ret <8 x half> [[TMP2]]
76 float16x8_t
test_vmaxnmq_x_f16(float16x8_t a
, float16x8_t b
, mve_pred16_t p
)
79 return vmaxnmq_x(a
, b
, p
);
80 #else /* POLYMORPHIC */
81 return vmaxnmq_x_f16(a
, b
, p
);
82 #endif /* POLYMORPHIC */
85 // CHECK-LABEL: @test_vmaxnmq_x_f32(
87 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
88 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
89 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.max.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x float> [[B:%.*]], i32 0, <4 x i1> [[TMP1]], <4 x float> undef)
90 // CHECK-NEXT: ret <4 x float> [[TMP2]]
92 float32x4_t
test_vmaxnmq_x_f32(float32x4_t a
, float32x4_t b
, mve_pred16_t p
)
95 return vmaxnmq_x(a
, b
, p
);
96 #else /* POLYMORPHIC */
97 return vmaxnmq_x_f32(a
, b
, p
);
98 #endif /* POLYMORPHIC */