1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
3 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -DPOLYMORPHIC -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
5 // REQUIRES: aarch64-registered-target || arm-registered-target
9 // CHECK-LABEL: @test_vmulhq_u8(
11 // CHECK-NEXT: [[TMP0:%.*]] = call <16 x i8> @llvm.arm.mve.vmulh.v16i8(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], i32 1)
12 // CHECK-NEXT: ret <16 x i8> [[TMP0]]
14 uint8x16_t
test_vmulhq_u8(uint8x16_t a
, uint8x16_t b
)
18 #else /* POLYMORPHIC */
19 return vmulhq_u8(a
, b
);
20 #endif /* POLYMORPHIC */
23 // CHECK-LABEL: @test_vmulhq_s16(
25 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x i16> @llvm.arm.mve.vmulh.v8i16(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 0)
26 // CHECK-NEXT: ret <8 x i16> [[TMP0]]
28 int16x8_t
test_vmulhq_s16(int16x8_t a
, int16x8_t b
)
32 #else /* POLYMORPHIC */
33 return vmulhq_s16(a
, b
);
34 #endif /* POLYMORPHIC */
37 // CHECK-LABEL: @test_vmulhq_u32(
39 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vmulh.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], i32 1)
40 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
42 uint32x4_t
test_vmulhq_u32(uint32x4_t a
, uint32x4_t b
)
46 #else /* POLYMORPHIC */
47 return vmulhq_u32(a
, b
);
48 #endif /* POLYMORPHIC */
51 // CHECK-LABEL: @test_vmulhq_m_s8(
53 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
54 // CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
55 // CHECK-NEXT: [[TMP2:%.*]] = call <16 x i8> @llvm.arm.mve.mulh.predicated.v16i8.v16i1(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], i32 0, <16 x i1> [[TMP1]], <16 x i8> [[INACTIVE:%.*]])
56 // CHECK-NEXT: ret <16 x i8> [[TMP2]]
58 int8x16_t
test_vmulhq_m_s8(int8x16_t inactive
, int8x16_t a
, int8x16_t b
, mve_pred16_t p
)
61 return vmulhq_m(inactive
, a
, b
, p
);
62 #else /* POLYMORPHIC */
63 return vmulhq_m_s8(inactive
, a
, b
, p
);
64 #endif /* POLYMORPHIC */
67 // CHECK-LABEL: @test_vmulhq_m_u16(
69 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
70 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
71 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.mulh.predicated.v8i16.v8i1(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 1, <8 x i1> [[TMP1]], <8 x i16> [[INACTIVE:%.*]])
72 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
74 uint16x8_t
test_vmulhq_m_u16(uint16x8_t inactive
, uint16x8_t a
, uint16x8_t b
, mve_pred16_t p
)
77 return vmulhq_m(inactive
, a
, b
, p
);
78 #else /* POLYMORPHIC */
79 return vmulhq_m_u16(inactive
, a
, b
, p
);
80 #endif /* POLYMORPHIC */
83 // CHECK-LABEL: @test_vmulhq_m_s32(
85 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
86 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
87 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.mulh.predicated.v4i32.v4i1(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], i32 0, <4 x i1> [[TMP1]], <4 x i32> [[INACTIVE:%.*]])
88 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
90 int32x4_t
test_vmulhq_m_s32(int32x4_t inactive
, int32x4_t a
, int32x4_t b
, mve_pred16_t p
)
93 return vmulhq_m(inactive
, a
, b
, p
);
94 #else /* POLYMORPHIC */
95 return vmulhq_m_s32(inactive
, a
, b
, p
);
96 #endif /* POLYMORPHIC */
99 // CHECK-LABEL: @test_vmulhq_x_u8(
100 // CHECK-NEXT: entry:
101 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
102 // CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
103 // CHECK-NEXT: [[TMP2:%.*]] = call <16 x i8> @llvm.arm.mve.mulh.predicated.v16i8.v16i1(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], i32 1, <16 x i1> [[TMP1]], <16 x i8> undef)
104 // CHECK-NEXT: ret <16 x i8> [[TMP2]]
106 uint8x16_t
test_vmulhq_x_u8(uint8x16_t a
, uint8x16_t b
, mve_pred16_t p
)
109 return vmulhq_x(a
, b
, p
);
110 #else /* POLYMORPHIC */
111 return vmulhq_x_u8(a
, b
, p
);
112 #endif /* POLYMORPHIC */
115 // CHECK-LABEL: @test_vmulhq_x_s16(
116 // CHECK-NEXT: entry:
117 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
118 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
119 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.mulh.predicated.v8i16.v8i1(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 0, <8 x i1> [[TMP1]], <8 x i16> undef)
120 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
122 int16x8_t
test_vmulhq_x_s16(int16x8_t a
, int16x8_t b
, mve_pred16_t p
)
125 return vmulhq_x(a
, b
, p
);
126 #else /* POLYMORPHIC */
127 return vmulhq_x_s16(a
, b
, p
);
128 #endif /* POLYMORPHIC */
131 // CHECK-LABEL: @test_vmulhq_x_u32(
132 // CHECK-NEXT: entry:
133 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
134 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
135 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.mulh.predicated.v4i32.v4i1(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], i32 1, <4 x i1> [[TMP1]], <4 x i32> undef)
136 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
138 uint32x4_t
test_vmulhq_x_u32(uint32x4_t a
, uint32x4_t b
, mve_pred16_t p
)
141 return vmulhq_x(a
, b
, p
);
142 #else /* POLYMORPHIC */
143 return vmulhq_x_u32(a
, b
, p
);
144 #endif /* POLYMORPHIC */