1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
3 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -DPOLYMORPHIC -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
5 // REQUIRES: aarch64-registered-target || arm-registered-target
9 // CHECK-LABEL: @test_vmullbq_int_u8(
11 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x i16> @llvm.arm.mve.vmull.v8i16.v16i8(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], i32 1, i32 0)
12 // CHECK-NEXT: ret <8 x i16> [[TMP0]]
14 int16x8_t
test_vmullbq_int_u8(uint8x16_t a
, uint8x16_t b
)
17 return vmullbq_int(a
, b
);
18 #else /* POLYMORPHIC */
19 return vmullbq_int_u8(a
, b
);
20 #endif /* POLYMORPHIC */
23 // CHECK-LABEL: @test_vmullbq_int_s16(
25 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vmull.v4i32.v8i16(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 0, i32 0)
26 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
28 int32x4_t
test_vmullbq_int_s16(int16x8_t a
, int16x8_t b
)
31 return vmullbq_int(a
, b
);
32 #else /* POLYMORPHIC */
33 return vmullbq_int_s16(a
, b
);
34 #endif /* POLYMORPHIC */
37 // CHECK-LABEL: @test_vmullbq_int_u32(
39 // CHECK-NEXT: [[TMP0:%.*]] = call <2 x i64> @llvm.arm.mve.vmull.v2i64.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], i32 1, i32 0)
40 // CHECK-NEXT: ret <2 x i64> [[TMP0]]
42 uint64x2_t
test_vmullbq_int_u32(uint32x4_t a
, uint32x4_t b
)
45 return vmullbq_int(a
, b
);
46 #else /* POLYMORPHIC */
47 return vmullbq_int_u32(a
, b
);
48 #endif /* POLYMORPHIC */
51 // CHECK-LABEL: @test_vmullbq_poly_p16(
53 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vmull.poly.v4i32.v8i16(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 0)
54 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
56 uint32x4_t
test_vmullbq_poly_p16(uint16x8_t a
, uint16x8_t b
)
59 return vmullbq_poly(a
, b
);
60 #else /* POLYMORPHIC */
61 return vmullbq_poly_p16(a
, b
);
62 #endif /* POLYMORPHIC */
65 // CHECK-LABEL: @test_vmullbq_int_m_s8(
67 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
68 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
69 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.mull.int.predicated.v8i16.v16i8.v8i1(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], i32 0, i32 0, <8 x i1> [[TMP1]], <8 x i16> [[INACTIVE:%.*]])
70 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
72 int16x8_t
test_vmullbq_int_m_s8(int16x8_t inactive
, int8x16_t a
, int8x16_t b
, mve_pred16_t p
)
75 return vmullbq_int_m(inactive
, a
, b
, p
);
76 #else /* POLYMORPHIC */
77 return vmullbq_int_m_s8(inactive
, a
, b
, p
);
78 #endif /* POLYMORPHIC */
81 // CHECK-LABEL: @test_vmullbq_int_m_u16(
83 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
84 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
85 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.mull.int.predicated.v4i32.v8i16.v4i1(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 1, i32 0, <4 x i1> [[TMP1]], <4 x i32> [[INACTIVE:%.*]])
86 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
88 uint32x4_t
test_vmullbq_int_m_u16(uint32x4_t inactive
, uint16x8_t a
, uint16x8_t b
, mve_pred16_t p
)
91 return vmullbq_int_m(inactive
, a
, b
, p
);
92 #else /* POLYMORPHIC */
93 return vmullbq_int_m_u16(inactive
, a
, b
, p
);
94 #endif /* POLYMORPHIC */
97 // CHECK-LABEL: @test_vmullbq_int_m_s32(
99 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
100 // CHECK-NEXT: [[TMP1:%.*]] = call <2 x i1> @llvm.arm.mve.pred.i2v.v2i1(i32 [[TMP0]])
101 // CHECK-NEXT: [[TMP2:%.*]] = call <2 x i64> @llvm.arm.mve.mull.int.predicated.v2i64.v4i32.v2i1(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], i32 0, i32 0, <2 x i1> [[TMP1]], <2 x i64> [[INACTIVE:%.*]])
102 // CHECK-NEXT: ret <2 x i64> [[TMP2]]
104 int64x2_t
test_vmullbq_int_m_s32(int64x2_t inactive
, int32x4_t a
, int32x4_t b
, mve_pred16_t p
)
107 return vmullbq_int_m(inactive
, a
, b
, p
);
108 #else /* POLYMORPHIC */
109 return vmullbq_int_m_s32(inactive
, a
, b
, p
);
110 #endif /* POLYMORPHIC */
113 // CHECK-LABEL: @test_vmullbq_poly_m_p8(
114 // CHECK-NEXT: entry:
115 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
116 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
117 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.mull.poly.predicated.v8i16.v16i8.v8i1(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], i32 0, <8 x i1> [[TMP1]], <8 x i16> [[INACTIVE:%.*]])
118 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
120 uint16x8_t
test_vmullbq_poly_m_p8(uint16x8_t inactive
, uint8x16_t a
, uint8x16_t b
, mve_pred16_t p
)
123 return vmullbq_poly_m(inactive
, a
, b
, p
);
124 #else /* POLYMORPHIC */
125 return vmullbq_poly_m_p8(inactive
, a
, b
, p
);
126 #endif /* POLYMORPHIC */
129 // CHECK-LABEL: @test_vmullbq_int_x_u8(
130 // CHECK-NEXT: entry:
131 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
132 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
133 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.mull.int.predicated.v8i16.v16i8.v8i1(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], i32 1, i32 0, <8 x i1> [[TMP1]], <8 x i16> undef)
134 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
136 uint16x8_t
test_vmullbq_int_x_u8(uint8x16_t a
, uint8x16_t b
, mve_pred16_t p
)
139 return vmullbq_int_x(a
, b
, p
);
140 #else /* POLYMORPHIC */
141 return vmullbq_int_x_u8(a
, b
, p
);
142 #endif /* POLYMORPHIC */
145 // CHECK-LABEL: @test_vmullbq_int_x_s16(
146 // CHECK-NEXT: entry:
147 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
148 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
149 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.mull.int.predicated.v4i32.v8i16.v4i1(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 0, i32 0, <4 x i1> [[TMP1]], <4 x i32> undef)
150 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
152 int32x4_t
test_vmullbq_int_x_s16(int16x8_t a
, int16x8_t b
, mve_pred16_t p
)
155 return vmullbq_int_x(a
, b
, p
);
156 #else /* POLYMORPHIC */
157 return vmullbq_int_x_s16(a
, b
, p
);
158 #endif /* POLYMORPHIC */
161 // CHECK-LABEL: @test_vmullbq_int_x_u32(
162 // CHECK-NEXT: entry:
163 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
164 // CHECK-NEXT: [[TMP1:%.*]] = call <2 x i1> @llvm.arm.mve.pred.i2v.v2i1(i32 [[TMP0]])
165 // CHECK-NEXT: [[TMP2:%.*]] = call <2 x i64> @llvm.arm.mve.mull.int.predicated.v2i64.v4i32.v2i1(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], i32 1, i32 0, <2 x i1> [[TMP1]], <2 x i64> undef)
166 // CHECK-NEXT: ret <2 x i64> [[TMP2]]
168 uint64x2_t
test_vmullbq_int_x_u32(uint32x4_t a
, uint32x4_t b
, mve_pred16_t p
)
171 return vmullbq_int_x(a
, b
, p
);
172 #else /* POLYMORPHIC */
173 return vmullbq_int_x_u32(a
, b
, p
);
174 #endif /* POLYMORPHIC */
177 // CHECK-LABEL: @test_vmullbq_poly_x_p16(
178 // CHECK-NEXT: entry:
179 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
180 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
181 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.mull.poly.predicated.v4i32.v8i16.v4i1(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 0, <4 x i1> [[TMP1]], <4 x i32> undef)
182 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
184 uint32x4_t
test_vmullbq_poly_x_p16(uint16x8_t a
, uint16x8_t b
, mve_pred16_t p
)
187 return vmullbq_poly_x(a
, b
, p
);
188 #else /* POLYMORPHIC */
189 return vmullbq_poly_x_p16(a
, b
, p
);
190 #endif /* POLYMORPHIC */