clang/test/CodeGen/arm-mve-intrinsics/vqdmullbq.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
   3 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -DPOLYMORPHIC -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
   4
   5 // REQUIRES: aarch64-registered-target || arm-registered-target
   6
   7 #include <arm_mve.h>
   8
   9 // CHECK-LABEL: @test_vqdmullbq_s16(
  10 // CHECK-NEXT:  entry:
  11 // CHECK-NEXT:    [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vqdmull.v4i32.v8i16(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 0)
  12 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
  13 //
  14 int32x4_t test_vqdmullbq_s16(int16x8_t a, int16x8_t b) {
  15 #ifdef POLYMORPHIC
  16   return vqdmullbq(a, b);
  17 #else  /* POLYMORPHIC */
  18   return vqdmullbq_s16(a, b);
  19 #endif /* POLYMORPHIC */
  20 }
  21
  22 // CHECK-LABEL: @test_vqdmullbq_s32(
  23 // CHECK-NEXT:  entry:
  24 // CHECK-NEXT:    [[TMP0:%.*]] = call <2 x i64> @llvm.arm.mve.vqdmull.v2i64.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], i32 0)
  25 // CHECK-NEXT:    ret <2 x i64> [[TMP0]]
  26 //
  27 int64x2_t test_vqdmullbq_s32(int32x4_t a, int32x4_t b) {
  28 #ifdef POLYMORPHIC
  29   return vqdmullbq(a, b);
  30 #else  /* POLYMORPHIC */
  31   return vqdmullbq_s32(a, b);
  32 #endif /* POLYMORPHIC */
  33 }
  34
  35 // CHECK-LABEL: @test_vqdmullbq_m_s16(
  36 // CHECK-NEXT:  entry:
  37 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
  38 // CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
  39 // CHECK-NEXT:    [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vqdmull.predicated.v4i32.v8i16.v4i1(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 0, <4 x i1> [[TMP1]], <4 x i32> [[INACTIVE:%.*]])
  40 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
  41 //
  42 int32x4_t test_vqdmullbq_m_s16(int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) {
  43 #ifdef POLYMORPHIC
  44   return vqdmullbq_m(inactive, a, b, p);
  45 #else  /* POLYMORPHIC */
  46   return vqdmullbq_m_s16(inactive, a, b, p);
  47 #endif /* POLYMORPHIC */
  48 }
  49
  50 // CHECK-LABEL: @test_vqdmullbq_m_s32(
  51 // CHECK-NEXT:  entry:
  52 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
  53 // CHECK-NEXT:    [[TMP1:%.*]] = call <2 x i1> @llvm.arm.mve.pred.i2v.v2i1(i32 [[TMP0]])
  54 // CHECK-NEXT:    [[TMP2:%.*]] = call <2 x i64> @llvm.arm.mve.vqdmull.predicated.v2i64.v4i32.v2i1(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], i32 0, <2 x i1> [[TMP1]], <2 x i64> [[INACTIVE:%.*]])
  55 // CHECK-NEXT:    ret <2 x i64> [[TMP2]]
  56 //
  57 int64x2_t test_vqdmullbq_m_s32(int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) {
  58 #ifdef POLYMORPHIC
  59   return vqdmullbq_m(inactive, a, b, p);
  60 #else  /* POLYMORPHIC */
  61   return vqdmullbq_m_s32(inactive, a, b, p);
  62 #endif /* POLYMORPHIC */
  63 }
  64
  65 // CHECK-LABEL: @test_vqdmullbq_n_s16(
  66 // CHECK-NEXT:  entry:
  67 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <8 x i16> poison, i16 [[B:%.*]], i64 0
  68 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <8 x i16> [[DOTSPLATINSERT]], <8 x i16> poison, <8 x i32> zeroinitializer
  69 // CHECK-NEXT:    [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vqdmull.v4i32.v8i16(<8 x i16> [[A:%.*]], <8 x i16> [[DOTSPLAT]], i32 0)
  70 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
  71 //
  72 int32x4_t test_vqdmullbq_n_s16(int16x8_t a, int16_t b) {
  73 #ifdef POLYMORPHIC
  74   return vqdmullbq(a, b);
  75 #else  /* POLYMORPHIC */
  76   return vqdmullbq_n_s16(a, b);
  77 #endif /* POLYMORPHIC */
  78 }
  79
  80 // CHECK-LABEL: @test_vqdmullbq_n_s32(
  81 // CHECK-NEXT:  entry:
  82 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[B:%.*]], i64 0
  83 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <4 x i32> [[DOTSPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer
  84 // CHECK-NEXT:    [[TMP0:%.*]] = call <2 x i64> @llvm.arm.mve.vqdmull.v2i64.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[DOTSPLAT]], i32 0)
  85 // CHECK-NEXT:    ret <2 x i64> [[TMP0]]
  86 //
  87 int64x2_t test_vqdmullbq_n_s32(int32x4_t a, int32_t b) {
  88 #ifdef POLYMORPHIC
  89   return vqdmullbq(a, b);
  90 #else  /* POLYMORPHIC */
  91   return vqdmullbq_n_s32(a, b);
  92 #endif /* POLYMORPHIC */
  93 }
  94
  95 // CHECK-LABEL: @test_vqdmullbq_m_n_s16(
  96 // CHECK-NEXT:  entry:
  97 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <8 x i16> poison, i16 [[B:%.*]], i64 0
  98 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <8 x i16> [[DOTSPLATINSERT]], <8 x i16> poison, <8 x i32> zeroinitializer
  99 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 100 // CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
 101 // CHECK-NEXT:    [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vqdmull.predicated.v4i32.v8i16.v4i1(<8 x i16> [[A:%.*]], <8 x i16> [[DOTSPLAT]], i32 0, <4 x i1> [[TMP1]], <4 x i32> [[INACTIVE:%.*]])
 102 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
 103 //
 104 int32x4_t test_vqdmullbq_m_n_s16(int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) {
 105 #ifdef POLYMORPHIC
 106   return vqdmullbq_m(inactive, a, b, p);
 107 #else  /* POLYMORPHIC */
 108   return vqdmullbq_m_n_s16(inactive, a, b, p);
 109 #endif /* POLYMORPHIC */
 110 }
 111
 112 // CHECK-LABEL: @test_vqdmullbq_m_n_s32(
 113 // CHECK-NEXT:  entry:
 114 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[B:%.*]], i64 0
 115 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <4 x i32> [[DOTSPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer
 116 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 117 // CHECK-NEXT:    [[TMP1:%.*]] = call <2 x i1> @llvm.arm.mve.pred.i2v.v2i1(i32 [[TMP0]])
 118 // CHECK-NEXT:    [[TMP2:%.*]] = call <2 x i64> @llvm.arm.mve.vqdmull.predicated.v2i64.v4i32.v2i1(<4 x i32> [[A:%.*]], <4 x i32> [[DOTSPLAT]], i32 0, <2 x i1> [[TMP1]], <2 x i64> [[INACTIVE:%.*]])
 119 // CHECK-NEXT:    ret <2 x i64> [[TMP2]]
 120 //
 121 int64x2_t test_vqdmullbq_m_n_s32(int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) {
 122 #ifdef POLYMORPHIC
 123   return vqdmullbq_m(inactive, a, b, p);
 124 #else  /* POLYMORPHIC */
 125   return vqdmullbq_m_n_s32(inactive, a, b, p);
 126 #endif /* POLYMORPHIC */
 127 }