clang/test/CodeGen/arm-mve-intrinsics/vrmulhq.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
   3 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -DPOLYMORPHIC -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
   4
   5 // REQUIRES: aarch64-registered-target || arm-registered-target
   6
   7 #include <arm_mve.h>
   8
   9 // CHECK-LABEL: @test_vrmulhq_u8(
  10 // CHECK-NEXT:  entry:
  11 // CHECK-NEXT:    [[TMP0:%.*]] = call <16 x i8> @llvm.arm.mve.vrmulh.v16i8(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], i32 1)
  12 // CHECK-NEXT:    ret <16 x i8> [[TMP0]]
  13 //
  14 uint8x16_t test_vrmulhq_u8(uint8x16_t a, uint8x16_t b)
  15 {
  16 #ifdef POLYMORPHIC
  17     return vrmulhq(a, b);
  18 #else /* POLYMORPHIC */
  19     return vrmulhq_u8(a, b);
  20 #endif /* POLYMORPHIC */
  21 }
  22
  23 // CHECK-LABEL: @test_vrmulhq_s16(
  24 // CHECK-NEXT:  entry:
  25 // CHECK-NEXT:    [[TMP0:%.*]] = call <8 x i16> @llvm.arm.mve.vrmulh.v8i16(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 0)
  26 // CHECK-NEXT:    ret <8 x i16> [[TMP0]]
  27 //
  28 int16x8_t test_vrmulhq_s16(int16x8_t a, int16x8_t b)
  29 {
  30 #ifdef POLYMORPHIC
  31     return vrmulhq(a, b);
  32 #else /* POLYMORPHIC */
  33     return vrmulhq_s16(a, b);
  34 #endif /* POLYMORPHIC */
  35 }
  36
  37 // CHECK-LABEL: @test_vrmulhq_u32(
  38 // CHECK-NEXT:  entry:
  39 // CHECK-NEXT:    [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vrmulh.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], i32 1)
  40 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
  41 //
  42 uint32x4_t test_vrmulhq_u32(uint32x4_t a, uint32x4_t b)
  43 {
  44 #ifdef POLYMORPHIC
  45     return vrmulhq(a, b);
  46 #else /* POLYMORPHIC */
  47     return vrmulhq_u32(a, b);
  48 #endif /* POLYMORPHIC */
  49 }
  50
  51 // CHECK-LABEL: @test_vrmulhq_m_s8(
  52 // CHECK-NEXT:  entry:
  53 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
  54 // CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
  55 // CHECK-NEXT:    [[TMP2:%.*]] = call <16 x i8> @llvm.arm.mve.rmulh.predicated.v16i8.v16i1(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], i32 0, <16 x i1> [[TMP1]], <16 x i8> [[INACTIVE:%.*]])
  56 // CHECK-NEXT:    ret <16 x i8> [[TMP2]]
  57 //
  58 int8x16_t test_vrmulhq_m_s8(int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  59 {
  60 #ifdef POLYMORPHIC
  61     return vrmulhq_m(inactive, a, b, p);
  62 #else /* POLYMORPHIC */
  63     return vrmulhq_m_s8(inactive, a, b, p);
  64 #endif /* POLYMORPHIC */
  65 }
  66
  67 // CHECK-LABEL: @test_vrmulhq_m_u16(
  68 // CHECK-NEXT:  entry:
  69 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
  70 // CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
  71 // CHECK-NEXT:    [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.rmulh.predicated.v8i16.v8i1(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 1, <8 x i1> [[TMP1]], <8 x i16> [[INACTIVE:%.*]])
  72 // CHECK-NEXT:    ret <8 x i16> [[TMP2]]
  73 //
  74 uint16x8_t test_vrmulhq_m_u16(uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  75 {
  76 #ifdef POLYMORPHIC
  77     return vrmulhq_m(inactive, a, b, p);
  78 #else /* POLYMORPHIC */
  79     return vrmulhq_m_u16(inactive, a, b, p);
  80 #endif /* POLYMORPHIC */
  81 }
  82
  83 // CHECK-LABEL: @test_vrmulhq_m_s32(
  84 // CHECK-NEXT:  entry:
  85 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
  86 // CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
  87 // CHECK-NEXT:    [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.rmulh.predicated.v4i32.v4i1(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], i32 0, <4 x i1> [[TMP1]], <4 x i32> [[INACTIVE:%.*]])
  88 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
  89 //
  90 int32x4_t test_vrmulhq_m_s32(int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  91 {
  92 #ifdef POLYMORPHIC
  93     return vrmulhq_m(inactive, a, b, p);
  94 #else /* POLYMORPHIC */
  95     return vrmulhq_m_s32(inactive, a, b, p);
  96 #endif /* POLYMORPHIC */
  97 }
  98
  99 // CHECK-LABEL: @test_vrmulhq_x_u8(
 100 // CHECK-NEXT:  entry:
 101 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 102 // CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
 103 // CHECK-NEXT:    [[TMP2:%.*]] = call <16 x i8> @llvm.arm.mve.rmulh.predicated.v16i8.v16i1(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], i32 1, <16 x i1> [[TMP1]], <16 x i8> undef)
 104 // CHECK-NEXT:    ret <16 x i8> [[TMP2]]
 105 //
 106 uint8x16_t test_vrmulhq_x_u8(uint8x16_t a, uint8x16_t b, mve_pred16_t p)
 107 {
 108 #ifdef POLYMORPHIC
 109     return vrmulhq_x(a, b, p);
 110 #else /* POLYMORPHIC */
 111     return vrmulhq_x_u8(a, b, p);
 112 #endif /* POLYMORPHIC */
 113 }
 114
 115 // CHECK-LABEL: @test_vrmulhq_x_s16(
 116 // CHECK-NEXT:  entry:
 117 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 118 // CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
 119 // CHECK-NEXT:    [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.rmulh.predicated.v8i16.v8i1(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 0, <8 x i1> [[TMP1]], <8 x i16> undef)
 120 // CHECK-NEXT:    ret <8 x i16> [[TMP2]]
 121 //
 122 int16x8_t test_vrmulhq_x_s16(int16x8_t a, int16x8_t b, mve_pred16_t p)
 123 {
 124 #ifdef POLYMORPHIC
 125     return vrmulhq_x(a, b, p);
 126 #else /* POLYMORPHIC */
 127     return vrmulhq_x_s16(a, b, p);
 128 #endif /* POLYMORPHIC */
 129 }
 130
 131 // CHECK-LABEL: @test_vrmulhq_m_u32(
 132 // CHECK-NEXT:  entry:
 133 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 134 // CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
 135 // CHECK-NEXT:    [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.rmulh.predicated.v4i32.v4i1(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], i32 1, <4 x i1> [[TMP1]], <4 x i32> undef)
 136 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
 137 //
 138 uint32x4_t test_vrmulhq_m_u32(uint32x4_t a, uint32x4_t b, mve_pred16_t p)
 139 {
 140 #ifdef POLYMORPHIC
 141     return vrmulhq_x(a, b, p);
 142 #else /* POLYMORPHIC */
 143     return vrmulhq_x_u32(a, b, p);
 144 #endif /* POLYMORPHIC */
 145 }