clang/test/CodeGen/arm-neon-fma.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature
   2 // RUN: %clang_cc1 -triple thumbv7-none-linux-gnueabihf \
   3 // RUN:   -target-abi aapcs \
   4 // RUN:   -target-cpu cortex-a7 \
   5 // RUN:   -mfloat-abi hard \
   6 // RUN:   -ffreestanding \
   7 // RUN:   -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
   8
   9 // REQUIRES: aarch64-registered-target || arm-registered-target
  10
  11 #include <arm_neon.h>
  12
  13 // CHECK-LABEL: define {{[^@]+}}@test_fma_order
  14 // CHECK-SAME: (<2 x float> noundef [[ACCUM:%.*]], <2 x float> noundef [[LHS:%.*]], <2 x float> noundef [[RHS:%.*]]) #[[ATTR0:[0-9]+]] {
  15 // CHECK-NEXT:  entry:
  16 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[ACCUM]] to <8 x i8>
  17 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[LHS]] to <8 x i8>
  18 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x float> [[RHS]] to <8 x i8>
  19 // CHECK-NEXT:    [[TMP3:%.*]] = call <2 x float> @llvm.fma.v2f32(<2 x float> [[LHS]], <2 x float> [[RHS]], <2 x float> [[ACCUM]])
  20 // CHECK-NEXT:    ret <2 x float> [[TMP3]]
  21 //
  22 float32x2_t test_fma_order(float32x2_t accum, float32x2_t lhs, float32x2_t rhs) {
  23   return vfma_f32(accum, lhs, rhs);
  24 }
  25
  26 // CHECK-LABEL: define {{[^@]+}}@test_fmaq_order
  27 // CHECK-SAME: (<4 x float> noundef [[ACCUM:%.*]], <4 x float> noundef [[LHS:%.*]], <4 x float> noundef [[RHS:%.*]]) #[[ATTR0]] {
  28 // CHECK-NEXT:  entry:
  29 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[ACCUM]] to <16 x i8>
  30 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[LHS]] to <16 x i8>
  31 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x float> [[RHS]] to <16 x i8>
  32 // CHECK-NEXT:    [[TMP3:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> [[LHS]], <4 x float> [[RHS]], <4 x float> [[ACCUM]])
  33 // CHECK-NEXT:    ret <4 x float> [[TMP3]]
  34 //
  35 float32x4_t test_fmaq_order(float32x4_t accum, float32x4_t lhs, float32x4_t rhs) {
  36   return vfmaq_f32(accum, lhs, rhs);
  37 }
  38
  39 // CHECK-LABEL: define {{[^@]+}}@test_vfma_n_f32
  40 // CHECK-SAME: (<2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]], float noundef [[N:%.*]]) #[[ATTR0]] {
  41 // CHECK-NEXT:  entry:
  42 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <2 x float> poison, float [[N]], i32 0
  43 // CHECK-NEXT:    [[VECINIT1_I:%.*]] = insertelement <2 x float> [[VECINIT_I]], float [[N]], i32 1
  44 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <8 x i8>
  45 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[B]] to <8 x i8>
  46 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x float> [[VECINIT1_I]] to <8 x i8>
  47 // CHECK-NEXT:    [[TMP3:%.*]] = call <2 x float> @llvm.fma.v2f32(<2 x float> [[B]], <2 x float> [[VECINIT1_I]], <2 x float> [[A]])
  48 // CHECK-NEXT:    ret <2 x float> [[TMP3]]
  49 //
  50 float32x2_t test_vfma_n_f32(float32x2_t a, float32x2_t b, float32_t n) {
  51   return vfma_n_f32(a, b, n);
  52 }
  53
  54 // CHECK-LABEL: define {{[^@]+}}@test_vfmaq_n_f32
  55 // CHECK-SAME: (<4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]], float noundef [[N:%.*]]) #[[ATTR0]] {
  56 // CHECK-NEXT:  entry:
  57 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <4 x float> poison, float [[N]], i32 0
  58 // CHECK-NEXT:    [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float [[N]], i32 1
  59 // CHECK-NEXT:    [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float [[N]], i32 2
  60 // CHECK-NEXT:    [[VECINIT3_I:%.*]] = insertelement <4 x float> [[VECINIT2_I]], float [[N]], i32 3
  61 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <16 x i8>
  62 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[B]] to <16 x i8>
  63 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x float> [[VECINIT3_I]] to <16 x i8>
  64 // CHECK-NEXT:    [[TMP3:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> [[B]], <4 x float> [[VECINIT3_I]], <4 x float> [[A]])
  65 // CHECK-NEXT:    ret <4 x float> [[TMP3]]
  66 //
  67 float32x4_t test_vfmaq_n_f32(float32x4_t a, float32x4_t b, float32_t n) {
  68   return vfmaq_n_f32(a, b, n);
  69 }
  70