1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple aarch64 -target-feature +sve -mvscale-min=4 -mvscale-max=4 -O1 -emit-llvm -o - %s | FileCheck %s
4 // REQUIRES: aarch64-registered-target
8 #define N __ARM_FEATURE_SVE_BITS
10 typedef svint32_t fixed_int32_t
__attribute__((arm_sve_vector_bits(N
)));
11 typedef svfloat64_t fixed_float64_t
__attribute__((arm_sve_vector_bits(N
)));
12 typedef svbool_t fixed_bool_t
__attribute__((arm_sve_vector_bits(N
)));
13 typedef int32_t gnu_int32_t
__attribute__((vector_size(N
/ 8)));
15 // CHECK-LABEL: @to_svint32_t(
17 // CHECK-NEXT: ret <vscale x 4 x i32> [[TYPE_COERCE:%.*]]
19 svint32_t
to_svint32_t(fixed_int32_t type
) {
23 // CHECK-LABEL: @from_svint32_t(
25 // CHECK-NEXT: ret <vscale x 4 x i32> [[TYPE:%.*]]
27 fixed_int32_t
from_svint32_t(svint32_t type
) {
31 // CHECK-LABEL: @to_svfloat64_t(
33 // CHECK-NEXT: ret <vscale x 2 x double> [[TYPE_COERCE:%.*]]
35 svfloat64_t
to_svfloat64_t(fixed_float64_t type
) {
39 // CHECK-LABEL: @from_svfloat64_t(
41 // CHECK-NEXT: ret <vscale x 2 x double> [[TYPE:%.*]]
43 fixed_float64_t
from_svfloat64_t(svfloat64_t type
) {
47 // CHECK-LABEL: @to_svbool_t(
49 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0:%.*]]
51 svbool_t
to_svbool_t(fixed_bool_t type
) {
55 // CHECK-LABEL: @from_svbool_t(
57 // CHECK-NEXT: ret <vscale x 16 x i1> [[TYPE:%.*]]
59 fixed_bool_t
from_svbool_t(svbool_t type
) {
63 // CHECK-LABEL: @lax_cast(
65 // CHECK-NEXT: [[SAVED_VALUE:%.*]] = alloca <16 x i32>, align 64
66 // CHECK-NEXT: [[TYPE:%.*]] = tail call <16 x i32> @llvm.vector.extract.v16i32.nxv4i32(<vscale x 4 x i32> [[TYPE_COERCE:%.*]], i64 0)
67 // CHECK-NEXT: store <16 x i32> [[TYPE]], ptr [[SAVED_VALUE]], align 64, !tbaa [[TBAA6:![0-9]+]]
68 // CHECK-NEXT: [[TMP0:%.*]] = load <vscale x 2 x i64>, ptr [[SAVED_VALUE]], align 64, !tbaa [[TBAA6]]
69 // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]
71 svint64_t
lax_cast(fixed_int32_t type
) {
75 // CHECK-LABEL: @to_svint32_t__from_gnu_int32_t(
77 // CHECK-NEXT: [[TYPE:%.*]] = load <16 x i32>, ptr [[TMP0:%.*]], align 16, !tbaa [[TBAA6]]
78 // CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = tail call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v16i32(<vscale x 4 x i32> undef, <16 x i32> [[TYPE]], i64 0)
79 // CHECK-NEXT: ret <vscale x 4 x i32> [[CASTSCALABLESVE]]
81 svint32_t
to_svint32_t__from_gnu_int32_t(gnu_int32_t type
) {
85 // CHECK-LABEL: @from_svint32_t__to_gnu_int32_t(
87 // CHECK-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <16 x i32> @llvm.vector.extract.v16i32.nxv4i32(<vscale x 4 x i32> [[TYPE:%.*]], i64 0)
88 // CHECK-NEXT: store <16 x i32> [[CASTFIXEDSVE]], ptr [[AGG_RESULT:%.*]], align 16, !tbaa [[TBAA6]]
89 // CHECK-NEXT: ret void
91 gnu_int32_t
from_svint32_t__to_gnu_int32_t(svint32_t type
) {
95 // CHECK-LABEL: @to_fixed_int32_t__from_gnu_int32_t(
97 // CHECK-NEXT: [[TYPE:%.*]] = load <16 x i32>, ptr [[TMP0:%.*]], align 16, !tbaa [[TBAA6]]
98 // CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = tail call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v16i32(<vscale x 4 x i32> undef, <16 x i32> [[TYPE]], i64 0)
99 // CHECK-NEXT: ret <vscale x 4 x i32> [[CASTSCALABLESVE]]
101 fixed_int32_t
to_fixed_int32_t__from_gnu_int32_t(gnu_int32_t type
) {
105 // CHECK-LABEL: @from_fixed_int32_t__to_gnu_int32_t(
106 // CHECK-NEXT: entry:
107 // CHECK-NEXT: [[TYPE:%.*]] = tail call <16 x i32> @llvm.vector.extract.v16i32.nxv4i32(<vscale x 4 x i32> [[TYPE_COERCE:%.*]], i64 0)
108 // CHECK-NEXT: store <16 x i32> [[TYPE]], ptr [[AGG_RESULT:%.*]], align 16, !tbaa [[TBAA6]]
109 // CHECK-NEXT: ret void
111 gnu_int32_t
from_fixed_int32_t__to_gnu_int32_t(fixed_int32_t type
) {