[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856)
[llvm-project.git] / clang / test / CodeGen / builtins-hexagon-v67-audio.c
blobc120f86564d8cea736496eadcb3962d22944fcc2
1 // RUN: %clang_cc1 -triple hexagon -target-cpu hexagonv67 -target-feature +audio -emit-llvm -o - %s | FileCheck %s
2 // RUN: %clang_cc1 -triple hexagon -target-cpu hexagonv67t -target-feature +audio -emit-llvm -o - %s | FileCheck %s
4 // CHECK-LABEL: @test1
5 // CHECK: call i64 @llvm.hexagon.M7.dcmpyrw(i64 %0, i64 %1)
6 long long test1(long long rss, long long rtt) {
7 return __builtin_HEXAGON_M7_dcmpyrw(rss, rtt);
10 // CHECK-LABEL: @test2
11 // CHECK: call i64 @llvm.hexagon.M7.dcmpyrw.acc(i64 %0, i64 %1, i64 %2)
12 long long test2(long long rxx, long long rss, long long rtt) {
13 return __builtin_HEXAGON_M7_dcmpyrw_acc(rxx, rss, rtt);
16 // CHECK-LABEL: @test3
17 // CHECK: call i64 @llvm.hexagon.M7.dcmpyrwc(i64 %0, i64 %1)
18 long long test3(long long rss, long long rtt) {
19 return __builtin_HEXAGON_M7_dcmpyrwc(rss, rtt);
22 // CHECK-LABEL: @test4
23 // CHECK: call i64 @llvm.hexagon.M7.dcmpyrwc.acc(i64 %0, i64 %1, i64 %2)
24 long long test4(long long rxx, long long rss, long long rtt) {
25 return __builtin_HEXAGON_M7_dcmpyrwc_acc(rxx, rss, rtt);
28 // CHECK-LABEL: @test5
29 // CHECK: call i64 @llvm.hexagon.M7.dcmpyiw(i64 %0, i64 %1)
30 long long test5(long long rss, long long rtt) {
31 return __builtin_HEXAGON_M7_dcmpyiw(rss, rtt);
34 // CHECK-LABEL: @test6
35 // CHECK: call i64 @llvm.hexagon.M7.dcmpyiw.acc(i64 %0, i64 %1, i64 %2)
36 long long test6(long long rxx, long long rss, long long rtt) {
37 return __builtin_HEXAGON_M7_dcmpyiw_acc(rxx, rss, rtt);
40 // CHECK-LABEL: @test7
41 // CHECK: call i64 @llvm.hexagon.M7.dcmpyiwc(i64 %0, i64 %1)
42 long long test7(long long rss, long long rtt) {
43 return __builtin_HEXAGON_M7_dcmpyiwc(rss, rtt);
46 // CHECK-LABEL: @test8
47 // CHECK: call i64 @llvm.hexagon.M7.dcmpyiwc.acc(i64 %0, i64 %1, i64 %2)
48 long long test8(long long rxx, long long rss, long long rtt) {
49 return __builtin_HEXAGON_M7_dcmpyiwc_acc(rxx, rss, rtt);
52 // CHECK-LABEL: @test9
53 // CHECK: call i32 @llvm.hexagon.M7.wcmpyrw(i64 %0, i64 %1)
54 int test9(long long rss, long long rtt) {
55 return __builtin_HEXAGON_M7_wcmpyrw(rss, rtt);
58 // CHECK-LABEL: @test10
59 // CHECK: call i32 @llvm.hexagon.M7.wcmpyrwc(i64 %0, i64 %1)
60 int test10(long long rss, long long rtt) {
61 return __builtin_HEXAGON_M7_wcmpyrwc(rss, rtt);
64 // CHECK-LABEL: @test11
65 // CHECK: call i32 @llvm.hexagon.M7.wcmpyiw(i64 %0, i64 %1)
66 int test11(long long rss, long long rtt) {
67 return __builtin_HEXAGON_M7_wcmpyiw(rss, rtt);
70 // CHECK-LABEL: @test12
71 // CHECK: call i32 @llvm.hexagon.M7.wcmpyiwc(i64 %0, i64 %1)
72 int test12(long long rss, long long rtt) {
73 return __builtin_HEXAGON_M7_wcmpyiwc(rss, rtt);
76 // CHECK-LABEL: @test13
77 // CHECK: call i32 @llvm.hexagon.M7.wcmpyrw.rnd(i64 %0, i64 %1)
78 int test13(long long rss, long long rtt) {
79 return __builtin_HEXAGON_M7_wcmpyrw_rnd(rss, rtt);
82 // CHECK-LABEL: @test14
83 // CHECK: call i32 @llvm.hexagon.M7.wcmpyrwc.rnd(i64 %0, i64 %1)
84 int test14(long long rss, long long rtt) {
85 return __builtin_HEXAGON_M7_wcmpyrwc_rnd(rss, rtt);
88 // CHECK-LABEL: @test15
89 // CHECK: call i32 @llvm.hexagon.M7.wcmpyiw.rnd(i64 %0, i64 %1)
90 int test15(long long rss, long long rtt) {
91 return __builtin_HEXAGON_M7_wcmpyiw_rnd(rss, rtt);
94 // CHECK-LABEL: @test16
95 // CHECK: call i32 @llvm.hexagon.M7.wcmpyiwc.rnd(i64 %0, i64 %1)
96 int test16(long long rss, long long rtt) {
97 return __builtin_HEXAGON_M7_wcmpyiwc_rnd(rss, rtt);
100 // CHECK-LABEL: @test17
101 // CHECK: call i64 @llvm.hexagon.A7.croundd.ri(i64 %0, i32 0)
102 long long test17(long long rss) {
103 return __builtin_HEXAGON_A7_croundd_ri(rss, 0);
106 // CHECK-LABEL: @test18
107 // CHECK: call i64 @llvm.hexagon.A7.croundd.rr(i64 %0, i32 %1)
108 long long test18(long long rss, int rt) {
109 return __builtin_HEXAGON_A7_croundd_rr(rss, rt);
112 // CHECK-LABEL: @test19
113 // CHECK: call i32 @llvm.hexagon.A7.clip(i32 %0, i32 0)
114 int test19(int rs) {
115 return __builtin_HEXAGON_A7_clip(rs, 0);
118 // CHECK-LABEL: @test20
119 // CHECK: call i64 @llvm.hexagon.A7.vclip(i64 %0, i32 0)
120 long long test20(long long rs) {
121 return __builtin_HEXAGON_A7_vclip(rs, 0);
124 // CHECK-LABEL: @test21
125 // CHECK: call i64 @llvm.hexagon.M7.vdmpy(i64 %0, i64 %1)
126 long long test21(long long rss, long long rtt) {
127 return __builtin_HEXAGON_M7_vdmpy(rss, rtt);
130 // CHECK-LABEL: @test22
131 // CHECK: call i64 @llvm.hexagon.M7.vdmpy.acc(i64 %0, i64 %1, i64 %2)
132 long long test22(long long rxx, long long rss, long long rtt) {
133 return __builtin_HEXAGON_M7_vdmpy_acc(rxx, rss, rtt);