clang/test/CodeGen/multi-aix-builtin-cpu-supports.c

   1 // RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %s | FileCheck %s
   2
   3 int main() {
   4   int ret = 0;
   5   ret += __builtin_cpu_supports("vsx");     // Test reading `vsx` information from the system variable `_system_configuration`.
   6   ret += __builtin_cpu_supports("htm");     // Test getting `htm` information from the function call `getsystemcfg`
   7   ret += __builtin_cpu_supports("cellbe");  // The test always returns false for the feature 'cellbe.
   8   ret += __builtin_cpu_supports("power4");  // The test always returns false for the feature `power4`.
   9   ret += __builtin_cpu_supports("fpu");     // The test always returns true for the feature `fpu`.
  10   ret += __builtin_cpu_supports("mma");     // Test getting `mma` information from the function call `getsystemcfg`.
  11   return ret;
  12 }
  13
  14 // CHECK:     @_system_configuration = external global { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i32, i32, i32, i32, i64, i64, i64, i64, i32, i32, i32, i32, i32, i32, i64, i32, i8, i8, i8, i8, i32, i32, i16, i16, [3 x i32], i32 }
  15 // CHECK-EMPTY:
  16 // CHECK-NEXT: ; Function Attrs: noinline nounwind optnone
  17 // CHECK-NEXT: define i32 @main() #0 {
  18 // CHECK-NEXT: entry:
  19 // CHECK-NEXT:   %retval = alloca i32, align 4
  20 // CHECK-NEXT:   %ret = alloca i32, align 4
  21 // CHECK-NEXT:   store i32 0, ptr %retval, align 4
  22 // CHECK-NEXT:   store i32 0, ptr %ret, align 4
  23 // CHECK-NEXT:   %0 = load i32, ptr getelementptr inbounds ({ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i32, i32, i32, i32, i64, i64, i64, i64, i32, i32, i32, i32, i32, i32, i64, i32, i8, i8, i8, i8, i32, i32, i16, i16, [3 x i32], i32 }, ptr @_system_configuration, i32 0, i32 46), align 4
  24 // CHECK-NEXT:   %1 = icmp ugt i32 %0, 1
  25 // CHECK-NEXT:   %conv = zext i1 %1 to i32
  26 // CHECK-NEXT:   %2 = load i32, ptr %ret, align 4
  27 // CHECK-NEXT:   %add = add nsw i32 %2, %conv
  28 // CHECK-NEXT:   store i32 %add, ptr %ret, align 4
  29 // CHECK-NEXT:   %3 = call i64 @getsystemcfg(i32 59)
  30 // CHECK-NEXT:   %4 = icmp ugt i64 %3, 0
  31 // CHECK-NEXT:   %conv1 = zext i1 %4 to i32
  32 // CHECK-NEXT:   %5 = load i32, ptr %ret, align 4
  33 // CHECK-NEXT:   %add2 = add nsw i32 %5, %conv1
  34 // CHECK-NEXT:   store i32 %add2, ptr %ret, align 4
  35 // CHECK-NEXT:   %6 = load i32, ptr %ret, align 4
  36 // CHECK-NEXT:   %add3 = add nsw i32 %6, 0
  37 // CHECK-NEXT:   store i32 %add3, ptr %ret, align 4
  38 // CHECK-NEXT:   %7 = load i32, ptr %ret, align 4
  39 // CHECK-NEXT:   %add4 = add nsw i32 %7, 1
  40 // CHECK-NEXT:   store i32 %add4, ptr %ret, align 4
  41 // CHECK-NEXT:   %8 = load i32, ptr %ret, align 4
  42 // CHECK-NEXT:   %add5 = add nsw i32 %8, 1
  43 // CHECK-NEXT:   store i32 %add5, ptr %ret, align 4
  44 // CHECK-NEXT:   %9 = call i64 @getsystemcfg(i32 62)
  45 // CHECK-NEXT:   %10 = icmp ugt i64 %9, 0
  46 // CHECK-NEXT:   %conv6 = zext i1 %10 to i32
  47 // CHECK-NEXT:   %11 = load i32, ptr %ret, align 4
  48 // CHECK-NEXT:   %add7 = add nsw i32 %11, %conv6
  49 // CHECK-NEXT:   store i32 %add7, ptr %ret, align 4
  50 // CHECK-NEXT:   %12 = load i32, ptr %ret, align 4
  51 // CHECK-NEXT:   ret i32 %12
  52 // CHECK-NEXT: }
  53 // CHECK-EMPTY:
  54 // CHECK-NEXT: declare i64 @getsystemcfg(i32)