clang/test/CodeGen/volatile.cpp

   1 // RUN: %clang_cc1 -O2 -triple=x86_64-unknown-linux-gnu -emit-llvm %s -o -  | FileCheck %s
   2 struct agg
   3 {
   4 int a ;
   5 int b ;
   6 } t;
   7 struct agg a;
   8 int vt=10;
   9 _Complex float cf;
  10 int volatile vol =10;
  11 void f0() {
  12     const_cast<volatile _Complex float &>(cf) = const_cast<volatile _Complex float&>(cf) + 1;
  13 //  CHECK: [[Re1:%.*]] = load volatile float, ptr @cf
  14 //  CHECK: [[Im1:%.*]] = load volatile float, ptr getelementptr
  15 //  CHECK: [[Add1:%.*]] = fadd float [[Re1]], 1.000000e+00
  16 //  CHECK: store volatile float [[Add1]], ptr @cf
  17 //  CHECK: store volatile float [[Im1]], ptr getelementptr
  18       static_cast<volatile _Complex float &>(cf) = static_cast<volatile _Complex float&>(cf) + 1;
  19 //  CHECK: [[Re2:%.*]] = load volatile float, ptr @cf
  20 //  CHECK: [[Im2:%.*]] = load volatile float, ptr getelementptr
  21 //  CHECK: [[Add2:%.*]] = fadd float [[Re2]], 1.000000e+00
  22 //  CHECK: store volatile float [[Add2]], ptr @cf
  23 //  CHECK: store volatile float [[Im2]], ptr getelementptr
  24     const_cast<volatile  int  &>(a.a) = const_cast<volatile int &>(t.a) ;
  25 //  CHECK: [[I1:%.*]] = load volatile i32, ptr @t
  26 //  CHECK: store volatile i32 [[I1]], ptr @a
  27     static_cast<volatile  int  &>(a.b) = static_cast<volatile int  &>(t.a) ;
  28 //  CHECK: [[I2:%.*]] = load volatile i32, ptr @t
  29 //  CHECK: store volatile i32 [[I2]], ptr getelementptr
  30     const_cast<volatile int&>(vt) = const_cast<volatile int&>(vt) + 1;
  31 //  CHECK: [[I3:%.*]] = load volatile i32, ptr @vt
  32 //  CHECK: [[Add3:%.*]] = add nsw i32 [[I3]], 1
  33 //  CHECK: store volatile i32 [[Add3]], ptr @vt
  34      static_cast<volatile int&>(vt) = static_cast<volatile int&>(vt) + 1;
  35 //  CHECK: [[I4:%.*]] = load volatile i32, ptr @vt
  36 //  CHECK: [[Add4:%.*]] = add nsw i32 [[I4]], 1
  37 //  CHECK: store volatile i32 [[Add4]], ptr @vt
  38     vt = const_cast<int&>(vol);
  39 //  [[I5:%.*]] = load i32, ptr @vol
  40 //  store i32 [[I5]], ptr @vt
  41 }