1 ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 2
2 ; RUN: opt -passes="print<cost-model>" -disable-output -mtriple=arm64-apple-ios < %s 2>&1 | FileCheck %s
4 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
6 define i8 @fshl_i8_3rd_arg_const(i8 %a, i8 %b) {
7 ; CHECK-LABEL: 'fshl_i8_3rd_arg_const'
8 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %fshl = tail call i8 @llvm.fshl.i8(i8 %a, i8 %b, i8 9)
9 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i8 %fshl
12 %fshl = tail call i8 @llvm.fshl.i8(i8 %a, i8 %b, i8 9)
16 define i8 @fshl_i8_3rd_arg_var(i8 %a, i8 %b, i8 %c) {
17 ; CHECK-LABEL: 'fshl_i8_3rd_arg_var'
18 ; CHECK-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %fshl = tail call i8 @llvm.fshl.i8(i8 %a, i8 %b, i8 %c)
19 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i8 %fshl
22 %fshl = tail call i8 @llvm.fshl.i8(i8 %a, i8 %b, i8 %c)
26 declare i8 @llvm.fshl.i8(i8, i8, i8)
28 define i16 @fshl_i16(i16 %a, i16 %b) {
29 ; CHECK-LABEL: 'fshl_i16'
30 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %fshl = tail call i16 @llvm.fshl.i16(i16 %a, i16 %b, i16 9)
31 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i16 %fshl
34 %fshl = tail call i16 @llvm.fshl.i16(i16 %a, i16 %b, i16 9)
38 declare i16 @llvm.fshl.i16(i16, i16, i16)
40 define i32 @fshl_i32_3rd_arg_const(i32 %a, i32 %b) {
41 ; CHECK-LABEL: 'fshl_i32_3rd_arg_const'
42 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %fshl = tail call i32 @llvm.fshl.i32(i32 %a, i32 %b, i32 9)
43 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 %fshl
46 %fshl = tail call i32 @llvm.fshl.i32(i32 %a, i32 %b, i32 9)
50 define i32 @fshl_i32_3rd_arg_var(i32 %a, i32 %b, i32 %c) {
51 ; CHECK-LABEL: 'fshl_i32_3rd_arg_var'
52 ; CHECK-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %fshl = tail call i32 @llvm.fshl.i32(i32 %a, i32 %b, i32 %c)
53 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 %fshl
56 %fshl = tail call i32 @llvm.fshl.i32(i32 %a, i32 %b, i32 %c)
60 declare i32 @llvm.fshl.i32(i32, i32, i32)
62 define i64 @fshl_i64_3rd_arg_const(i64 %a, i64 %b) {
63 ; CHECK-LABEL: 'fshl_i64_3rd_arg_const'
64 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %fshl = tail call i64 @llvm.fshl.i64(i64 %a, i64 %b, i64 9)
65 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i64 %fshl
68 %fshl = tail call i64 @llvm.fshl.i64(i64 %a, i64 %b, i64 9)
72 define i64 @fshl_i64_3rd_arg_var(i64 %a, i64 %b, i64 %c) {
73 ; CHECK-LABEL: 'fshl_i64_3rd_arg_var'
74 ; CHECK-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %fshl = tail call i64 @llvm.fshl.i64(i64 %a, i64 %b, i64 %c)
75 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i64 %fshl
78 %fshl = tail call i64 @llvm.fshl.i64(i64 %a, i64 %b, i64 %c)
82 declare i64 @llvm.fshl.i64(i64, i64, i64)
84 define i19 @fshl_i19(i19 %a, i19 %b) {
85 ; CHECK-LABEL: 'fshl_i19'
86 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %fshl = tail call i19 @llvm.fshl.i19(i19 %a, i19 %b, i19 9)
87 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i19 %fshl
90 %fshl = tail call i19 @llvm.fshl.i19(i19 %a, i19 %b, i19 9)
94 declare i19 @llvm.fshl.i19(i19, i19, i19)
97 define <16 x i8> @fshl_v16i8_3rd_arg_vec_const_all_lanes_same(<16 x i8> %a, <16 x i8> %b) {
98 ; CHECK-LABEL: 'fshl_v16i8_3rd_arg_vec_const_all_lanes_same'
99 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %fshl = tail call <16 x i8> @llvm.fshl.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> splat (i8 3))
100 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %fshl
103 %fshl = tail call <16 x i8> @llvm.fshl.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>)
107 define <16 x i8> @fshl_v16i8_3rd_arg_vec_const_lanes_different(<16 x i8> %a, <16 x i8> %b) {
108 ; CHECK-LABEL: 'fshl_v16i8_3rd_arg_vec_const_lanes_different'
109 ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %fshl = tail call <16 x i8> @llvm.fshl.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> <i8 9, i8 1, i8 13, i8 7, i8 31, i8 23, i8 43, i8 51, i8 3, i8 3, i8 17, i8 3, i8 11, i8 15, i8 3, i8 3>)
110 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %fshl
113 %fshl = tail call <16 x i8> @llvm.fshl.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> <i8 9, i8 1, i8 13, i8 7, i8 31, i8 23, i8 43, i8 51, i8 3, i8 3, i8 17, i8 3, i8 11, i8 15, i8 3, i8 3>)
117 define <16 x i8> @fshl_v16i8_3rd_arg_var(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
118 ; CHECK-LABEL: 'fshl_v16i8_3rd_arg_var'
119 ; CHECK-NEXT: Cost Model: Found an estimated cost of 118 for instruction: %fshl = tail call <16 x i8> @llvm.fshl.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c)
120 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %fshl
123 %fshl = tail call <16 x i8> @llvm.fshl.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c)
127 declare <16 x i8> @llvm.fshl.v16i8(<16 x i8>, <16 x i8>, <16 x i8>)
129 define <8 x i16> @fshl_v8i16_3rd_arg_vec_const_all_lanes_same(<8 x i16> %a, <8 x i16> %b) {
130 ; CHECK-LABEL: 'fshl_v8i16_3rd_arg_vec_const_all_lanes_same'
131 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %fshl = tail call <8 x i16> @llvm.fshl.v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> splat (i16 3))
132 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %fshl
135 %fshl = tail call <8 x i16> @llvm.fshl.v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>)
139 define <8 x i16> @fshl_v8i16_3rd_arg_vec_const_lanes_different(<8 x i16> %a, <8 x i16> %b) {
140 ; CHECK-LABEL: 'fshl_v8i16_3rd_arg_vec_const_lanes_different'
141 ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %fshl = tail call <8 x i16> @llvm.fshl.v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> <i16 3, i16 1, i16 13, i16 8, i16 7, i16 31, i16 43, i16 51>)
142 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %fshl
145 %fshl = tail call <8 x i16> @llvm.fshl.v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> <i16 3, i16 1, i16 13, i16 8, i16 7, i16 31, i16 43, i16 51>)
149 define <8 x i16> @fshl_v8i16_3rd_arg_var(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) {
150 ; CHECK-LABEL: 'fshl_v8i16_3rd_arg_var'
151 ; CHECK-NEXT: Cost Model: Found an estimated cost of 62 for instruction: %fshl = tail call <8 x i16> @llvm.fshl.v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c)
152 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %fshl
155 %fshl = tail call <8 x i16> @llvm.fshl.v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c)
159 declare <8 x i16> @llvm.fshl.v8i16(<8 x i16>, <8 x i16>, <8 x i16>)
161 define <4 x i32> @fshl_v4i32_3rd_arg_vec_const_all_lanes_same(<4 x i32> %a, <4 x i32> %b) {
162 ; CHECK-LABEL: 'fshl_v4i32_3rd_arg_vec_const_all_lanes_same'
163 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %fshl = tail call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> splat (i32 3))
164 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %fshl
167 %fshl = tail call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 3>)
171 define <4 x i32> @fshl_v4i32_3rd_arg_vec_const_lanes_different(<4 x i32> %a, <4 x i32> %b) {
172 ; CHECK-LABEL: 'fshl_v4i32_3rd_arg_vec_const_lanes_different'
173 ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %fshl = tail call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 11, i32 2>)
174 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %fshl
177 %fshl = tail call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 11, i32 2>)
181 define <4 x i32> @fshl_v4i32_3rd_arg_var(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
182 ; CHECK-LABEL: 'fshl_v4i32_3rd_arg_var'
183 ; CHECK-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %fshl = tail call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c)
184 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %fshl
187 %fshl = tail call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c)
191 declare <4 x i32> @llvm.fshl.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
193 define <2 x i64> @fshl_v2i64_3rd_arg_vec_const_all_lanes_same(<2 x i64> %a, <2 x i64> %b) {
194 ; CHECK-LABEL: 'fshl_v2i64_3rd_arg_vec_const_all_lanes_same'
195 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %fshl = tail call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> splat (i64 1))
196 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %fshl
199 %fshl = tail call <2 x i64> @llvm.fshl.v4i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> <i64 1, i64 1>)
203 define <2 x i64> @fshl_v2i64_3rd_arg_vec_const_lanes_different(<2 x i64> %a, <2 x i64> %b) {
204 ; CHECK-LABEL: 'fshl_v2i64_3rd_arg_vec_const_lanes_different'
205 ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %fshl = tail call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> <i64 1, i64 2>)
206 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %fshl
209 %fshl = tail call <2 x i64> @llvm.fshl.v4i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> <i64 1, i64 2>)
213 define <2 x i64> @fshl_v2i64_3rd_arg_var(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) {
214 ; CHECK-LABEL: 'fshl_v2i64_3rd_arg_var'
215 ; CHECK-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %fshl = tail call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c)
216 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %fshl
219 %fshl = tail call <2 x i64> @llvm.fshl.v4i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c)
223 declare <2 x i64> @llvm.fshl.v4i64(<2 x i64>, <2 x i64>, <2 x i64>)
225 define <4 x i30> @fshl_v4i30_3rd_arg_var(<4 x i30> %a, <4 x i30> %b, <4 x i30> %c) {
226 ; CHECK-LABEL: 'fshl_v4i30_3rd_arg_var'
227 ; CHECK-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %fshl = tail call <4 x i30> @llvm.fshl.v4i30(<4 x i30> %a, <4 x i30> %b, <4 x i30> %c)
228 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i30> %fshl
231 %fshl = tail call <4 x i30> @llvm.fshl.v4i30(<4 x i30> %a, <4 x i30> %b, <4 x i30> %c)
235 declare <4 x i30> @llvm.fshl.v4i30(<4 x i30>, <4 x i30>, <4 x i30>)
237 define <2 x i66> @fshl_v2i66_3rd_arg_vec_const_lanes_different(<2 x i66> %a, <2 x i66> %b) {
238 ; CHECK-LABEL: 'fshl_v2i66_3rd_arg_vec_const_lanes_different'
239 ; CHECK-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %fshl = tail call <2 x i66> @llvm.fshl.v2i66(<2 x i66> %a, <2 x i66> %b, <2 x i66> <i66 1, i66 2>)
240 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i66> %fshl
243 %fshl = tail call <2 x i66> @llvm.fshl.v4i66(<2 x i66> %a, <2 x i66> %b, <2 x i66> <i66 1, i66 2>)
246 declare <2 x i66> @llvm.fshl.v4i66(<2 x i66>, <2 x i66>, <2 x i66>)
248 define i66 @fshl_i66(i66 %a, i66 %b) {
249 ; CHECK-LABEL: 'fshl_i66'
250 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %fshl = tail call i66 @llvm.fshl.i66(i66 %a, i66 %b, i66 9)
251 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i66 %fshl
254 %fshl = tail call i66 @llvm.fshl.i66(i66 %a, i66 %b, i66 9)
258 declare i66 @llvm.fshl.i66(i66, i66, i66)
260 define <2 x i128> @fshl_v2i128_3rd_arg_vec_const_lanes_different(<2 x i128> %a, <2 x i128> %b) {
261 ; CHECK-LABEL: 'fshl_v2i128_3rd_arg_vec_const_lanes_different'
262 ; CHECK-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %fshl = tail call <2 x i128> @llvm.fshl.v2i128(<2 x i128> %a, <2 x i128> %b, <2 x i128> <i128 1, i128 2>)
263 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i128> %fshl
266 %fshl = tail call <2 x i128> @llvm.fshl.v4i128(<2 x i128> %a, <2 x i128> %b, <2 x i128> <i128 1, i128 2>)
269 declare <2 x i128> @llvm.fshl.v4i128(<2 x i128>, <2 x i128>, <2 x i128>)
271 define i128 @fshl_i128(i128 %a, i128 %b) {
272 ; CHECK-LABEL: 'fshl_i128'
273 ; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %fshl = tail call i128 @llvm.fshl.i128(i128 %a, i128 %b, i128 9)
274 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i128 %fshl
277 %fshl = tail call i128 @llvm.fshl.i128(i128 %a, i128 %b, i128 9)
281 declare i128 @llvm.fshl.i128(i128, i128, i128)