1 ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
2 ; RUN: opt < %s -mtriple=aarch64-unknown-linux-gnu -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output | FileCheck %s
4 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
6 define void @reduce() {
7 ; CHECK-LABEL: 'reduce'
8 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V1 = call i1 @llvm.vector.reduce.xor.v1i1(<1 x i1> undef)
9 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2 = call i1 @llvm.vector.reduce.xor.v2i1(<2 x i1> undef)
10 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4 = call i1 @llvm.vector.reduce.xor.v4i1(<4 x i1> undef)
11 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8 = call i1 @llvm.vector.reduce.xor.v8i1(<8 x i1> undef)
12 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16 = call i1 @llvm.vector.reduce.xor.v16i1(<16 x i1> undef)
13 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V32 = call i1 @llvm.vector.reduce.xor.v32i1(<32 x i1> undef)
14 ; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V64 = call i1 @llvm.vector.reduce.xor.v64i1(<64 x i1> undef)
15 ; CHECK-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V128 = call i1 @llvm.vector.reduce.xor.v128i1(<128 x i1> undef)
16 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V1i8 = call i8 @llvm.vector.reduce.xor.v1i8(<1 x i8> undef)
17 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V3i8 = call i8 @llvm.vector.reduce.xor.v3i8(<3 x i8> undef)
18 ; CHECK-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4i8 = call i8 @llvm.vector.reduce.xor.v4i8(<4 x i8> undef)
19 ; CHECK-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %V8i8 = call i8 @llvm.vector.reduce.xor.v8i8(<8 x i8> undef)
20 ; CHECK-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %V16i8 = call i8 @llvm.vector.reduce.xor.v16i8(<16 x i8> undef)
21 ; CHECK-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V32i8 = call i8 @llvm.vector.reduce.xor.v32i8(<32 x i8> undef)
22 ; CHECK-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V64i8 = call i8 @llvm.vector.reduce.xor.v64i8(<64 x i8> undef)
23 ; CHECK-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4i16 = call i16 @llvm.vector.reduce.xor.v4i16(<4 x i16> undef)
24 ; CHECK-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V8i16 = call i16 @llvm.vector.reduce.xor.v8i16(<8 x i16> undef)
25 ; CHECK-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V16i16 = call i16 @llvm.vector.reduce.xor.v16i16(<16 x i16> undef)
26 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2i32 = call i32 @llvm.vector.reduce.xor.v2i32(<2 x i32> undef)
27 ; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V4i32 = call i32 @llvm.vector.reduce.xor.v4i32(<4 x i32> undef)
28 ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V8i32 = call i32 @llvm.vector.reduce.xor.v8i32(<8 x i32> undef)
29 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2i64 = call i64 @llvm.vector.reduce.xor.v2i64(<2 x i64> undef)
30 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4i64 = call i64 @llvm.vector.reduce.xor.v4i64(<4 x i64> undef)
31 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
34 %V1 = call i1 @llvm.vector.reduce.xor.v1i1(<1 x i1> undef)
35 %V2 = call i1 @llvm.vector.reduce.xor.v2i1(<2 x i1> undef)
36 %V4 = call i1 @llvm.vector.reduce.xor.v4i1(<4 x i1> undef)
37 %V8 = call i1 @llvm.vector.reduce.xor.v8i1(<8 x i1> undef)
38 %V16 = call i1 @llvm.vector.reduce.xor.v16i1(<16 x i1> undef)
39 %V32 = call i1 @llvm.vector.reduce.xor.v32i1(<32 x i1> undef)
40 %V64 = call i1 @llvm.vector.reduce.xor.v64i1(<64 x i1> undef)
41 %V128 = call i1 @llvm.vector.reduce.xor.v128i1(<128 x i1> undef)
43 %V1i8 = call i8 @llvm.vector.reduce.xor.v1i8(<1 x i8> undef)
44 %V3i8 = call i8 @llvm.vector.reduce.xor.v3i8(<3 x i8> undef)
45 %V4i8 = call i8 @llvm.vector.reduce.xor.v4i8(<4 x i8> undef)
46 %V8i8 = call i8 @llvm.vector.reduce.xor.v8i8(<8 x i8> undef)
47 %V16i8 = call i8 @llvm.vector.reduce.xor.v16i8(<16 x i8> undef)
48 %V32i8 = call i8 @llvm.vector.reduce.xor.v32i8(<32 x i8> undef)
49 %V64i8 = call i8 @llvm.vector.reduce.xor.v64i8(<64 x i8> undef)
50 %V4i16 = call i16 @llvm.vector.reduce.xor.v4i16(<4 x i16> undef)
51 %V8i16 = call i16 @llvm.vector.reduce.xor.v8i16(<8 x i16> undef)
52 %V16i16 = call i16 @llvm.vector.reduce.xor.v16i16(<16 x i16> undef)
53 %V2i32 = call i32 @llvm.vector.reduce.xor.v2i32(<2 x i32> undef)
54 %V4i32 = call i32 @llvm.vector.reduce.xor.v4i32(<4 x i32> undef)
55 %V8i32 = call i32 @llvm.vector.reduce.xor.v8i32(<8 x i32> undef)
56 %V2i64 = call i64 @llvm.vector.reduce.xor.v2i64(<2 x i64> undef)
57 %V4i64 = call i64 @llvm.vector.reduce.xor.v4i64(<4 x i64> undef)
61 declare i1 @llvm.vector.reduce.xor.v1i1(<1 x i1>)
62 declare i1 @llvm.vector.reduce.xor.v2i1(<2 x i1>)
63 declare i1 @llvm.vector.reduce.xor.v4i1(<4 x i1>)
64 declare i1 @llvm.vector.reduce.xor.v8i1(<8 x i1>)
65 declare i1 @llvm.vector.reduce.xor.v16i1(<16 x i1>)
66 declare i1 @llvm.vector.reduce.xor.v32i1(<32 x i1>)
67 declare i1 @llvm.vector.reduce.xor.v64i1(<64 x i1>)
68 declare i1 @llvm.vector.reduce.xor.v128i1(<128 x i1>)
69 declare i8 @llvm.vector.reduce.xor.v1i8(<1 x i8>)
70 declare i8 @llvm.vector.reduce.xor.v3i8(<3 x i8>)
71 declare i8 @llvm.vector.reduce.xor.v4i8(<4 x i8>)
72 declare i8 @llvm.vector.reduce.xor.v8i8(<8 x i8>)
73 declare i8 @llvm.vector.reduce.xor.v16i8(<16 x i8>)
74 declare i8 @llvm.vector.reduce.xor.v32i8(<32 x i8>)
75 declare i8 @llvm.vector.reduce.xor.v64i8(<64 x i8>)
76 declare i16 @llvm.vector.reduce.xor.v4i16(<4 x i16>)
77 declare i16 @llvm.vector.reduce.xor.v8i16(<8 x i16>)
78 declare i16 @llvm.vector.reduce.xor.v16i16(<16 x i16>)
79 declare i32 @llvm.vector.reduce.xor.v2i32(<2 x i32>)
80 declare i32 @llvm.vector.reduce.xor.v4i32(<4 x i32>)
81 declare i32 @llvm.vector.reduce.xor.v8i32(<8 x i32>)
82 declare i64 @llvm.vector.reduce.xor.v2i64(<2 x i64>)
83 declare i64 @llvm.vector.reduce.xor.v4i64(<4 x i64>)