| blob | 9c4f0207b84ce880b65cee4aa2034c50964bd706 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2 ; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-NOFP16
3 ; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-FP16
4 ; RUN: llc -mtriple=aarch64 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-NOFP16
5 ; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-FP16
7 define i64 @fptos_f64_i64(double %a) {
8 ; CHECK-LABEL: fptos_f64_i64:
9 ; CHECK: // %bb.0: // %entry
10 ; CHECK-NEXT: fcvtzs x0, d0
11 ; CHECK-NEXT: ret
12 entry:
13 %c = fptosi double %a to i64
14 ret i64 %c
15 }
17 define i64 @fptou_f64_i64(double %a) {
18 ; CHECK-LABEL: fptou_f64_i64:
19 ; CHECK: // %bb.0: // %entry
20 ; CHECK-NEXT: fcvtzu x0, d0
21 ; CHECK-NEXT: ret
22 entry:
23 %c = fptoui double %a to i64
24 ret i64 %c
25 }
27 define i32 @fptos_f64_i32(double %a) {
28 ; CHECK-LABEL: fptos_f64_i32:
29 ; CHECK: // %bb.0: // %entry
30 ; CHECK-NEXT: fcvtzs w0, d0
31 ; CHECK-NEXT: ret
32 entry:
33 %c = fptosi double %a to i32
34 ret i32 %c
35 }
37 define i32 @fptou_f64_i32(double %a) {
38 ; CHECK-LABEL: fptou_f64_i32:
39 ; CHECK: // %bb.0: // %entry
40 ; CHECK-NEXT: fcvtzu w0, d0
41 ; CHECK-NEXT: ret
42 entry:
43 %c = fptoui double %a to i32
44 ret i32 %c
45 }
47 define i16 @fptos_f64_i16(double %a) {
48 ; CHECK-LABEL: fptos_f64_i16:
49 ; CHECK: // %bb.0: // %entry
50 ; CHECK-NEXT: fcvtzs w0, d0
51 ; CHECK-NEXT: ret
52 entry:
53 %c = fptosi double %a to i16
54 ret i16 %c
55 }
57 define i16 @fptou_f64_i16(double %a) {
58 ; CHECK-SD-LABEL: fptou_f64_i16:
59 ; CHECK-SD: // %bb.0: // %entry
60 ; CHECK-SD-NEXT: fcvtzs w0, d0
61 ; CHECK-SD-NEXT: ret
62 ;
63 ; CHECK-GI-LABEL: fptou_f64_i16:
64 ; CHECK-GI: // %bb.0: // %entry
65 ; CHECK-GI-NEXT: fcvtzu w0, d0
66 ; CHECK-GI-NEXT: ret
67 entry:
68 %c = fptoui double %a to i16
69 ret i16 %c
70 }
72 define i8 @fptos_f64_i8(double %a) {
73 ; CHECK-LABEL: fptos_f64_i8:
74 ; CHECK: // %bb.0: // %entry
75 ; CHECK-NEXT: fcvtzs w0, d0
76 ; CHECK-NEXT: ret
77 entry:
78 %c = fptosi double %a to i8
79 ret i8 %c
80 }
82 define i8 @fptou_f64_i8(double %a) {
83 ; CHECK-SD-LABEL: fptou_f64_i8:
84 ; CHECK-SD: // %bb.0: // %entry
85 ; CHECK-SD-NEXT: fcvtzs w0, d0
86 ; CHECK-SD-NEXT: ret
87 ;
88 ; CHECK-GI-LABEL: fptou_f64_i8:
89 ; CHECK-GI: // %bb.0: // %entry
90 ; CHECK-GI-NEXT: fcvtzu w0, d0
91 ; CHECK-GI-NEXT: ret
92 entry:
93 %c = fptoui double %a to i8
94 ret i8 %c
95 }
97 define i128 @fptos_f64_i128(double %a) {
98 ; CHECK-LABEL: fptos_f64_i128:
99 ; CHECK: // %bb.0: // %entry
100 ; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
101 ; CHECK-NEXT: .cfi_def_cfa_offset 16
102 ; CHECK-NEXT: .cfi_offset w30, -16
103 ; CHECK-NEXT: bl __fixdfti
104 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
105 ; CHECK-NEXT: ret
106 entry:
107 %c = fptosi double %a to i128
108 ret i128 %c
109 }
111 define i128 @fptou_f64_i128(double %a) {
112 ; CHECK-LABEL: fptou_f64_i128:
113 ; CHECK: // %bb.0: // %entry
114 ; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
115 ; CHECK-NEXT: .cfi_def_cfa_offset 16
116 ; CHECK-NEXT: .cfi_offset w30, -16
117 ; CHECK-NEXT: bl __fixunsdfti
118 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
119 ; CHECK-NEXT: ret
120 entry:
121 %c = fptoui double %a to i128
122 ret i128 %c
123 }
125 define i64 @fptos_f32_i64(float %a) {
126 ; CHECK-LABEL: fptos_f32_i64:
127 ; CHECK: // %bb.0: // %entry
128 ; CHECK-NEXT: fcvtzs x0, s0
129 ; CHECK-NEXT: ret
130 entry:
131 %c = fptosi float %a to i64
132 ret i64 %c
133 }
135 define i64 @fptou_f32_i64(float %a) {
136 ; CHECK-LABEL: fptou_f32_i64:
137 ; CHECK: // %bb.0: // %entry
138 ; CHECK-NEXT: fcvtzu x0, s0
139 ; CHECK-NEXT: ret
140 entry:
141 %c = fptoui float %a to i64
142 ret i64 %c
143 }
145 define i32 @fptos_f32_i32(float %a) {
146 ; CHECK-LABEL: fptos_f32_i32:
147 ; CHECK: // %bb.0: // %entry
148 ; CHECK-NEXT: fcvtzs w0, s0
149 ; CHECK-NEXT: ret
150 entry:
151 %c = fptosi float %a to i32
152 ret i32 %c
153 }
155 define i32 @fptou_f32_i32(float %a) {
156 ; CHECK-LABEL: fptou_f32_i32:
157 ; CHECK: // %bb.0: // %entry
158 ; CHECK-NEXT: fcvtzu w0, s0
159 ; CHECK-NEXT: ret
160 entry:
161 %c = fptoui float %a to i32
162 ret i32 %c
163 }
165 define i16 @fptos_f32_i16(float %a) {
166 ; CHECK-LABEL: fptos_f32_i16:
167 ; CHECK: // %bb.0: // %entry
168 ; CHECK-NEXT: fcvtzs w0, s0
169 ; CHECK-NEXT: ret
170 entry:
171 %c = fptosi float %a to i16
172 ret i16 %c
173 }
175 define i16 @fptou_f32_i16(float %a) {
176 ; CHECK-SD-LABEL: fptou_f32_i16:
177 ; CHECK-SD: // %bb.0: // %entry
178 ; CHECK-SD-NEXT: fcvtzs w0, s0
179 ; CHECK-SD-NEXT: ret
180 ;
181 ; CHECK-GI-LABEL: fptou_f32_i16:
182 ; CHECK-GI: // %bb.0: // %entry
183 ; CHECK-GI-NEXT: fcvtzu w0, s0
184 ; CHECK-GI-NEXT: ret
185 entry:
186 %c = fptoui float %a to i16
187 ret i16 %c
188 }
190 define i8 @fptos_f32_i8(float %a) {
191 ; CHECK-LABEL: fptos_f32_i8:
192 ; CHECK: // %bb.0: // %entry
193 ; CHECK-NEXT: fcvtzs w0, s0
194 ; CHECK-NEXT: ret
195 entry:
196 %c = fptosi float %a to i8
197 ret i8 %c
198 }
200 define i8 @fptou_f32_i8(float %a) {
201 ; CHECK-SD-LABEL: fptou_f32_i8:
202 ; CHECK-SD: // %bb.0: // %entry
203 ; CHECK-SD-NEXT: fcvtzs w0, s0
204 ; CHECK-SD-NEXT: ret
205 ;
206 ; CHECK-GI-LABEL: fptou_f32_i8:
207 ; CHECK-GI: // %bb.0: // %entry
208 ; CHECK-GI-NEXT: fcvtzu w0, s0
209 ; CHECK-GI-NEXT: ret
210 entry:
211 %c = fptoui float %a to i8
212 ret i8 %c
213 }
215 define i128 @fptos_f32_i128(float %a) {
216 ; CHECK-LABEL: fptos_f32_i128:
217 ; CHECK: // %bb.0: // %entry
218 ; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
219 ; CHECK-NEXT: .cfi_def_cfa_offset 16
220 ; CHECK-NEXT: .cfi_offset w30, -16
221 ; CHECK-NEXT: bl __fixsfti
222 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
223 ; CHECK-NEXT: ret
224 entry:
225 %c = fptosi float %a to i128
226 ret i128 %c
227 }
229 define i128 @fptou_f32_i128(float %a) {
230 ; CHECK-LABEL: fptou_f32_i128:
231 ; CHECK: // %bb.0: // %entry
232 ; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
233 ; CHECK-NEXT: .cfi_def_cfa_offset 16
234 ; CHECK-NEXT: .cfi_offset w30, -16
235 ; CHECK-NEXT: bl __fixunssfti
236 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
237 ; CHECK-NEXT: ret
238 entry:
239 %c = fptoui float %a to i128
240 ret i128 %c
241 }
243 define i64 @fptos_f16_i64(half %a) {
244 ; CHECK-SD-NOFP16-LABEL: fptos_f16_i64:
245 ; CHECK-SD-NOFP16: // %bb.0: // %entry
246 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
247 ; CHECK-SD-NOFP16-NEXT: fcvtzs x0, s0
248 ; CHECK-SD-NOFP16-NEXT: ret
249 ;
250 ; CHECK-SD-FP16-LABEL: fptos_f16_i64:
251 ; CHECK-SD-FP16: // %bb.0: // %entry
252 ; CHECK-SD-FP16-NEXT: fcvtzs x0, h0
253 ; CHECK-SD-FP16-NEXT: ret
254 ;
255 ; CHECK-GI-NOFP16-LABEL: fptos_f16_i64:
256 ; CHECK-GI-NOFP16: // %bb.0: // %entry
257 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
258 ; CHECK-GI-NOFP16-NEXT: fcvtzs x0, s0
259 ; CHECK-GI-NOFP16-NEXT: ret
260 ;
261 ; CHECK-GI-FP16-LABEL: fptos_f16_i64:
262 ; CHECK-GI-FP16: // %bb.0: // %entry
263 ; CHECK-GI-FP16-NEXT: fcvtzs x0, h0
264 ; CHECK-GI-FP16-NEXT: ret
265 entry:
266 %c = fptosi half %a to i64
267 ret i64 %c
268 }
270 define i64 @fptou_f16_i64(half %a) {
271 ; CHECK-SD-NOFP16-LABEL: fptou_f16_i64:
272 ; CHECK-SD-NOFP16: // %bb.0: // %entry
273 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
274 ; CHECK-SD-NOFP16-NEXT: fcvtzu x0, s0
275 ; CHECK-SD-NOFP16-NEXT: ret
276 ;
277 ; CHECK-SD-FP16-LABEL: fptou_f16_i64:
278 ; CHECK-SD-FP16: // %bb.0: // %entry
279 ; CHECK-SD-FP16-NEXT: fcvtzu x0, h0
280 ; CHECK-SD-FP16-NEXT: ret
281 ;
282 ; CHECK-GI-NOFP16-LABEL: fptou_f16_i64:
283 ; CHECK-GI-NOFP16: // %bb.0: // %entry
284 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
285 ; CHECK-GI-NOFP16-NEXT: fcvtzu x0, s0
286 ; CHECK-GI-NOFP16-NEXT: ret
287 ;
288 ; CHECK-GI-FP16-LABEL: fptou_f16_i64:
289 ; CHECK-GI-FP16: // %bb.0: // %entry
290 ; CHECK-GI-FP16-NEXT: fcvtzu x0, h0
291 ; CHECK-GI-FP16-NEXT: ret
292 entry:
293 %c = fptoui half %a to i64
294 ret i64 %c
295 }
297 define i32 @fptos_f16_i32(half %a) {
298 ; CHECK-SD-NOFP16-LABEL: fptos_f16_i32:
299 ; CHECK-SD-NOFP16: // %bb.0: // %entry
300 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
301 ; CHECK-SD-NOFP16-NEXT: fcvtzs w0, s0
302 ; CHECK-SD-NOFP16-NEXT: ret
303 ;
304 ; CHECK-SD-FP16-LABEL: fptos_f16_i32:
305 ; CHECK-SD-FP16: // %bb.0: // %entry
306 ; CHECK-SD-FP16-NEXT: fcvtzs w0, h0
307 ; CHECK-SD-FP16-NEXT: ret
308 ;
309 ; CHECK-GI-NOFP16-LABEL: fptos_f16_i32:
310 ; CHECK-GI-NOFP16: // %bb.0: // %entry
311 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
312 ; CHECK-GI-NOFP16-NEXT: fcvtzs w0, s0
313 ; CHECK-GI-NOFP16-NEXT: ret
314 ;
315 ; CHECK-GI-FP16-LABEL: fptos_f16_i32:
316 ; CHECK-GI-FP16: // %bb.0: // %entry
317 ; CHECK-GI-FP16-NEXT: fcvtzs w0, h0
318 ; CHECK-GI-FP16-NEXT: ret
319 entry:
320 %c = fptosi half %a to i32
321 ret i32 %c
322 }
324 define i32 @fptou_f16_i32(half %a) {
325 ; CHECK-SD-NOFP16-LABEL: fptou_f16_i32:
326 ; CHECK-SD-NOFP16: // %bb.0: // %entry
327 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
328 ; CHECK-SD-NOFP16-NEXT: fcvtzu w0, s0
329 ; CHECK-SD-NOFP16-NEXT: ret
330 ;
331 ; CHECK-SD-FP16-LABEL: fptou_f16_i32:
332 ; CHECK-SD-FP16: // %bb.0: // %entry
333 ; CHECK-SD-FP16-NEXT: fcvtzu w0, h0
334 ; CHECK-SD-FP16-NEXT: ret
335 ;
336 ; CHECK-GI-NOFP16-LABEL: fptou_f16_i32:
337 ; CHECK-GI-NOFP16: // %bb.0: // %entry
338 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
339 ; CHECK-GI-NOFP16-NEXT: fcvtzu w0, s0
340 ; CHECK-GI-NOFP16-NEXT: ret
341 ;
342 ; CHECK-GI-FP16-LABEL: fptou_f16_i32:
343 ; CHECK-GI-FP16: // %bb.0: // %entry
344 ; CHECK-GI-FP16-NEXT: fcvtzu w0, h0
345 ; CHECK-GI-FP16-NEXT: ret
346 entry:
347 %c = fptoui half %a to i32
348 ret i32 %c
349 }
351 define i16 @fptos_f16_i16(half %a) {
352 ; CHECK-SD-NOFP16-LABEL: fptos_f16_i16:
353 ; CHECK-SD-NOFP16: // %bb.0: // %entry
354 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
355 ; CHECK-SD-NOFP16-NEXT: fcvtzs w0, s0
356 ; CHECK-SD-NOFP16-NEXT: ret
357 ;
358 ; CHECK-SD-FP16-LABEL: fptos_f16_i16:
359 ; CHECK-SD-FP16: // %bb.0: // %entry
360 ; CHECK-SD-FP16-NEXT: fcvtzs w0, h0
361 ; CHECK-SD-FP16-NEXT: ret
362 ;
363 ; CHECK-GI-NOFP16-LABEL: fptos_f16_i16:
364 ; CHECK-GI-NOFP16: // %bb.0: // %entry
365 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
366 ; CHECK-GI-NOFP16-NEXT: fcvtzs w0, s0
367 ; CHECK-GI-NOFP16-NEXT: ret
368 ;
369 ; CHECK-GI-FP16-LABEL: fptos_f16_i16:
370 ; CHECK-GI-FP16: // %bb.0: // %entry
371 ; CHECK-GI-FP16-NEXT: fcvtzs w0, h0
372 ; CHECK-GI-FP16-NEXT: ret
373 entry:
374 %c = fptosi half %a to i16
375 ret i16 %c
376 }
378 define i16 @fptou_f16_i16(half %a) {
379 ; CHECK-SD-NOFP16-LABEL: fptou_f16_i16:
380 ; CHECK-SD-NOFP16: // %bb.0: // %entry
381 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
382 ; CHECK-SD-NOFP16-NEXT: fcvtzs w0, s0
383 ; CHECK-SD-NOFP16-NEXT: ret
384 ;
385 ; CHECK-SD-FP16-LABEL: fptou_f16_i16:
386 ; CHECK-SD-FP16: // %bb.0: // %entry
387 ; CHECK-SD-FP16-NEXT: fcvtzs w0, h0
388 ; CHECK-SD-FP16-NEXT: ret
389 ;
390 ; CHECK-GI-NOFP16-LABEL: fptou_f16_i16:
391 ; CHECK-GI-NOFP16: // %bb.0: // %entry
392 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
393 ; CHECK-GI-NOFP16-NEXT: fcvtzu w0, s0
394 ; CHECK-GI-NOFP16-NEXT: ret
395 ;
396 ; CHECK-GI-FP16-LABEL: fptou_f16_i16:
397 ; CHECK-GI-FP16: // %bb.0: // %entry
398 ; CHECK-GI-FP16-NEXT: fcvtzu w0, h0
399 ; CHECK-GI-FP16-NEXT: ret
400 entry:
401 %c = fptoui half %a to i16
402 ret i16 %c
403 }
405 define i8 @fptos_f16_i8(half %a) {
406 ; CHECK-SD-NOFP16-LABEL: fptos_f16_i8:
407 ; CHECK-SD-NOFP16: // %bb.0: // %entry
408 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
409 ; CHECK-SD-NOFP16-NEXT: fcvtzs w0, s0
410 ; CHECK-SD-NOFP16-NEXT: ret
411 ;
412 ; CHECK-SD-FP16-LABEL: fptos_f16_i8:
413 ; CHECK-SD-FP16: // %bb.0: // %entry
414 ; CHECK-SD-FP16-NEXT: fcvtzs w0, h0
415 ; CHECK-SD-FP16-NEXT: ret
416 ;
417 ; CHECK-GI-NOFP16-LABEL: fptos_f16_i8:
418 ; CHECK-GI-NOFP16: // %bb.0: // %entry
419 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
420 ; CHECK-GI-NOFP16-NEXT: fcvtzs w0, s0
421 ; CHECK-GI-NOFP16-NEXT: ret
422 ;
423 ; CHECK-GI-FP16-LABEL: fptos_f16_i8:
424 ; CHECK-GI-FP16: // %bb.0: // %entry
425 ; CHECK-GI-FP16-NEXT: fcvtzs w0, h0
426 ; CHECK-GI-FP16-NEXT: ret
427 entry:
428 %c = fptosi half %a to i8
429 ret i8 %c
430 }
432 define i8 @fptou_f16_i8(half %a) {
433 ; CHECK-SD-NOFP16-LABEL: fptou_f16_i8:
434 ; CHECK-SD-NOFP16: // %bb.0: // %entry
435 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
436 ; CHECK-SD-NOFP16-NEXT: fcvtzs w0, s0
437 ; CHECK-SD-NOFP16-NEXT: ret
438 ;
439 ; CHECK-SD-FP16-LABEL: fptou_f16_i8:
440 ; CHECK-SD-FP16: // %bb.0: // %entry
441 ; CHECK-SD-FP16-NEXT: fcvtzs w0, h0
442 ; CHECK-SD-FP16-NEXT: ret
443 ;
444 ; CHECK-GI-NOFP16-LABEL: fptou_f16_i8:
445 ; CHECK-GI-NOFP16: // %bb.0: // %entry
446 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
447 ; CHECK-GI-NOFP16-NEXT: fcvtzu w0, s0
448 ; CHECK-GI-NOFP16-NEXT: ret
449 ;
450 ; CHECK-GI-FP16-LABEL: fptou_f16_i8:
451 ; CHECK-GI-FP16: // %bb.0: // %entry
452 ; CHECK-GI-FP16-NEXT: fcvtzu w0, h0
453 ; CHECK-GI-FP16-NEXT: ret
454 entry:
455 %c = fptoui half %a to i8
456 ret i8 %c
457 }
459 define i128 @fptos_f16_i128(half %a) {
460 ; CHECK-SD-LABEL: fptos_f16_i128:
461 ; CHECK-SD: // %bb.0: // %entry
462 ; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
463 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
464 ; CHECK-SD-NEXT: .cfi_offset w30, -16
465 ; CHECK-SD-NEXT: bl __fixhfti
466 ; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
467 ; CHECK-SD-NEXT: ret
468 ;
469 ; CHECK-GI-NOFP16-LABEL: fptos_f16_i128:
470 ; CHECK-GI-NOFP16: // %bb.0: // %entry
471 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
472 ; CHECK-GI-NOFP16-NEXT: fcvtzs x0, s0
473 ; CHECK-GI-NOFP16-NEXT: asr x1, x0, #63
474 ; CHECK-GI-NOFP16-NEXT: ret
475 ;
476 ; CHECK-GI-FP16-LABEL: fptos_f16_i128:
477 ; CHECK-GI-FP16: // %bb.0: // %entry
478 ; CHECK-GI-FP16-NEXT: fcvtzs x0, h0
479 ; CHECK-GI-FP16-NEXT: asr x1, x0, #63
480 ; CHECK-GI-FP16-NEXT: ret
481 entry:
482 %c = fptosi half %a to i128
483 ret i128 %c
484 }
486 define i128 @fptou_f16_i128(half %a) {
487 ; CHECK-SD-LABEL: fptou_f16_i128:
488 ; CHECK-SD: // %bb.0: // %entry
489 ; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
490 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
491 ; CHECK-SD-NEXT: .cfi_offset w30, -16
492 ; CHECK-SD-NEXT: bl __fixunshfti
493 ; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
494 ; CHECK-SD-NEXT: ret
495 ;
496 ; CHECK-GI-NOFP16-LABEL: fptou_f16_i128:
497 ; CHECK-GI-NOFP16: // %bb.0: // %entry
498 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
499 ; CHECK-GI-NOFP16-NEXT: mov x1, xzr
500 ; CHECK-GI-NOFP16-NEXT: fcvtzu x0, s0
501 ; CHECK-GI-NOFP16-NEXT: ret
502 ;
503 ; CHECK-GI-FP16-LABEL: fptou_f16_i128:
504 ; CHECK-GI-FP16: // %bb.0: // %entry
505 ; CHECK-GI-FP16-NEXT: fcvtzu x0, h0
506 ; CHECK-GI-FP16-NEXT: mov x1, xzr
507 ; CHECK-GI-FP16-NEXT: ret
508 entry:
509 %c = fptoui half %a to i128
510 ret i128 %c
511 }
513 define i64 @fptos_f128_i64(fp128 %a) {
514 ; CHECK-SD-LABEL: fptos_f128_i64:
515 ; CHECK-SD: // %bb.0: // %entry
516 ; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
517 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
518 ; CHECK-SD-NEXT: .cfi_offset w30, -16
519 ; CHECK-SD-NEXT: bl __fixtfdi
520 ; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
521 ; CHECK-SD-NEXT: ret
522 ;
523 ; CHECK-GI-LABEL: fptos_f128_i64:
524 ; CHECK-GI: // %bb.0: // %entry
525 ; CHECK-GI-NEXT: b __fixtfdi
526 entry:
527 %c = fptosi fp128 %a to i64
528 ret i64 %c
529 }
531 define i64 @fptou_f128_i64(fp128 %a) {
532 ; CHECK-SD-LABEL: fptou_f128_i64:
533 ; CHECK-SD: // %bb.0: // %entry
534 ; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
535 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
536 ; CHECK-SD-NEXT: .cfi_offset w30, -16
537 ; CHECK-SD-NEXT: bl __fixunstfdi
538 ; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
539 ; CHECK-SD-NEXT: ret
540 ;
541 ; CHECK-GI-LABEL: fptou_f128_i64:
542 ; CHECK-GI: // %bb.0: // %entry
543 ; CHECK-GI-NEXT: b __fixunstfdi
544 entry:
545 %c = fptoui fp128 %a to i64
546 ret i64 %c
547 }
549 define i32 @fptos_f128_i32(fp128 %a) {
550 ; CHECK-SD-LABEL: fptos_f128_i32:
551 ; CHECK-SD: // %bb.0: // %entry
552 ; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
553 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
554 ; CHECK-SD-NEXT: .cfi_offset w30, -16
555 ; CHECK-SD-NEXT: bl __fixtfsi
556 ; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
557 ; CHECK-SD-NEXT: ret
558 ;
559 ; CHECK-GI-LABEL: fptos_f128_i32:
560 ; CHECK-GI: // %bb.0: // %entry
561 ; CHECK-GI-NEXT: b __fixtfsi
562 entry:
563 %c = fptosi fp128 %a to i32
564 ret i32 %c
565 }
567 define i32 @fptou_f128_i32(fp128 %a) {
568 ; CHECK-SD-LABEL: fptou_f128_i32:
569 ; CHECK-SD: // %bb.0: // %entry
570 ; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
571 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
572 ; CHECK-SD-NEXT: .cfi_offset w30, -16
573 ; CHECK-SD-NEXT: bl __fixunstfsi
574 ; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
575 ; CHECK-SD-NEXT: ret
576 ;
577 ; CHECK-GI-LABEL: fptou_f128_i32:
578 ; CHECK-GI: // %bb.0: // %entry
579 ; CHECK-GI-NEXT: b __fixunstfsi
580 entry:
581 %c = fptoui fp128 %a to i32
582 ret i32 %c
583 }
585 define i16 @fptos_f128_i16(fp128 %a) {
586 ; CHECK-LABEL: fptos_f128_i16:
587 ; CHECK: // %bb.0: // %entry
588 ; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
589 ; CHECK-NEXT: .cfi_def_cfa_offset 16
590 ; CHECK-NEXT: .cfi_offset w30, -16
591 ; CHECK-NEXT: bl __fixtfsi
592 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
593 ; CHECK-NEXT: ret
594 entry:
595 %c = fptosi fp128 %a to i16
596 ret i16 %c
597 }
599 define i16 @fptou_f128_i16(fp128 %a) {
600 ; CHECK-SD-LABEL: fptou_f128_i16:
601 ; CHECK-SD: // %bb.0: // %entry
602 ; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
603 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
604 ; CHECK-SD-NEXT: .cfi_offset w30, -16
605 ; CHECK-SD-NEXT: bl __fixtfsi
606 ; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
607 ; CHECK-SD-NEXT: ret
608 ;
609 ; CHECK-GI-LABEL: fptou_f128_i16:
610 ; CHECK-GI: // %bb.0: // %entry
611 ; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
612 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
613 ; CHECK-GI-NEXT: .cfi_offset w30, -16
614 ; CHECK-GI-NEXT: bl __fixunstfsi
615 ; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
616 ; CHECK-GI-NEXT: ret
617 entry:
618 %c = fptoui fp128 %a to i16
619 ret i16 %c
620 }
622 define i8 @fptos_f128_i8(fp128 %a) {
623 ; CHECK-LABEL: fptos_f128_i8:
624 ; CHECK: // %bb.0: // %entry
625 ; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
626 ; CHECK-NEXT: .cfi_def_cfa_offset 16
627 ; CHECK-NEXT: .cfi_offset w30, -16
628 ; CHECK-NEXT: bl __fixtfsi
629 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
630 ; CHECK-NEXT: ret
631 entry:
632 %c = fptosi fp128 %a to i8
633 ret i8 %c
634 }
636 define i8 @fptou_f128_i8(fp128 %a) {
637 ; CHECK-SD-LABEL: fptou_f128_i8:
638 ; CHECK-SD: // %bb.0: // %entry
639 ; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
640 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
641 ; CHECK-SD-NEXT: .cfi_offset w30, -16
642 ; CHECK-SD-NEXT: bl __fixtfsi
643 ; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
644 ; CHECK-SD-NEXT: ret
645 ;
646 ; CHECK-GI-LABEL: fptou_f128_i8:
647 ; CHECK-GI: // %bb.0: // %entry
648 ; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
649 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
650 ; CHECK-GI-NEXT: .cfi_offset w30, -16
651 ; CHECK-GI-NEXT: bl __fixunstfsi
652 ; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
653 ; CHECK-GI-NEXT: ret
654 entry:
655 %c = fptoui fp128 %a to i8
656 ret i8 %c
657 }
659 define i128 @fptos_f128_i128(fp128 %a) {
660 ; CHECK-LABEL: fptos_f128_i128:
661 ; CHECK: // %bb.0: // %entry
662 ; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
663 ; CHECK-NEXT: .cfi_def_cfa_offset 16
664 ; CHECK-NEXT: .cfi_offset w30, -16
665 ; CHECK-NEXT: bl __fixtfti
666 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
667 ; CHECK-NEXT: ret
668 entry:
669 %c = fptosi fp128 %a to i128
670 ret i128 %c
671 }
673 define i128 @fptou_f128_i128(fp128 %a) {
674 ; CHECK-LABEL: fptou_f128_i128:
675 ; CHECK: // %bb.0: // %entry
676 ; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
677 ; CHECK-NEXT: .cfi_def_cfa_offset 16
678 ; CHECK-NEXT: .cfi_offset w30, -16
679 ; CHECK-NEXT: bl __fixunstfti
680 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
681 ; CHECK-NEXT: ret
682 entry:
683 %c = fptoui fp128 %a to i128
684 ret i128 %c
685 }
687 define <2 x i64> @fptos_v2f64_v2i64(<2 x double> %a) {
688 ; CHECK-LABEL: fptos_v2f64_v2i64:
689 ; CHECK: // %bb.0: // %entry
690 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
691 ; CHECK-NEXT: ret
692 entry:
693 %c = fptosi <2 x double> %a to <2 x i64>
694 ret <2 x i64> %c
695 }
697 define <2 x i64> @fptou_v2f64_v2i64(<2 x double> %a) {
698 ; CHECK-LABEL: fptou_v2f64_v2i64:
699 ; CHECK: // %bb.0: // %entry
700 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
701 ; CHECK-NEXT: ret
702 entry:
703 %c = fptoui <2 x double> %a to <2 x i64>
704 ret <2 x i64> %c
705 }
707 define <3 x i64> @fptos_v3f64_v3i64(<3 x double> %a) {
708 ; CHECK-SD-LABEL: fptos_v3f64_v3i64:
709 ; CHECK-SD: // %bb.0: // %entry
710 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
711 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1
712 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2
713 ; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
714 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
715 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2
716 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
717 ; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8
718 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
719 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1
720 ; CHECK-SD-NEXT: ret
721 ;
722 ; CHECK-GI-LABEL: fptos_v3f64_v3i64:
723 ; CHECK-GI: // %bb.0: // %entry
724 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
725 ; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
726 ; CHECK-GI-NEXT: // kill: def $d2 killed $d2 def $q2
727 ; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
728 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
729 ; CHECK-GI-NEXT: // kill: def $d2 killed $d2 killed $q2
730 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
731 ; CHECK-GI-NEXT: mov d1, v0.d[1]
732 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
733 ; CHECK-GI-NEXT: ret
734 entry:
735 %c = fptosi <3 x double> %a to <3 x i64>
736 ret <3 x i64> %c
737 }
739 define <3 x i64> @fptou_v3f64_v3i64(<3 x double> %a) {
740 ; CHECK-SD-LABEL: fptou_v3f64_v3i64:
741 ; CHECK-SD: // %bb.0: // %entry
742 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
743 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1
744 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2
745 ; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
746 ; CHECK-SD-NEXT: fcvtzu v2.2d, v2.2d
747 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2
748 ; CHECK-SD-NEXT: fcvtzu v0.2d, v0.2d
749 ; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8
750 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
751 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1
752 ; CHECK-SD-NEXT: ret
753 ;
754 ; CHECK-GI-LABEL: fptou_v3f64_v3i64:
755 ; CHECK-GI: // %bb.0: // %entry
756 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
757 ; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
758 ; CHECK-GI-NEXT: // kill: def $d2 killed $d2 def $q2
759 ; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
760 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
761 ; CHECK-GI-NEXT: // kill: def $d2 killed $d2 killed $q2
762 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
763 ; CHECK-GI-NEXT: mov d1, v0.d[1]
764 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
765 ; CHECK-GI-NEXT: ret
766 entry:
767 %c = fptoui <3 x double> %a to <3 x i64>
768 ret <3 x i64> %c
769 }
771 define <4 x i64> @fptos_v4f64_v4i64(<4 x double> %a) {
772 ; CHECK-LABEL: fptos_v4f64_v4i64:
773 ; CHECK: // %bb.0: // %entry
774 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
775 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
776 ; CHECK-NEXT: ret
777 entry:
778 %c = fptosi <4 x double> %a to <4 x i64>
779 ret <4 x i64> %c
780 }
782 define <4 x i64> @fptou_v4f64_v4i64(<4 x double> %a) {
783 ; CHECK-LABEL: fptou_v4f64_v4i64:
784 ; CHECK: // %bb.0: // %entry
785 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
786 ; CHECK-NEXT: fcvtzu v1.2d, v1.2d
787 ; CHECK-NEXT: ret
788 entry:
789 %c = fptoui <4 x double> %a to <4 x i64>
790 ret <4 x i64> %c
791 }
793 define <8 x i64> @fptos_v8f64_v8i64(<8 x double> %a) {
794 ; CHECK-LABEL: fptos_v8f64_v8i64:
795 ; CHECK: // %bb.0: // %entry
796 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
797 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
798 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
799 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
800 ; CHECK-NEXT: ret
801 entry:
802 %c = fptosi <8 x double> %a to <8 x i64>
803 ret <8 x i64> %c
804 }
806 define <8 x i64> @fptou_v8f64_v8i64(<8 x double> %a) {
807 ; CHECK-LABEL: fptou_v8f64_v8i64:
808 ; CHECK: // %bb.0: // %entry
809 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
810 ; CHECK-NEXT: fcvtzu v1.2d, v1.2d
811 ; CHECK-NEXT: fcvtzu v2.2d, v2.2d
812 ; CHECK-NEXT: fcvtzu v3.2d, v3.2d
813 ; CHECK-NEXT: ret
814 entry:
815 %c = fptoui <8 x double> %a to <8 x i64>
816 ret <8 x i64> %c
817 }
819 define <16 x i64> @fptos_v16f64_v16i64(<16 x double> %a) {
820 ; CHECK-LABEL: fptos_v16f64_v16i64:
821 ; CHECK: // %bb.0: // %entry
822 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
823 ; CHECK-NEXT: fcvtzs v1.2d, v1.2d
824 ; CHECK-NEXT: fcvtzs v2.2d, v2.2d
825 ; CHECK-NEXT: fcvtzs v3.2d, v3.2d
826 ; CHECK-NEXT: fcvtzs v4.2d, v4.2d
827 ; CHECK-NEXT: fcvtzs v5.2d, v5.2d
828 ; CHECK-NEXT: fcvtzs v6.2d, v6.2d
829 ; CHECK-NEXT: fcvtzs v7.2d, v7.2d
830 ; CHECK-NEXT: ret
831 entry:
832 %c = fptosi <16 x double> %a to <16 x i64>
833 ret <16 x i64> %c
834 }
836 define <16 x i64> @fptou_v16f64_v16i64(<16 x double> %a) {
837 ; CHECK-LABEL: fptou_v16f64_v16i64:
838 ; CHECK: // %bb.0: // %entry
839 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
840 ; CHECK-NEXT: fcvtzu v1.2d, v1.2d
841 ; CHECK-NEXT: fcvtzu v2.2d, v2.2d
842 ; CHECK-NEXT: fcvtzu v3.2d, v3.2d
843 ; CHECK-NEXT: fcvtzu v4.2d, v4.2d
844 ; CHECK-NEXT: fcvtzu v5.2d, v5.2d
845 ; CHECK-NEXT: fcvtzu v6.2d, v6.2d
846 ; CHECK-NEXT: fcvtzu v7.2d, v7.2d
847 ; CHECK-NEXT: ret
848 entry:
849 %c = fptoui <16 x double> %a to <16 x i64>
850 ret <16 x i64> %c
851 }
853 define <32 x i64> @fptos_v32f64_v32i64(<32 x double> %a) {
854 ; CHECK-SD-LABEL: fptos_v32f64_v32i64:
855 ; CHECK-SD: // %bb.0: // %entry
856 ; CHECK-SD-NEXT: ldp q17, q16, [sp, #96]
857 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
858 ; CHECK-SD-NEXT: ldp q19, q18, [sp, #64]
859 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
860 ; CHECK-SD-NEXT: ldp q21, q20, [sp, #32]
861 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
862 ; CHECK-SD-NEXT: fcvtzs v16.2d, v16.2d
863 ; CHECK-SD-NEXT: fcvtzs v17.2d, v17.2d
864 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
865 ; CHECK-SD-NEXT: fcvtzs v18.2d, v18.2d
866 ; CHECK-SD-NEXT: fcvtzs v19.2d, v19.2d
867 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
868 ; CHECK-SD-NEXT: fcvtzs v20.2d, v20.2d
869 ; CHECK-SD-NEXT: fcvtzs v21.2d, v21.2d
870 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
871 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
872 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
873 ; CHECK-SD-NEXT: stp q5, q6, [x8, #80]
874 ; CHECK-SD-NEXT: str q16, [x8, #240]
875 ; CHECK-SD-NEXT: ldp q22, q16, [sp]
876 ; CHECK-SD-NEXT: stp q3, q4, [x8, #48]
877 ; CHECK-SD-NEXT: stp q20, q19, [x8, #176]
878 ; CHECK-SD-NEXT: fcvtzs v16.2d, v16.2d
879 ; CHECK-SD-NEXT: stp q1, q2, [x8, #16]
880 ; CHECK-SD-NEXT: stp q18, q17, [x8, #208]
881 ; CHECK-SD-NEXT: fcvtzs v17.2d, v22.2d
882 ; CHECK-SD-NEXT: str q0, [x8]
883 ; CHECK-SD-NEXT: stp q16, q21, [x8, #144]
884 ; CHECK-SD-NEXT: stp q7, q17, [x8, #112]
885 ; CHECK-SD-NEXT: ret
886 ;
887 ; CHECK-GI-LABEL: fptos_v32f64_v32i64:
888 ; CHECK-GI: // %bb.0: // %entry
889 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
890 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
891 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
892 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
893 ; CHECK-GI-NEXT: fcvtzs v4.2d, v4.2d
894 ; CHECK-GI-NEXT: stp q0, q1, [x8]
895 ; CHECK-GI-NEXT: fcvtzs v0.2d, v5.2d
896 ; CHECK-GI-NEXT: fcvtzs v1.2d, v6.2d
897 ; CHECK-GI-NEXT: str q2, [x8, #32]
898 ; CHECK-GI-NEXT: ldp q2, q5, [sp]
899 ; CHECK-GI-NEXT: fcvtzs v6.2d, v7.2d
900 ; CHECK-GI-NEXT: stp q3, q4, [x8, #48]
901 ; CHECK-GI-NEXT: ldp q3, q4, [sp, #32]
902 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
903 ; CHECK-GI-NEXT: fcvtzs v5.2d, v5.2d
904 ; CHECK-GI-NEXT: stp q0, q1, [x8, #80]
905 ; CHECK-GI-NEXT: fcvtzs v0.2d, v3.2d
906 ; CHECK-GI-NEXT: ldp q1, q3, [sp, #64]
907 ; CHECK-GI-NEXT: fcvtzs v4.2d, v4.2d
908 ; CHECK-GI-NEXT: stp q6, q2, [x8, #112]
909 ; CHECK-GI-NEXT: ldp q2, q6, [sp, #96]
910 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
911 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
912 ; CHECK-GI-NEXT: stp q5, q0, [x8, #144]
913 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
914 ; CHECK-GI-NEXT: fcvtzs v0.2d, v6.2d
915 ; CHECK-GI-NEXT: stp q4, q1, [x8, #176]
916 ; CHECK-GI-NEXT: stp q3, q2, [x8, #208]
917 ; CHECK-GI-NEXT: str q0, [x8, #240]
918 ; CHECK-GI-NEXT: ret
919 entry:
920 %c = fptosi <32 x double> %a to <32 x i64>
921 ret <32 x i64> %c
922 }
924 define <32 x i64> @fptou_v32f64_v32i64(<32 x double> %a) {
925 ; CHECK-SD-LABEL: fptou_v32f64_v32i64:
926 ; CHECK-SD: // %bb.0: // %entry
927 ; CHECK-SD-NEXT: ldp q17, q16, [sp, #96]
928 ; CHECK-SD-NEXT: fcvtzu v7.2d, v7.2d
929 ; CHECK-SD-NEXT: ldp q19, q18, [sp, #64]
930 ; CHECK-SD-NEXT: fcvtzu v6.2d, v6.2d
931 ; CHECK-SD-NEXT: ldp q21, q20, [sp, #32]
932 ; CHECK-SD-NEXT: fcvtzu v5.2d, v5.2d
933 ; CHECK-SD-NEXT: fcvtzu v16.2d, v16.2d
934 ; CHECK-SD-NEXT: fcvtzu v17.2d, v17.2d
935 ; CHECK-SD-NEXT: fcvtzu v4.2d, v4.2d
936 ; CHECK-SD-NEXT: fcvtzu v18.2d, v18.2d
937 ; CHECK-SD-NEXT: fcvtzu v19.2d, v19.2d
938 ; CHECK-SD-NEXT: fcvtzu v3.2d, v3.2d
939 ; CHECK-SD-NEXT: fcvtzu v20.2d, v20.2d
940 ; CHECK-SD-NEXT: fcvtzu v21.2d, v21.2d
941 ; CHECK-SD-NEXT: fcvtzu v2.2d, v2.2d
942 ; CHECK-SD-NEXT: fcvtzu v1.2d, v1.2d
943 ; CHECK-SD-NEXT: fcvtzu v0.2d, v0.2d
944 ; CHECK-SD-NEXT: stp q5, q6, [x8, #80]
945 ; CHECK-SD-NEXT: str q16, [x8, #240]
946 ; CHECK-SD-NEXT: ldp q22, q16, [sp]
947 ; CHECK-SD-NEXT: stp q3, q4, [x8, #48]
948 ; CHECK-SD-NEXT: stp q20, q19, [x8, #176]
949 ; CHECK-SD-NEXT: fcvtzu v16.2d, v16.2d
950 ; CHECK-SD-NEXT: stp q1, q2, [x8, #16]
951 ; CHECK-SD-NEXT: stp q18, q17, [x8, #208]
952 ; CHECK-SD-NEXT: fcvtzu v17.2d, v22.2d
953 ; CHECK-SD-NEXT: str q0, [x8]
954 ; CHECK-SD-NEXT: stp q16, q21, [x8, #144]
955 ; CHECK-SD-NEXT: stp q7, q17, [x8, #112]
956 ; CHECK-SD-NEXT: ret
957 ;
958 ; CHECK-GI-LABEL: fptou_v32f64_v32i64:
959 ; CHECK-GI: // %bb.0: // %entry
960 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
961 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
962 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
963 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
964 ; CHECK-GI-NEXT: fcvtzu v4.2d, v4.2d
965 ; CHECK-GI-NEXT: stp q0, q1, [x8]
966 ; CHECK-GI-NEXT: fcvtzu v0.2d, v5.2d
967 ; CHECK-GI-NEXT: fcvtzu v1.2d, v6.2d
968 ; CHECK-GI-NEXT: str q2, [x8, #32]
969 ; CHECK-GI-NEXT: ldp q2, q5, [sp]
970 ; CHECK-GI-NEXT: fcvtzu v6.2d, v7.2d
971 ; CHECK-GI-NEXT: stp q3, q4, [x8, #48]
972 ; CHECK-GI-NEXT: ldp q3, q4, [sp, #32]
973 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
974 ; CHECK-GI-NEXT: fcvtzu v5.2d, v5.2d
975 ; CHECK-GI-NEXT: stp q0, q1, [x8, #80]
976 ; CHECK-GI-NEXT: fcvtzu v0.2d, v3.2d
977 ; CHECK-GI-NEXT: ldp q1, q3, [sp, #64]
978 ; CHECK-GI-NEXT: fcvtzu v4.2d, v4.2d
979 ; CHECK-GI-NEXT: stp q6, q2, [x8, #112]
980 ; CHECK-GI-NEXT: ldp q2, q6, [sp, #96]
981 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
982 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
983 ; CHECK-GI-NEXT: stp q5, q0, [x8, #144]
984 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
985 ; CHECK-GI-NEXT: fcvtzu v0.2d, v6.2d
986 ; CHECK-GI-NEXT: stp q4, q1, [x8, #176]
987 ; CHECK-GI-NEXT: stp q3, q2, [x8, #208]
988 ; CHECK-GI-NEXT: str q0, [x8, #240]
989 ; CHECK-GI-NEXT: ret
990 entry:
991 %c = fptoui <32 x double> %a to <32 x i64>
992 ret <32 x i64> %c
993 }
995 define <2 x i32> @fptos_v2f64_v2i32(<2 x double> %a) {
996 ; CHECK-LABEL: fptos_v2f64_v2i32:
997 ; CHECK: // %bb.0: // %entry
998 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
999 ; CHECK-NEXT: xtn v0.2s, v0.2d
1000 ; CHECK-NEXT: ret
1001 entry:
1002 %c = fptosi <2 x double> %a to <2 x i32>
1003 ret <2 x i32> %c
1004 }
1006 define <2 x i32> @fptou_v2f64_v2i32(<2 x double> %a) {
1007 ; CHECK-LABEL: fptou_v2f64_v2i32:
1008 ; CHECK: // %bb.0: // %entry
1009 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
1010 ; CHECK-NEXT: xtn v0.2s, v0.2d
1011 ; CHECK-NEXT: ret
1012 entry:
1013 %c = fptoui <2 x double> %a to <2 x i32>
1014 ret <2 x i32> %c
1015 }
1017 define <3 x i32> @fptos_v3f64_v3i32(<3 x double> %a) {
1018 ; CHECK-LABEL: fptos_v3f64_v3i32:
1019 ; CHECK: // %bb.0: // %entry
1020 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
1021 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
1022 ; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
1023 ; CHECK-NEXT: mov v0.d[1], v1.d[0]
1024 ; CHECK-NEXT: fcvtzs v1.2d, v2.2d
1025 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1026 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1027 ; CHECK-NEXT: ret
1028 entry:
1029 %c = fptosi <3 x double> %a to <3 x i32>
1030 ret <3 x i32> %c
1031 }
1033 define <3 x i32> @fptou_v3f64_v3i32(<3 x double> %a) {
1034 ; CHECK-LABEL: fptou_v3f64_v3i32:
1035 ; CHECK: // %bb.0: // %entry
1036 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
1037 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
1038 ; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
1039 ; CHECK-NEXT: mov v0.d[1], v1.d[0]
1040 ; CHECK-NEXT: fcvtzu v1.2d, v2.2d
1041 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
1042 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1043 ; CHECK-NEXT: ret
1044 entry:
1045 %c = fptoui <3 x double> %a to <3 x i32>
1046 ret <3 x i32> %c
1047 }
1049 define <4 x i32> @fptos_v4f64_v4i32(<4 x double> %a) {
1050 ; CHECK-SD-LABEL: fptos_v4f64_v4i32:
1051 ; CHECK-SD: // %bb.0: // %entry
1052 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1053 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1054 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1055 ; CHECK-SD-NEXT: ret
1056 ;
1057 ; CHECK-GI-LABEL: fptos_v4f64_v4i32:
1058 ; CHECK-GI: // %bb.0: // %entry
1059 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1060 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
1061 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1062 ; CHECK-GI-NEXT: ret
1063 entry:
1064 %c = fptosi <4 x double> %a to <4 x i32>
1065 ret <4 x i32> %c
1066 }
1068 define <4 x i32> @fptou_v4f64_v4i32(<4 x double> %a) {
1069 ; CHECK-SD-LABEL: fptou_v4f64_v4i32:
1070 ; CHECK-SD: // %bb.0: // %entry
1071 ; CHECK-SD-NEXT: fcvtzu v1.2d, v1.2d
1072 ; CHECK-SD-NEXT: fcvtzu v0.2d, v0.2d
1073 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1074 ; CHECK-SD-NEXT: ret
1075 ;
1076 ; CHECK-GI-LABEL: fptou_v4f64_v4i32:
1077 ; CHECK-GI: // %bb.0: // %entry
1078 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1079 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
1080 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1081 ; CHECK-GI-NEXT: ret
1082 entry:
1083 %c = fptoui <4 x double> %a to <4 x i32>
1084 ret <4 x i32> %c
1085 }
1087 define <8 x i32> @fptos_v8f64_v8i32(<8 x double> %a) {
1088 ; CHECK-SD-LABEL: fptos_v8f64_v8i32:
1089 ; CHECK-SD: // %bb.0: // %entry
1090 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1091 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1092 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
1093 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
1094 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1095 ; CHECK-SD-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1096 ; CHECK-SD-NEXT: ret
1097 ;
1098 ; CHECK-GI-LABEL: fptos_v8f64_v8i32:
1099 ; CHECK-GI: // %bb.0: // %entry
1100 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1101 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
1102 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
1103 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
1104 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1105 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1106 ; CHECK-GI-NEXT: ret
1107 entry:
1108 %c = fptosi <8 x double> %a to <8 x i32>
1109 ret <8 x i32> %c
1110 }
1112 define <8 x i32> @fptou_v8f64_v8i32(<8 x double> %a) {
1113 ; CHECK-SD-LABEL: fptou_v8f64_v8i32:
1114 ; CHECK-SD: // %bb.0: // %entry
1115 ; CHECK-SD-NEXT: fcvtzu v1.2d, v1.2d
1116 ; CHECK-SD-NEXT: fcvtzu v0.2d, v0.2d
1117 ; CHECK-SD-NEXT: fcvtzu v3.2d, v3.2d
1118 ; CHECK-SD-NEXT: fcvtzu v2.2d, v2.2d
1119 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1120 ; CHECK-SD-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1121 ; CHECK-SD-NEXT: ret
1122 ;
1123 ; CHECK-GI-LABEL: fptou_v8f64_v8i32:
1124 ; CHECK-GI: // %bb.0: // %entry
1125 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1126 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
1127 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
1128 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
1129 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1130 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1131 ; CHECK-GI-NEXT: ret
1132 entry:
1133 %c = fptoui <8 x double> %a to <8 x i32>
1134 ret <8 x i32> %c
1135 }
1137 define <16 x i32> @fptos_v16f64_v16i32(<16 x double> %a) {
1138 ; CHECK-SD-LABEL: fptos_v16f64_v16i32:
1139 ; CHECK-SD: // %bb.0: // %entry
1140 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
1141 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1142 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1143 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
1144 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
1145 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
1146 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
1147 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
1148 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1149 ; CHECK-SD-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1150 ; CHECK-SD-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1151 ; CHECK-SD-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1152 ; CHECK-SD-NEXT: ret
1153 ;
1154 ; CHECK-GI-LABEL: fptos_v16f64_v16i32:
1155 ; CHECK-GI: // %bb.0: // %entry
1156 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1157 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
1158 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
1159 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
1160 ; CHECK-GI-NEXT: fcvtzs v4.2d, v4.2d
1161 ; CHECK-GI-NEXT: fcvtzs v5.2d, v5.2d
1162 ; CHECK-GI-NEXT: fcvtzs v6.2d, v6.2d
1163 ; CHECK-GI-NEXT: fcvtzs v7.2d, v7.2d
1164 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1165 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1166 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1167 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1168 ; CHECK-GI-NEXT: ret
1169 entry:
1170 %c = fptosi <16 x double> %a to <16 x i32>
1171 ret <16 x i32> %c
1172 }
1174 define <16 x i32> @fptou_v16f64_v16i32(<16 x double> %a) {
1175 ; CHECK-SD-LABEL: fptou_v16f64_v16i32:
1176 ; CHECK-SD: // %bb.0: // %entry
1177 ; CHECK-SD-NEXT: fcvtzu v3.2d, v3.2d
1178 ; CHECK-SD-NEXT: fcvtzu v1.2d, v1.2d
1179 ; CHECK-SD-NEXT: fcvtzu v0.2d, v0.2d
1180 ; CHECK-SD-NEXT: fcvtzu v2.2d, v2.2d
1181 ; CHECK-SD-NEXT: fcvtzu v5.2d, v5.2d
1182 ; CHECK-SD-NEXT: fcvtzu v4.2d, v4.2d
1183 ; CHECK-SD-NEXT: fcvtzu v7.2d, v7.2d
1184 ; CHECK-SD-NEXT: fcvtzu v6.2d, v6.2d
1185 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1186 ; CHECK-SD-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1187 ; CHECK-SD-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1188 ; CHECK-SD-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1189 ; CHECK-SD-NEXT: ret
1190 ;
1191 ; CHECK-GI-LABEL: fptou_v16f64_v16i32:
1192 ; CHECK-GI: // %bb.0: // %entry
1193 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1194 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
1195 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
1196 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
1197 ; CHECK-GI-NEXT: fcvtzu v4.2d, v4.2d
1198 ; CHECK-GI-NEXT: fcvtzu v5.2d, v5.2d
1199 ; CHECK-GI-NEXT: fcvtzu v6.2d, v6.2d
1200 ; CHECK-GI-NEXT: fcvtzu v7.2d, v7.2d
1201 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1202 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1203 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1204 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1205 ; CHECK-GI-NEXT: ret
1206 entry:
1207 %c = fptoui <16 x double> %a to <16 x i32>
1208 ret <16 x i32> %c
1209 }
1211 define <32 x i32> @fptos_v32f64_v32i32(<32 x double> %a) {
1212 ; CHECK-SD-LABEL: fptos_v32f64_v32i32:
1213 ; CHECK-SD: // %bb.0: // %entry
1214 ; CHECK-SD-NEXT: ldp q16, q17, [sp, #96]
1215 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1216 ; CHECK-SD-NEXT: ldp q18, q19, [sp, #64]
1217 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1218 ; CHECK-SD-NEXT: ldp q20, q21, [sp, #32]
1219 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
1220 ; CHECK-SD-NEXT: ldp q22, q23, [sp]
1221 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
1222 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
1223 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
1224 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
1225 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
1226 ; CHECK-SD-NEXT: fcvtzs v21.2d, v21.2d
1227 ; CHECK-SD-NEXT: fcvtzs v20.2d, v20.2d
1228 ; CHECK-SD-NEXT: fcvtzs v23.2d, v23.2d
1229 ; CHECK-SD-NEXT: fcvtzs v22.2d, v22.2d
1230 ; CHECK-SD-NEXT: fcvtzs v19.2d, v19.2d
1231 ; CHECK-SD-NEXT: fcvtzs v18.2d, v18.2d
1232 ; CHECK-SD-NEXT: fcvtzs v17.2d, v17.2d
1233 ; CHECK-SD-NEXT: fcvtzs v16.2d, v16.2d
1234 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1235 ; CHECK-SD-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1236 ; CHECK-SD-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1237 ; CHECK-SD-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1238 ; CHECK-SD-NEXT: uzp1 v5.4s, v20.4s, v21.4s
1239 ; CHECK-SD-NEXT: uzp1 v4.4s, v22.4s, v23.4s
1240 ; CHECK-SD-NEXT: uzp1 v6.4s, v18.4s, v19.4s
1241 ; CHECK-SD-NEXT: uzp1 v7.4s, v16.4s, v17.4s
1242 ; CHECK-SD-NEXT: ret
1243 ;
1244 ; CHECK-GI-LABEL: fptos_v32f64_v32i32:
1245 ; CHECK-GI: // %bb.0: // %entry
1246 ; CHECK-GI-NEXT: ldp q16, q17, [sp]
1247 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1248 ; CHECK-GI-NEXT: ldp q18, q19, [sp, #32]
1249 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
1250 ; CHECK-GI-NEXT: ldp q20, q21, [sp, #64]
1251 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
1252 ; CHECK-GI-NEXT: ldp q22, q23, [sp, #96]
1253 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
1254 ; CHECK-GI-NEXT: fcvtzs v4.2d, v4.2d
1255 ; CHECK-GI-NEXT: fcvtzs v5.2d, v5.2d
1256 ; CHECK-GI-NEXT: fcvtzs v6.2d, v6.2d
1257 ; CHECK-GI-NEXT: fcvtzs v7.2d, v7.2d
1258 ; CHECK-GI-NEXT: fcvtzs v16.2d, v16.2d
1259 ; CHECK-GI-NEXT: fcvtzs v17.2d, v17.2d
1260 ; CHECK-GI-NEXT: fcvtzs v18.2d, v18.2d
1261 ; CHECK-GI-NEXT: fcvtzs v19.2d, v19.2d
1262 ; CHECK-GI-NEXT: fcvtzs v20.2d, v20.2d
1263 ; CHECK-GI-NEXT: fcvtzs v21.2d, v21.2d
1264 ; CHECK-GI-NEXT: fcvtzs v22.2d, v22.2d
1265 ; CHECK-GI-NEXT: fcvtzs v23.2d, v23.2d
1266 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1267 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1268 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1269 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1270 ; CHECK-GI-NEXT: uzp1 v4.4s, v16.4s, v17.4s
1271 ; CHECK-GI-NEXT: uzp1 v5.4s, v18.4s, v19.4s
1272 ; CHECK-GI-NEXT: uzp1 v6.4s, v20.4s, v21.4s
1273 ; CHECK-GI-NEXT: uzp1 v7.4s, v22.4s, v23.4s
1274 ; CHECK-GI-NEXT: ret
1275 entry:
1276 %c = fptosi <32 x double> %a to <32 x i32>
1277 ret <32 x i32> %c
1278 }
1280 define <32 x i32> @fptou_v32f64_v32i32(<32 x double> %a) {
1281 ; CHECK-SD-LABEL: fptou_v32f64_v32i32:
1282 ; CHECK-SD: // %bb.0: // %entry
1283 ; CHECK-SD-NEXT: ldp q16, q17, [sp, #96]
1284 ; CHECK-SD-NEXT: fcvtzu v1.2d, v1.2d
1285 ; CHECK-SD-NEXT: ldp q18, q19, [sp, #64]
1286 ; CHECK-SD-NEXT: fcvtzu v0.2d, v0.2d
1287 ; CHECK-SD-NEXT: ldp q20, q21, [sp, #32]
1288 ; CHECK-SD-NEXT: fcvtzu v3.2d, v3.2d
1289 ; CHECK-SD-NEXT: ldp q22, q23, [sp]
1290 ; CHECK-SD-NEXT: fcvtzu v2.2d, v2.2d
1291 ; CHECK-SD-NEXT: fcvtzu v5.2d, v5.2d
1292 ; CHECK-SD-NEXT: fcvtzu v4.2d, v4.2d
1293 ; CHECK-SD-NEXT: fcvtzu v7.2d, v7.2d
1294 ; CHECK-SD-NEXT: fcvtzu v6.2d, v6.2d
1295 ; CHECK-SD-NEXT: fcvtzu v21.2d, v21.2d
1296 ; CHECK-SD-NEXT: fcvtzu v20.2d, v20.2d
1297 ; CHECK-SD-NEXT: fcvtzu v23.2d, v23.2d
1298 ; CHECK-SD-NEXT: fcvtzu v22.2d, v22.2d
1299 ; CHECK-SD-NEXT: fcvtzu v19.2d, v19.2d
1300 ; CHECK-SD-NEXT: fcvtzu v18.2d, v18.2d
1301 ; CHECK-SD-NEXT: fcvtzu v17.2d, v17.2d
1302 ; CHECK-SD-NEXT: fcvtzu v16.2d, v16.2d
1303 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1304 ; CHECK-SD-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1305 ; CHECK-SD-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1306 ; CHECK-SD-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1307 ; CHECK-SD-NEXT: uzp1 v5.4s, v20.4s, v21.4s
1308 ; CHECK-SD-NEXT: uzp1 v4.4s, v22.4s, v23.4s
1309 ; CHECK-SD-NEXT: uzp1 v6.4s, v18.4s, v19.4s
1310 ; CHECK-SD-NEXT: uzp1 v7.4s, v16.4s, v17.4s
1311 ; CHECK-SD-NEXT: ret
1312 ;
1313 ; CHECK-GI-LABEL: fptou_v32f64_v32i32:
1314 ; CHECK-GI: // %bb.0: // %entry
1315 ; CHECK-GI-NEXT: ldp q16, q17, [sp]
1316 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1317 ; CHECK-GI-NEXT: ldp q18, q19, [sp, #32]
1318 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
1319 ; CHECK-GI-NEXT: ldp q20, q21, [sp, #64]
1320 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
1321 ; CHECK-GI-NEXT: ldp q22, q23, [sp, #96]
1322 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
1323 ; CHECK-GI-NEXT: fcvtzu v4.2d, v4.2d
1324 ; CHECK-GI-NEXT: fcvtzu v5.2d, v5.2d
1325 ; CHECK-GI-NEXT: fcvtzu v6.2d, v6.2d
1326 ; CHECK-GI-NEXT: fcvtzu v7.2d, v7.2d
1327 ; CHECK-GI-NEXT: fcvtzu v16.2d, v16.2d
1328 ; CHECK-GI-NEXT: fcvtzu v17.2d, v17.2d
1329 ; CHECK-GI-NEXT: fcvtzu v18.2d, v18.2d
1330 ; CHECK-GI-NEXT: fcvtzu v19.2d, v19.2d
1331 ; CHECK-GI-NEXT: fcvtzu v20.2d, v20.2d
1332 ; CHECK-GI-NEXT: fcvtzu v21.2d, v21.2d
1333 ; CHECK-GI-NEXT: fcvtzu v22.2d, v22.2d
1334 ; CHECK-GI-NEXT: fcvtzu v23.2d, v23.2d
1335 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1336 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1337 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1338 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1339 ; CHECK-GI-NEXT: uzp1 v4.4s, v16.4s, v17.4s
1340 ; CHECK-GI-NEXT: uzp1 v5.4s, v18.4s, v19.4s
1341 ; CHECK-GI-NEXT: uzp1 v6.4s, v20.4s, v21.4s
1342 ; CHECK-GI-NEXT: uzp1 v7.4s, v22.4s, v23.4s
1343 ; CHECK-GI-NEXT: ret
1344 entry:
1345 %c = fptoui <32 x double> %a to <32 x i32>
1346 ret <32 x i32> %c
1347 }
1349 define <2 x i16> @fptos_v2f64_v2i16(<2 x double> %a) {
1350 ; CHECK-LABEL: fptos_v2f64_v2i16:
1351 ; CHECK: // %bb.0: // %entry
1352 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1353 ; CHECK-NEXT: xtn v0.2s, v0.2d
1354 ; CHECK-NEXT: ret
1355 entry:
1356 %c = fptosi <2 x double> %a to <2 x i16>
1357 ret <2 x i16> %c
1358 }
1360 define <2 x i16> @fptou_v2f64_v2i16(<2 x double> %a) {
1361 ; CHECK-SD-LABEL: fptou_v2f64_v2i16:
1362 ; CHECK-SD: // %bb.0: // %entry
1363 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1364 ; CHECK-SD-NEXT: xtn v0.2s, v0.2d
1365 ; CHECK-SD-NEXT: ret
1366 ;
1367 ; CHECK-GI-LABEL: fptou_v2f64_v2i16:
1368 ; CHECK-GI: // %bb.0: // %entry
1369 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1370 ; CHECK-GI-NEXT: xtn v0.2s, v0.2d
1371 ; CHECK-GI-NEXT: ret
1372 entry:
1373 %c = fptoui <2 x double> %a to <2 x i16>
1374 ret <2 x i16> %c
1375 }
1377 define <3 x i16> @fptos_v3f64_v3i16(<3 x double> %a) {
1378 ; CHECK-LABEL: fptos_v3f64_v3i16:
1379 ; CHECK: // %bb.0: // %entry
1380 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
1381 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
1382 ; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
1383 ; CHECK-NEXT: mov v0.d[1], v1.d[0]
1384 ; CHECK-NEXT: fcvtzs v1.2d, v2.2d
1385 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1386 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1387 ; CHECK-NEXT: xtn v0.4h, v0.4s
1388 ; CHECK-NEXT: ret
1389 entry:
1390 %c = fptosi <3 x double> %a to <3 x i16>
1391 ret <3 x i16> %c
1392 }
1394 define <3 x i16> @fptou_v3f64_v3i16(<3 x double> %a) {
1395 ; CHECK-SD-LABEL: fptou_v3f64_v3i16:
1396 ; CHECK-SD: // %bb.0: // %entry
1397 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
1398 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1
1399 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2
1400 ; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
1401 ; CHECK-SD-NEXT: fcvtzs v1.2d, v2.2d
1402 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1403 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1404 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
1405 ; CHECK-SD-NEXT: ret
1406 ;
1407 ; CHECK-GI-LABEL: fptou_v3f64_v3i16:
1408 ; CHECK-GI: // %bb.0: // %entry
1409 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
1410 ; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
1411 ; CHECK-GI-NEXT: // kill: def $d2 killed $d2 def $q2
1412 ; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
1413 ; CHECK-GI-NEXT: fcvtzu v1.2d, v2.2d
1414 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1415 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1416 ; CHECK-GI-NEXT: xtn v0.4h, v0.4s
1417 ; CHECK-GI-NEXT: ret
1418 entry:
1419 %c = fptoui <3 x double> %a to <3 x i16>
1420 ret <3 x i16> %c
1421 }
1423 define <4 x i16> @fptos_v4f64_v4i16(<4 x double> %a) {
1424 ; CHECK-SD-LABEL: fptos_v4f64_v4i16:
1425 ; CHECK-SD: // %bb.0: // %entry
1426 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1427 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1428 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1429 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
1430 ; CHECK-SD-NEXT: ret
1431 ;
1432 ; CHECK-GI-LABEL: fptos_v4f64_v4i16:
1433 ; CHECK-GI: // %bb.0: // %entry
1434 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1435 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
1436 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1437 ; CHECK-GI-NEXT: xtn v0.4h, v0.4s
1438 ; CHECK-GI-NEXT: ret
1439 entry:
1440 %c = fptosi <4 x double> %a to <4 x i16>
1441 ret <4 x i16> %c
1442 }
1444 define <4 x i16> @fptou_v4f64_v4i16(<4 x double> %a) {
1445 ; CHECK-SD-LABEL: fptou_v4f64_v4i16:
1446 ; CHECK-SD: // %bb.0: // %entry
1447 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1448 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1449 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1450 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
1451 ; CHECK-SD-NEXT: ret
1452 ;
1453 ; CHECK-GI-LABEL: fptou_v4f64_v4i16:
1454 ; CHECK-GI: // %bb.0: // %entry
1455 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1456 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
1457 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1458 ; CHECK-GI-NEXT: xtn v0.4h, v0.4s
1459 ; CHECK-GI-NEXT: ret
1460 entry:
1461 %c = fptoui <4 x double> %a to <4 x i16>
1462 ret <4 x i16> %c
1463 }
1465 define <8 x i16> @fptos_v8f64_v8i16(<8 x double> %a) {
1466 ; CHECK-SD-LABEL: fptos_v8f64_v8i16:
1467 ; CHECK-SD: // %bb.0: // %entry
1468 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
1469 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
1470 ; CHECK-SD-NEXT: adrp x8, .LCPI70_0
1471 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1472 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1473 ; CHECK-SD-NEXT: xtn v6.2s, v3.2d
1474 ; CHECK-SD-NEXT: xtn v5.2s, v2.2d
1475 ; CHECK-SD-NEXT: xtn v4.2s, v1.2d
1476 ; CHECK-SD-NEXT: xtn v3.2s, v0.2d
1477 ; CHECK-SD-NEXT: ldr q0, [x8, :lo12:.LCPI70_0]
1478 ; CHECK-SD-NEXT: tbl v0.16b, { v3.16b, v4.16b, v5.16b, v6.16b }, v0.16b
1479 ; CHECK-SD-NEXT: ret
1480 ;
1481 ; CHECK-GI-LABEL: fptos_v8f64_v8i16:
1482 ; CHECK-GI: // %bb.0: // %entry
1483 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1484 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
1485 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
1486 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
1487 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1488 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1489 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
1490 ; CHECK-GI-NEXT: ret
1491 entry:
1492 %c = fptosi <8 x double> %a to <8 x i16>
1493 ret <8 x i16> %c
1494 }
1496 define <8 x i16> @fptou_v8f64_v8i16(<8 x double> %a) {
1497 ; CHECK-SD-LABEL: fptou_v8f64_v8i16:
1498 ; CHECK-SD: // %bb.0: // %entry
1499 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
1500 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
1501 ; CHECK-SD-NEXT: adrp x8, .LCPI71_0
1502 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1503 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1504 ; CHECK-SD-NEXT: xtn v6.2s, v3.2d
1505 ; CHECK-SD-NEXT: xtn v5.2s, v2.2d
1506 ; CHECK-SD-NEXT: xtn v4.2s, v1.2d
1507 ; CHECK-SD-NEXT: xtn v3.2s, v0.2d
1508 ; CHECK-SD-NEXT: ldr q0, [x8, :lo12:.LCPI71_0]
1509 ; CHECK-SD-NEXT: tbl v0.16b, { v3.16b, v4.16b, v5.16b, v6.16b }, v0.16b
1510 ; CHECK-SD-NEXT: ret
1511 ;
1512 ; CHECK-GI-LABEL: fptou_v8f64_v8i16:
1513 ; CHECK-GI: // %bb.0: // %entry
1514 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1515 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
1516 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
1517 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
1518 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1519 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1520 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
1521 ; CHECK-GI-NEXT: ret
1522 entry:
1523 %c = fptoui <8 x double> %a to <8 x i16>
1524 ret <8 x i16> %c
1525 }
1527 define <16 x i16> @fptos_v16f64_v16i16(<16 x double> %a) {
1528 ; CHECK-SD-LABEL: fptos_v16f64_v16i16:
1529 ; CHECK-SD: // %bb.0: // %entry
1530 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
1531 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
1532 ; CHECK-SD-NEXT: adrp x8, .LCPI72_0
1533 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
1534 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
1535 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1536 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
1537 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1538 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
1539 ; CHECK-SD-NEXT: xtn v19.2s, v3.2d
1540 ; CHECK-SD-NEXT: xtn v23.2s, v7.2d
1541 ; CHECK-SD-NEXT: xtn v18.2s, v2.2d
1542 ; CHECK-SD-NEXT: xtn v22.2s, v6.2d
1543 ; CHECK-SD-NEXT: xtn v17.2s, v1.2d
1544 ; CHECK-SD-NEXT: xtn v21.2s, v5.2d
1545 ; CHECK-SD-NEXT: ldr q1, [x8, :lo12:.LCPI72_0]
1546 ; CHECK-SD-NEXT: xtn v16.2s, v0.2d
1547 ; CHECK-SD-NEXT: xtn v20.2s, v4.2d
1548 ; CHECK-SD-NEXT: tbl v0.16b, { v16.16b, v17.16b, v18.16b, v19.16b }, v1.16b
1549 ; CHECK-SD-NEXT: tbl v1.16b, { v20.16b, v21.16b, v22.16b, v23.16b }, v1.16b
1550 ; CHECK-SD-NEXT: ret
1551 ;
1552 ; CHECK-GI-LABEL: fptos_v16f64_v16i16:
1553 ; CHECK-GI: // %bb.0: // %entry
1554 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1555 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
1556 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
1557 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
1558 ; CHECK-GI-NEXT: fcvtzs v4.2d, v4.2d
1559 ; CHECK-GI-NEXT: fcvtzs v5.2d, v5.2d
1560 ; CHECK-GI-NEXT: fcvtzs v6.2d, v6.2d
1561 ; CHECK-GI-NEXT: fcvtzs v7.2d, v7.2d
1562 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1563 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1564 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1565 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1566 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
1567 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
1568 ; CHECK-GI-NEXT: ret
1569 entry:
1570 %c = fptosi <16 x double> %a to <16 x i16>
1571 ret <16 x i16> %c
1572 }
1574 define <16 x i16> @fptou_v16f64_v16i16(<16 x double> %a) {
1575 ; CHECK-SD-LABEL: fptou_v16f64_v16i16:
1576 ; CHECK-SD: // %bb.0: // %entry
1577 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
1578 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
1579 ; CHECK-SD-NEXT: adrp x8, .LCPI73_0
1580 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
1581 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
1582 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1583 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
1584 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1585 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
1586 ; CHECK-SD-NEXT: xtn v19.2s, v3.2d
1587 ; CHECK-SD-NEXT: xtn v23.2s, v7.2d
1588 ; CHECK-SD-NEXT: xtn v18.2s, v2.2d
1589 ; CHECK-SD-NEXT: xtn v22.2s, v6.2d
1590 ; CHECK-SD-NEXT: xtn v17.2s, v1.2d
1591 ; CHECK-SD-NEXT: xtn v21.2s, v5.2d
1592 ; CHECK-SD-NEXT: ldr q1, [x8, :lo12:.LCPI73_0]
1593 ; CHECK-SD-NEXT: xtn v16.2s, v0.2d
1594 ; CHECK-SD-NEXT: xtn v20.2s, v4.2d
1595 ; CHECK-SD-NEXT: tbl v0.16b, { v16.16b, v17.16b, v18.16b, v19.16b }, v1.16b
1596 ; CHECK-SD-NEXT: tbl v1.16b, { v20.16b, v21.16b, v22.16b, v23.16b }, v1.16b
1597 ; CHECK-SD-NEXT: ret
1598 ;
1599 ; CHECK-GI-LABEL: fptou_v16f64_v16i16:
1600 ; CHECK-GI: // %bb.0: // %entry
1601 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1602 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
1603 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
1604 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
1605 ; CHECK-GI-NEXT: fcvtzu v4.2d, v4.2d
1606 ; CHECK-GI-NEXT: fcvtzu v5.2d, v5.2d
1607 ; CHECK-GI-NEXT: fcvtzu v6.2d, v6.2d
1608 ; CHECK-GI-NEXT: fcvtzu v7.2d, v7.2d
1609 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1610 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1611 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1612 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1613 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
1614 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
1615 ; CHECK-GI-NEXT: ret
1616 entry:
1617 %c = fptoui <16 x double> %a to <16 x i16>
1618 ret <16 x i16> %c
1619 }
1621 define <32 x i16> @fptos_v32f64_v32i16(<32 x double> %a) {
1622 ; CHECK-SD-LABEL: fptos_v32f64_v32i16:
1623 ; CHECK-SD: // %bb.0: // %entry
1624 ; CHECK-SD-NEXT: stp d15, d14, [sp, #-64]! // 16-byte Folded Spill
1625 ; CHECK-SD-NEXT: stp d13, d12, [sp, #16] // 16-byte Folded Spill
1626 ; CHECK-SD-NEXT: stp d11, d10, [sp, #32] // 16-byte Folded Spill
1627 ; CHECK-SD-NEXT: stp d9, d8, [sp, #48] // 16-byte Folded Spill
1628 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
1629 ; CHECK-SD-NEXT: .cfi_offset b8, -8
1630 ; CHECK-SD-NEXT: .cfi_offset b9, -16
1631 ; CHECK-SD-NEXT: .cfi_offset b10, -24
1632 ; CHECK-SD-NEXT: .cfi_offset b11, -32
1633 ; CHECK-SD-NEXT: .cfi_offset b12, -40
1634 ; CHECK-SD-NEXT: .cfi_offset b13, -48
1635 ; CHECK-SD-NEXT: .cfi_offset b14, -56
1636 ; CHECK-SD-NEXT: .cfi_offset b15, -64
1637 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
1638 ; CHECK-SD-NEXT: fcvtzs v18.2d, v2.2d
1639 ; CHECK-SD-NEXT: adrp x8, .LCPI74_0
1640 ; CHECK-SD-NEXT: fcvtzs v19.2d, v1.2d
1641 ; CHECK-SD-NEXT: ldp q20, q21, [sp, #160]
1642 ; CHECK-SD-NEXT: fcvtzs v22.2d, v0.2d
1643 ; CHECK-SD-NEXT: ldp q23, q24, [sp, #96]
1644 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
1645 ; CHECK-SD-NEXT: ldp q16, q17, [sp, #128]
1646 ; CHECK-SD-NEXT: xtn v3.2s, v3.2d
1647 ; CHECK-SD-NEXT: fcvtzs v21.2d, v21.2d
1648 ; CHECK-SD-NEXT: fcvtzs v20.2d, v20.2d
1649 ; CHECK-SD-NEXT: xtn v2.2s, v18.2d
1650 ; CHECK-SD-NEXT: ldp q18, q25, [sp, #64]
1651 ; CHECK-SD-NEXT: xtn v1.2s, v19.2d
1652 ; CHECK-SD-NEXT: fcvtzs v19.2d, v24.2d
1653 ; CHECK-SD-NEXT: fcvtzs v17.2d, v17.2d
1654 ; CHECK-SD-NEXT: xtn v0.2s, v22.2d
1655 ; CHECK-SD-NEXT: fcvtzs v22.2d, v23.2d
1656 ; CHECK-SD-NEXT: xtn v29.2s, v7.2d
1657 ; CHECK-SD-NEXT: fcvtzs v7.2d, v25.2d
1658 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
1659 ; CHECK-SD-NEXT: fcvtzs v18.2d, v18.2d
1660 ; CHECK-SD-NEXT: fcvtzs v16.2d, v16.2d
1661 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
1662 ; CHECK-SD-NEXT: xtn v15.2s, v21.2d
1663 ; CHECK-SD-NEXT: xtn v11.2s, v19.2d
1664 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
1665 ; CHECK-SD-NEXT: xtn v14.2s, v20.2d
1666 ; CHECK-SD-NEXT: xtn v10.2s, v22.2d
1667 ; CHECK-SD-NEXT: xtn v13.2s, v17.2d
1668 ; CHECK-SD-NEXT: xtn v9.2s, v7.2d
1669 ; CHECK-SD-NEXT: xtn v28.2s, v6.2d
1670 ; CHECK-SD-NEXT: xtn v8.2s, v18.2d
1671 ; CHECK-SD-NEXT: xtn v12.2s, v16.2d
1672 ; CHECK-SD-NEXT: xtn v27.2s, v5.2d
1673 ; CHECK-SD-NEXT: xtn v26.2s, v4.2d
1674 ; CHECK-SD-NEXT: ldr q4, [x8, :lo12:.LCPI74_0]
1675 ; CHECK-SD-NEXT: tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v4.16b
1676 ; CHECK-SD-NEXT: tbl v2.16b, { v8.16b, v9.16b, v10.16b, v11.16b }, v4.16b
1677 ; CHECK-SD-NEXT: tbl v3.16b, { v12.16b, v13.16b, v14.16b, v15.16b }, v4.16b
1678 ; CHECK-SD-NEXT: ldp d9, d8, [sp, #48] // 16-byte Folded Reload
1679 ; CHECK-SD-NEXT: tbl v1.16b, { v26.16b, v27.16b, v28.16b, v29.16b }, v4.16b
1680 ; CHECK-SD-NEXT: ldp d11, d10, [sp, #32] // 16-byte Folded Reload
1681 ; CHECK-SD-NEXT: ldp d13, d12, [sp, #16] // 16-byte Folded Reload
1682 ; CHECK-SD-NEXT: ldp d15, d14, [sp], #64 // 16-byte Folded Reload
1683 ; CHECK-SD-NEXT: ret
1684 ;
1685 ; CHECK-GI-LABEL: fptos_v32f64_v32i16:
1686 ; CHECK-GI: // %bb.0: // %entry
1687 ; CHECK-GI-NEXT: ldp q16, q17, [sp]
1688 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1689 ; CHECK-GI-NEXT: ldp q18, q19, [sp, #32]
1690 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
1691 ; CHECK-GI-NEXT: ldp q20, q21, [sp, #64]
1692 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
1693 ; CHECK-GI-NEXT: ldp q22, q23, [sp, #96]
1694 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
1695 ; CHECK-GI-NEXT: fcvtzs v4.2d, v4.2d
1696 ; CHECK-GI-NEXT: fcvtzs v5.2d, v5.2d
1697 ; CHECK-GI-NEXT: fcvtzs v6.2d, v6.2d
1698 ; CHECK-GI-NEXT: fcvtzs v7.2d, v7.2d
1699 ; CHECK-GI-NEXT: fcvtzs v16.2d, v16.2d
1700 ; CHECK-GI-NEXT: fcvtzs v17.2d, v17.2d
1701 ; CHECK-GI-NEXT: fcvtzs v18.2d, v18.2d
1702 ; CHECK-GI-NEXT: fcvtzs v19.2d, v19.2d
1703 ; CHECK-GI-NEXT: fcvtzs v20.2d, v20.2d
1704 ; CHECK-GI-NEXT: fcvtzs v21.2d, v21.2d
1705 ; CHECK-GI-NEXT: fcvtzs v22.2d, v22.2d
1706 ; CHECK-GI-NEXT: fcvtzs v23.2d, v23.2d
1707 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1708 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1709 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1710 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1711 ; CHECK-GI-NEXT: uzp1 v4.4s, v16.4s, v17.4s
1712 ; CHECK-GI-NEXT: uzp1 v5.4s, v18.4s, v19.4s
1713 ; CHECK-GI-NEXT: uzp1 v6.4s, v20.4s, v21.4s
1714 ; CHECK-GI-NEXT: uzp1 v7.4s, v22.4s, v23.4s
1715 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
1716 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
1717 ; CHECK-GI-NEXT: uzp1 v2.8h, v4.8h, v5.8h
1718 ; CHECK-GI-NEXT: uzp1 v3.8h, v6.8h, v7.8h
1719 ; CHECK-GI-NEXT: ret
1720 entry:
1721 %c = fptosi <32 x double> %a to <32 x i16>
1722 ret <32 x i16> %c
1723 }
1725 define <32 x i16> @fptou_v32f64_v32i16(<32 x double> %a) {
1726 ; CHECK-SD-LABEL: fptou_v32f64_v32i16:
1727 ; CHECK-SD: // %bb.0: // %entry
1728 ; CHECK-SD-NEXT: stp d15, d14, [sp, #-64]! // 16-byte Folded Spill
1729 ; CHECK-SD-NEXT: stp d13, d12, [sp, #16] // 16-byte Folded Spill
1730 ; CHECK-SD-NEXT: stp d11, d10, [sp, #32] // 16-byte Folded Spill
1731 ; CHECK-SD-NEXT: stp d9, d8, [sp, #48] // 16-byte Folded Spill
1732 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
1733 ; CHECK-SD-NEXT: .cfi_offset b8, -8
1734 ; CHECK-SD-NEXT: .cfi_offset b9, -16
1735 ; CHECK-SD-NEXT: .cfi_offset b10, -24
1736 ; CHECK-SD-NEXT: .cfi_offset b11, -32
1737 ; CHECK-SD-NEXT: .cfi_offset b12, -40
1738 ; CHECK-SD-NEXT: .cfi_offset b13, -48
1739 ; CHECK-SD-NEXT: .cfi_offset b14, -56
1740 ; CHECK-SD-NEXT: .cfi_offset b15, -64
1741 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
1742 ; CHECK-SD-NEXT: fcvtzs v18.2d, v2.2d
1743 ; CHECK-SD-NEXT: adrp x8, .LCPI75_0
1744 ; CHECK-SD-NEXT: fcvtzs v19.2d, v1.2d
1745 ; CHECK-SD-NEXT: ldp q20, q21, [sp, #160]
1746 ; CHECK-SD-NEXT: fcvtzs v22.2d, v0.2d
1747 ; CHECK-SD-NEXT: ldp q23, q24, [sp, #96]
1748 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
1749 ; CHECK-SD-NEXT: ldp q16, q17, [sp, #128]
1750 ; CHECK-SD-NEXT: xtn v3.2s, v3.2d
1751 ; CHECK-SD-NEXT: fcvtzs v21.2d, v21.2d
1752 ; CHECK-SD-NEXT: fcvtzs v20.2d, v20.2d
1753 ; CHECK-SD-NEXT: xtn v2.2s, v18.2d
1754 ; CHECK-SD-NEXT: ldp q18, q25, [sp, #64]
1755 ; CHECK-SD-NEXT: xtn v1.2s, v19.2d
1756 ; CHECK-SD-NEXT: fcvtzs v19.2d, v24.2d
1757 ; CHECK-SD-NEXT: fcvtzs v17.2d, v17.2d
1758 ; CHECK-SD-NEXT: xtn v0.2s, v22.2d
1759 ; CHECK-SD-NEXT: fcvtzs v22.2d, v23.2d
1760 ; CHECK-SD-NEXT: xtn v29.2s, v7.2d
1761 ; CHECK-SD-NEXT: fcvtzs v7.2d, v25.2d
1762 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
1763 ; CHECK-SD-NEXT: fcvtzs v18.2d, v18.2d
1764 ; CHECK-SD-NEXT: fcvtzs v16.2d, v16.2d
1765 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
1766 ; CHECK-SD-NEXT: xtn v15.2s, v21.2d
1767 ; CHECK-SD-NEXT: xtn v11.2s, v19.2d
1768 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
1769 ; CHECK-SD-NEXT: xtn v14.2s, v20.2d
1770 ; CHECK-SD-NEXT: xtn v10.2s, v22.2d
1771 ; CHECK-SD-NEXT: xtn v13.2s, v17.2d
1772 ; CHECK-SD-NEXT: xtn v9.2s, v7.2d
1773 ; CHECK-SD-NEXT: xtn v28.2s, v6.2d
1774 ; CHECK-SD-NEXT: xtn v8.2s, v18.2d
1775 ; CHECK-SD-NEXT: xtn v12.2s, v16.2d
1776 ; CHECK-SD-NEXT: xtn v27.2s, v5.2d
1777 ; CHECK-SD-NEXT: xtn v26.2s, v4.2d
1778 ; CHECK-SD-NEXT: ldr q4, [x8, :lo12:.LCPI75_0]
1779 ; CHECK-SD-NEXT: tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v4.16b
1780 ; CHECK-SD-NEXT: tbl v2.16b, { v8.16b, v9.16b, v10.16b, v11.16b }, v4.16b
1781 ; CHECK-SD-NEXT: tbl v3.16b, { v12.16b, v13.16b, v14.16b, v15.16b }, v4.16b
1782 ; CHECK-SD-NEXT: ldp d9, d8, [sp, #48] // 16-byte Folded Reload
1783 ; CHECK-SD-NEXT: tbl v1.16b, { v26.16b, v27.16b, v28.16b, v29.16b }, v4.16b
1784 ; CHECK-SD-NEXT: ldp d11, d10, [sp, #32] // 16-byte Folded Reload
1785 ; CHECK-SD-NEXT: ldp d13, d12, [sp, #16] // 16-byte Folded Reload
1786 ; CHECK-SD-NEXT: ldp d15, d14, [sp], #64 // 16-byte Folded Reload
1787 ; CHECK-SD-NEXT: ret
1788 ;
1789 ; CHECK-GI-LABEL: fptou_v32f64_v32i16:
1790 ; CHECK-GI: // %bb.0: // %entry
1791 ; CHECK-GI-NEXT: ldp q16, q17, [sp]
1792 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1793 ; CHECK-GI-NEXT: ldp q18, q19, [sp, #32]
1794 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
1795 ; CHECK-GI-NEXT: ldp q20, q21, [sp, #64]
1796 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
1797 ; CHECK-GI-NEXT: ldp q22, q23, [sp, #96]
1798 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
1799 ; CHECK-GI-NEXT: fcvtzu v4.2d, v4.2d
1800 ; CHECK-GI-NEXT: fcvtzu v5.2d, v5.2d
1801 ; CHECK-GI-NEXT: fcvtzu v6.2d, v6.2d
1802 ; CHECK-GI-NEXT: fcvtzu v7.2d, v7.2d
1803 ; CHECK-GI-NEXT: fcvtzu v16.2d, v16.2d
1804 ; CHECK-GI-NEXT: fcvtzu v17.2d, v17.2d
1805 ; CHECK-GI-NEXT: fcvtzu v18.2d, v18.2d
1806 ; CHECK-GI-NEXT: fcvtzu v19.2d, v19.2d
1807 ; CHECK-GI-NEXT: fcvtzu v20.2d, v20.2d
1808 ; CHECK-GI-NEXT: fcvtzu v21.2d, v21.2d
1809 ; CHECK-GI-NEXT: fcvtzu v22.2d, v22.2d
1810 ; CHECK-GI-NEXT: fcvtzu v23.2d, v23.2d
1811 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1812 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1813 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
1814 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
1815 ; CHECK-GI-NEXT: uzp1 v4.4s, v16.4s, v17.4s
1816 ; CHECK-GI-NEXT: uzp1 v5.4s, v18.4s, v19.4s
1817 ; CHECK-GI-NEXT: uzp1 v6.4s, v20.4s, v21.4s
1818 ; CHECK-GI-NEXT: uzp1 v7.4s, v22.4s, v23.4s
1819 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
1820 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
1821 ; CHECK-GI-NEXT: uzp1 v2.8h, v4.8h, v5.8h
1822 ; CHECK-GI-NEXT: uzp1 v3.8h, v6.8h, v7.8h
1823 ; CHECK-GI-NEXT: ret
1824 entry:
1825 %c = fptoui <32 x double> %a to <32 x i16>
1826 ret <32 x i16> %c
1827 }
1829 define <2 x i8> @fptos_v2f64_v2i8(<2 x double> %a) {
1830 ; CHECK-LABEL: fptos_v2f64_v2i8:
1831 ; CHECK: // %bb.0: // %entry
1832 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
1833 ; CHECK-NEXT: xtn v0.2s, v0.2d
1834 ; CHECK-NEXT: ret
1835 entry:
1836 %c = fptosi <2 x double> %a to <2 x i8>
1837 ret <2 x i8> %c
1838 }
1840 define <2 x i8> @fptou_v2f64_v2i8(<2 x double> %a) {
1841 ; CHECK-SD-LABEL: fptou_v2f64_v2i8:
1842 ; CHECK-SD: // %bb.0: // %entry
1843 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1844 ; CHECK-SD-NEXT: xtn v0.2s, v0.2d
1845 ; CHECK-SD-NEXT: ret
1846 ;
1847 ; CHECK-GI-LABEL: fptou_v2f64_v2i8:
1848 ; CHECK-GI: // %bb.0: // %entry
1849 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1850 ; CHECK-GI-NEXT: xtn v0.2s, v0.2d
1851 ; CHECK-GI-NEXT: ret
1852 entry:
1853 %c = fptoui <2 x double> %a to <2 x i8>
1854 ret <2 x i8> %c
1855 }
1857 define <3 x i8> @fptos_v3f64_v3i8(<3 x double> %a) {
1858 ; CHECK-SD-LABEL: fptos_v3f64_v3i8:
1859 ; CHECK-SD: // %bb.0: // %entry
1860 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
1861 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1
1862 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2
1863 ; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
1864 ; CHECK-SD-NEXT: fcvtzs v1.2d, v2.2d
1865 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1866 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1867 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
1868 ; CHECK-SD-NEXT: umov w0, v0.h[0]
1869 ; CHECK-SD-NEXT: umov w1, v0.h[1]
1870 ; CHECK-SD-NEXT: umov w2, v0.h[2]
1871 ; CHECK-SD-NEXT: ret
1872 ;
1873 ; CHECK-GI-LABEL: fptos_v3f64_v3i8:
1874 ; CHECK-GI: // %bb.0: // %entry
1875 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
1876 ; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
1877 ; CHECK-GI-NEXT: // kill: def $d2 killed $d2 def $q2
1878 ; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
1879 ; CHECK-GI-NEXT: fcvtzs v1.2d, v2.2d
1880 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1881 ; CHECK-GI-NEXT: fmov x2, d1
1882 ; CHECK-GI-NEXT: // kill: def $w2 killed $w2 killed $x2
1883 ; CHECK-GI-NEXT: mov d2, v0.d[1]
1884 ; CHECK-GI-NEXT: fmov x0, d0
1885 ; CHECK-GI-NEXT: // kill: def $w0 killed $w0 killed $x0
1886 ; CHECK-GI-NEXT: fmov x1, d2
1887 ; CHECK-GI-NEXT: // kill: def $w1 killed $w1 killed $x1
1888 ; CHECK-GI-NEXT: ret
1889 entry:
1890 %c = fptosi <3 x double> %a to <3 x i8>
1891 ret <3 x i8> %c
1892 }
1894 define <3 x i8> @fptou_v3f64_v3i8(<3 x double> %a) {
1895 ; CHECK-SD-LABEL: fptou_v3f64_v3i8:
1896 ; CHECK-SD: // %bb.0: // %entry
1897 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
1898 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1
1899 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2
1900 ; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
1901 ; CHECK-SD-NEXT: fcvtzs v1.2d, v2.2d
1902 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1903 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1904 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
1905 ; CHECK-SD-NEXT: umov w0, v0.h[0]
1906 ; CHECK-SD-NEXT: umov w1, v0.h[1]
1907 ; CHECK-SD-NEXT: umov w2, v0.h[2]
1908 ; CHECK-SD-NEXT: ret
1909 ;
1910 ; CHECK-GI-LABEL: fptou_v3f64_v3i8:
1911 ; CHECK-GI: // %bb.0: // %entry
1912 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
1913 ; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
1914 ; CHECK-GI-NEXT: // kill: def $d2 killed $d2 def $q2
1915 ; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
1916 ; CHECK-GI-NEXT: fcvtzu v1.2d, v2.2d
1917 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1918 ; CHECK-GI-NEXT: fmov x2, d1
1919 ; CHECK-GI-NEXT: // kill: def $w2 killed $w2 killed $x2
1920 ; CHECK-GI-NEXT: mov d2, v0.d[1]
1921 ; CHECK-GI-NEXT: fmov x0, d0
1922 ; CHECK-GI-NEXT: // kill: def $w0 killed $w0 killed $x0
1923 ; CHECK-GI-NEXT: fmov x1, d2
1924 ; CHECK-GI-NEXT: // kill: def $w1 killed $w1 killed $x1
1925 ; CHECK-GI-NEXT: ret
1926 entry:
1927 %c = fptoui <3 x double> %a to <3 x i8>
1928 ret <3 x i8> %c
1929 }
1931 define <4 x i8> @fptos_v4f64_v4i8(<4 x double> %a) {
1932 ; CHECK-SD-LABEL: fptos_v4f64_v4i8:
1933 ; CHECK-SD: // %bb.0: // %entry
1934 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1935 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1936 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1937 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
1938 ; CHECK-SD-NEXT: ret
1939 ;
1940 ; CHECK-GI-LABEL: fptos_v4f64_v4i8:
1941 ; CHECK-GI: // %bb.0: // %entry
1942 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1943 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
1944 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1945 ; CHECK-GI-NEXT: xtn v0.4h, v0.4s
1946 ; CHECK-GI-NEXT: ret
1947 entry:
1948 %c = fptosi <4 x double> %a to <4 x i8>
1949 ret <4 x i8> %c
1950 }
1952 define <4 x i8> @fptou_v4f64_v4i8(<4 x double> %a) {
1953 ; CHECK-SD-LABEL: fptou_v4f64_v4i8:
1954 ; CHECK-SD: // %bb.0: // %entry
1955 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1956 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1957 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1958 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
1959 ; CHECK-SD-NEXT: ret
1960 ;
1961 ; CHECK-GI-LABEL: fptou_v4f64_v4i8:
1962 ; CHECK-GI: // %bb.0: // %entry
1963 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
1964 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
1965 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1966 ; CHECK-GI-NEXT: xtn v0.4h, v0.4s
1967 ; CHECK-GI-NEXT: ret
1968 entry:
1969 %c = fptoui <4 x double> %a to <4 x i8>
1970 ret <4 x i8> %c
1971 }
1973 define <8 x i8> @fptos_v8f64_v8i8(<8 x double> %a) {
1974 ; CHECK-SD-LABEL: fptos_v8f64_v8i8:
1975 ; CHECK-SD: // %bb.0: // %entry
1976 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
1977 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
1978 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
1979 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
1980 ; CHECK-SD-NEXT: uzp1 v2.4s, v2.4s, v3.4s
1981 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1982 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v2.8h
1983 ; CHECK-SD-NEXT: xtn v0.8b, v0.8h
1984 ; CHECK-SD-NEXT: ret
1985 ;
1986 ; CHECK-GI-LABEL: fptos_v8f64_v8i8:
1987 ; CHECK-GI: // %bb.0: // %entry
1988 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
1989 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
1990 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
1991 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
1992 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
1993 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
1994 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
1995 ; CHECK-GI-NEXT: xtn v0.8b, v0.8h
1996 ; CHECK-GI-NEXT: ret
1997 entry:
1998 %c = fptosi <8 x double> %a to <8 x i8>
1999 ret <8 x i8> %c
2000 }
2002 define <8 x i8> @fptou_v8f64_v8i8(<8 x double> %a) {
2003 ; CHECK-SD-LABEL: fptou_v8f64_v8i8:
2004 ; CHECK-SD: // %bb.0: // %entry
2005 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
2006 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
2007 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
2008 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
2009 ; CHECK-SD-NEXT: uzp1 v2.4s, v2.4s, v3.4s
2010 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
2011 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v2.8h
2012 ; CHECK-SD-NEXT: xtn v0.8b, v0.8h
2013 ; CHECK-SD-NEXT: ret
2014 ;
2015 ; CHECK-GI-LABEL: fptou_v8f64_v8i8:
2016 ; CHECK-GI: // %bb.0: // %entry
2017 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
2018 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
2019 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
2020 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
2021 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
2022 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
2023 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
2024 ; CHECK-GI-NEXT: xtn v0.8b, v0.8h
2025 ; CHECK-GI-NEXT: ret
2026 entry:
2027 %c = fptoui <8 x double> %a to <8 x i8>
2028 ret <8 x i8> %c
2029 }
2031 define <16 x i8> @fptos_v16f64_v16i8(<16 x double> %a) {
2032 ; CHECK-SD-LABEL: fptos_v16f64_v16i8:
2033 ; CHECK-SD: // %bb.0: // %entry
2034 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
2035 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
2036 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
2037 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
2038 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
2039 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
2040 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
2041 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
2042 ; CHECK-SD-NEXT: uzp1 v6.4s, v6.4s, v7.4s
2043 ; CHECK-SD-NEXT: uzp1 v4.4s, v4.4s, v5.4s
2044 ; CHECK-SD-NEXT: uzp1 v2.4s, v2.4s, v3.4s
2045 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
2046 ; CHECK-SD-NEXT: uzp1 v1.8h, v4.8h, v6.8h
2047 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v2.8h
2048 ; CHECK-SD-NEXT: uzp1 v0.16b, v0.16b, v1.16b
2049 ; CHECK-SD-NEXT: ret
2050 ;
2051 ; CHECK-GI-LABEL: fptos_v16f64_v16i8:
2052 ; CHECK-GI: // %bb.0: // %entry
2053 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
2054 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
2055 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
2056 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
2057 ; CHECK-GI-NEXT: fcvtzs v4.2d, v4.2d
2058 ; CHECK-GI-NEXT: fcvtzs v5.2d, v5.2d
2059 ; CHECK-GI-NEXT: fcvtzs v6.2d, v6.2d
2060 ; CHECK-GI-NEXT: fcvtzs v7.2d, v7.2d
2061 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
2062 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
2063 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
2064 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
2065 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
2066 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
2067 ; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b
2068 ; CHECK-GI-NEXT: ret
2069 entry:
2070 %c = fptosi <16 x double> %a to <16 x i8>
2071 ret <16 x i8> %c
2072 }
2074 define <16 x i8> @fptou_v16f64_v16i8(<16 x double> %a) {
2075 ; CHECK-SD-LABEL: fptou_v16f64_v16i8:
2076 ; CHECK-SD: // %bb.0: // %entry
2077 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
2078 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
2079 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
2080 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
2081 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
2082 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
2083 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
2084 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
2085 ; CHECK-SD-NEXT: uzp1 v6.4s, v6.4s, v7.4s
2086 ; CHECK-SD-NEXT: uzp1 v4.4s, v4.4s, v5.4s
2087 ; CHECK-SD-NEXT: uzp1 v2.4s, v2.4s, v3.4s
2088 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
2089 ; CHECK-SD-NEXT: uzp1 v1.8h, v4.8h, v6.8h
2090 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v2.8h
2091 ; CHECK-SD-NEXT: uzp1 v0.16b, v0.16b, v1.16b
2092 ; CHECK-SD-NEXT: ret
2093 ;
2094 ; CHECK-GI-LABEL: fptou_v16f64_v16i8:
2095 ; CHECK-GI: // %bb.0: // %entry
2096 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
2097 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
2098 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
2099 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
2100 ; CHECK-GI-NEXT: fcvtzu v4.2d, v4.2d
2101 ; CHECK-GI-NEXT: fcvtzu v5.2d, v5.2d
2102 ; CHECK-GI-NEXT: fcvtzu v6.2d, v6.2d
2103 ; CHECK-GI-NEXT: fcvtzu v7.2d, v7.2d
2104 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
2105 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
2106 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
2107 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
2108 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
2109 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
2110 ; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b
2111 ; CHECK-GI-NEXT: ret
2112 entry:
2113 %c = fptoui <16 x double> %a to <16 x i8>
2114 ret <16 x i8> %c
2115 }
2117 define <32 x i8> @fptos_v32f64_v32i8(<32 x double> %a) {
2118 ; CHECK-SD-LABEL: fptos_v32f64_v32i8:
2119 ; CHECK-SD: // %bb.0: // %entry
2120 ; CHECK-SD-NEXT: ldp q16, q17, [sp]
2121 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
2122 ; CHECK-SD-NEXT: ldp q18, q19, [sp, #32]
2123 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
2124 ; CHECK-SD-NEXT: ldp q20, q21, [sp, #64]
2125 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
2126 ; CHECK-SD-NEXT: ldp q22, q23, [sp, #96]
2127 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
2128 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
2129 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
2130 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
2131 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
2132 ; CHECK-SD-NEXT: fcvtzs v21.2d, v21.2d
2133 ; CHECK-SD-NEXT: fcvtzs v20.2d, v20.2d
2134 ; CHECK-SD-NEXT: fcvtzs v23.2d, v23.2d
2135 ; CHECK-SD-NEXT: fcvtzs v22.2d, v22.2d
2136 ; CHECK-SD-NEXT: fcvtzs v19.2d, v19.2d
2137 ; CHECK-SD-NEXT: fcvtzs v18.2d, v18.2d
2138 ; CHECK-SD-NEXT: fcvtzs v17.2d, v17.2d
2139 ; CHECK-SD-NEXT: fcvtzs v16.2d, v16.2d
2140 ; CHECK-SD-NEXT: uzp1 v6.4s, v6.4s, v7.4s
2141 ; CHECK-SD-NEXT: uzp1 v4.4s, v4.4s, v5.4s
2142 ; CHECK-SD-NEXT: uzp1 v2.4s, v2.4s, v3.4s
2143 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
2144 ; CHECK-SD-NEXT: uzp1 v3.4s, v20.4s, v21.4s
2145 ; CHECK-SD-NEXT: uzp1 v1.4s, v22.4s, v23.4s
2146 ; CHECK-SD-NEXT: uzp1 v5.4s, v18.4s, v19.4s
2147 ; CHECK-SD-NEXT: uzp1 v7.4s, v16.4s, v17.4s
2148 ; CHECK-SD-NEXT: uzp1 v4.8h, v4.8h, v6.8h
2149 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v2.8h
2150 ; CHECK-SD-NEXT: uzp1 v1.8h, v3.8h, v1.8h
2151 ; CHECK-SD-NEXT: uzp1 v2.8h, v7.8h, v5.8h
2152 ; CHECK-SD-NEXT: uzp1 v0.16b, v0.16b, v4.16b
2153 ; CHECK-SD-NEXT: uzp1 v1.16b, v2.16b, v1.16b
2154 ; CHECK-SD-NEXT: ret
2155 ;
2156 ; CHECK-GI-LABEL: fptos_v32f64_v32i8:
2157 ; CHECK-GI: // %bb.0: // %entry
2158 ; CHECK-GI-NEXT: ldp q16, q17, [sp]
2159 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
2160 ; CHECK-GI-NEXT: ldp q18, q19, [sp, #32]
2161 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
2162 ; CHECK-GI-NEXT: ldp q20, q21, [sp, #64]
2163 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
2164 ; CHECK-GI-NEXT: ldp q22, q23, [sp, #96]
2165 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
2166 ; CHECK-GI-NEXT: fcvtzs v4.2d, v4.2d
2167 ; CHECK-GI-NEXT: fcvtzs v5.2d, v5.2d
2168 ; CHECK-GI-NEXT: fcvtzs v6.2d, v6.2d
2169 ; CHECK-GI-NEXT: fcvtzs v7.2d, v7.2d
2170 ; CHECK-GI-NEXT: fcvtzs v16.2d, v16.2d
2171 ; CHECK-GI-NEXT: fcvtzs v17.2d, v17.2d
2172 ; CHECK-GI-NEXT: fcvtzs v18.2d, v18.2d
2173 ; CHECK-GI-NEXT: fcvtzs v19.2d, v19.2d
2174 ; CHECK-GI-NEXT: fcvtzs v20.2d, v20.2d
2175 ; CHECK-GI-NEXT: fcvtzs v21.2d, v21.2d
2176 ; CHECK-GI-NEXT: fcvtzs v22.2d, v22.2d
2177 ; CHECK-GI-NEXT: fcvtzs v23.2d, v23.2d
2178 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
2179 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
2180 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
2181 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
2182 ; CHECK-GI-NEXT: uzp1 v4.4s, v16.4s, v17.4s
2183 ; CHECK-GI-NEXT: uzp1 v5.4s, v18.4s, v19.4s
2184 ; CHECK-GI-NEXT: uzp1 v6.4s, v20.4s, v21.4s
2185 ; CHECK-GI-NEXT: uzp1 v7.4s, v22.4s, v23.4s
2186 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
2187 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
2188 ; CHECK-GI-NEXT: uzp1 v2.8h, v4.8h, v5.8h
2189 ; CHECK-GI-NEXT: uzp1 v3.8h, v6.8h, v7.8h
2190 ; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b
2191 ; CHECK-GI-NEXT: uzp1 v1.16b, v2.16b, v3.16b
2192 ; CHECK-GI-NEXT: ret
2193 entry:
2194 %c = fptosi <32 x double> %a to <32 x i8>
2195 ret <32 x i8> %c
2196 }
2198 define <32 x i8> @fptou_v32f64_v32i8(<32 x double> %a) {
2199 ; CHECK-SD-LABEL: fptou_v32f64_v32i8:
2200 ; CHECK-SD: // %bb.0: // %entry
2201 ; CHECK-SD-NEXT: ldp q16, q17, [sp]
2202 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
2203 ; CHECK-SD-NEXT: ldp q18, q19, [sp, #32]
2204 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
2205 ; CHECK-SD-NEXT: ldp q20, q21, [sp, #64]
2206 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
2207 ; CHECK-SD-NEXT: ldp q22, q23, [sp, #96]
2208 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
2209 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
2210 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
2211 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
2212 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
2213 ; CHECK-SD-NEXT: fcvtzs v21.2d, v21.2d
2214 ; CHECK-SD-NEXT: fcvtzs v20.2d, v20.2d
2215 ; CHECK-SD-NEXT: fcvtzs v23.2d, v23.2d
2216 ; CHECK-SD-NEXT: fcvtzs v22.2d, v22.2d
2217 ; CHECK-SD-NEXT: fcvtzs v19.2d, v19.2d
2218 ; CHECK-SD-NEXT: fcvtzs v18.2d, v18.2d
2219 ; CHECK-SD-NEXT: fcvtzs v17.2d, v17.2d
2220 ; CHECK-SD-NEXT: fcvtzs v16.2d, v16.2d
2221 ; CHECK-SD-NEXT: uzp1 v6.4s, v6.4s, v7.4s
2222 ; CHECK-SD-NEXT: uzp1 v4.4s, v4.4s, v5.4s
2223 ; CHECK-SD-NEXT: uzp1 v2.4s, v2.4s, v3.4s
2224 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
2225 ; CHECK-SD-NEXT: uzp1 v3.4s, v20.4s, v21.4s
2226 ; CHECK-SD-NEXT: uzp1 v1.4s, v22.4s, v23.4s
2227 ; CHECK-SD-NEXT: uzp1 v5.4s, v18.4s, v19.4s
2228 ; CHECK-SD-NEXT: uzp1 v7.4s, v16.4s, v17.4s
2229 ; CHECK-SD-NEXT: uzp1 v4.8h, v4.8h, v6.8h
2230 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v2.8h
2231 ; CHECK-SD-NEXT: uzp1 v1.8h, v3.8h, v1.8h
2232 ; CHECK-SD-NEXT: uzp1 v2.8h, v7.8h, v5.8h
2233 ; CHECK-SD-NEXT: uzp1 v0.16b, v0.16b, v4.16b
2234 ; CHECK-SD-NEXT: uzp1 v1.16b, v2.16b, v1.16b
2235 ; CHECK-SD-NEXT: ret
2236 ;
2237 ; CHECK-GI-LABEL: fptou_v32f64_v32i8:
2238 ; CHECK-GI: // %bb.0: // %entry
2239 ; CHECK-GI-NEXT: ldp q16, q17, [sp]
2240 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
2241 ; CHECK-GI-NEXT: ldp q18, q19, [sp, #32]
2242 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
2243 ; CHECK-GI-NEXT: ldp q20, q21, [sp, #64]
2244 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
2245 ; CHECK-GI-NEXT: ldp q22, q23, [sp, #96]
2246 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
2247 ; CHECK-GI-NEXT: fcvtzu v4.2d, v4.2d
2248 ; CHECK-GI-NEXT: fcvtzu v5.2d, v5.2d
2249 ; CHECK-GI-NEXT: fcvtzu v6.2d, v6.2d
2250 ; CHECK-GI-NEXT: fcvtzu v7.2d, v7.2d
2251 ; CHECK-GI-NEXT: fcvtzu v16.2d, v16.2d
2252 ; CHECK-GI-NEXT: fcvtzu v17.2d, v17.2d
2253 ; CHECK-GI-NEXT: fcvtzu v18.2d, v18.2d
2254 ; CHECK-GI-NEXT: fcvtzu v19.2d, v19.2d
2255 ; CHECK-GI-NEXT: fcvtzu v20.2d, v20.2d
2256 ; CHECK-GI-NEXT: fcvtzu v21.2d, v21.2d
2257 ; CHECK-GI-NEXT: fcvtzu v22.2d, v22.2d
2258 ; CHECK-GI-NEXT: fcvtzu v23.2d, v23.2d
2259 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
2260 ; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s
2261 ; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s
2262 ; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s
2263 ; CHECK-GI-NEXT: uzp1 v4.4s, v16.4s, v17.4s
2264 ; CHECK-GI-NEXT: uzp1 v5.4s, v18.4s, v19.4s
2265 ; CHECK-GI-NEXT: uzp1 v6.4s, v20.4s, v21.4s
2266 ; CHECK-GI-NEXT: uzp1 v7.4s, v22.4s, v23.4s
2267 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
2268 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
2269 ; CHECK-GI-NEXT: uzp1 v2.8h, v4.8h, v5.8h
2270 ; CHECK-GI-NEXT: uzp1 v3.8h, v6.8h, v7.8h
2271 ; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b
2272 ; CHECK-GI-NEXT: uzp1 v1.16b, v2.16b, v3.16b
2273 ; CHECK-GI-NEXT: ret
2274 entry:
2275 %c = fptoui <32 x double> %a to <32 x i8>
2276 ret <32 x i8> %c
2277 }
2279 define <2 x i128> @fptos_v2f64_v2i128(<2 x double> %a) {
2280 ; CHECK-SD-LABEL: fptos_v2f64_v2i128:
2281 ; CHECK-SD: // %bb.0: // %entry
2282 ; CHECK-SD-NEXT: sub sp, sp, #48
2283 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
2284 ; CHECK-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
2285 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
2286 ; CHECK-SD-NEXT: .cfi_offset w19, -8
2287 ; CHECK-SD-NEXT: .cfi_offset w20, -16
2288 ; CHECK-SD-NEXT: .cfi_offset w30, -32
2289 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
2290 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
2291 ; CHECK-SD-NEXT: bl __fixdfti
2292 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
2293 ; CHECK-SD-NEXT: mov x19, x0
2294 ; CHECK-SD-NEXT: mov x20, x1
2295 ; CHECK-SD-NEXT: mov d0, v0.d[1]
2296 ; CHECK-SD-NEXT: bl __fixdfti
2297 ; CHECK-SD-NEXT: mov x2, x0
2298 ; CHECK-SD-NEXT: mov x3, x1
2299 ; CHECK-SD-NEXT: mov x0, x19
2300 ; CHECK-SD-NEXT: mov x1, x20
2301 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
2302 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
2303 ; CHECK-SD-NEXT: add sp, sp, #48
2304 ; CHECK-SD-NEXT: ret
2305 ;
2306 ; CHECK-GI-LABEL: fptos_v2f64_v2i128:
2307 ; CHECK-GI: // %bb.0: // %entry
2308 ; CHECK-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill
2309 ; CHECK-GI-NEXT: str x30, [sp, #8] // 8-byte Folded Spill
2310 ; CHECK-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
2311 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
2312 ; CHECK-GI-NEXT: .cfi_offset w19, -8
2313 ; CHECK-GI-NEXT: .cfi_offset w20, -16
2314 ; CHECK-GI-NEXT: .cfi_offset w30, -24
2315 ; CHECK-GI-NEXT: .cfi_offset b8, -32
2316 ; CHECK-GI-NEXT: mov d8, v0.d[1]
2317 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
2318 ; CHECK-GI-NEXT: bl __fixdfti
2319 ; CHECK-GI-NEXT: fmov d0, d8
2320 ; CHECK-GI-NEXT: mov x19, x0
2321 ; CHECK-GI-NEXT: mov x20, x1
2322 ; CHECK-GI-NEXT: bl __fixdfti
2323 ; CHECK-GI-NEXT: mov x2, x0
2324 ; CHECK-GI-NEXT: mov x3, x1
2325 ; CHECK-GI-NEXT: mov x0, x19
2326 ; CHECK-GI-NEXT: mov x1, x20
2327 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
2328 ; CHECK-GI-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload
2329 ; CHECK-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload
2330 ; CHECK-GI-NEXT: ret
2331 entry:
2332 %c = fptosi <2 x double> %a to <2 x i128>
2333 ret <2 x i128> %c
2334 }
2336 define <2 x i128> @fptou_v2f64_v2i128(<2 x double> %a) {
2337 ; CHECK-SD-LABEL: fptou_v2f64_v2i128:
2338 ; CHECK-SD: // %bb.0: // %entry
2339 ; CHECK-SD-NEXT: sub sp, sp, #48
2340 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
2341 ; CHECK-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
2342 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
2343 ; CHECK-SD-NEXT: .cfi_offset w19, -8
2344 ; CHECK-SD-NEXT: .cfi_offset w20, -16
2345 ; CHECK-SD-NEXT: .cfi_offset w30, -32
2346 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
2347 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
2348 ; CHECK-SD-NEXT: bl __fixunsdfti
2349 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
2350 ; CHECK-SD-NEXT: mov x19, x0
2351 ; CHECK-SD-NEXT: mov x20, x1
2352 ; CHECK-SD-NEXT: mov d0, v0.d[1]
2353 ; CHECK-SD-NEXT: bl __fixunsdfti
2354 ; CHECK-SD-NEXT: mov x2, x0
2355 ; CHECK-SD-NEXT: mov x3, x1
2356 ; CHECK-SD-NEXT: mov x0, x19
2357 ; CHECK-SD-NEXT: mov x1, x20
2358 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
2359 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
2360 ; CHECK-SD-NEXT: add sp, sp, #48
2361 ; CHECK-SD-NEXT: ret
2362 ;
2363 ; CHECK-GI-LABEL: fptou_v2f64_v2i128:
2364 ; CHECK-GI: // %bb.0: // %entry
2365 ; CHECK-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill
2366 ; CHECK-GI-NEXT: str x30, [sp, #8] // 8-byte Folded Spill
2367 ; CHECK-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
2368 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
2369 ; CHECK-GI-NEXT: .cfi_offset w19, -8
2370 ; CHECK-GI-NEXT: .cfi_offset w20, -16
2371 ; CHECK-GI-NEXT: .cfi_offset w30, -24
2372 ; CHECK-GI-NEXT: .cfi_offset b8, -32
2373 ; CHECK-GI-NEXT: mov d8, v0.d[1]
2374 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
2375 ; CHECK-GI-NEXT: bl __fixunsdfti
2376 ; CHECK-GI-NEXT: fmov d0, d8
2377 ; CHECK-GI-NEXT: mov x19, x0
2378 ; CHECK-GI-NEXT: mov x20, x1
2379 ; CHECK-GI-NEXT: bl __fixunsdfti
2380 ; CHECK-GI-NEXT: mov x2, x0
2381 ; CHECK-GI-NEXT: mov x3, x1
2382 ; CHECK-GI-NEXT: mov x0, x19
2383 ; CHECK-GI-NEXT: mov x1, x20
2384 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
2385 ; CHECK-GI-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload
2386 ; CHECK-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload
2387 ; CHECK-GI-NEXT: ret
2388 entry:
2389 %c = fptoui <2 x double> %a to <2 x i128>
2390 ret <2 x i128> %c
2391 }
2393 define <3 x i128> @fptos_v3f64_v3i128(<3 x double> %a) {
2394 ; CHECK-SD-LABEL: fptos_v3f64_v3i128:
2395 ; CHECK-SD: // %bb.0: // %entry
2396 ; CHECK-SD-NEXT: stp d9, d8, [sp, #-64]! // 16-byte Folded Spill
2397 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
2398 ; CHECK-SD-NEXT: stp x22, x21, [sp, #32] // 16-byte Folded Spill
2399 ; CHECK-SD-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
2400 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
2401 ; CHECK-SD-NEXT: .cfi_offset w19, -8
2402 ; CHECK-SD-NEXT: .cfi_offset w20, -16
2403 ; CHECK-SD-NEXT: .cfi_offset w21, -24
2404 ; CHECK-SD-NEXT: .cfi_offset w22, -32
2405 ; CHECK-SD-NEXT: .cfi_offset w30, -48
2406 ; CHECK-SD-NEXT: .cfi_offset b8, -56
2407 ; CHECK-SD-NEXT: .cfi_offset b9, -64
2408 ; CHECK-SD-NEXT: fmov d8, d2
2409 ; CHECK-SD-NEXT: fmov d9, d1
2410 ; CHECK-SD-NEXT: bl __fixdfti
2411 ; CHECK-SD-NEXT: fmov d0, d9
2412 ; CHECK-SD-NEXT: mov x19, x0
2413 ; CHECK-SD-NEXT: mov x20, x1
2414 ; CHECK-SD-NEXT: bl __fixdfti
2415 ; CHECK-SD-NEXT: fmov d0, d8
2416 ; CHECK-SD-NEXT: mov x21, x0
2417 ; CHECK-SD-NEXT: mov x22, x1
2418 ; CHECK-SD-NEXT: bl __fixdfti
2419 ; CHECK-SD-NEXT: mov x4, x0
2420 ; CHECK-SD-NEXT: mov x5, x1
2421 ; CHECK-SD-NEXT: mov x0, x19
2422 ; CHECK-SD-NEXT: mov x1, x20
2423 ; CHECK-SD-NEXT: mov x2, x21
2424 ; CHECK-SD-NEXT: mov x3, x22
2425 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
2426 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
2427 ; CHECK-SD-NEXT: ldp x22, x21, [sp, #32] // 16-byte Folded Reload
2428 ; CHECK-SD-NEXT: ldp d9, d8, [sp], #64 // 16-byte Folded Reload
2429 ; CHECK-SD-NEXT: ret
2430 ;
2431 ; CHECK-GI-LABEL: fptos_v3f64_v3i128:
2432 ; CHECK-GI: // %bb.0: // %entry
2433 ; CHECK-GI-NEXT: stp d9, d8, [sp, #-64]! // 16-byte Folded Spill
2434 ; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
2435 ; CHECK-GI-NEXT: stp x22, x21, [sp, #32] // 16-byte Folded Spill
2436 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
2437 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
2438 ; CHECK-GI-NEXT: .cfi_offset w19, -8
2439 ; CHECK-GI-NEXT: .cfi_offset w20, -16
2440 ; CHECK-GI-NEXT: .cfi_offset w21, -24
2441 ; CHECK-GI-NEXT: .cfi_offset w22, -32
2442 ; CHECK-GI-NEXT: .cfi_offset w30, -48
2443 ; CHECK-GI-NEXT: .cfi_offset b8, -56
2444 ; CHECK-GI-NEXT: .cfi_offset b9, -64
2445 ; CHECK-GI-NEXT: fmov d8, d1
2446 ; CHECK-GI-NEXT: fmov d9, d2
2447 ; CHECK-GI-NEXT: bl __fixdfti
2448 ; CHECK-GI-NEXT: fmov d0, d8
2449 ; CHECK-GI-NEXT: mov x19, x0
2450 ; CHECK-GI-NEXT: mov x20, x1
2451 ; CHECK-GI-NEXT: bl __fixdfti
2452 ; CHECK-GI-NEXT: fmov d0, d9
2453 ; CHECK-GI-NEXT: mov x21, x0
2454 ; CHECK-GI-NEXT: mov x22, x1
2455 ; CHECK-GI-NEXT: bl __fixdfti
2456 ; CHECK-GI-NEXT: mov x4, x0
2457 ; CHECK-GI-NEXT: mov x5, x1
2458 ; CHECK-GI-NEXT: mov x0, x19
2459 ; CHECK-GI-NEXT: mov x1, x20
2460 ; CHECK-GI-NEXT: mov x2, x21
2461 ; CHECK-GI-NEXT: mov x3, x22
2462 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
2463 ; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
2464 ; CHECK-GI-NEXT: ldp x22, x21, [sp, #32] // 16-byte Folded Reload
2465 ; CHECK-GI-NEXT: ldp d9, d8, [sp], #64 // 16-byte Folded Reload
2466 ; CHECK-GI-NEXT: ret
2467 entry:
2468 %c = fptosi <3 x double> %a to <3 x i128>
2469 ret <3 x i128> %c
2470 }
2472 define <3 x i128> @fptou_v3f64_v3i128(<3 x double> %a) {
2473 ; CHECK-SD-LABEL: fptou_v3f64_v3i128:
2474 ; CHECK-SD: // %bb.0: // %entry
2475 ; CHECK-SD-NEXT: stp d9, d8, [sp, #-64]! // 16-byte Folded Spill
2476 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
2477 ; CHECK-SD-NEXT: stp x22, x21, [sp, #32] // 16-byte Folded Spill
2478 ; CHECK-SD-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
2479 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
2480 ; CHECK-SD-NEXT: .cfi_offset w19, -8
2481 ; CHECK-SD-NEXT: .cfi_offset w20, -16
2482 ; CHECK-SD-NEXT: .cfi_offset w21, -24
2483 ; CHECK-SD-NEXT: .cfi_offset w22, -32
2484 ; CHECK-SD-NEXT: .cfi_offset w30, -48
2485 ; CHECK-SD-NEXT: .cfi_offset b8, -56
2486 ; CHECK-SD-NEXT: .cfi_offset b9, -64
2487 ; CHECK-SD-NEXT: fmov d8, d2
2488 ; CHECK-SD-NEXT: fmov d9, d1
2489 ; CHECK-SD-NEXT: bl __fixunsdfti
2490 ; CHECK-SD-NEXT: fmov d0, d9
2491 ; CHECK-SD-NEXT: mov x19, x0
2492 ; CHECK-SD-NEXT: mov x20, x1
2493 ; CHECK-SD-NEXT: bl __fixunsdfti
2494 ; CHECK-SD-NEXT: fmov d0, d8
2495 ; CHECK-SD-NEXT: mov x21, x0
2496 ; CHECK-SD-NEXT: mov x22, x1
2497 ; CHECK-SD-NEXT: bl __fixunsdfti
2498 ; CHECK-SD-NEXT: mov x4, x0
2499 ; CHECK-SD-NEXT: mov x5, x1
2500 ; CHECK-SD-NEXT: mov x0, x19
2501 ; CHECK-SD-NEXT: mov x1, x20
2502 ; CHECK-SD-NEXT: mov x2, x21
2503 ; CHECK-SD-NEXT: mov x3, x22
2504 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
2505 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
2506 ; CHECK-SD-NEXT: ldp x22, x21, [sp, #32] // 16-byte Folded Reload
2507 ; CHECK-SD-NEXT: ldp d9, d8, [sp], #64 // 16-byte Folded Reload
2508 ; CHECK-SD-NEXT: ret
2509 ;
2510 ; CHECK-GI-LABEL: fptou_v3f64_v3i128:
2511 ; CHECK-GI: // %bb.0: // %entry
2512 ; CHECK-GI-NEXT: stp d9, d8, [sp, #-64]! // 16-byte Folded Spill
2513 ; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
2514 ; CHECK-GI-NEXT: stp x22, x21, [sp, #32] // 16-byte Folded Spill
2515 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
2516 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
2517 ; CHECK-GI-NEXT: .cfi_offset w19, -8
2518 ; CHECK-GI-NEXT: .cfi_offset w20, -16
2519 ; CHECK-GI-NEXT: .cfi_offset w21, -24
2520 ; CHECK-GI-NEXT: .cfi_offset w22, -32
2521 ; CHECK-GI-NEXT: .cfi_offset w30, -48
2522 ; CHECK-GI-NEXT: .cfi_offset b8, -56
2523 ; CHECK-GI-NEXT: .cfi_offset b9, -64
2524 ; CHECK-GI-NEXT: fmov d8, d1
2525 ; CHECK-GI-NEXT: fmov d9, d2
2526 ; CHECK-GI-NEXT: bl __fixunsdfti
2527 ; CHECK-GI-NEXT: fmov d0, d8
2528 ; CHECK-GI-NEXT: mov x19, x0
2529 ; CHECK-GI-NEXT: mov x20, x1
2530 ; CHECK-GI-NEXT: bl __fixunsdfti
2531 ; CHECK-GI-NEXT: fmov d0, d9
2532 ; CHECK-GI-NEXT: mov x21, x0
2533 ; CHECK-GI-NEXT: mov x22, x1
2534 ; CHECK-GI-NEXT: bl __fixunsdfti
2535 ; CHECK-GI-NEXT: mov x4, x0
2536 ; CHECK-GI-NEXT: mov x5, x1
2537 ; CHECK-GI-NEXT: mov x0, x19
2538 ; CHECK-GI-NEXT: mov x1, x20
2539 ; CHECK-GI-NEXT: mov x2, x21
2540 ; CHECK-GI-NEXT: mov x3, x22
2541 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
2542 ; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
2543 ; CHECK-GI-NEXT: ldp x22, x21, [sp, #32] // 16-byte Folded Reload
2544 ; CHECK-GI-NEXT: ldp d9, d8, [sp], #64 // 16-byte Folded Reload
2545 ; CHECK-GI-NEXT: ret
2546 entry:
2547 %c = fptoui <3 x double> %a to <3 x i128>
2548 ret <3 x i128> %c
2549 }
2551 define <2 x i64> @fptos_v2f32_v2i64(<2 x float> %a) {
2552 ; CHECK-LABEL: fptos_v2f32_v2i64:
2553 ; CHECK: // %bb.0: // %entry
2554 ; CHECK-NEXT: fcvtl v0.2d, v0.2s
2555 ; CHECK-NEXT: fcvtzs v0.2d, v0.2d
2556 ; CHECK-NEXT: ret
2557 entry:
2558 %c = fptosi <2 x float> %a to <2 x i64>
2559 ret <2 x i64> %c
2560 }
2562 define <2 x i64> @fptou_v2f32_v2i64(<2 x float> %a) {
2563 ; CHECK-LABEL: fptou_v2f32_v2i64:
2564 ; CHECK: // %bb.0: // %entry
2565 ; CHECK-NEXT: fcvtl v0.2d, v0.2s
2566 ; CHECK-NEXT: fcvtzu v0.2d, v0.2d
2567 ; CHECK-NEXT: ret
2568 entry:
2569 %c = fptoui <2 x float> %a to <2 x i64>
2570 ret <2 x i64> %c
2571 }
2573 define <3 x i64> @fptos_v3f32_v3i64(<3 x float> %a) {
2574 ; CHECK-SD-LABEL: fptos_v3f32_v3i64:
2575 ; CHECK-SD: // %bb.0: // %entry
2576 ; CHECK-SD-NEXT: fcvtl v1.2d, v0.2s
2577 ; CHECK-SD-NEXT: fcvtl2 v0.2d, v0.4s
2578 ; CHECK-SD-NEXT: fcvtzs v3.2d, v1.2d
2579 ; CHECK-SD-NEXT: fcvtzs v2.2d, v0.2d
2580 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2
2581 ; CHECK-SD-NEXT: fmov d0, d3
2582 ; CHECK-SD-NEXT: ext v1.16b, v3.16b, v3.16b, #8
2583 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1
2584 ; CHECK-SD-NEXT: ret
2585 ;
2586 ; CHECK-GI-LABEL: fptos_v3f32_v3i64:
2587 ; CHECK-GI: // %bb.0: // %entry
2588 ; CHECK-GI-NEXT: mov v1.s[0], v0.s[2]
2589 ; CHECK-GI-NEXT: fcvtl v0.2d, v0.2s
2590 ; CHECK-GI-NEXT: fcvtl v1.2d, v1.2s
2591 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
2592 ; CHECK-GI-NEXT: fcvtzs v2.2d, v1.2d
2593 ; CHECK-GI-NEXT: mov d1, v0.d[1]
2594 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
2595 ; CHECK-GI-NEXT: // kill: def $d2 killed $d2 killed $q2
2596 ; CHECK-GI-NEXT: ret
2597 entry:
2598 %c = fptosi <3 x float> %a to <3 x i64>
2599 ret <3 x i64> %c
2600 }
2602 define <3 x i64> @fptou_v3f32_v3i64(<3 x float> %a) {
2603 ; CHECK-SD-LABEL: fptou_v3f32_v3i64:
2604 ; CHECK-SD: // %bb.0: // %entry
2605 ; CHECK-SD-NEXT: fcvtl v1.2d, v0.2s
2606 ; CHECK-SD-NEXT: fcvtl2 v0.2d, v0.4s
2607 ; CHECK-SD-NEXT: fcvtzu v3.2d, v1.2d
2608 ; CHECK-SD-NEXT: fcvtzu v2.2d, v0.2d
2609 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2
2610 ; CHECK-SD-NEXT: fmov d0, d3
2611 ; CHECK-SD-NEXT: ext v1.16b, v3.16b, v3.16b, #8
2612 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1
2613 ; CHECK-SD-NEXT: ret
2614 ;
2615 ; CHECK-GI-LABEL: fptou_v3f32_v3i64:
2616 ; CHECK-GI: // %bb.0: // %entry
2617 ; CHECK-GI-NEXT: mov v1.s[0], v0.s[2]
2618 ; CHECK-GI-NEXT: fcvtl v0.2d, v0.2s
2619 ; CHECK-GI-NEXT: fcvtl v1.2d, v1.2s
2620 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
2621 ; CHECK-GI-NEXT: fcvtzu v2.2d, v1.2d
2622 ; CHECK-GI-NEXT: mov d1, v0.d[1]
2623 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
2624 ; CHECK-GI-NEXT: // kill: def $d2 killed $d2 killed $q2
2625 ; CHECK-GI-NEXT: ret
2626 entry:
2627 %c = fptoui <3 x float> %a to <3 x i64>
2628 ret <3 x i64> %c
2629 }
2631 define <4 x i64> @fptos_v4f32_v4i64(<4 x float> %a) {
2632 ; CHECK-SD-LABEL: fptos_v4f32_v4i64:
2633 ; CHECK-SD: // %bb.0: // %entry
2634 ; CHECK-SD-NEXT: fcvtl2 v1.2d, v0.4s
2635 ; CHECK-SD-NEXT: fcvtl v0.2d, v0.2s
2636 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
2637 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
2638 ; CHECK-SD-NEXT: ret
2639 ;
2640 ; CHECK-GI-LABEL: fptos_v4f32_v4i64:
2641 ; CHECK-GI: // %bb.0: // %entry
2642 ; CHECK-GI-NEXT: fcvtl v1.2d, v0.2s
2643 ; CHECK-GI-NEXT: fcvtl2 v2.2d, v0.4s
2644 ; CHECK-GI-NEXT: fcvtzs v0.2d, v1.2d
2645 ; CHECK-GI-NEXT: fcvtzs v1.2d, v2.2d
2646 ; CHECK-GI-NEXT: ret
2647 entry:
2648 %c = fptosi <4 x float> %a to <4 x i64>
2649 ret <4 x i64> %c
2650 }
2652 define <4 x i64> @fptou_v4f32_v4i64(<4 x float> %a) {
2653 ; CHECK-SD-LABEL: fptou_v4f32_v4i64:
2654 ; CHECK-SD: // %bb.0: // %entry
2655 ; CHECK-SD-NEXT: fcvtl2 v1.2d, v0.4s
2656 ; CHECK-SD-NEXT: fcvtl v0.2d, v0.2s
2657 ; CHECK-SD-NEXT: fcvtzu v1.2d, v1.2d
2658 ; CHECK-SD-NEXT: fcvtzu v0.2d, v0.2d
2659 ; CHECK-SD-NEXT: ret
2660 ;
2661 ; CHECK-GI-LABEL: fptou_v4f32_v4i64:
2662 ; CHECK-GI: // %bb.0: // %entry
2663 ; CHECK-GI-NEXT: fcvtl v1.2d, v0.2s
2664 ; CHECK-GI-NEXT: fcvtl2 v2.2d, v0.4s
2665 ; CHECK-GI-NEXT: fcvtzu v0.2d, v1.2d
2666 ; CHECK-GI-NEXT: fcvtzu v1.2d, v2.2d
2667 ; CHECK-GI-NEXT: ret
2668 entry:
2669 %c = fptoui <4 x float> %a to <4 x i64>
2670 ret <4 x i64> %c
2671 }
2673 define <8 x i64> @fptos_v8f32_v8i64(<8 x float> %a) {
2674 ; CHECK-SD-LABEL: fptos_v8f32_v8i64:
2675 ; CHECK-SD: // %bb.0: // %entry
2676 ; CHECK-SD-NEXT: fcvtl v2.2d, v0.2s
2677 ; CHECK-SD-NEXT: fcvtl2 v3.2d, v0.4s
2678 ; CHECK-SD-NEXT: fcvtl2 v4.2d, v1.4s
2679 ; CHECK-SD-NEXT: fcvtl v5.2d, v1.2s
2680 ; CHECK-SD-NEXT: fcvtzs v0.2d, v2.2d
2681 ; CHECK-SD-NEXT: fcvtzs v1.2d, v3.2d
2682 ; CHECK-SD-NEXT: fcvtzs v3.2d, v4.2d
2683 ; CHECK-SD-NEXT: fcvtzs v2.2d, v5.2d
2684 ; CHECK-SD-NEXT: ret
2685 ;
2686 ; CHECK-GI-LABEL: fptos_v8f32_v8i64:
2687 ; CHECK-GI: // %bb.0: // %entry
2688 ; CHECK-GI-NEXT: fcvtl v2.2d, v0.2s
2689 ; CHECK-GI-NEXT: fcvtl2 v3.2d, v0.4s
2690 ; CHECK-GI-NEXT: fcvtl v4.2d, v1.2s
2691 ; CHECK-GI-NEXT: fcvtl2 v5.2d, v1.4s
2692 ; CHECK-GI-NEXT: fcvtzs v0.2d, v2.2d
2693 ; CHECK-GI-NEXT: fcvtzs v1.2d, v3.2d
2694 ; CHECK-GI-NEXT: fcvtzs v2.2d, v4.2d
2695 ; CHECK-GI-NEXT: fcvtzs v3.2d, v5.2d
2696 ; CHECK-GI-NEXT: ret
2697 entry:
2698 %c = fptosi <8 x float> %a to <8 x i64>
2699 ret <8 x i64> %c
2700 }
2702 define <8 x i64> @fptou_v8f32_v8i64(<8 x float> %a) {
2703 ; CHECK-SD-LABEL: fptou_v8f32_v8i64:
2704 ; CHECK-SD: // %bb.0: // %entry
2705 ; CHECK-SD-NEXT: fcvtl v2.2d, v0.2s
2706 ; CHECK-SD-NEXT: fcvtl2 v3.2d, v0.4s
2707 ; CHECK-SD-NEXT: fcvtl2 v4.2d, v1.4s
2708 ; CHECK-SD-NEXT: fcvtl v5.2d, v1.2s
2709 ; CHECK-SD-NEXT: fcvtzu v0.2d, v2.2d
2710 ; CHECK-SD-NEXT: fcvtzu v1.2d, v3.2d
2711 ; CHECK-SD-NEXT: fcvtzu v3.2d, v4.2d
2712 ; CHECK-SD-NEXT: fcvtzu v2.2d, v5.2d
2713 ; CHECK-SD-NEXT: ret
2714 ;
2715 ; CHECK-GI-LABEL: fptou_v8f32_v8i64:
2716 ; CHECK-GI: // %bb.0: // %entry
2717 ; CHECK-GI-NEXT: fcvtl v2.2d, v0.2s
2718 ; CHECK-GI-NEXT: fcvtl2 v3.2d, v0.4s
2719 ; CHECK-GI-NEXT: fcvtl v4.2d, v1.2s
2720 ; CHECK-GI-NEXT: fcvtl2 v5.2d, v1.4s
2721 ; CHECK-GI-NEXT: fcvtzu v0.2d, v2.2d
2722 ; CHECK-GI-NEXT: fcvtzu v1.2d, v3.2d
2723 ; CHECK-GI-NEXT: fcvtzu v2.2d, v4.2d
2724 ; CHECK-GI-NEXT: fcvtzu v3.2d, v5.2d
2725 ; CHECK-GI-NEXT: ret
2726 entry:
2727 %c = fptoui <8 x float> %a to <8 x i64>
2728 ret <8 x i64> %c
2729 }
2731 define <16 x i64> @fptos_v16f32_v16i64(<16 x float> %a) {
2732 ; CHECK-SD-LABEL: fptos_v16f32_v16i64:
2733 ; CHECK-SD: // %bb.0: // %entry
2734 ; CHECK-SD-NEXT: fcvtl2 v4.2d, v0.4s
2735 ; CHECK-SD-NEXT: fcvtl v0.2d, v0.2s
2736 ; CHECK-SD-NEXT: fcvtl2 v5.2d, v1.4s
2737 ; CHECK-SD-NEXT: fcvtl v6.2d, v1.2s
2738 ; CHECK-SD-NEXT: fcvtl v7.2d, v2.2s
2739 ; CHECK-SD-NEXT: fcvtl2 v16.2d, v2.4s
2740 ; CHECK-SD-NEXT: fcvtl2 v17.2d, v3.4s
2741 ; CHECK-SD-NEXT: fcvtl v18.2d, v3.2s
2742 ; CHECK-SD-NEXT: fcvtzs v1.2d, v4.2d
2743 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
2744 ; CHECK-SD-NEXT: fcvtzs v3.2d, v5.2d
2745 ; CHECK-SD-NEXT: fcvtzs v2.2d, v6.2d
2746 ; CHECK-SD-NEXT: fcvtzs v4.2d, v7.2d
2747 ; CHECK-SD-NEXT: fcvtzs v5.2d, v16.2d
2748 ; CHECK-SD-NEXT: fcvtzs v7.2d, v17.2d
2749 ; CHECK-SD-NEXT: fcvtzs v6.2d, v18.2d
2750 ; CHECK-SD-NEXT: ret
2751 ;
2752 ; CHECK-GI-LABEL: fptos_v16f32_v16i64:
2753 ; CHECK-GI: // %bb.0: // %entry
2754 ; CHECK-GI-NEXT: fcvtl v4.2d, v0.2s
2755 ; CHECK-GI-NEXT: fcvtl2 v5.2d, v0.4s
2756 ; CHECK-GI-NEXT: fcvtl v6.2d, v1.2s
2757 ; CHECK-GI-NEXT: fcvtl2 v7.2d, v1.4s
2758 ; CHECK-GI-NEXT: fcvtl v16.2d, v2.2s
2759 ; CHECK-GI-NEXT: fcvtl2 v17.2d, v2.4s
2760 ; CHECK-GI-NEXT: fcvtl v18.2d, v3.2s
2761 ; CHECK-GI-NEXT: fcvtl2 v19.2d, v3.4s
2762 ; CHECK-GI-NEXT: fcvtzs v0.2d, v4.2d
2763 ; CHECK-GI-NEXT: fcvtzs v1.2d, v5.2d
2764 ; CHECK-GI-NEXT: fcvtzs v2.2d, v6.2d
2765 ; CHECK-GI-NEXT: fcvtzs v3.2d, v7.2d
2766 ; CHECK-GI-NEXT: fcvtzs v4.2d, v16.2d
2767 ; CHECK-GI-NEXT: fcvtzs v5.2d, v17.2d
2768 ; CHECK-GI-NEXT: fcvtzs v6.2d, v18.2d
2769 ; CHECK-GI-NEXT: fcvtzs v7.2d, v19.2d
2770 ; CHECK-GI-NEXT: ret
2771 entry:
2772 %c = fptosi <16 x float> %a to <16 x i64>
2773 ret <16 x i64> %c
2774 }
2776 define <16 x i64> @fptou_v16f32_v16i64(<16 x float> %a) {
2777 ; CHECK-SD-LABEL: fptou_v16f32_v16i64:
2778 ; CHECK-SD: // %bb.0: // %entry
2779 ; CHECK-SD-NEXT: fcvtl2 v4.2d, v0.4s
2780 ; CHECK-SD-NEXT: fcvtl v0.2d, v0.2s
2781 ; CHECK-SD-NEXT: fcvtl2 v5.2d, v1.4s
2782 ; CHECK-SD-NEXT: fcvtl v6.2d, v1.2s
2783 ; CHECK-SD-NEXT: fcvtl v7.2d, v2.2s
2784 ; CHECK-SD-NEXT: fcvtl2 v16.2d, v2.4s
2785 ; CHECK-SD-NEXT: fcvtl2 v17.2d, v3.4s
2786 ; CHECK-SD-NEXT: fcvtl v18.2d, v3.2s
2787 ; CHECK-SD-NEXT: fcvtzu v1.2d, v4.2d
2788 ; CHECK-SD-NEXT: fcvtzu v0.2d, v0.2d
2789 ; CHECK-SD-NEXT: fcvtzu v3.2d, v5.2d
2790 ; CHECK-SD-NEXT: fcvtzu v2.2d, v6.2d
2791 ; CHECK-SD-NEXT: fcvtzu v4.2d, v7.2d
2792 ; CHECK-SD-NEXT: fcvtzu v5.2d, v16.2d
2793 ; CHECK-SD-NEXT: fcvtzu v7.2d, v17.2d
2794 ; CHECK-SD-NEXT: fcvtzu v6.2d, v18.2d
2795 ; CHECK-SD-NEXT: ret
2796 ;
2797 ; CHECK-GI-LABEL: fptou_v16f32_v16i64:
2798 ; CHECK-GI: // %bb.0: // %entry
2799 ; CHECK-GI-NEXT: fcvtl v4.2d, v0.2s
2800 ; CHECK-GI-NEXT: fcvtl2 v5.2d, v0.4s
2801 ; CHECK-GI-NEXT: fcvtl v6.2d, v1.2s
2802 ; CHECK-GI-NEXT: fcvtl2 v7.2d, v1.4s
2803 ; CHECK-GI-NEXT: fcvtl v16.2d, v2.2s
2804 ; CHECK-GI-NEXT: fcvtl2 v17.2d, v2.4s
2805 ; CHECK-GI-NEXT: fcvtl v18.2d, v3.2s
2806 ; CHECK-GI-NEXT: fcvtl2 v19.2d, v3.4s
2807 ; CHECK-GI-NEXT: fcvtzu v0.2d, v4.2d
2808 ; CHECK-GI-NEXT: fcvtzu v1.2d, v5.2d
2809 ; CHECK-GI-NEXT: fcvtzu v2.2d, v6.2d
2810 ; CHECK-GI-NEXT: fcvtzu v3.2d, v7.2d
2811 ; CHECK-GI-NEXT: fcvtzu v4.2d, v16.2d
2812 ; CHECK-GI-NEXT: fcvtzu v5.2d, v17.2d
2813 ; CHECK-GI-NEXT: fcvtzu v6.2d, v18.2d
2814 ; CHECK-GI-NEXT: fcvtzu v7.2d, v19.2d
2815 ; CHECK-GI-NEXT: ret
2816 entry:
2817 %c = fptoui <16 x float> %a to <16 x i64>
2818 ret <16 x i64> %c
2819 }
2821 define <32 x i64> @fptos_v32f32_v32i64(<32 x float> %a) {
2822 ; CHECK-SD-LABEL: fptos_v32f32_v32i64:
2823 ; CHECK-SD: // %bb.0: // %entry
2824 ; CHECK-SD-NEXT: fcvtl2 v16.2d, v7.4s
2825 ; CHECK-SD-NEXT: fcvtl v7.2d, v7.2s
2826 ; CHECK-SD-NEXT: fcvtl2 v17.2d, v6.4s
2827 ; CHECK-SD-NEXT: fcvtl v6.2d, v6.2s
2828 ; CHECK-SD-NEXT: fcvtl2 v18.2d, v5.4s
2829 ; CHECK-SD-NEXT: fcvtl v5.2d, v5.2s
2830 ; CHECK-SD-NEXT: fcvtl2 v19.2d, v4.4s
2831 ; CHECK-SD-NEXT: fcvtl v4.2d, v4.2s
2832 ; CHECK-SD-NEXT: fcvtl2 v20.2d, v3.4s
2833 ; CHECK-SD-NEXT: fcvtl v3.2d, v3.2s
2834 ; CHECK-SD-NEXT: fcvtzs v16.2d, v16.2d
2835 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
2836 ; CHECK-SD-NEXT: fcvtzs v17.2d, v17.2d
2837 ; CHECK-SD-NEXT: fcvtzs v6.2d, v6.2d
2838 ; CHECK-SD-NEXT: fcvtzs v18.2d, v18.2d
2839 ; CHECK-SD-NEXT: fcvtzs v5.2d, v5.2d
2840 ; CHECK-SD-NEXT: fcvtzs v4.2d, v4.2d
2841 ; CHECK-SD-NEXT: fcvtzs v3.2d, v3.2d
2842 ; CHECK-SD-NEXT: stp q7, q16, [x8, #224]
2843 ; CHECK-SD-NEXT: fcvtl2 v7.2d, v2.4s
2844 ; CHECK-SD-NEXT: fcvtzs v16.2d, v19.2d
2845 ; CHECK-SD-NEXT: stp q5, q18, [x8, #160]
2846 ; CHECK-SD-NEXT: fcvtl v2.2d, v2.2s
2847 ; CHECK-SD-NEXT: fcvtl2 v5.2d, v0.4s
2848 ; CHECK-SD-NEXT: stp q6, q17, [x8, #192]
2849 ; CHECK-SD-NEXT: fcvtl2 v6.2d, v1.4s
2850 ; CHECK-SD-NEXT: fcvtzs v17.2d, v20.2d
2851 ; CHECK-SD-NEXT: fcvtl v1.2d, v1.2s
2852 ; CHECK-SD-NEXT: fcvtl v0.2d, v0.2s
2853 ; CHECK-SD-NEXT: stp q4, q16, [x8, #128]
2854 ; CHECK-SD-NEXT: fcvtzs v7.2d, v7.2d
2855 ; CHECK-SD-NEXT: fcvtzs v2.2d, v2.2d
2856 ; CHECK-SD-NEXT: fcvtzs v4.2d, v6.2d
2857 ; CHECK-SD-NEXT: stp q3, q17, [x8, #96]
2858 ; CHECK-SD-NEXT: fcvtzs v3.2d, v5.2d
2859 ; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d
2860 ; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d
2861 ; CHECK-SD-NEXT: stp q2, q7, [x8, #64]
2862 ; CHECK-SD-NEXT: stp q0, q3, [x8]
2863 ; CHECK-SD-NEXT: stp q1, q4, [x8, #32]
2864 ; CHECK-SD-NEXT: ret
2865 ;
2866 ; CHECK-GI-LABEL: fptos_v32f32_v32i64:
2867 ; CHECK-GI: // %bb.0: // %entry
2868 ; CHECK-GI-NEXT: fcvtl v16.2d, v0.2s
2869 ; CHECK-GI-NEXT: fcvtl2 v0.2d, v0.4s
2870 ; CHECK-GI-NEXT: fcvtl v17.2d, v1.2s
2871 ; CHECK-GI-NEXT: fcvtl2 v1.2d, v1.4s
2872 ; CHECK-GI-NEXT: fcvtl v18.2d, v2.2s
2873 ; CHECK-GI-NEXT: fcvtl2 v2.2d, v2.4s
2874 ; CHECK-GI-NEXT: fcvtl v19.2d, v3.2s
2875 ; CHECK-GI-NEXT: fcvtl2 v3.2d, v3.4s
2876 ; CHECK-GI-NEXT: fcvtl v20.2d, v4.2s
2877 ; CHECK-GI-NEXT: fcvtl2 v4.2d, v4.4s
2878 ; CHECK-GI-NEXT: fcvtzs v16.2d, v16.2d
2879 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
2880 ; CHECK-GI-NEXT: fcvtzs v17.2d, v17.2d
2881 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
2882 ; CHECK-GI-NEXT: fcvtzs v18.2d, v18.2d
2883 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
2884 ; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d
2885 ; CHECK-GI-NEXT: fcvtzs v4.2d, v4.2d
2886 ; CHECK-GI-NEXT: stp q16, q0, [x8]
2887 ; CHECK-GI-NEXT: fcvtl v0.2d, v5.2s
2888 ; CHECK-GI-NEXT: fcvtl2 v5.2d, v5.4s
2889 ; CHECK-GI-NEXT: stp q17, q1, [x8, #32]
2890 ; CHECK-GI-NEXT: fcvtzs v16.2d, v19.2d
2891 ; CHECK-GI-NEXT: fcvtl v1.2d, v6.2s
2892 ; CHECK-GI-NEXT: stp q18, q2, [x8, #64]
2893 ; CHECK-GI-NEXT: fcvtl2 v6.2d, v6.4s
2894 ; CHECK-GI-NEXT: fcvtl v2.2d, v7.2s
2895 ; CHECK-GI-NEXT: fcvtl2 v7.2d, v7.4s
2896 ; CHECK-GI-NEXT: fcvtzs v17.2d, v20.2d
2897 ; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
2898 ; CHECK-GI-NEXT: fcvtzs v5.2d, v5.2d
2899 ; CHECK-GI-NEXT: stp q16, q3, [x8, #96]
2900 ; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d
2901 ; CHECK-GI-NEXT: fcvtzs v3.2d, v6.2d
2902 ; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d
2903 ; CHECK-GI-NEXT: stp q17, q4, [x8, #128]
2904 ; CHECK-GI-NEXT: stp q0, q5, [x8, #160]
2905 ; CHECK-GI-NEXT: fcvtzs v0.2d, v7.2d
2906 ; CHECK-GI-NEXT: stp q1, q3, [x8, #192]
2907 ; CHECK-GI-NEXT: stp q2, q0, [x8, #224]
2908 ; CHECK-GI-NEXT: ret
2909 entry:
2910 %c = fptosi <32 x float> %a to <32 x i64>
2911 ret <32 x i64> %c
2912 }
2914 define <32 x i64> @fptou_v32f32_v32i64(<32 x float> %a) {
2915 ; CHECK-SD-LABEL: fptou_v32f32_v32i64:
2916 ; CHECK-SD: // %bb.0: // %entry
2917 ; CHECK-SD-NEXT: fcvtl2 v16.2d, v7.4s
2918 ; CHECK-SD-NEXT: fcvtl v7.2d, v7.2s
2919 ; CHECK-SD-NEXT: fcvtl2 v17.2d, v6.4s
2920 ; CHECK-SD-NEXT: fcvtl v6.2d, v6.2s
2921 ; CHECK-SD-NEXT: fcvtl2 v18.2d, v5.4s
2922 ; CHECK-SD-NEXT: fcvtl v5.2d, v5.2s
2923 ; CHECK-SD-NEXT: fcvtl2 v19.2d, v4.4s
2924 ; CHECK-SD-NEXT: fcvtl v4.2d, v4.2s
2925 ; CHECK-SD-NEXT: fcvtl2 v20.2d, v3.4s
2926 ; CHECK-SD-NEXT: fcvtl v3.2d, v3.2s
2927 ; CHECK-SD-NEXT: fcvtzu v16.2d, v16.2d
2928 ; CHECK-SD-NEXT: fcvtzu v7.2d, v7.2d
2929 ; CHECK-SD-NEXT: fcvtzu v17.2d, v17.2d
2930 ; CHECK-SD-NEXT: fcvtzu v6.2d, v6.2d
2931 ; CHECK-SD-NEXT: fcvtzu v18.2d, v18.2d
2932 ; CHECK-SD-NEXT: fcvtzu v5.2d, v5.2d
2933 ; CHECK-SD-NEXT: fcvtzu v4.2d, v4.2d
2934 ; CHECK-SD-NEXT: fcvtzu v3.2d, v3.2d
2935 ; CHECK-SD-NEXT: stp q7, q16, [x8, #224]
2936 ; CHECK-SD-NEXT: fcvtl2 v7.2d, v2.4s
2937 ; CHECK-SD-NEXT: fcvtzu v16.2d, v19.2d
2938 ; CHECK-SD-NEXT: stp q5, q18, [x8, #160]
2939 ; CHECK-SD-NEXT: fcvtl v2.2d, v2.2s
2940 ; CHECK-SD-NEXT: fcvtl2 v5.2d, v0.4s
2941 ; CHECK-SD-NEXT: stp q6, q17, [x8, #192]
2942 ; CHECK-SD-NEXT: fcvtl2 v6.2d, v1.4s
2943 ; CHECK-SD-NEXT: fcvtzu v17.2d, v20.2d
2944 ; CHECK-SD-NEXT: fcvtl v1.2d, v1.2s
2945 ; CHECK-SD-NEXT: fcvtl v0.2d, v0.2s
2946 ; CHECK-SD-NEXT: stp q4, q16, [x8, #128]
2947 ; CHECK-SD-NEXT: fcvtzu v7.2d, v7.2d
2948 ; CHECK-SD-NEXT: fcvtzu v2.2d, v2.2d
2949 ; CHECK-SD-NEXT: fcvtzu v4.2d, v6.2d
2950 ; CHECK-SD-NEXT: stp q3, q17, [x8, #96]
2951 ; CHECK-SD-NEXT: fcvtzu v3.2d, v5.2d
2952 ; CHECK-SD-NEXT: fcvtzu v1.2d, v1.2d
2953 ; CHECK-SD-NEXT: fcvtzu v0.2d, v0.2d
2954 ; CHECK-SD-NEXT: stp q2, q7, [x8, #64]
2955 ; CHECK-SD-NEXT: stp q0, q3, [x8]
2956 ; CHECK-SD-NEXT: stp q1, q4, [x8, #32]
2957 ; CHECK-SD-NEXT: ret
2958 ;
2959 ; CHECK-GI-LABEL: fptou_v32f32_v32i64:
2960 ; CHECK-GI: // %bb.0: // %entry
2961 ; CHECK-GI-NEXT: fcvtl v16.2d, v0.2s
2962 ; CHECK-GI-NEXT: fcvtl2 v0.2d, v0.4s
2963 ; CHECK-GI-NEXT: fcvtl v17.2d, v1.2s
2964 ; CHECK-GI-NEXT: fcvtl2 v1.2d, v1.4s
2965 ; CHECK-GI-NEXT: fcvtl v18.2d, v2.2s
2966 ; CHECK-GI-NEXT: fcvtl2 v2.2d, v2.4s
2967 ; CHECK-GI-NEXT: fcvtl v19.2d, v3.2s
2968 ; CHECK-GI-NEXT: fcvtl2 v3.2d, v3.4s
2969 ; CHECK-GI-NEXT: fcvtl v20.2d, v4.2s
2970 ; CHECK-GI-NEXT: fcvtl2 v4.2d, v4.4s
2971 ; CHECK-GI-NEXT: fcvtzu v16.2d, v16.2d
2972 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
2973 ; CHECK-GI-NEXT: fcvtzu v17.2d, v17.2d
2974 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
2975 ; CHECK-GI-NEXT: fcvtzu v18.2d, v18.2d
2976 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
2977 ; CHECK-GI-NEXT: fcvtzu v3.2d, v3.2d
2978 ; CHECK-GI-NEXT: fcvtzu v4.2d, v4.2d
2979 ; CHECK-GI-NEXT: stp q16, q0, [x8]
2980 ; CHECK-GI-NEXT: fcvtl v0.2d, v5.2s
2981 ; CHECK-GI-NEXT: fcvtl2 v5.2d, v5.4s
2982 ; CHECK-GI-NEXT: stp q17, q1, [x8, #32]
2983 ; CHECK-GI-NEXT: fcvtzu v16.2d, v19.2d
2984 ; CHECK-GI-NEXT: fcvtl v1.2d, v6.2s
2985 ; CHECK-GI-NEXT: stp q18, q2, [x8, #64]
2986 ; CHECK-GI-NEXT: fcvtl2 v6.2d, v6.4s
2987 ; CHECK-GI-NEXT: fcvtl v2.2d, v7.2s
2988 ; CHECK-GI-NEXT: fcvtl2 v7.2d, v7.4s
2989 ; CHECK-GI-NEXT: fcvtzu v17.2d, v20.2d
2990 ; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
2991 ; CHECK-GI-NEXT: fcvtzu v5.2d, v5.2d
2992 ; CHECK-GI-NEXT: stp q16, q3, [x8, #96]
2993 ; CHECK-GI-NEXT: fcvtzu v1.2d, v1.2d
2994 ; CHECK-GI-NEXT: fcvtzu v3.2d, v6.2d
2995 ; CHECK-GI-NEXT: fcvtzu v2.2d, v2.2d
2996 ; CHECK-GI-NEXT: stp q17, q4, [x8, #128]
2997 ; CHECK-GI-NEXT: stp q0, q5, [x8, #160]
2998 ; CHECK-GI-NEXT: fcvtzu v0.2d, v7.2d
2999 ; CHECK-GI-NEXT: stp q1, q3, [x8, #192]
3000 ; CHECK-GI-NEXT: stp q2, q0, [x8, #224]
3001 ; CHECK-GI-NEXT: ret
3002 entry:
3003 %c = fptoui <32 x float> %a to <32 x i64>
3004 ret <32 x i64> %c
3005 }
3007 define <2 x i32> @fptos_v2f32_v2i32(<2 x float> %a) {
3008 ; CHECK-LABEL: fptos_v2f32_v2i32:
3009 ; CHECK: // %bb.0: // %entry
3010 ; CHECK-NEXT: fcvtzs v0.2s, v0.2s
3011 ; CHECK-NEXT: ret
3012 entry:
3013 %c = fptosi <2 x float> %a to <2 x i32>
3014 ret <2 x i32> %c
3015 }
3017 define <2 x i32> @fptou_v2f32_v2i32(<2 x float> %a) {
3018 ; CHECK-LABEL: fptou_v2f32_v2i32:
3019 ; CHECK: // %bb.0: // %entry
3020 ; CHECK-NEXT: fcvtzu v0.2s, v0.2s
3021 ; CHECK-NEXT: ret
3022 entry:
3023 %c = fptoui <2 x float> %a to <2 x i32>
3024 ret <2 x i32> %c
3025 }
3027 define <3 x i32> @fptos_v3f32_v3i32(<3 x float> %a) {
3028 ; CHECK-LABEL: fptos_v3f32_v3i32:
3029 ; CHECK: // %bb.0: // %entry
3030 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
3031 ; CHECK-NEXT: ret
3032 entry:
3033 %c = fptosi <3 x float> %a to <3 x i32>
3034 ret <3 x i32> %c
3035 }
3037 define <3 x i32> @fptou_v3f32_v3i32(<3 x float> %a) {
3038 ; CHECK-LABEL: fptou_v3f32_v3i32:
3039 ; CHECK: // %bb.0: // %entry
3040 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
3041 ; CHECK-NEXT: ret
3042 entry:
3043 %c = fptoui <3 x float> %a to <3 x i32>
3044 ret <3 x i32> %c
3045 }
3047 define <4 x i32> @fptos_v4f32_v4i32(<4 x float> %a) {
3048 ; CHECK-LABEL: fptos_v4f32_v4i32:
3049 ; CHECK: // %bb.0: // %entry
3050 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
3051 ; CHECK-NEXT: ret
3052 entry:
3053 %c = fptosi <4 x float> %a to <4 x i32>
3054 ret <4 x i32> %c
3055 }
3057 define <4 x i32> @fptou_v4f32_v4i32(<4 x float> %a) {
3058 ; CHECK-LABEL: fptou_v4f32_v4i32:
3059 ; CHECK: // %bb.0: // %entry
3060 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
3061 ; CHECK-NEXT: ret
3062 entry:
3063 %c = fptoui <4 x float> %a to <4 x i32>
3064 ret <4 x i32> %c
3065 }
3067 define <8 x i32> @fptos_v8f32_v8i32(<8 x float> %a) {
3068 ; CHECK-LABEL: fptos_v8f32_v8i32:
3069 ; CHECK: // %bb.0: // %entry
3070 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
3071 ; CHECK-NEXT: fcvtzs v1.4s, v1.4s
3072 ; CHECK-NEXT: ret
3073 entry:
3074 %c = fptosi <8 x float> %a to <8 x i32>
3075 ret <8 x i32> %c
3076 }
3078 define <8 x i32> @fptou_v8f32_v8i32(<8 x float> %a) {
3079 ; CHECK-LABEL: fptou_v8f32_v8i32:
3080 ; CHECK: // %bb.0: // %entry
3081 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
3082 ; CHECK-NEXT: fcvtzu v1.4s, v1.4s
3083 ; CHECK-NEXT: ret
3084 entry:
3085 %c = fptoui <8 x float> %a to <8 x i32>
3086 ret <8 x i32> %c
3087 }
3089 define <16 x i32> @fptos_v16f32_v16i32(<16 x float> %a) {
3090 ; CHECK-LABEL: fptos_v16f32_v16i32:
3091 ; CHECK: // %bb.0: // %entry
3092 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
3093 ; CHECK-NEXT: fcvtzs v1.4s, v1.4s
3094 ; CHECK-NEXT: fcvtzs v2.4s, v2.4s
3095 ; CHECK-NEXT: fcvtzs v3.4s, v3.4s
3096 ; CHECK-NEXT: ret
3097 entry:
3098 %c = fptosi <16 x float> %a to <16 x i32>
3099 ret <16 x i32> %c
3100 }
3102 define <16 x i32> @fptou_v16f32_v16i32(<16 x float> %a) {
3103 ; CHECK-LABEL: fptou_v16f32_v16i32:
3104 ; CHECK: // %bb.0: // %entry
3105 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
3106 ; CHECK-NEXT: fcvtzu v1.4s, v1.4s
3107 ; CHECK-NEXT: fcvtzu v2.4s, v2.4s
3108 ; CHECK-NEXT: fcvtzu v3.4s, v3.4s
3109 ; CHECK-NEXT: ret
3110 entry:
3111 %c = fptoui <16 x float> %a to <16 x i32>
3112 ret <16 x i32> %c
3113 }
3115 define <32 x i32> @fptos_v32f32_v32i32(<32 x float> %a) {
3116 ; CHECK-LABEL: fptos_v32f32_v32i32:
3117 ; CHECK: // %bb.0: // %entry
3118 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
3119 ; CHECK-NEXT: fcvtzs v1.4s, v1.4s
3120 ; CHECK-NEXT: fcvtzs v2.4s, v2.4s
3121 ; CHECK-NEXT: fcvtzs v3.4s, v3.4s
3122 ; CHECK-NEXT: fcvtzs v4.4s, v4.4s
3123 ; CHECK-NEXT: fcvtzs v5.4s, v5.4s
3124 ; CHECK-NEXT: fcvtzs v6.4s, v6.4s
3125 ; CHECK-NEXT: fcvtzs v7.4s, v7.4s
3126 ; CHECK-NEXT: ret
3127 entry:
3128 %c = fptosi <32 x float> %a to <32 x i32>
3129 ret <32 x i32> %c
3130 }
3132 define <32 x i32> @fptou_v32f32_v32i32(<32 x float> %a) {
3133 ; CHECK-LABEL: fptou_v32f32_v32i32:
3134 ; CHECK: // %bb.0: // %entry
3135 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
3136 ; CHECK-NEXT: fcvtzu v1.4s, v1.4s
3137 ; CHECK-NEXT: fcvtzu v2.4s, v2.4s
3138 ; CHECK-NEXT: fcvtzu v3.4s, v3.4s
3139 ; CHECK-NEXT: fcvtzu v4.4s, v4.4s
3140 ; CHECK-NEXT: fcvtzu v5.4s, v5.4s
3141 ; CHECK-NEXT: fcvtzu v6.4s, v6.4s
3142 ; CHECK-NEXT: fcvtzu v7.4s, v7.4s
3143 ; CHECK-NEXT: ret
3144 entry:
3145 %c = fptoui <32 x float> %a to <32 x i32>
3146 ret <32 x i32> %c
3147 }
3149 define <2 x i16> @fptos_v2f32_v2i16(<2 x float> %a) {
3150 ; CHECK-LABEL: fptos_v2f32_v2i16:
3151 ; CHECK: // %bb.0: // %entry
3152 ; CHECK-NEXT: fcvtzs v0.2s, v0.2s
3153 ; CHECK-NEXT: ret
3154 entry:
3155 %c = fptosi <2 x float> %a to <2 x i16>
3156 ret <2 x i16> %c
3157 }
3159 define <2 x i16> @fptou_v2f32_v2i16(<2 x float> %a) {
3160 ; CHECK-SD-LABEL: fptou_v2f32_v2i16:
3161 ; CHECK-SD: // %bb.0: // %entry
3162 ; CHECK-SD-NEXT: fcvtzs v0.2s, v0.2s
3163 ; CHECK-SD-NEXT: ret
3164 ;
3165 ; CHECK-GI-LABEL: fptou_v2f32_v2i16:
3166 ; CHECK-GI: // %bb.0: // %entry
3167 ; CHECK-GI-NEXT: fcvtzu v0.2s, v0.2s
3168 ; CHECK-GI-NEXT: ret
3169 entry:
3170 %c = fptoui <2 x float> %a to <2 x i16>
3171 ret <2 x i16> %c
3172 }
3174 define <3 x i16> @fptos_v3f32_v3i16(<3 x float> %a) {
3175 ; CHECK-LABEL: fptos_v3f32_v3i16:
3176 ; CHECK: // %bb.0: // %entry
3177 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
3178 ; CHECK-NEXT: xtn v0.4h, v0.4s
3179 ; CHECK-NEXT: ret
3180 entry:
3181 %c = fptosi <3 x float> %a to <3 x i16>
3182 ret <3 x i16> %c
3183 }
3185 define <3 x i16> @fptou_v3f32_v3i16(<3 x float> %a) {
3186 ; CHECK-LABEL: fptou_v3f32_v3i16:
3187 ; CHECK: // %bb.0: // %entry
3188 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
3189 ; CHECK-NEXT: xtn v0.4h, v0.4s
3190 ; CHECK-NEXT: ret
3191 entry:
3192 %c = fptoui <3 x float> %a to <3 x i16>
3193 ret <3 x i16> %c
3194 }
3196 define <4 x i16> @fptos_v4f32_v4i16(<4 x float> %a) {
3197 ; CHECK-LABEL: fptos_v4f32_v4i16:
3198 ; CHECK: // %bb.0: // %entry
3199 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
3200 ; CHECK-NEXT: xtn v0.4h, v0.4s
3201 ; CHECK-NEXT: ret
3202 entry:
3203 %c = fptosi <4 x float> %a to <4 x i16>
3204 ret <4 x i16> %c
3205 }
3207 define <4 x i16> @fptou_v4f32_v4i16(<4 x float> %a) {
3208 ; CHECK-LABEL: fptou_v4f32_v4i16:
3209 ; CHECK: // %bb.0: // %entry
3210 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
3211 ; CHECK-NEXT: xtn v0.4h, v0.4s
3212 ; CHECK-NEXT: ret
3213 entry:
3214 %c = fptoui <4 x float> %a to <4 x i16>
3215 ret <4 x i16> %c
3216 }
3218 define <8 x i16> @fptos_v8f32_v8i16(<8 x float> %a) {
3219 ; CHECK-SD-LABEL: fptos_v8f32_v8i16:
3220 ; CHECK-SD: // %bb.0: // %entry
3221 ; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s
3222 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3223 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3224 ; CHECK-SD-NEXT: ret
3225 ;
3226 ; CHECK-GI-LABEL: fptos_v8f32_v8i16:
3227 ; CHECK-GI: // %bb.0: // %entry
3228 ; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s
3229 ; CHECK-GI-NEXT: fcvtzs v1.4s, v1.4s
3230 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3231 ; CHECK-GI-NEXT: ret
3232 entry:
3233 %c = fptosi <8 x float> %a to <8 x i16>
3234 ret <8 x i16> %c
3235 }
3237 define <8 x i16> @fptou_v8f32_v8i16(<8 x float> %a) {
3238 ; CHECK-SD-LABEL: fptou_v8f32_v8i16:
3239 ; CHECK-SD: // %bb.0: // %entry
3240 ; CHECK-SD-NEXT: fcvtzu v1.4s, v1.4s
3241 ; CHECK-SD-NEXT: fcvtzu v0.4s, v0.4s
3242 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3243 ; CHECK-SD-NEXT: ret
3244 ;
3245 ; CHECK-GI-LABEL: fptou_v8f32_v8i16:
3246 ; CHECK-GI: // %bb.0: // %entry
3247 ; CHECK-GI-NEXT: fcvtzu v0.4s, v0.4s
3248 ; CHECK-GI-NEXT: fcvtzu v1.4s, v1.4s
3249 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3250 ; CHECK-GI-NEXT: ret
3251 entry:
3252 %c = fptoui <8 x float> %a to <8 x i16>
3253 ret <8 x i16> %c
3254 }
3256 define <16 x i16> @fptos_v16f32_v16i16(<16 x float> %a) {
3257 ; CHECK-SD-LABEL: fptos_v16f32_v16i16:
3258 ; CHECK-SD: // %bb.0: // %entry
3259 ; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s
3260 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3261 ; CHECK-SD-NEXT: fcvtzs v3.4s, v3.4s
3262 ; CHECK-SD-NEXT: fcvtzs v2.4s, v2.4s
3263 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3264 ; CHECK-SD-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3265 ; CHECK-SD-NEXT: ret
3266 ;
3267 ; CHECK-GI-LABEL: fptos_v16f32_v16i16:
3268 ; CHECK-GI: // %bb.0: // %entry
3269 ; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s
3270 ; CHECK-GI-NEXT: fcvtzs v1.4s, v1.4s
3271 ; CHECK-GI-NEXT: fcvtzs v2.4s, v2.4s
3272 ; CHECK-GI-NEXT: fcvtzs v3.4s, v3.4s
3273 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3274 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3275 ; CHECK-GI-NEXT: ret
3276 entry:
3277 %c = fptosi <16 x float> %a to <16 x i16>
3278 ret <16 x i16> %c
3279 }
3281 define <16 x i16> @fptou_v16f32_v16i16(<16 x float> %a) {
3282 ; CHECK-SD-LABEL: fptou_v16f32_v16i16:
3283 ; CHECK-SD: // %bb.0: // %entry
3284 ; CHECK-SD-NEXT: fcvtzu v1.4s, v1.4s
3285 ; CHECK-SD-NEXT: fcvtzu v0.4s, v0.4s
3286 ; CHECK-SD-NEXT: fcvtzu v3.4s, v3.4s
3287 ; CHECK-SD-NEXT: fcvtzu v2.4s, v2.4s
3288 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3289 ; CHECK-SD-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3290 ; CHECK-SD-NEXT: ret
3291 ;
3292 ; CHECK-GI-LABEL: fptou_v16f32_v16i16:
3293 ; CHECK-GI: // %bb.0: // %entry
3294 ; CHECK-GI-NEXT: fcvtzu v0.4s, v0.4s
3295 ; CHECK-GI-NEXT: fcvtzu v1.4s, v1.4s
3296 ; CHECK-GI-NEXT: fcvtzu v2.4s, v2.4s
3297 ; CHECK-GI-NEXT: fcvtzu v3.4s, v3.4s
3298 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3299 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3300 ; CHECK-GI-NEXT: ret
3301 entry:
3302 %c = fptoui <16 x float> %a to <16 x i16>
3303 ret <16 x i16> %c
3304 }
3306 define <32 x i16> @fptos_v32f32_v32i16(<32 x float> %a) {
3307 ; CHECK-SD-LABEL: fptos_v32f32_v32i16:
3308 ; CHECK-SD: // %bb.0: // %entry
3309 ; CHECK-SD-NEXT: fcvtzs v3.4s, v3.4s
3310 ; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s
3311 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3312 ; CHECK-SD-NEXT: fcvtzs v2.4s, v2.4s
3313 ; CHECK-SD-NEXT: fcvtzs v5.4s, v5.4s
3314 ; CHECK-SD-NEXT: fcvtzs v4.4s, v4.4s
3315 ; CHECK-SD-NEXT: fcvtzs v7.4s, v7.4s
3316 ; CHECK-SD-NEXT: fcvtzs v6.4s, v6.4s
3317 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3318 ; CHECK-SD-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3319 ; CHECK-SD-NEXT: uzp1 v2.8h, v4.8h, v5.8h
3320 ; CHECK-SD-NEXT: uzp1 v3.8h, v6.8h, v7.8h
3321 ; CHECK-SD-NEXT: ret
3322 ;
3323 ; CHECK-GI-LABEL: fptos_v32f32_v32i16:
3324 ; CHECK-GI: // %bb.0: // %entry
3325 ; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s
3326 ; CHECK-GI-NEXT: fcvtzs v1.4s, v1.4s
3327 ; CHECK-GI-NEXT: fcvtzs v2.4s, v2.4s
3328 ; CHECK-GI-NEXT: fcvtzs v3.4s, v3.4s
3329 ; CHECK-GI-NEXT: fcvtzs v4.4s, v4.4s
3330 ; CHECK-GI-NEXT: fcvtzs v5.4s, v5.4s
3331 ; CHECK-GI-NEXT: fcvtzs v6.4s, v6.4s
3332 ; CHECK-GI-NEXT: fcvtzs v7.4s, v7.4s
3333 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3334 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3335 ; CHECK-GI-NEXT: uzp1 v2.8h, v4.8h, v5.8h
3336 ; CHECK-GI-NEXT: uzp1 v3.8h, v6.8h, v7.8h
3337 ; CHECK-GI-NEXT: ret
3338 entry:
3339 %c = fptosi <32 x float> %a to <32 x i16>
3340 ret <32 x i16> %c
3341 }
3343 define <32 x i16> @fptou_v32f32_v32i16(<32 x float> %a) {
3344 ; CHECK-SD-LABEL: fptou_v32f32_v32i16:
3345 ; CHECK-SD: // %bb.0: // %entry
3346 ; CHECK-SD-NEXT: fcvtzu v3.4s, v3.4s
3347 ; CHECK-SD-NEXT: fcvtzu v1.4s, v1.4s
3348 ; CHECK-SD-NEXT: fcvtzu v0.4s, v0.4s
3349 ; CHECK-SD-NEXT: fcvtzu v2.4s, v2.4s
3350 ; CHECK-SD-NEXT: fcvtzu v5.4s, v5.4s
3351 ; CHECK-SD-NEXT: fcvtzu v4.4s, v4.4s
3352 ; CHECK-SD-NEXT: fcvtzu v7.4s, v7.4s
3353 ; CHECK-SD-NEXT: fcvtzu v6.4s, v6.4s
3354 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3355 ; CHECK-SD-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3356 ; CHECK-SD-NEXT: uzp1 v2.8h, v4.8h, v5.8h
3357 ; CHECK-SD-NEXT: uzp1 v3.8h, v6.8h, v7.8h
3358 ; CHECK-SD-NEXT: ret
3359 ;
3360 ; CHECK-GI-LABEL: fptou_v32f32_v32i16:
3361 ; CHECK-GI: // %bb.0: // %entry
3362 ; CHECK-GI-NEXT: fcvtzu v0.4s, v0.4s
3363 ; CHECK-GI-NEXT: fcvtzu v1.4s, v1.4s
3364 ; CHECK-GI-NEXT: fcvtzu v2.4s, v2.4s
3365 ; CHECK-GI-NEXT: fcvtzu v3.4s, v3.4s
3366 ; CHECK-GI-NEXT: fcvtzu v4.4s, v4.4s
3367 ; CHECK-GI-NEXT: fcvtzu v5.4s, v5.4s
3368 ; CHECK-GI-NEXT: fcvtzu v6.4s, v6.4s
3369 ; CHECK-GI-NEXT: fcvtzu v7.4s, v7.4s
3370 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3371 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3372 ; CHECK-GI-NEXT: uzp1 v2.8h, v4.8h, v5.8h
3373 ; CHECK-GI-NEXT: uzp1 v3.8h, v6.8h, v7.8h
3374 ; CHECK-GI-NEXT: ret
3375 entry:
3376 %c = fptoui <32 x float> %a to <32 x i16>
3377 ret <32 x i16> %c
3378 }
3380 define <2 x i8> @fptos_v2f32_v2i8(<2 x float> %a) {
3381 ; CHECK-LABEL: fptos_v2f32_v2i8:
3382 ; CHECK: // %bb.0: // %entry
3383 ; CHECK-NEXT: fcvtzs v0.2s, v0.2s
3384 ; CHECK-NEXT: ret
3385 entry:
3386 %c = fptosi <2 x float> %a to <2 x i8>
3387 ret <2 x i8> %c
3388 }
3390 define <2 x i8> @fptou_v2f32_v2i8(<2 x float> %a) {
3391 ; CHECK-SD-LABEL: fptou_v2f32_v2i8:
3392 ; CHECK-SD: // %bb.0: // %entry
3393 ; CHECK-SD-NEXT: fcvtzs v0.2s, v0.2s
3394 ; CHECK-SD-NEXT: ret
3395 ;
3396 ; CHECK-GI-LABEL: fptou_v2f32_v2i8:
3397 ; CHECK-GI: // %bb.0: // %entry
3398 ; CHECK-GI-NEXT: fcvtzu v0.2s, v0.2s
3399 ; CHECK-GI-NEXT: ret
3400 entry:
3401 %c = fptoui <2 x float> %a to <2 x i8>
3402 ret <2 x i8> %c
3403 }
3405 define <3 x i8> @fptos_v3f32_v3i8(<3 x float> %a) {
3406 ; CHECK-SD-LABEL: fptos_v3f32_v3i8:
3407 ; CHECK-SD: // %bb.0: // %entry
3408 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3409 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
3410 ; CHECK-SD-NEXT: umov w0, v0.h[0]
3411 ; CHECK-SD-NEXT: umov w1, v0.h[1]
3412 ; CHECK-SD-NEXT: umov w2, v0.h[2]
3413 ; CHECK-SD-NEXT: ret
3414 ;
3415 ; CHECK-GI-LABEL: fptos_v3f32_v3i8:
3416 ; CHECK-GI: // %bb.0: // %entry
3417 ; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s
3418 ; CHECK-GI-NEXT: mov s1, v0.s[1]
3419 ; CHECK-GI-NEXT: mov s2, v0.s[2]
3420 ; CHECK-GI-NEXT: fmov w0, s0
3421 ; CHECK-GI-NEXT: fmov w1, s1
3422 ; CHECK-GI-NEXT: fmov w2, s2
3423 ; CHECK-GI-NEXT: ret
3424 entry:
3425 %c = fptosi <3 x float> %a to <3 x i8>
3426 ret <3 x i8> %c
3427 }
3429 define <3 x i8> @fptou_v3f32_v3i8(<3 x float> %a) {
3430 ; CHECK-SD-LABEL: fptou_v3f32_v3i8:
3431 ; CHECK-SD: // %bb.0: // %entry
3432 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3433 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
3434 ; CHECK-SD-NEXT: umov w0, v0.h[0]
3435 ; CHECK-SD-NEXT: umov w1, v0.h[1]
3436 ; CHECK-SD-NEXT: umov w2, v0.h[2]
3437 ; CHECK-SD-NEXT: ret
3438 ;
3439 ; CHECK-GI-LABEL: fptou_v3f32_v3i8:
3440 ; CHECK-GI: // %bb.0: // %entry
3441 ; CHECK-GI-NEXT: fcvtzu v0.4s, v0.4s
3442 ; CHECK-GI-NEXT: mov s1, v0.s[1]
3443 ; CHECK-GI-NEXT: mov s2, v0.s[2]
3444 ; CHECK-GI-NEXT: fmov w0, s0
3445 ; CHECK-GI-NEXT: fmov w1, s1
3446 ; CHECK-GI-NEXT: fmov w2, s2
3447 ; CHECK-GI-NEXT: ret
3448 entry:
3449 %c = fptoui <3 x float> %a to <3 x i8>
3450 ret <3 x i8> %c
3451 }
3453 define <4 x i8> @fptos_v4f32_v4i8(<4 x float> %a) {
3454 ; CHECK-LABEL: fptos_v4f32_v4i8:
3455 ; CHECK: // %bb.0: // %entry
3456 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
3457 ; CHECK-NEXT: xtn v0.4h, v0.4s
3458 ; CHECK-NEXT: ret
3459 entry:
3460 %c = fptosi <4 x float> %a to <4 x i8>
3461 ret <4 x i8> %c
3462 }
3464 define <4 x i8> @fptou_v4f32_v4i8(<4 x float> %a) {
3465 ; CHECK-SD-LABEL: fptou_v4f32_v4i8:
3466 ; CHECK-SD: // %bb.0: // %entry
3467 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3468 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
3469 ; CHECK-SD-NEXT: ret
3470 ;
3471 ; CHECK-GI-LABEL: fptou_v4f32_v4i8:
3472 ; CHECK-GI: // %bb.0: // %entry
3473 ; CHECK-GI-NEXT: fcvtzu v0.4s, v0.4s
3474 ; CHECK-GI-NEXT: xtn v0.4h, v0.4s
3475 ; CHECK-GI-NEXT: ret
3476 entry:
3477 %c = fptoui <4 x float> %a to <4 x i8>
3478 ret <4 x i8> %c
3479 }
3481 define <8 x i8> @fptos_v8f32_v8i8(<8 x float> %a) {
3482 ; CHECK-SD-LABEL: fptos_v8f32_v8i8:
3483 ; CHECK-SD: // %bb.0: // %entry
3484 ; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s
3485 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3486 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3487 ; CHECK-SD-NEXT: xtn v0.8b, v0.8h
3488 ; CHECK-SD-NEXT: ret
3489 ;
3490 ; CHECK-GI-LABEL: fptos_v8f32_v8i8:
3491 ; CHECK-GI: // %bb.0: // %entry
3492 ; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s
3493 ; CHECK-GI-NEXT: fcvtzs v1.4s, v1.4s
3494 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3495 ; CHECK-GI-NEXT: xtn v0.8b, v0.8h
3496 ; CHECK-GI-NEXT: ret
3497 entry:
3498 %c = fptosi <8 x float> %a to <8 x i8>
3499 ret <8 x i8> %c
3500 }
3502 define <8 x i8> @fptou_v8f32_v8i8(<8 x float> %a) {
3503 ; CHECK-SD-LABEL: fptou_v8f32_v8i8:
3504 ; CHECK-SD: // %bb.0: // %entry
3505 ; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s
3506 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3507 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3508 ; CHECK-SD-NEXT: xtn v0.8b, v0.8h
3509 ; CHECK-SD-NEXT: ret
3510 ;
3511 ; CHECK-GI-LABEL: fptou_v8f32_v8i8:
3512 ; CHECK-GI: // %bb.0: // %entry
3513 ; CHECK-GI-NEXT: fcvtzu v0.4s, v0.4s
3514 ; CHECK-GI-NEXT: fcvtzu v1.4s, v1.4s
3515 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3516 ; CHECK-GI-NEXT: xtn v0.8b, v0.8h
3517 ; CHECK-GI-NEXT: ret
3518 entry:
3519 %c = fptoui <8 x float> %a to <8 x i8>
3520 ret <8 x i8> %c
3521 }
3523 define <16 x i8> @fptos_v16f32_v16i8(<16 x float> %a) {
3524 ; CHECK-SD-LABEL: fptos_v16f32_v16i8:
3525 ; CHECK-SD: // %bb.0: // %entry
3526 ; CHECK-SD-NEXT: fcvtzs v3.4s, v3.4s
3527 ; CHECK-SD-NEXT: fcvtzs v2.4s, v2.4s
3528 ; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s
3529 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3530 ; CHECK-SD-NEXT: uzp1 v2.8h, v2.8h, v3.8h
3531 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3532 ; CHECK-SD-NEXT: uzp1 v0.16b, v0.16b, v2.16b
3533 ; CHECK-SD-NEXT: ret
3534 ;
3535 ; CHECK-GI-LABEL: fptos_v16f32_v16i8:
3536 ; CHECK-GI: // %bb.0: // %entry
3537 ; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s
3538 ; CHECK-GI-NEXT: fcvtzs v1.4s, v1.4s
3539 ; CHECK-GI-NEXT: fcvtzs v2.4s, v2.4s
3540 ; CHECK-GI-NEXT: fcvtzs v3.4s, v3.4s
3541 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3542 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3543 ; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b
3544 ; CHECK-GI-NEXT: ret
3545 entry:
3546 %c = fptosi <16 x float> %a to <16 x i8>
3547 ret <16 x i8> %c
3548 }
3550 define <16 x i8> @fptou_v16f32_v16i8(<16 x float> %a) {
3551 ; CHECK-SD-LABEL: fptou_v16f32_v16i8:
3552 ; CHECK-SD: // %bb.0: // %entry
3553 ; CHECK-SD-NEXT: fcvtzs v3.4s, v3.4s
3554 ; CHECK-SD-NEXT: fcvtzs v2.4s, v2.4s
3555 ; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s
3556 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3557 ; CHECK-SD-NEXT: uzp1 v2.8h, v2.8h, v3.8h
3558 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3559 ; CHECK-SD-NEXT: uzp1 v0.16b, v0.16b, v2.16b
3560 ; CHECK-SD-NEXT: ret
3561 ;
3562 ; CHECK-GI-LABEL: fptou_v16f32_v16i8:
3563 ; CHECK-GI: // %bb.0: // %entry
3564 ; CHECK-GI-NEXT: fcvtzu v0.4s, v0.4s
3565 ; CHECK-GI-NEXT: fcvtzu v1.4s, v1.4s
3566 ; CHECK-GI-NEXT: fcvtzu v2.4s, v2.4s
3567 ; CHECK-GI-NEXT: fcvtzu v3.4s, v3.4s
3568 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3569 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3570 ; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b
3571 ; CHECK-GI-NEXT: ret
3572 entry:
3573 %c = fptoui <16 x float> %a to <16 x i8>
3574 ret <16 x i8> %c
3575 }
3577 define <32 x i8> @fptos_v32f32_v32i8(<32 x float> %a) {
3578 ; CHECK-SD-LABEL: fptos_v32f32_v32i8:
3579 ; CHECK-SD: // %bb.0: // %entry
3580 ; CHECK-SD-NEXT: fcvtzs v3.4s, v3.4s
3581 ; CHECK-SD-NEXT: fcvtzs v2.4s, v2.4s
3582 ; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s
3583 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3584 ; CHECK-SD-NEXT: fcvtzs v7.4s, v7.4s
3585 ; CHECK-SD-NEXT: fcvtzs v6.4s, v6.4s
3586 ; CHECK-SD-NEXT: fcvtzs v5.4s, v5.4s
3587 ; CHECK-SD-NEXT: fcvtzs v4.4s, v4.4s
3588 ; CHECK-SD-NEXT: uzp1 v2.8h, v2.8h, v3.8h
3589 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3590 ; CHECK-SD-NEXT: uzp1 v1.8h, v6.8h, v7.8h
3591 ; CHECK-SD-NEXT: uzp1 v3.8h, v4.8h, v5.8h
3592 ; CHECK-SD-NEXT: uzp1 v0.16b, v0.16b, v2.16b
3593 ; CHECK-SD-NEXT: uzp1 v1.16b, v3.16b, v1.16b
3594 ; CHECK-SD-NEXT: ret
3595 ;
3596 ; CHECK-GI-LABEL: fptos_v32f32_v32i8:
3597 ; CHECK-GI: // %bb.0: // %entry
3598 ; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s
3599 ; CHECK-GI-NEXT: fcvtzs v1.4s, v1.4s
3600 ; CHECK-GI-NEXT: fcvtzs v2.4s, v2.4s
3601 ; CHECK-GI-NEXT: fcvtzs v3.4s, v3.4s
3602 ; CHECK-GI-NEXT: fcvtzs v4.4s, v4.4s
3603 ; CHECK-GI-NEXT: fcvtzs v5.4s, v5.4s
3604 ; CHECK-GI-NEXT: fcvtzs v6.4s, v6.4s
3605 ; CHECK-GI-NEXT: fcvtzs v7.4s, v7.4s
3606 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3607 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3608 ; CHECK-GI-NEXT: uzp1 v2.8h, v4.8h, v5.8h
3609 ; CHECK-GI-NEXT: uzp1 v3.8h, v6.8h, v7.8h
3610 ; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b
3611 ; CHECK-GI-NEXT: uzp1 v1.16b, v2.16b, v3.16b
3612 ; CHECK-GI-NEXT: ret
3613 entry:
3614 %c = fptosi <32 x float> %a to <32 x i8>
3615 ret <32 x i8> %c
3616 }
3618 define <32 x i8> @fptou_v32f32_v32i8(<32 x float> %a) {
3619 ; CHECK-SD-LABEL: fptou_v32f32_v32i8:
3620 ; CHECK-SD: // %bb.0: // %entry
3621 ; CHECK-SD-NEXT: fcvtzs v3.4s, v3.4s
3622 ; CHECK-SD-NEXT: fcvtzs v2.4s, v2.4s
3623 ; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s
3624 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
3625 ; CHECK-SD-NEXT: fcvtzs v7.4s, v7.4s
3626 ; CHECK-SD-NEXT: fcvtzs v6.4s, v6.4s
3627 ; CHECK-SD-NEXT: fcvtzs v5.4s, v5.4s
3628 ; CHECK-SD-NEXT: fcvtzs v4.4s, v4.4s
3629 ; CHECK-SD-NEXT: uzp1 v2.8h, v2.8h, v3.8h
3630 ; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3631 ; CHECK-SD-NEXT: uzp1 v1.8h, v6.8h, v7.8h
3632 ; CHECK-SD-NEXT: uzp1 v3.8h, v4.8h, v5.8h
3633 ; CHECK-SD-NEXT: uzp1 v0.16b, v0.16b, v2.16b
3634 ; CHECK-SD-NEXT: uzp1 v1.16b, v3.16b, v1.16b
3635 ; CHECK-SD-NEXT: ret
3636 ;
3637 ; CHECK-GI-LABEL: fptou_v32f32_v32i8:
3638 ; CHECK-GI: // %bb.0: // %entry
3639 ; CHECK-GI-NEXT: fcvtzu v0.4s, v0.4s
3640 ; CHECK-GI-NEXT: fcvtzu v1.4s, v1.4s
3641 ; CHECK-GI-NEXT: fcvtzu v2.4s, v2.4s
3642 ; CHECK-GI-NEXT: fcvtzu v3.4s, v3.4s
3643 ; CHECK-GI-NEXT: fcvtzu v4.4s, v4.4s
3644 ; CHECK-GI-NEXT: fcvtzu v5.4s, v5.4s
3645 ; CHECK-GI-NEXT: fcvtzu v6.4s, v6.4s
3646 ; CHECK-GI-NEXT: fcvtzu v7.4s, v7.4s
3647 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h
3648 ; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h
3649 ; CHECK-GI-NEXT: uzp1 v2.8h, v4.8h, v5.8h
3650 ; CHECK-GI-NEXT: uzp1 v3.8h, v6.8h, v7.8h
3651 ; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b
3652 ; CHECK-GI-NEXT: uzp1 v1.16b, v2.16b, v3.16b
3653 ; CHECK-GI-NEXT: ret
3654 entry:
3655 %c = fptoui <32 x float> %a to <32 x i8>
3656 ret <32 x i8> %c
3657 }
3659 define <2 x i128> @fptos_v2f32_v2i128(<2 x float> %a) {
3660 ; CHECK-SD-LABEL: fptos_v2f32_v2i128:
3661 ; CHECK-SD: // %bb.0: // %entry
3662 ; CHECK-SD-NEXT: sub sp, sp, #48
3663 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
3664 ; CHECK-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
3665 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
3666 ; CHECK-SD-NEXT: .cfi_offset w19, -8
3667 ; CHECK-SD-NEXT: .cfi_offset w20, -16
3668 ; CHECK-SD-NEXT: .cfi_offset w30, -32
3669 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
3670 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
3671 ; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0
3672 ; CHECK-SD-NEXT: bl __fixsfti
3673 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
3674 ; CHECK-SD-NEXT: mov x19, x0
3675 ; CHECK-SD-NEXT: mov x20, x1
3676 ; CHECK-SD-NEXT: mov s0, v0.s[1]
3677 ; CHECK-SD-NEXT: bl __fixsfti
3678 ; CHECK-SD-NEXT: mov x2, x0
3679 ; CHECK-SD-NEXT: mov x3, x1
3680 ; CHECK-SD-NEXT: mov x0, x19
3681 ; CHECK-SD-NEXT: mov x1, x20
3682 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
3683 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
3684 ; CHECK-SD-NEXT: add sp, sp, #48
3685 ; CHECK-SD-NEXT: ret
3686 ;
3687 ; CHECK-GI-LABEL: fptos_v2f32_v2i128:
3688 ; CHECK-GI: // %bb.0: // %entry
3689 ; CHECK-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill
3690 ; CHECK-GI-NEXT: str x30, [sp, #8] // 8-byte Folded Spill
3691 ; CHECK-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
3692 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
3693 ; CHECK-GI-NEXT: .cfi_offset w19, -8
3694 ; CHECK-GI-NEXT: .cfi_offset w20, -16
3695 ; CHECK-GI-NEXT: .cfi_offset w30, -24
3696 ; CHECK-GI-NEXT: .cfi_offset b8, -32
3697 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
3698 ; CHECK-GI-NEXT: mov s8, v0.s[1]
3699 ; CHECK-GI-NEXT: // kill: def $s0 killed $s0 killed $q0
3700 ; CHECK-GI-NEXT: bl __fixsfti
3701 ; CHECK-GI-NEXT: fmov s0, s8
3702 ; CHECK-GI-NEXT: mov x19, x0
3703 ; CHECK-GI-NEXT: mov x20, x1
3704 ; CHECK-GI-NEXT: bl __fixsfti
3705 ; CHECK-GI-NEXT: mov x2, x0
3706 ; CHECK-GI-NEXT: mov x3, x1
3707 ; CHECK-GI-NEXT: mov x0, x19
3708 ; CHECK-GI-NEXT: mov x1, x20
3709 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
3710 ; CHECK-GI-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload
3711 ; CHECK-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload
3712 ; CHECK-GI-NEXT: ret
3713 entry:
3714 %c = fptosi <2 x float> %a to <2 x i128>
3715 ret <2 x i128> %c
3716 }
3718 define <2 x i128> @fptou_v2f32_v2i128(<2 x float> %a) {
3719 ; CHECK-SD-LABEL: fptou_v2f32_v2i128:
3720 ; CHECK-SD: // %bb.0: // %entry
3721 ; CHECK-SD-NEXT: sub sp, sp, #48
3722 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
3723 ; CHECK-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
3724 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
3725 ; CHECK-SD-NEXT: .cfi_offset w19, -8
3726 ; CHECK-SD-NEXT: .cfi_offset w20, -16
3727 ; CHECK-SD-NEXT: .cfi_offset w30, -32
3728 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
3729 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
3730 ; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0
3731 ; CHECK-SD-NEXT: bl __fixunssfti
3732 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
3733 ; CHECK-SD-NEXT: mov x19, x0
3734 ; CHECK-SD-NEXT: mov x20, x1
3735 ; CHECK-SD-NEXT: mov s0, v0.s[1]
3736 ; CHECK-SD-NEXT: bl __fixunssfti
3737 ; CHECK-SD-NEXT: mov x2, x0
3738 ; CHECK-SD-NEXT: mov x3, x1
3739 ; CHECK-SD-NEXT: mov x0, x19
3740 ; CHECK-SD-NEXT: mov x1, x20
3741 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
3742 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
3743 ; CHECK-SD-NEXT: add sp, sp, #48
3744 ; CHECK-SD-NEXT: ret
3745 ;
3746 ; CHECK-GI-LABEL: fptou_v2f32_v2i128:
3747 ; CHECK-GI: // %bb.0: // %entry
3748 ; CHECK-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill
3749 ; CHECK-GI-NEXT: str x30, [sp, #8] // 8-byte Folded Spill
3750 ; CHECK-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
3751 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
3752 ; CHECK-GI-NEXT: .cfi_offset w19, -8
3753 ; CHECK-GI-NEXT: .cfi_offset w20, -16
3754 ; CHECK-GI-NEXT: .cfi_offset w30, -24
3755 ; CHECK-GI-NEXT: .cfi_offset b8, -32
3756 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
3757 ; CHECK-GI-NEXT: mov s8, v0.s[1]
3758 ; CHECK-GI-NEXT: // kill: def $s0 killed $s0 killed $q0
3759 ; CHECK-GI-NEXT: bl __fixunssfti
3760 ; CHECK-GI-NEXT: fmov s0, s8
3761 ; CHECK-GI-NEXT: mov x19, x0
3762 ; CHECK-GI-NEXT: mov x20, x1
3763 ; CHECK-GI-NEXT: bl __fixunssfti
3764 ; CHECK-GI-NEXT: mov x2, x0
3765 ; CHECK-GI-NEXT: mov x3, x1
3766 ; CHECK-GI-NEXT: mov x0, x19
3767 ; CHECK-GI-NEXT: mov x1, x20
3768 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
3769 ; CHECK-GI-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload
3770 ; CHECK-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload
3771 ; CHECK-GI-NEXT: ret
3772 entry:
3773 %c = fptoui <2 x float> %a to <2 x i128>
3774 ret <2 x i128> %c
3775 }
3777 define <3 x i128> @fptos_v3f32_v3i128(<3 x float> %a) {
3778 ; CHECK-SD-LABEL: fptos_v3f32_v3i128:
3779 ; CHECK-SD: // %bb.0: // %entry
3780 ; CHECK-SD-NEXT: sub sp, sp, #64
3781 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
3782 ; CHECK-SD-NEXT: stp x22, x21, [sp, #32] // 16-byte Folded Spill
3783 ; CHECK-SD-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
3784 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
3785 ; CHECK-SD-NEXT: .cfi_offset w19, -8
3786 ; CHECK-SD-NEXT: .cfi_offset w20, -16
3787 ; CHECK-SD-NEXT: .cfi_offset w21, -24
3788 ; CHECK-SD-NEXT: .cfi_offset w22, -32
3789 ; CHECK-SD-NEXT: .cfi_offset w30, -48
3790 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
3791 ; CHECK-SD-NEXT: ext v0.16b, v0.16b, v0.16b, #8
3792 ; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0
3793 ; CHECK-SD-NEXT: bl __fixsfti
3794 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
3795 ; CHECK-SD-NEXT: mov x19, x0
3796 ; CHECK-SD-NEXT: mov x20, x1
3797 ; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0
3798 ; CHECK-SD-NEXT: bl __fixsfti
3799 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
3800 ; CHECK-SD-NEXT: mov x21, x0
3801 ; CHECK-SD-NEXT: mov x22, x1
3802 ; CHECK-SD-NEXT: mov s0, v0.s[1]
3803 ; CHECK-SD-NEXT: bl __fixsfti
3804 ; CHECK-SD-NEXT: mov x2, x0
3805 ; CHECK-SD-NEXT: mov x3, x1
3806 ; CHECK-SD-NEXT: mov x0, x21
3807 ; CHECK-SD-NEXT: mov x1, x22
3808 ; CHECK-SD-NEXT: mov x4, x19
3809 ; CHECK-SD-NEXT: mov x5, x20
3810 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
3811 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
3812 ; CHECK-SD-NEXT: ldp x22, x21, [sp, #32] // 16-byte Folded Reload
3813 ; CHECK-SD-NEXT: add sp, sp, #64
3814 ; CHECK-SD-NEXT: ret
3815 ;
3816 ; CHECK-GI-LABEL: fptos_v3f32_v3i128:
3817 ; CHECK-GI: // %bb.0: // %entry
3818 ; CHECK-GI-NEXT: stp d9, d8, [sp, #-64]! // 16-byte Folded Spill
3819 ; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
3820 ; CHECK-GI-NEXT: stp x22, x21, [sp, #32] // 16-byte Folded Spill
3821 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
3822 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
3823 ; CHECK-GI-NEXT: .cfi_offset w19, -8
3824 ; CHECK-GI-NEXT: .cfi_offset w20, -16
3825 ; CHECK-GI-NEXT: .cfi_offset w21, -24
3826 ; CHECK-GI-NEXT: .cfi_offset w22, -32
3827 ; CHECK-GI-NEXT: .cfi_offset w30, -48
3828 ; CHECK-GI-NEXT: .cfi_offset b8, -56
3829 ; CHECK-GI-NEXT: .cfi_offset b9, -64
3830 ; CHECK-GI-NEXT: mov s8, v0.s[1]
3831 ; CHECK-GI-NEXT: mov s9, v0.s[2]
3832 ; CHECK-GI-NEXT: // kill: def $s0 killed $s0 killed $q0
3833 ; CHECK-GI-NEXT: bl __fixsfti
3834 ; CHECK-GI-NEXT: fmov s0, s8
3835 ; CHECK-GI-NEXT: mov x19, x0
3836 ; CHECK-GI-NEXT: mov x20, x1
3837 ; CHECK-GI-NEXT: bl __fixsfti
3838 ; CHECK-GI-NEXT: fmov s0, s9
3839 ; CHECK-GI-NEXT: mov x21, x0
3840 ; CHECK-GI-NEXT: mov x22, x1
3841 ; CHECK-GI-NEXT: bl __fixsfti
3842 ; CHECK-GI-NEXT: mov x4, x0
3843 ; CHECK-GI-NEXT: mov x5, x1
3844 ; CHECK-GI-NEXT: mov x0, x19
3845 ; CHECK-GI-NEXT: mov x1, x20
3846 ; CHECK-GI-NEXT: mov x2, x21
3847 ; CHECK-GI-NEXT: mov x3, x22
3848 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
3849 ; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
3850 ; CHECK-GI-NEXT: ldp x22, x21, [sp, #32] // 16-byte Folded Reload
3851 ; CHECK-GI-NEXT: ldp d9, d8, [sp], #64 // 16-byte Folded Reload
3852 ; CHECK-GI-NEXT: ret
3853 entry:
3854 %c = fptosi <3 x float> %a to <3 x i128>
3855 ret <3 x i128> %c
3856 }
3858 define <3 x i128> @fptou_v3f32_v3i128(<3 x float> %a) {
3859 ; CHECK-SD-LABEL: fptou_v3f32_v3i128:
3860 ; CHECK-SD: // %bb.0: // %entry
3861 ; CHECK-SD-NEXT: sub sp, sp, #64
3862 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
3863 ; CHECK-SD-NEXT: stp x22, x21, [sp, #32] // 16-byte Folded Spill
3864 ; CHECK-SD-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
3865 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
3866 ; CHECK-SD-NEXT: .cfi_offset w19, -8
3867 ; CHECK-SD-NEXT: .cfi_offset w20, -16
3868 ; CHECK-SD-NEXT: .cfi_offset w21, -24
3869 ; CHECK-SD-NEXT: .cfi_offset w22, -32
3870 ; CHECK-SD-NEXT: .cfi_offset w30, -48
3871 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
3872 ; CHECK-SD-NEXT: ext v0.16b, v0.16b, v0.16b, #8
3873 ; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0
3874 ; CHECK-SD-NEXT: bl __fixunssfti
3875 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
3876 ; CHECK-SD-NEXT: mov x19, x0
3877 ; CHECK-SD-NEXT: mov x20, x1
3878 ; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0
3879 ; CHECK-SD-NEXT: bl __fixunssfti
3880 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
3881 ; CHECK-SD-NEXT: mov x21, x0
3882 ; CHECK-SD-NEXT: mov x22, x1
3883 ; CHECK-SD-NEXT: mov s0, v0.s[1]
3884 ; CHECK-SD-NEXT: bl __fixunssfti
3885 ; CHECK-SD-NEXT: mov x2, x0
3886 ; CHECK-SD-NEXT: mov x3, x1
3887 ; CHECK-SD-NEXT: mov x0, x21
3888 ; CHECK-SD-NEXT: mov x1, x22
3889 ; CHECK-SD-NEXT: mov x4, x19
3890 ; CHECK-SD-NEXT: mov x5, x20
3891 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
3892 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
3893 ; CHECK-SD-NEXT: ldp x22, x21, [sp, #32] // 16-byte Folded Reload
3894 ; CHECK-SD-NEXT: add sp, sp, #64
3895 ; CHECK-SD-NEXT: ret
3896 ;
3897 ; CHECK-GI-LABEL: fptou_v3f32_v3i128:
3898 ; CHECK-GI: // %bb.0: // %entry
3899 ; CHECK-GI-NEXT: stp d9, d8, [sp, #-64]! // 16-byte Folded Spill
3900 ; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
3901 ; CHECK-GI-NEXT: stp x22, x21, [sp, #32] // 16-byte Folded Spill
3902 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
3903 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
3904 ; CHECK-GI-NEXT: .cfi_offset w19, -8
3905 ; CHECK-GI-NEXT: .cfi_offset w20, -16
3906 ; CHECK-GI-NEXT: .cfi_offset w21, -24
3907 ; CHECK-GI-NEXT: .cfi_offset w22, -32
3908 ; CHECK-GI-NEXT: .cfi_offset w30, -48
3909 ; CHECK-GI-NEXT: .cfi_offset b8, -56
3910 ; CHECK-GI-NEXT: .cfi_offset b9, -64
3911 ; CHECK-GI-NEXT: mov s8, v0.s[1]
3912 ; CHECK-GI-NEXT: mov s9, v0.s[2]
3913 ; CHECK-GI-NEXT: // kill: def $s0 killed $s0 killed $q0
3914 ; CHECK-GI-NEXT: bl __fixunssfti
3915 ; CHECK-GI-NEXT: fmov s0, s8
3916 ; CHECK-GI-NEXT: mov x19, x0
3917 ; CHECK-GI-NEXT: mov x20, x1
3918 ; CHECK-GI-NEXT: bl __fixunssfti
3919 ; CHECK-GI-NEXT: fmov s0, s9
3920 ; CHECK-GI-NEXT: mov x21, x0
3921 ; CHECK-GI-NEXT: mov x22, x1
3922 ; CHECK-GI-NEXT: bl __fixunssfti
3923 ; CHECK-GI-NEXT: mov x4, x0
3924 ; CHECK-GI-NEXT: mov x5, x1
3925 ; CHECK-GI-NEXT: mov x0, x19
3926 ; CHECK-GI-NEXT: mov x1, x20
3927 ; CHECK-GI-NEXT: mov x2, x21
3928 ; CHECK-GI-NEXT: mov x3, x22
3929 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
3930 ; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
3931 ; CHECK-GI-NEXT: ldp x22, x21, [sp, #32] // 16-byte Folded Reload
3932 ; CHECK-GI-NEXT: ldp d9, d8, [sp], #64 // 16-byte Folded Reload
3933 ; CHECK-GI-NEXT: ret
3934 entry:
3935 %c = fptoui <3 x float> %a to <3 x i128>
3936 ret <3 x i128> %c
3937 }
3939 define <2 x i64> @fptos_v2f16_v2i64(<2 x half> %a) {
3940 ; CHECK-SD-NOFP16-LABEL: fptos_v2f16_v2i64:
3941 ; CHECK-SD-NOFP16: // %bb.0: // %entry
3942 ; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
3943 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[1]
3944 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
3945 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
3946 ; CHECK-SD-NOFP16-NEXT: fcvtzs x8, s0
3947 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s1
3948 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
3949 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x9
3950 ; CHECK-SD-NOFP16-NEXT: ret
3951 ;
3952 ; CHECK-SD-FP16-LABEL: fptos_v2f16_v2i64:
3953 ; CHECK-SD-FP16: // %bb.0: // %entry
3954 ; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
3955 ; CHECK-SD-FP16-NEXT: mov h1, v0.h[1]
3956 ; CHECK-SD-FP16-NEXT: fcvtzs x8, h0
3957 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h1
3958 ; CHECK-SD-FP16-NEXT: fmov d0, x8
3959 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x9
3960 ; CHECK-SD-FP16-NEXT: ret
3961 ;
3962 ; CHECK-GI-NOFP16-LABEL: fptos_v2f16_v2i64:
3963 ; CHECK-GI-NOFP16: // %bb.0: // %entry
3964 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
3965 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.2d, v0.2s
3966 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.2d, v0.2d
3967 ; CHECK-GI-NOFP16-NEXT: ret
3968 ;
3969 ; CHECK-GI-FP16-LABEL: fptos_v2f16_v2i64:
3970 ; CHECK-GI-FP16: // %bb.0: // %entry
3971 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
3972 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
3973 ; CHECK-GI-FP16-NEXT: fcvt d0, h0
3974 ; CHECK-GI-FP16-NEXT: fcvt d1, h1
3975 ; CHECK-GI-FP16-NEXT: mov v0.d[1], v1.d[0]
3976 ; CHECK-GI-FP16-NEXT: fcvtzs v0.2d, v0.2d
3977 ; CHECK-GI-FP16-NEXT: ret
3978 entry:
3979 %c = fptosi <2 x half> %a to <2 x i64>
3980 ret <2 x i64> %c
3981 }
3983 define <2 x i64> @fptou_v2f16_v2i64(<2 x half> %a) {
3984 ; CHECK-SD-NOFP16-LABEL: fptou_v2f16_v2i64:
3985 ; CHECK-SD-NOFP16: // %bb.0: // %entry
3986 ; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
3987 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[1]
3988 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
3989 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
3990 ; CHECK-SD-NOFP16-NEXT: fcvtzu x8, s0
3991 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s1
3992 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
3993 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x9
3994 ; CHECK-SD-NOFP16-NEXT: ret
3995 ;
3996 ; CHECK-SD-FP16-LABEL: fptou_v2f16_v2i64:
3997 ; CHECK-SD-FP16: // %bb.0: // %entry
3998 ; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
3999 ; CHECK-SD-FP16-NEXT: mov h1, v0.h[1]
4000 ; CHECK-SD-FP16-NEXT: fcvtzu x8, h0
4001 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h1
4002 ; CHECK-SD-FP16-NEXT: fmov d0, x8
4003 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x9
4004 ; CHECK-SD-FP16-NEXT: ret
4005 ;
4006 ; CHECK-GI-NOFP16-LABEL: fptou_v2f16_v2i64:
4007 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4008 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4009 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.2d, v0.2s
4010 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.2d, v0.2d
4011 ; CHECK-GI-NOFP16-NEXT: ret
4012 ;
4013 ; CHECK-GI-FP16-LABEL: fptou_v2f16_v2i64:
4014 ; CHECK-GI-FP16: // %bb.0: // %entry
4015 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
4016 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
4017 ; CHECK-GI-FP16-NEXT: fcvt d0, h0
4018 ; CHECK-GI-FP16-NEXT: fcvt d1, h1
4019 ; CHECK-GI-FP16-NEXT: mov v0.d[1], v1.d[0]
4020 ; CHECK-GI-FP16-NEXT: fcvtzu v0.2d, v0.2d
4021 ; CHECK-GI-FP16-NEXT: ret
4022 entry:
4023 %c = fptoui <2 x half> %a to <2 x i64>
4024 ret <2 x i64> %c
4025 }
4027 define <3 x i64> @fptos_v3f16_v3i64(<3 x half> %a) {
4028 ; CHECK-SD-NOFP16-LABEL: fptos_v3f16_v3i64:
4029 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4030 ; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
4031 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[1]
4032 ; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[2]
4033 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
4034 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4035 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
4036 ; CHECK-SD-NOFP16-NEXT: fcvtzs x8, s0
4037 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s1
4038 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s2
4039 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
4040 ; CHECK-SD-NOFP16-NEXT: fmov d1, x9
4041 ; CHECK-SD-NOFP16-NEXT: fmov d2, x10
4042 ; CHECK-SD-NOFP16-NEXT: ret
4043 ;
4044 ; CHECK-SD-FP16-LABEL: fptos_v3f16_v3i64:
4045 ; CHECK-SD-FP16: // %bb.0: // %entry
4046 ; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
4047 ; CHECK-SD-FP16-NEXT: mov h1, v0.h[1]
4048 ; CHECK-SD-FP16-NEXT: mov h2, v0.h[2]
4049 ; CHECK-SD-FP16-NEXT: fcvtzs x8, h0
4050 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h1
4051 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h2
4052 ; CHECK-SD-FP16-NEXT: fmov d0, x8
4053 ; CHECK-SD-FP16-NEXT: fmov d1, x9
4054 ; CHECK-SD-FP16-NEXT: fmov d2, x10
4055 ; CHECK-SD-FP16-NEXT: ret
4056 ;
4057 ; CHECK-GI-NOFP16-LABEL: fptos_v3f16_v3i64:
4058 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4059 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4060 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.2d, v0.2s
4061 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.2d, v0.4s
4062 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.2d, v1.2d
4063 ; CHECK-GI-NOFP16-NEXT: fcvtzs v2.2d, v2.2d
4064 ; CHECK-GI-NOFP16-NEXT: // kill: def $d2 killed $d2 killed $q2
4065 ; CHECK-GI-NOFP16-NEXT: mov d1, v0.d[1]
4066 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
4067 ; CHECK-GI-NOFP16-NEXT: ret
4068 ;
4069 ; CHECK-GI-FP16-LABEL: fptos_v3f16_v3i64:
4070 ; CHECK-GI-FP16: // %bb.0: // %entry
4071 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
4072 ; CHECK-GI-FP16-NEXT: mov h2, v0.h[1]
4073 ; CHECK-GI-FP16-NEXT: fcvt d1, h0
4074 ; CHECK-GI-FP16-NEXT: mov h3, v0.h[2]
4075 ; CHECK-GI-FP16-NEXT: fcvt d0, h0
4076 ; CHECK-GI-FP16-NEXT: fcvt d2, h2
4077 ; CHECK-GI-FP16-NEXT: mov v0.d[1], v2.d[0]
4078 ; CHECK-GI-FP16-NEXT: fcvt d2, h3
4079 ; CHECK-GI-FP16-NEXT: fcvtzs v0.2d, v0.2d
4080 ; CHECK-GI-FP16-NEXT: mov v2.d[1], v1.d[0]
4081 ; CHECK-GI-FP16-NEXT: mov d1, v0.d[1]
4082 ; CHECK-GI-FP16-NEXT: fcvtzs v2.2d, v2.2d
4083 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 killed $q0
4084 ; CHECK-GI-FP16-NEXT: // kill: def $d2 killed $d2 killed $q2
4085 ; CHECK-GI-FP16-NEXT: ret
4086 entry:
4087 %c = fptosi <3 x half> %a to <3 x i64>
4088 ret <3 x i64> %c
4089 }
4091 define <3 x i64> @fptou_v3f16_v3i64(<3 x half> %a) {
4092 ; CHECK-SD-NOFP16-LABEL: fptou_v3f16_v3i64:
4093 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4094 ; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
4095 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[1]
4096 ; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[2]
4097 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
4098 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4099 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
4100 ; CHECK-SD-NOFP16-NEXT: fcvtzu x8, s0
4101 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s1
4102 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s2
4103 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
4104 ; CHECK-SD-NOFP16-NEXT: fmov d1, x9
4105 ; CHECK-SD-NOFP16-NEXT: fmov d2, x10
4106 ; CHECK-SD-NOFP16-NEXT: ret
4107 ;
4108 ; CHECK-SD-FP16-LABEL: fptou_v3f16_v3i64:
4109 ; CHECK-SD-FP16: // %bb.0: // %entry
4110 ; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
4111 ; CHECK-SD-FP16-NEXT: mov h1, v0.h[1]
4112 ; CHECK-SD-FP16-NEXT: mov h2, v0.h[2]
4113 ; CHECK-SD-FP16-NEXT: fcvtzu x8, h0
4114 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h1
4115 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h2
4116 ; CHECK-SD-FP16-NEXT: fmov d0, x8
4117 ; CHECK-SD-FP16-NEXT: fmov d1, x9
4118 ; CHECK-SD-FP16-NEXT: fmov d2, x10
4119 ; CHECK-SD-FP16-NEXT: ret
4120 ;
4121 ; CHECK-GI-NOFP16-LABEL: fptou_v3f16_v3i64:
4122 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4123 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4124 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.2d, v0.2s
4125 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.2d, v0.4s
4126 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.2d, v1.2d
4127 ; CHECK-GI-NOFP16-NEXT: fcvtzu v2.2d, v2.2d
4128 ; CHECK-GI-NOFP16-NEXT: // kill: def $d2 killed $d2 killed $q2
4129 ; CHECK-GI-NOFP16-NEXT: mov d1, v0.d[1]
4130 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
4131 ; CHECK-GI-NOFP16-NEXT: ret
4132 ;
4133 ; CHECK-GI-FP16-LABEL: fptou_v3f16_v3i64:
4134 ; CHECK-GI-FP16: // %bb.0: // %entry
4135 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
4136 ; CHECK-GI-FP16-NEXT: mov h2, v0.h[1]
4137 ; CHECK-GI-FP16-NEXT: fcvt d1, h0
4138 ; CHECK-GI-FP16-NEXT: mov h3, v0.h[2]
4139 ; CHECK-GI-FP16-NEXT: fcvt d0, h0
4140 ; CHECK-GI-FP16-NEXT: fcvt d2, h2
4141 ; CHECK-GI-FP16-NEXT: mov v0.d[1], v2.d[0]
4142 ; CHECK-GI-FP16-NEXT: fcvt d2, h3
4143 ; CHECK-GI-FP16-NEXT: fcvtzu v0.2d, v0.2d
4144 ; CHECK-GI-FP16-NEXT: mov v2.d[1], v1.d[0]
4145 ; CHECK-GI-FP16-NEXT: mov d1, v0.d[1]
4146 ; CHECK-GI-FP16-NEXT: fcvtzu v2.2d, v2.2d
4147 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 killed $q0
4148 ; CHECK-GI-FP16-NEXT: // kill: def $d2 killed $d2 killed $q2
4149 ; CHECK-GI-FP16-NEXT: ret
4150 entry:
4151 %c = fptoui <3 x half> %a to <3 x i64>
4152 ret <3 x i64> %c
4153 }
4155 define <4 x i64> @fptos_v4f16_v4i64(<4 x half> %a) {
4156 ; CHECK-SD-NOFP16-LABEL: fptos_v4f16_v4i64:
4157 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4158 ; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
4159 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[2]
4160 ; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[1]
4161 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[3]
4162 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
4163 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4164 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
4165 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
4166 ; CHECK-SD-NOFP16-NEXT: fcvtzs x8, s0
4167 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s1
4168 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s2
4169 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s3
4170 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
4171 ; CHECK-SD-NOFP16-NEXT: fmov d1, x9
4172 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x10
4173 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x11
4174 ; CHECK-SD-NOFP16-NEXT: ret
4175 ;
4176 ; CHECK-SD-FP16-LABEL: fptos_v4f16_v4i64:
4177 ; CHECK-SD-FP16: // %bb.0: // %entry
4178 ; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
4179 ; CHECK-SD-FP16-NEXT: mov h1, v0.h[2]
4180 ; CHECK-SD-FP16-NEXT: mov h2, v0.h[1]
4181 ; CHECK-SD-FP16-NEXT: mov h3, v0.h[3]
4182 ; CHECK-SD-FP16-NEXT: fcvtzs x8, h0
4183 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h1
4184 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h2
4185 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h3
4186 ; CHECK-SD-FP16-NEXT: fmov d0, x8
4187 ; CHECK-SD-FP16-NEXT: fmov d1, x9
4188 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x10
4189 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x11
4190 ; CHECK-SD-FP16-NEXT: ret
4191 ;
4192 ; CHECK-GI-NOFP16-LABEL: fptos_v4f16_v4i64:
4193 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4194 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4195 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.2d, v0.2s
4196 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.2d, v0.4s
4197 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.2d, v1.2d
4198 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.2d, v2.2d
4199 ; CHECK-GI-NOFP16-NEXT: ret
4200 ;
4201 ; CHECK-GI-FP16-LABEL: fptos_v4f16_v4i64:
4202 ; CHECK-GI-FP16: // %bb.0: // %entry
4203 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
4204 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
4205 ; CHECK-GI-FP16-NEXT: mov h2, v0.h[2]
4206 ; CHECK-GI-FP16-NEXT: mov h3, v0.h[3]
4207 ; CHECK-GI-FP16-NEXT: fcvt d0, h0
4208 ; CHECK-GI-FP16-NEXT: fcvt d1, h1
4209 ; CHECK-GI-FP16-NEXT: fcvt d2, h2
4210 ; CHECK-GI-FP16-NEXT: fcvt d3, h3
4211 ; CHECK-GI-FP16-NEXT: mov v0.d[1], v1.d[0]
4212 ; CHECK-GI-FP16-NEXT: mov v2.d[1], v3.d[0]
4213 ; CHECK-GI-FP16-NEXT: fcvtzs v0.2d, v0.2d
4214 ; CHECK-GI-FP16-NEXT: fcvtzs v1.2d, v2.2d
4215 ; CHECK-GI-FP16-NEXT: ret
4216 entry:
4217 %c = fptosi <4 x half> %a to <4 x i64>
4218 ret <4 x i64> %c
4219 }
4221 define <4 x i64> @fptou_v4f16_v4i64(<4 x half> %a) {
4222 ; CHECK-SD-NOFP16-LABEL: fptou_v4f16_v4i64:
4223 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4224 ; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
4225 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[2]
4226 ; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[1]
4227 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[3]
4228 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
4229 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4230 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
4231 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
4232 ; CHECK-SD-NOFP16-NEXT: fcvtzu x8, s0
4233 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s1
4234 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s2
4235 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s3
4236 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
4237 ; CHECK-SD-NOFP16-NEXT: fmov d1, x9
4238 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x10
4239 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x11
4240 ; CHECK-SD-NOFP16-NEXT: ret
4241 ;
4242 ; CHECK-SD-FP16-LABEL: fptou_v4f16_v4i64:
4243 ; CHECK-SD-FP16: // %bb.0: // %entry
4244 ; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
4245 ; CHECK-SD-FP16-NEXT: mov h1, v0.h[2]
4246 ; CHECK-SD-FP16-NEXT: mov h2, v0.h[1]
4247 ; CHECK-SD-FP16-NEXT: mov h3, v0.h[3]
4248 ; CHECK-SD-FP16-NEXT: fcvtzu x8, h0
4249 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h1
4250 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h2
4251 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h3
4252 ; CHECK-SD-FP16-NEXT: fmov d0, x8
4253 ; CHECK-SD-FP16-NEXT: fmov d1, x9
4254 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x10
4255 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x11
4256 ; CHECK-SD-FP16-NEXT: ret
4257 ;
4258 ; CHECK-GI-NOFP16-LABEL: fptou_v4f16_v4i64:
4259 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4260 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
4261 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.2d, v0.2s
4262 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.2d, v0.4s
4263 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.2d, v1.2d
4264 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.2d, v2.2d
4265 ; CHECK-GI-NOFP16-NEXT: ret
4266 ;
4267 ; CHECK-GI-FP16-LABEL: fptou_v4f16_v4i64:
4268 ; CHECK-GI-FP16: // %bb.0: // %entry
4269 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
4270 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
4271 ; CHECK-GI-FP16-NEXT: mov h2, v0.h[2]
4272 ; CHECK-GI-FP16-NEXT: mov h3, v0.h[3]
4273 ; CHECK-GI-FP16-NEXT: fcvt d0, h0
4274 ; CHECK-GI-FP16-NEXT: fcvt d1, h1
4275 ; CHECK-GI-FP16-NEXT: fcvt d2, h2
4276 ; CHECK-GI-FP16-NEXT: fcvt d3, h3
4277 ; CHECK-GI-FP16-NEXT: mov v0.d[1], v1.d[0]
4278 ; CHECK-GI-FP16-NEXT: mov v2.d[1], v3.d[0]
4279 ; CHECK-GI-FP16-NEXT: fcvtzu v0.2d, v0.2d
4280 ; CHECK-GI-FP16-NEXT: fcvtzu v1.2d, v2.2d
4281 ; CHECK-GI-FP16-NEXT: ret
4282 entry:
4283 %c = fptoui <4 x half> %a to <4 x i64>
4284 ret <4 x i64> %c
4285 }
4287 define <8 x i64> @fptos_v8f16_v8i64(<8 x half> %a) {
4288 ; CHECK-SD-NOFP16-LABEL: fptos_v8f16_v8i64:
4289 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4290 ; CHECK-SD-NOFP16-NEXT: ext v1.16b, v0.16b, v0.16b, #8
4291 ; CHECK-SD-NOFP16-NEXT: mov h4, v0.h[2]
4292 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[1]
4293 ; CHECK-SD-NOFP16-NEXT: mov h7, v0.h[3]
4294 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
4295 ; CHECK-SD-NOFP16-NEXT: mov h2, v1.h[2]
4296 ; CHECK-SD-NOFP16-NEXT: mov h5, v1.h[1]
4297 ; CHECK-SD-NOFP16-NEXT: mov h6, v1.h[3]
4298 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4299 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
4300 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
4301 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h7
4302 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s0
4303 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
4304 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
4305 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h6
4306 ; CHECK-SD-NOFP16-NEXT: fcvtzs x8, s1
4307 ; CHECK-SD-NOFP16-NEXT: fcvtzs x12, s4
4308 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s3
4309 ; CHECK-SD-NOFP16-NEXT: fcvtzs x15, s7
4310 ; CHECK-SD-NOFP16-NEXT: fmov d0, x9
4311 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s2
4312 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s5
4313 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s6
4314 ; CHECK-SD-NOFP16-NEXT: fmov d2, x8
4315 ; CHECK-SD-NOFP16-NEXT: fmov d1, x12
4316 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x11
4317 ; CHECK-SD-NOFP16-NEXT: fmov d3, x10
4318 ; CHECK-SD-NOFP16-NEXT: mov v2.d[1], x13
4319 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x15
4320 ; CHECK-SD-NOFP16-NEXT: mov v3.d[1], x14
4321 ; CHECK-SD-NOFP16-NEXT: ret
4322 ;
4323 ; CHECK-SD-FP16-LABEL: fptos_v8f16_v8i64:
4324 ; CHECK-SD-FP16: // %bb.0: // %entry
4325 ; CHECK-SD-FP16-NEXT: ext v1.16b, v0.16b, v0.16b, #8
4326 ; CHECK-SD-FP16-NEXT: mov h4, v0.h[2]
4327 ; CHECK-SD-FP16-NEXT: mov h3, v0.h[1]
4328 ; CHECK-SD-FP16-NEXT: mov h7, v0.h[3]
4329 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h0
4330 ; CHECK-SD-FP16-NEXT: mov h2, v1.h[2]
4331 ; CHECK-SD-FP16-NEXT: mov h5, v1.h[1]
4332 ; CHECK-SD-FP16-NEXT: mov h6, v1.h[3]
4333 ; CHECK-SD-FP16-NEXT: fcvtzs x8, h1
4334 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h4
4335 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h3
4336 ; CHECK-SD-FP16-NEXT: fcvtzs x15, h7
4337 ; CHECK-SD-FP16-NEXT: fmov d0, x9
4338 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h2
4339 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h5
4340 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h6
4341 ; CHECK-SD-FP16-NEXT: fmov d2, x8
4342 ; CHECK-SD-FP16-NEXT: fmov d1, x12
4343 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x11
4344 ; CHECK-SD-FP16-NEXT: fmov d3, x10
4345 ; CHECK-SD-FP16-NEXT: mov v2.d[1], x13
4346 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x15
4347 ; CHECK-SD-FP16-NEXT: mov v3.d[1], x14
4348 ; CHECK-SD-FP16-NEXT: ret
4349 ;
4350 ; CHECK-GI-NOFP16-LABEL: fptos_v8f16_v8i64:
4351 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4352 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v0.4h
4353 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
4354 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.2d, v1.2s
4355 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.2d, v1.4s
4356 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.2d, v0.2s
4357 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v4.2d, v0.4s
4358 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.2d, v2.2d
4359 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.2d, v1.2d
4360 ; CHECK-GI-NOFP16-NEXT: fcvtzs v2.2d, v3.2d
4361 ; CHECK-GI-NOFP16-NEXT: fcvtzs v3.2d, v4.2d
4362 ; CHECK-GI-NOFP16-NEXT: ret
4363 ;
4364 ; CHECK-GI-FP16-LABEL: fptos_v8f16_v8i64:
4365 ; CHECK-GI-FP16: // %bb.0: // %entry
4366 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
4367 ; CHECK-GI-FP16-NEXT: mov h2, v0.h[2]
4368 ; CHECK-GI-FP16-NEXT: mov h3, v0.h[3]
4369 ; CHECK-GI-FP16-NEXT: mov h4, v0.h[4]
4370 ; CHECK-GI-FP16-NEXT: mov h5, v0.h[5]
4371 ; CHECK-GI-FP16-NEXT: mov h6, v0.h[6]
4372 ; CHECK-GI-FP16-NEXT: mov h7, v0.h[7]
4373 ; CHECK-GI-FP16-NEXT: fcvt d0, h0
4374 ; CHECK-GI-FP16-NEXT: fcvt d1, h1
4375 ; CHECK-GI-FP16-NEXT: fcvt d2, h2
4376 ; CHECK-GI-FP16-NEXT: fcvt d3, h3
4377 ; CHECK-GI-FP16-NEXT: fcvt d4, h4
4378 ; CHECK-GI-FP16-NEXT: fcvt d5, h5
4379 ; CHECK-GI-FP16-NEXT: fcvt d6, h6
4380 ; CHECK-GI-FP16-NEXT: fcvt d7, h7
4381 ; CHECK-GI-FP16-NEXT: mov v0.d[1], v1.d[0]
4382 ; CHECK-GI-FP16-NEXT: mov v2.d[1], v3.d[0]
4383 ; CHECK-GI-FP16-NEXT: mov v4.d[1], v5.d[0]
4384 ; CHECK-GI-FP16-NEXT: mov v6.d[1], v7.d[0]
4385 ; CHECK-GI-FP16-NEXT: fcvtzs v0.2d, v0.2d
4386 ; CHECK-GI-FP16-NEXT: fcvtzs v1.2d, v2.2d
4387 ; CHECK-GI-FP16-NEXT: fcvtzs v2.2d, v4.2d
4388 ; CHECK-GI-FP16-NEXT: fcvtzs v3.2d, v6.2d
4389 ; CHECK-GI-FP16-NEXT: ret
4390 entry:
4391 %c = fptosi <8 x half> %a to <8 x i64>
4392 ret <8 x i64> %c
4393 }
4395 define <8 x i64> @fptou_v8f16_v8i64(<8 x half> %a) {
4396 ; CHECK-SD-NOFP16-LABEL: fptou_v8f16_v8i64:
4397 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4398 ; CHECK-SD-NOFP16-NEXT: ext v1.16b, v0.16b, v0.16b, #8
4399 ; CHECK-SD-NOFP16-NEXT: mov h4, v0.h[2]
4400 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[1]
4401 ; CHECK-SD-NOFP16-NEXT: mov h7, v0.h[3]
4402 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
4403 ; CHECK-SD-NOFP16-NEXT: mov h2, v1.h[2]
4404 ; CHECK-SD-NOFP16-NEXT: mov h5, v1.h[1]
4405 ; CHECK-SD-NOFP16-NEXT: mov h6, v1.h[3]
4406 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4407 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
4408 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
4409 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h7
4410 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s0
4411 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
4412 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
4413 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h6
4414 ; CHECK-SD-NOFP16-NEXT: fcvtzu x8, s1
4415 ; CHECK-SD-NOFP16-NEXT: fcvtzu x12, s4
4416 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s3
4417 ; CHECK-SD-NOFP16-NEXT: fcvtzu x15, s7
4418 ; CHECK-SD-NOFP16-NEXT: fmov d0, x9
4419 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s2
4420 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s5
4421 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s6
4422 ; CHECK-SD-NOFP16-NEXT: fmov d2, x8
4423 ; CHECK-SD-NOFP16-NEXT: fmov d1, x12
4424 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x11
4425 ; CHECK-SD-NOFP16-NEXT: fmov d3, x10
4426 ; CHECK-SD-NOFP16-NEXT: mov v2.d[1], x13
4427 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x15
4428 ; CHECK-SD-NOFP16-NEXT: mov v3.d[1], x14
4429 ; CHECK-SD-NOFP16-NEXT: ret
4430 ;
4431 ; CHECK-SD-FP16-LABEL: fptou_v8f16_v8i64:
4432 ; CHECK-SD-FP16: // %bb.0: // %entry
4433 ; CHECK-SD-FP16-NEXT: ext v1.16b, v0.16b, v0.16b, #8
4434 ; CHECK-SD-FP16-NEXT: mov h4, v0.h[2]
4435 ; CHECK-SD-FP16-NEXT: mov h3, v0.h[1]
4436 ; CHECK-SD-FP16-NEXT: mov h7, v0.h[3]
4437 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h0
4438 ; CHECK-SD-FP16-NEXT: mov h2, v1.h[2]
4439 ; CHECK-SD-FP16-NEXT: mov h5, v1.h[1]
4440 ; CHECK-SD-FP16-NEXT: mov h6, v1.h[3]
4441 ; CHECK-SD-FP16-NEXT: fcvtzu x8, h1
4442 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h4
4443 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h3
4444 ; CHECK-SD-FP16-NEXT: fcvtzu x15, h7
4445 ; CHECK-SD-FP16-NEXT: fmov d0, x9
4446 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h2
4447 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h5
4448 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h6
4449 ; CHECK-SD-FP16-NEXT: fmov d2, x8
4450 ; CHECK-SD-FP16-NEXT: fmov d1, x12
4451 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x11
4452 ; CHECK-SD-FP16-NEXT: fmov d3, x10
4453 ; CHECK-SD-FP16-NEXT: mov v2.d[1], x13
4454 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x15
4455 ; CHECK-SD-FP16-NEXT: mov v3.d[1], x14
4456 ; CHECK-SD-FP16-NEXT: ret
4457 ;
4458 ; CHECK-GI-NOFP16-LABEL: fptou_v8f16_v8i64:
4459 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4460 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v0.4h
4461 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
4462 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.2d, v1.2s
4463 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.2d, v1.4s
4464 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.2d, v0.2s
4465 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v4.2d, v0.4s
4466 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.2d, v2.2d
4467 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.2d, v1.2d
4468 ; CHECK-GI-NOFP16-NEXT: fcvtzu v2.2d, v3.2d
4469 ; CHECK-GI-NOFP16-NEXT: fcvtzu v3.2d, v4.2d
4470 ; CHECK-GI-NOFP16-NEXT: ret
4471 ;
4472 ; CHECK-GI-FP16-LABEL: fptou_v8f16_v8i64:
4473 ; CHECK-GI-FP16: // %bb.0: // %entry
4474 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
4475 ; CHECK-GI-FP16-NEXT: mov h2, v0.h[2]
4476 ; CHECK-GI-FP16-NEXT: mov h3, v0.h[3]
4477 ; CHECK-GI-FP16-NEXT: mov h4, v0.h[4]
4478 ; CHECK-GI-FP16-NEXT: mov h5, v0.h[5]
4479 ; CHECK-GI-FP16-NEXT: mov h6, v0.h[6]
4480 ; CHECK-GI-FP16-NEXT: mov h7, v0.h[7]
4481 ; CHECK-GI-FP16-NEXT: fcvt d0, h0
4482 ; CHECK-GI-FP16-NEXT: fcvt d1, h1
4483 ; CHECK-GI-FP16-NEXT: fcvt d2, h2
4484 ; CHECK-GI-FP16-NEXT: fcvt d3, h3
4485 ; CHECK-GI-FP16-NEXT: fcvt d4, h4
4486 ; CHECK-GI-FP16-NEXT: fcvt d5, h5
4487 ; CHECK-GI-FP16-NEXT: fcvt d6, h6
4488 ; CHECK-GI-FP16-NEXT: fcvt d7, h7
4489 ; CHECK-GI-FP16-NEXT: mov v0.d[1], v1.d[0]
4490 ; CHECK-GI-FP16-NEXT: mov v2.d[1], v3.d[0]
4491 ; CHECK-GI-FP16-NEXT: mov v4.d[1], v5.d[0]
4492 ; CHECK-GI-FP16-NEXT: mov v6.d[1], v7.d[0]
4493 ; CHECK-GI-FP16-NEXT: fcvtzu v0.2d, v0.2d
4494 ; CHECK-GI-FP16-NEXT: fcvtzu v1.2d, v2.2d
4495 ; CHECK-GI-FP16-NEXT: fcvtzu v2.2d, v4.2d
4496 ; CHECK-GI-FP16-NEXT: fcvtzu v3.2d, v6.2d
4497 ; CHECK-GI-FP16-NEXT: ret
4498 entry:
4499 %c = fptoui <8 x half> %a to <8 x i64>
4500 ret <8 x i64> %c
4501 }
4503 define <16 x i64> @fptos_v16f16_v16i64(<16 x half> %a) {
4504 ; CHECK-SD-NOFP16-LABEL: fptos_v16f16_v16i64:
4505 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4506 ; CHECK-SD-NOFP16-NEXT: ext v2.16b, v0.16b, v0.16b, #8
4507 ; CHECK-SD-NOFP16-NEXT: ext v3.16b, v1.16b, v1.16b, #8
4508 ; CHECK-SD-NOFP16-NEXT: mov h4, v0.h[1]
4509 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h0
4510 ; CHECK-SD-NOFP16-NEXT: mov h18, v0.h[2]
4511 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[3]
4512 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h2
4513 ; CHECK-SD-NOFP16-NEXT: mov h7, v2.h[1]
4514 ; CHECK-SD-NOFP16-NEXT: mov h16, v2.h[2]
4515 ; CHECK-SD-NOFP16-NEXT: mov h17, v3.h[2]
4516 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h3
4517 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
4518 ; CHECK-SD-NOFP16-NEXT: fcvtzs x8, s5
4519 ; CHECK-SD-NOFP16-NEXT: mov h5, v1.h[1]
4520 ; CHECK-SD-NOFP16-NEXT: mov h2, v2.h[3]
4521 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
4522 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
4523 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s6
4524 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h7
4525 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h16
4526 ; CHECK-SD-NOFP16-NEXT: mov h16, v1.h[2]
4527 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
4528 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s19
4529 ; CHECK-SD-NOFP16-NEXT: mov h19, v3.h[1]
4530 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s4
4531 ; CHECK-SD-NOFP16-NEXT: mov h4, v1.h[3]
4532 ; CHECK-SD-NOFP16-NEXT: mov h3, v3.h[3]
4533 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4534 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
4535 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s7
4536 ; CHECK-SD-NOFP16-NEXT: fcvtzs x12, s6
4537 ; CHECK-SD-NOFP16-NEXT: fcvtzs x15, s18
4538 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h16
4539 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s17
4540 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h2
4541 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h19
4542 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
4543 ; CHECK-SD-NOFP16-NEXT: fmov d2, x9
4544 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h3
4545 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s1
4546 ; CHECK-SD-NOFP16-NEXT: fmov d6, x10
4547 ; CHECK-SD-NOFP16-NEXT: fmov d3, x13
4548 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s0
4549 ; CHECK-SD-NOFP16-NEXT: fcvtzs x16, s5
4550 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s7
4551 ; CHECK-SD-NOFP16-NEXT: fmov d7, x14
4552 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s16
4553 ; CHECK-SD-NOFP16-NEXT: fcvtzs x17, s17
4554 ; CHECK-SD-NOFP16-NEXT: fcvtzs x0, s4
4555 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
4556 ; CHECK-SD-NOFP16-NEXT: fcvtzs x18, s19
4557 ; CHECK-SD-NOFP16-NEXT: fmov d1, x15
4558 ; CHECK-SD-NOFP16-NEXT: fmov d4, x9
4559 ; CHECK-SD-NOFP16-NEXT: mov v2.d[1], x12
4560 ; CHECK-SD-NOFP16-NEXT: fmov d5, x10
4561 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x11
4562 ; CHECK-SD-NOFP16-NEXT: mov v3.d[1], x14
4563 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x13
4564 ; CHECK-SD-NOFP16-NEXT: mov v4.d[1], x16
4565 ; CHECK-SD-NOFP16-NEXT: mov v6.d[1], x17
4566 ; CHECK-SD-NOFP16-NEXT: mov v7.d[1], x18
4567 ; CHECK-SD-NOFP16-NEXT: mov v5.d[1], x0
4568 ; CHECK-SD-NOFP16-NEXT: ret
4569 ;
4570 ; CHECK-SD-FP16-LABEL: fptos_v16f16_v16i64:
4571 ; CHECK-SD-FP16: // %bb.0: // %entry
4572 ; CHECK-SD-FP16-NEXT: ext v2.16b, v0.16b, v0.16b, #8
4573 ; CHECK-SD-FP16-NEXT: ext v3.16b, v1.16b, v1.16b, #8
4574 ; CHECK-SD-FP16-NEXT: mov h4, v0.h[1]
4575 ; CHECK-SD-FP16-NEXT: mov h5, v0.h[2]
4576 ; CHECK-SD-FP16-NEXT: fcvtzs x8, h0
4577 ; CHECK-SD-FP16-NEXT: mov h0, v0.h[3]
4578 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h1
4579 ; CHECK-SD-FP16-NEXT: mov h7, v1.h[1]
4580 ; CHECK-SD-FP16-NEXT: mov h6, v2.h[2]
4581 ; CHECK-SD-FP16-NEXT: mov h16, v3.h[2]
4582 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h4
4583 ; CHECK-SD-FP16-NEXT: mov h4, v1.h[2]
4584 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h2
4585 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h5
4586 ; CHECK-SD-FP16-NEXT: mov h5, v2.h[1]
4587 ; CHECK-SD-FP16-NEXT: mov h17, v2.h[3]
4588 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h3
4589 ; CHECK-SD-FP16-NEXT: mov h18, v3.h[1]
4590 ; CHECK-SD-FP16-NEXT: mov h1, v1.h[3]
4591 ; CHECK-SD-FP16-NEXT: mov h19, v3.h[3]
4592 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h6
4593 ; CHECK-SD-FP16-NEXT: fcvtzs x15, h16
4594 ; CHECK-SD-FP16-NEXT: fcvtzs x16, h0
4595 ; CHECK-SD-FP16-NEXT: fcvtzs x0, h4
4596 ; CHECK-SD-FP16-NEXT: fcvtzs x17, h7
4597 ; CHECK-SD-FP16-NEXT: fmov d2, x11
4598 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h5
4599 ; CHECK-SD-FP16-NEXT: fcvtzs x18, h17
4600 ; CHECK-SD-FP16-NEXT: fmov d6, x13
4601 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h18
4602 ; CHECK-SD-FP16-NEXT: fmov d0, x8
4603 ; CHECK-SD-FP16-NEXT: fmov d4, x9
4604 ; CHECK-SD-FP16-NEXT: fmov d3, x14
4605 ; CHECK-SD-FP16-NEXT: fmov d7, x15
4606 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h19
4607 ; CHECK-SD-FP16-NEXT: fcvtzs x15, h1
4608 ; CHECK-SD-FP16-NEXT: fmov d1, x12
4609 ; CHECK-SD-FP16-NEXT: fmov d5, x0
4610 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x10
4611 ; CHECK-SD-FP16-NEXT: mov v4.d[1], x17
4612 ; CHECK-SD-FP16-NEXT: mov v2.d[1], x11
4613 ; CHECK-SD-FP16-NEXT: mov v3.d[1], x18
4614 ; CHECK-SD-FP16-NEXT: mov v6.d[1], x13
4615 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x16
4616 ; CHECK-SD-FP16-NEXT: mov v7.d[1], x14
4617 ; CHECK-SD-FP16-NEXT: mov v5.d[1], x15
4618 ; CHECK-SD-FP16-NEXT: ret
4619 ;
4620 ; CHECK-GI-NOFP16-LABEL: fptos_v16f16_v16i64:
4621 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4622 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v0.4h
4623 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
4624 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.4s, v1.4h
4625 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
4626 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.2d, v2.2s
4627 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.2d, v2.4s
4628 ; CHECK-GI-NOFP16-NEXT: fcvtl v5.2d, v0.2s
4629 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v6.2d, v0.4s
4630 ; CHECK-GI-NOFP16-NEXT: fcvtl v7.2d, v3.2s
4631 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v16.2d, v3.4s
4632 ; CHECK-GI-NOFP16-NEXT: fcvtl v17.2d, v1.2s
4633 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v18.2d, v1.4s
4634 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.2d, v4.2d
4635 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.2d, v2.2d
4636 ; CHECK-GI-NOFP16-NEXT: fcvtzs v2.2d, v5.2d
4637 ; CHECK-GI-NOFP16-NEXT: fcvtzs v3.2d, v6.2d
4638 ; CHECK-GI-NOFP16-NEXT: fcvtzs v4.2d, v7.2d
4639 ; CHECK-GI-NOFP16-NEXT: fcvtzs v5.2d, v16.2d
4640 ; CHECK-GI-NOFP16-NEXT: fcvtzs v6.2d, v17.2d
4641 ; CHECK-GI-NOFP16-NEXT: fcvtzs v7.2d, v18.2d
4642 ; CHECK-GI-NOFP16-NEXT: ret
4643 ;
4644 ; CHECK-GI-FP16-LABEL: fptos_v16f16_v16i64:
4645 ; CHECK-GI-FP16: // %bb.0: // %entry
4646 ; CHECK-GI-FP16-NEXT: mov h3, v0.h[1]
4647 ; CHECK-GI-FP16-NEXT: mov h4, v0.h[2]
4648 ; CHECK-GI-FP16-NEXT: mov h5, v0.h[3]
4649 ; CHECK-GI-FP16-NEXT: fcvt d2, h0
4650 ; CHECK-GI-FP16-NEXT: mov h6, v0.h[4]
4651 ; CHECK-GI-FP16-NEXT: mov h7, v0.h[5]
4652 ; CHECK-GI-FP16-NEXT: mov h16, v0.h[6]
4653 ; CHECK-GI-FP16-NEXT: mov h0, v0.h[7]
4654 ; CHECK-GI-FP16-NEXT: mov h17, v1.h[1]
4655 ; CHECK-GI-FP16-NEXT: mov h18, v1.h[2]
4656 ; CHECK-GI-FP16-NEXT: mov h19, v1.h[3]
4657 ; CHECK-GI-FP16-NEXT: mov h20, v1.h[4]
4658 ; CHECK-GI-FP16-NEXT: mov h21, v1.h[5]
4659 ; CHECK-GI-FP16-NEXT: mov h22, v1.h[6]
4660 ; CHECK-GI-FP16-NEXT: mov h23, v1.h[7]
4661 ; CHECK-GI-FP16-NEXT: fcvt d3, h3
4662 ; CHECK-GI-FP16-NEXT: fcvt d4, h4
4663 ; CHECK-GI-FP16-NEXT: fcvt d5, h5
4664 ; CHECK-GI-FP16-NEXT: fcvt d6, h6
4665 ; CHECK-GI-FP16-NEXT: fcvt d7, h7
4666 ; CHECK-GI-FP16-NEXT: fcvt d16, h16
4667 ; CHECK-GI-FP16-NEXT: fcvt d0, h0
4668 ; CHECK-GI-FP16-NEXT: fcvt d24, h1
4669 ; CHECK-GI-FP16-NEXT: fcvt d1, h17
4670 ; CHECK-GI-FP16-NEXT: fcvt d17, h18
4671 ; CHECK-GI-FP16-NEXT: fcvt d18, h19
4672 ; CHECK-GI-FP16-NEXT: fcvt d19, h20
4673 ; CHECK-GI-FP16-NEXT: fcvt d20, h21
4674 ; CHECK-GI-FP16-NEXT: fcvt d21, h22
4675 ; CHECK-GI-FP16-NEXT: fcvt d22, h23
4676 ; CHECK-GI-FP16-NEXT: mov v2.d[1], v3.d[0]
4677 ; CHECK-GI-FP16-NEXT: mov v4.d[1], v5.d[0]
4678 ; CHECK-GI-FP16-NEXT: mov v6.d[1], v7.d[0]
4679 ; CHECK-GI-FP16-NEXT: mov v16.d[1], v0.d[0]
4680 ; CHECK-GI-FP16-NEXT: mov v24.d[1], v1.d[0]
4681 ; CHECK-GI-FP16-NEXT: mov v17.d[1], v18.d[0]
4682 ; CHECK-GI-FP16-NEXT: mov v19.d[1], v20.d[0]
4683 ; CHECK-GI-FP16-NEXT: mov v21.d[1], v22.d[0]
4684 ; CHECK-GI-FP16-NEXT: fcvtzs v0.2d, v2.2d
4685 ; CHECK-GI-FP16-NEXT: fcvtzs v1.2d, v4.2d
4686 ; CHECK-GI-FP16-NEXT: fcvtzs v2.2d, v6.2d
4687 ; CHECK-GI-FP16-NEXT: fcvtzs v3.2d, v16.2d
4688 ; CHECK-GI-FP16-NEXT: fcvtzs v4.2d, v24.2d
4689 ; CHECK-GI-FP16-NEXT: fcvtzs v5.2d, v17.2d
4690 ; CHECK-GI-FP16-NEXT: fcvtzs v6.2d, v19.2d
4691 ; CHECK-GI-FP16-NEXT: fcvtzs v7.2d, v21.2d
4692 ; CHECK-GI-FP16-NEXT: ret
4693 entry:
4694 %c = fptosi <16 x half> %a to <16 x i64>
4695 ret <16 x i64> %c
4696 }
4698 define <16 x i64> @fptou_v16f16_v16i64(<16 x half> %a) {
4699 ; CHECK-SD-NOFP16-LABEL: fptou_v16f16_v16i64:
4700 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4701 ; CHECK-SD-NOFP16-NEXT: ext v2.16b, v0.16b, v0.16b, #8
4702 ; CHECK-SD-NOFP16-NEXT: ext v3.16b, v1.16b, v1.16b, #8
4703 ; CHECK-SD-NOFP16-NEXT: mov h4, v0.h[1]
4704 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h0
4705 ; CHECK-SD-NOFP16-NEXT: mov h18, v0.h[2]
4706 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[3]
4707 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h2
4708 ; CHECK-SD-NOFP16-NEXT: mov h7, v2.h[1]
4709 ; CHECK-SD-NOFP16-NEXT: mov h16, v2.h[2]
4710 ; CHECK-SD-NOFP16-NEXT: mov h17, v3.h[2]
4711 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h3
4712 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
4713 ; CHECK-SD-NOFP16-NEXT: fcvtzu x8, s5
4714 ; CHECK-SD-NOFP16-NEXT: mov h5, v1.h[1]
4715 ; CHECK-SD-NOFP16-NEXT: mov h2, v2.h[3]
4716 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
4717 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
4718 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s6
4719 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h7
4720 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h16
4721 ; CHECK-SD-NOFP16-NEXT: mov h16, v1.h[2]
4722 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
4723 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s19
4724 ; CHECK-SD-NOFP16-NEXT: mov h19, v3.h[1]
4725 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s4
4726 ; CHECK-SD-NOFP16-NEXT: mov h4, v1.h[3]
4727 ; CHECK-SD-NOFP16-NEXT: mov h3, v3.h[3]
4728 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4729 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
4730 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s7
4731 ; CHECK-SD-NOFP16-NEXT: fcvtzu x12, s6
4732 ; CHECK-SD-NOFP16-NEXT: fcvtzu x15, s18
4733 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h16
4734 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s17
4735 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h2
4736 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h19
4737 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
4738 ; CHECK-SD-NOFP16-NEXT: fmov d2, x9
4739 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h3
4740 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s1
4741 ; CHECK-SD-NOFP16-NEXT: fmov d6, x10
4742 ; CHECK-SD-NOFP16-NEXT: fmov d3, x13
4743 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s0
4744 ; CHECK-SD-NOFP16-NEXT: fcvtzu x16, s5
4745 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s7
4746 ; CHECK-SD-NOFP16-NEXT: fmov d7, x14
4747 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s16
4748 ; CHECK-SD-NOFP16-NEXT: fcvtzu x17, s17
4749 ; CHECK-SD-NOFP16-NEXT: fcvtzu x0, s4
4750 ; CHECK-SD-NOFP16-NEXT: fmov d0, x8
4751 ; CHECK-SD-NOFP16-NEXT: fcvtzu x18, s19
4752 ; CHECK-SD-NOFP16-NEXT: fmov d1, x15
4753 ; CHECK-SD-NOFP16-NEXT: fmov d4, x9
4754 ; CHECK-SD-NOFP16-NEXT: mov v2.d[1], x12
4755 ; CHECK-SD-NOFP16-NEXT: fmov d5, x10
4756 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x11
4757 ; CHECK-SD-NOFP16-NEXT: mov v3.d[1], x14
4758 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x13
4759 ; CHECK-SD-NOFP16-NEXT: mov v4.d[1], x16
4760 ; CHECK-SD-NOFP16-NEXT: mov v6.d[1], x17
4761 ; CHECK-SD-NOFP16-NEXT: mov v7.d[1], x18
4762 ; CHECK-SD-NOFP16-NEXT: mov v5.d[1], x0
4763 ; CHECK-SD-NOFP16-NEXT: ret
4764 ;
4765 ; CHECK-SD-FP16-LABEL: fptou_v16f16_v16i64:
4766 ; CHECK-SD-FP16: // %bb.0: // %entry
4767 ; CHECK-SD-FP16-NEXT: ext v2.16b, v0.16b, v0.16b, #8
4768 ; CHECK-SD-FP16-NEXT: ext v3.16b, v1.16b, v1.16b, #8
4769 ; CHECK-SD-FP16-NEXT: mov h4, v0.h[1]
4770 ; CHECK-SD-FP16-NEXT: mov h5, v0.h[2]
4771 ; CHECK-SD-FP16-NEXT: fcvtzu x8, h0
4772 ; CHECK-SD-FP16-NEXT: mov h0, v0.h[3]
4773 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h1
4774 ; CHECK-SD-FP16-NEXT: mov h7, v1.h[1]
4775 ; CHECK-SD-FP16-NEXT: mov h6, v2.h[2]
4776 ; CHECK-SD-FP16-NEXT: mov h16, v3.h[2]
4777 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h4
4778 ; CHECK-SD-FP16-NEXT: mov h4, v1.h[2]
4779 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h2
4780 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h5
4781 ; CHECK-SD-FP16-NEXT: mov h5, v2.h[1]
4782 ; CHECK-SD-FP16-NEXT: mov h17, v2.h[3]
4783 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h3
4784 ; CHECK-SD-FP16-NEXT: mov h18, v3.h[1]
4785 ; CHECK-SD-FP16-NEXT: mov h1, v1.h[3]
4786 ; CHECK-SD-FP16-NEXT: mov h19, v3.h[3]
4787 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h6
4788 ; CHECK-SD-FP16-NEXT: fcvtzu x15, h16
4789 ; CHECK-SD-FP16-NEXT: fcvtzu x16, h0
4790 ; CHECK-SD-FP16-NEXT: fcvtzu x0, h4
4791 ; CHECK-SD-FP16-NEXT: fcvtzu x17, h7
4792 ; CHECK-SD-FP16-NEXT: fmov d2, x11
4793 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h5
4794 ; CHECK-SD-FP16-NEXT: fcvtzu x18, h17
4795 ; CHECK-SD-FP16-NEXT: fmov d6, x13
4796 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h18
4797 ; CHECK-SD-FP16-NEXT: fmov d0, x8
4798 ; CHECK-SD-FP16-NEXT: fmov d4, x9
4799 ; CHECK-SD-FP16-NEXT: fmov d3, x14
4800 ; CHECK-SD-FP16-NEXT: fmov d7, x15
4801 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h19
4802 ; CHECK-SD-FP16-NEXT: fcvtzu x15, h1
4803 ; CHECK-SD-FP16-NEXT: fmov d1, x12
4804 ; CHECK-SD-FP16-NEXT: fmov d5, x0
4805 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x10
4806 ; CHECK-SD-FP16-NEXT: mov v4.d[1], x17
4807 ; CHECK-SD-FP16-NEXT: mov v2.d[1], x11
4808 ; CHECK-SD-FP16-NEXT: mov v3.d[1], x18
4809 ; CHECK-SD-FP16-NEXT: mov v6.d[1], x13
4810 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x16
4811 ; CHECK-SD-FP16-NEXT: mov v7.d[1], x14
4812 ; CHECK-SD-FP16-NEXT: mov v5.d[1], x15
4813 ; CHECK-SD-FP16-NEXT: ret
4814 ;
4815 ; CHECK-GI-NOFP16-LABEL: fptou_v16f16_v16i64:
4816 ; CHECK-GI-NOFP16: // %bb.0: // %entry
4817 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v0.4h
4818 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
4819 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.4s, v1.4h
4820 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
4821 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.2d, v2.2s
4822 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.2d, v2.4s
4823 ; CHECK-GI-NOFP16-NEXT: fcvtl v5.2d, v0.2s
4824 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v6.2d, v0.4s
4825 ; CHECK-GI-NOFP16-NEXT: fcvtl v7.2d, v3.2s
4826 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v16.2d, v3.4s
4827 ; CHECK-GI-NOFP16-NEXT: fcvtl v17.2d, v1.2s
4828 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v18.2d, v1.4s
4829 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.2d, v4.2d
4830 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.2d, v2.2d
4831 ; CHECK-GI-NOFP16-NEXT: fcvtzu v2.2d, v5.2d
4832 ; CHECK-GI-NOFP16-NEXT: fcvtzu v3.2d, v6.2d
4833 ; CHECK-GI-NOFP16-NEXT: fcvtzu v4.2d, v7.2d
4834 ; CHECK-GI-NOFP16-NEXT: fcvtzu v5.2d, v16.2d
4835 ; CHECK-GI-NOFP16-NEXT: fcvtzu v6.2d, v17.2d
4836 ; CHECK-GI-NOFP16-NEXT: fcvtzu v7.2d, v18.2d
4837 ; CHECK-GI-NOFP16-NEXT: ret
4838 ;
4839 ; CHECK-GI-FP16-LABEL: fptou_v16f16_v16i64:
4840 ; CHECK-GI-FP16: // %bb.0: // %entry
4841 ; CHECK-GI-FP16-NEXT: mov h3, v0.h[1]
4842 ; CHECK-GI-FP16-NEXT: mov h4, v0.h[2]
4843 ; CHECK-GI-FP16-NEXT: mov h5, v0.h[3]
4844 ; CHECK-GI-FP16-NEXT: fcvt d2, h0
4845 ; CHECK-GI-FP16-NEXT: mov h6, v0.h[4]
4846 ; CHECK-GI-FP16-NEXT: mov h7, v0.h[5]
4847 ; CHECK-GI-FP16-NEXT: mov h16, v0.h[6]
4848 ; CHECK-GI-FP16-NEXT: mov h0, v0.h[7]
4849 ; CHECK-GI-FP16-NEXT: mov h17, v1.h[1]
4850 ; CHECK-GI-FP16-NEXT: mov h18, v1.h[2]
4851 ; CHECK-GI-FP16-NEXT: mov h19, v1.h[3]
4852 ; CHECK-GI-FP16-NEXT: mov h20, v1.h[4]
4853 ; CHECK-GI-FP16-NEXT: mov h21, v1.h[5]
4854 ; CHECK-GI-FP16-NEXT: mov h22, v1.h[6]
4855 ; CHECK-GI-FP16-NEXT: mov h23, v1.h[7]
4856 ; CHECK-GI-FP16-NEXT: fcvt d3, h3
4857 ; CHECK-GI-FP16-NEXT: fcvt d4, h4
4858 ; CHECK-GI-FP16-NEXT: fcvt d5, h5
4859 ; CHECK-GI-FP16-NEXT: fcvt d6, h6
4860 ; CHECK-GI-FP16-NEXT: fcvt d7, h7
4861 ; CHECK-GI-FP16-NEXT: fcvt d16, h16
4862 ; CHECK-GI-FP16-NEXT: fcvt d0, h0
4863 ; CHECK-GI-FP16-NEXT: fcvt d24, h1
4864 ; CHECK-GI-FP16-NEXT: fcvt d1, h17
4865 ; CHECK-GI-FP16-NEXT: fcvt d17, h18
4866 ; CHECK-GI-FP16-NEXT: fcvt d18, h19
4867 ; CHECK-GI-FP16-NEXT: fcvt d19, h20
4868 ; CHECK-GI-FP16-NEXT: fcvt d20, h21
4869 ; CHECK-GI-FP16-NEXT: fcvt d21, h22
4870 ; CHECK-GI-FP16-NEXT: fcvt d22, h23
4871 ; CHECK-GI-FP16-NEXT: mov v2.d[1], v3.d[0]
4872 ; CHECK-GI-FP16-NEXT: mov v4.d[1], v5.d[0]
4873 ; CHECK-GI-FP16-NEXT: mov v6.d[1], v7.d[0]
4874 ; CHECK-GI-FP16-NEXT: mov v16.d[1], v0.d[0]
4875 ; CHECK-GI-FP16-NEXT: mov v24.d[1], v1.d[0]
4876 ; CHECK-GI-FP16-NEXT: mov v17.d[1], v18.d[0]
4877 ; CHECK-GI-FP16-NEXT: mov v19.d[1], v20.d[0]
4878 ; CHECK-GI-FP16-NEXT: mov v21.d[1], v22.d[0]
4879 ; CHECK-GI-FP16-NEXT: fcvtzu v0.2d, v2.2d
4880 ; CHECK-GI-FP16-NEXT: fcvtzu v1.2d, v4.2d
4881 ; CHECK-GI-FP16-NEXT: fcvtzu v2.2d, v6.2d
4882 ; CHECK-GI-FP16-NEXT: fcvtzu v3.2d, v16.2d
4883 ; CHECK-GI-FP16-NEXT: fcvtzu v4.2d, v24.2d
4884 ; CHECK-GI-FP16-NEXT: fcvtzu v5.2d, v17.2d
4885 ; CHECK-GI-FP16-NEXT: fcvtzu v6.2d, v19.2d
4886 ; CHECK-GI-FP16-NEXT: fcvtzu v7.2d, v21.2d
4887 ; CHECK-GI-FP16-NEXT: ret
4888 entry:
4889 %c = fptoui <16 x half> %a to <16 x i64>
4890 ret <16 x i64> %c
4891 }
4893 define <32 x i64> @fptos_v32f16_v32i64(<32 x half> %a) {
4894 ; CHECK-SD-NOFP16-LABEL: fptos_v32f16_v32i64:
4895 ; CHECK-SD-NOFP16: // %bb.0: // %entry
4896 ; CHECK-SD-NOFP16-NEXT: ext v4.16b, v1.16b, v1.16b, #8
4897 ; CHECK-SD-NOFP16-NEXT: ext v5.16b, v2.16b, v2.16b, #8
4898 ; CHECK-SD-NOFP16-NEXT: ext v6.16b, v3.16b, v3.16b, #8
4899 ; CHECK-SD-NOFP16-NEXT: ext v7.16b, v0.16b, v0.16b, #8
4900 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h1
4901 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h2
4902 ; CHECK-SD-NOFP16-NEXT: mov h26, v2.h[2]
4903 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h0
4904 ; CHECK-SD-NOFP16-NEXT: mov h27, v3.h[2]
4905 ; CHECK-SD-NOFP16-NEXT: mov h20, v2.h[1]
4906 ; CHECK-SD-NOFP16-NEXT: mov h18, v1.h[1]
4907 ; CHECK-SD-NOFP16-NEXT: mov h16, v4.h[2]
4908 ; CHECK-SD-NOFP16-NEXT: mov h17, v5.h[2]
4909 ; CHECK-SD-NOFP16-NEXT: fcvt s23, h5
4910 ; CHECK-SD-NOFP16-NEXT: fcvt s24, h6
4911 ; CHECK-SD-NOFP16-NEXT: mov h25, v6.h[2]
4912 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s21
4913 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s22
4914 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h7
4915 ; CHECK-SD-NOFP16-NEXT: mov h21, v3.h[3]
4916 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s19
4917 ; CHECK-SD-NOFP16-NEXT: fcvt s27, h27
4918 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h20
4919 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h16
4920 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
4921 ; CHECK-SD-NOFP16-NEXT: fcvtzs x12, s23
4922 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s24
4923 ; CHECK-SD-NOFP16-NEXT: fcvt s23, h25
4924 ; CHECK-SD-NOFP16-NEXT: fcvt s25, h26
4925 ; CHECK-SD-NOFP16-NEXT: mov h26, v3.h[1]
4926 ; CHECK-SD-NOFP16-NEXT: mov h24, v2.h[3]
4927 ; CHECK-SD-NOFP16-NEXT: fmov d19, x9
4928 ; CHECK-SD-NOFP16-NEXT: fcvtzs x9, s22
4929 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h3
4930 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h21
4931 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s16
4932 ; CHECK-SD-NOFP16-NEXT: fcvtzs x15, s17
4933 ; CHECK-SD-NOFP16-NEXT: fmov d2, x12
4934 ; CHECK-SD-NOFP16-NEXT: fmov d16, x13
4935 ; CHECK-SD-NOFP16-NEXT: fcvtzs x12, s23
4936 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s25
4937 ; CHECK-SD-NOFP16-NEXT: mov h23, v1.h[2]
4938 ; CHECK-SD-NOFP16-NEXT: fcvt s25, h26
4939 ; CHECK-SD-NOFP16-NEXT: fcvt s24, h24
4940 ; CHECK-SD-NOFP16-NEXT: mov h1, v1.h[3]
4941 ; CHECK-SD-NOFP16-NEXT: fmov d26, x11
4942 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s21
4943 ; CHECK-SD-NOFP16-NEXT: fmov d3, x14
4944 ; CHECK-SD-NOFP16-NEXT: fmov d17, x15
4945 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s22
4946 ; CHECK-SD-NOFP16-NEXT: fcvtzs x15, s27
4947 ; CHECK-SD-NOFP16-NEXT: mov h22, v0.h[2]
4948 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
4949 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h23
4950 ; CHECK-SD-NOFP16-NEXT: fmov d23, x13
4951 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s25
4952 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4953 ; CHECK-SD-NOFP16-NEXT: fmov d25, x14
4954 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s24
4955 ; CHECK-SD-NOFP16-NEXT: fmov d24, x15
4956 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h22
4957 ; CHECK-SD-NOFP16-NEXT: fcvtzs x15, s18
4958 ; CHECK-SD-NOFP16-NEXT: mov h18, v7.h[1]
4959 ; CHECK-SD-NOFP16-NEXT: mov v25.d[1], x13
4960 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s21
4961 ; CHECK-SD-NOFP16-NEXT: mov h21, v7.h[2]
4962 ; CHECK-SD-NOFP16-NEXT: mov v24.d[1], x11
4963 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s20
4964 ; CHECK-SD-NOFP16-NEXT: mov h20, v0.h[1]
4965 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[3]
4966 ; CHECK-SD-NOFP16-NEXT: mov v23.d[1], x14
4967 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s1
4968 ; CHECK-SD-NOFP16-NEXT: mov h1, v6.h[3]
4969 ; CHECK-SD-NOFP16-NEXT: mov h6, v6.h[1]
4970 ; CHECK-SD-NOFP16-NEXT: mov v19.d[1], x15
4971 ; CHECK-SD-NOFP16-NEXT: mov h7, v7.h[3]
4972 ; CHECK-SD-NOFP16-NEXT: stp q25, q24, [x8, #192]
4973 ; CHECK-SD-NOFP16-NEXT: fmov d24, x13
4974 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h20
4975 ; CHECK-SD-NOFP16-NEXT: mov v26.d[1], x11
4976 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s22
4977 ; CHECK-SD-NOFP16-NEXT: mov h22, v5.h[1]
4978 ; CHECK-SD-NOFP16-NEXT: mov h5, v5.h[3]
4979 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
4980 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
4981 ; CHECK-SD-NOFP16-NEXT: mov v24.d[1], x14
4982 ; CHECK-SD-NOFP16-NEXT: mov h25, v4.h[3]
4983 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h6
4984 ; CHECK-SD-NOFP16-NEXT: stp q26, q23, [x8, #128]
4985 ; CHECK-SD-NOFP16-NEXT: fmov d23, x12
4986 ; CHECK-SD-NOFP16-NEXT: fcvtzs x12, s20
4987 ; CHECK-SD-NOFP16-NEXT: mov h20, v4.h[1]
4988 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
4989 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s0
4990 ; CHECK-SD-NOFP16-NEXT: stp q19, q24, [x8, #64]
4991 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h22
4992 ; CHECK-SD-NOFP16-NEXT: fmov d0, x10
4993 ; CHECK-SD-NOFP16-NEXT: fmov d19, x11
4994 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
4995 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s1
4996 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h21
4997 ; CHECK-SD-NOFP16-NEXT: fcvt s24, h25
4998 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s6
4999 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h20
5000 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h7
5001 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s5
5002 ; CHECK-SD-NOFP16-NEXT: mov v19.d[1], x13
5003 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h18
5004 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s22
5005 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x12
5006 ; CHECK-SD-NOFP16-NEXT: fcvtzs x12, s4
5007 ; CHECK-SD-NOFP16-NEXT: mov v23.d[1], x10
5008 ; CHECK-SD-NOFP16-NEXT: fcvtzs x10, s1
5009 ; CHECK-SD-NOFP16-NEXT: fcvtzs x15, s24
5010 ; CHECK-SD-NOFP16-NEXT: mov v16.d[1], x11
5011 ; CHECK-SD-NOFP16-NEXT: fcvtzs x11, s20
5012 ; CHECK-SD-NOFP16-NEXT: mov v17.d[1], x14
5013 ; CHECK-SD-NOFP16-NEXT: fcvtzs x14, s6
5014 ; CHECK-SD-NOFP16-NEXT: mov v2.d[1], x13
5015 ; CHECK-SD-NOFP16-NEXT: fcvtzs x13, s5
5016 ; CHECK-SD-NOFP16-NEXT: fmov d4, x9
5017 ; CHECK-SD-NOFP16-NEXT: stp q0, q19, [x8]
5018 ; CHECK-SD-NOFP16-NEXT: fmov d0, x12
5019 ; CHECK-SD-NOFP16-NEXT: stp q16, q23, [x8, #224]
5020 ; CHECK-SD-NOFP16-NEXT: fmov d1, x10
5021 ; CHECK-SD-NOFP16-NEXT: mov v3.d[1], x15
5022 ; CHECK-SD-NOFP16-NEXT: stp q2, q17, [x8, #160]
5023 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x11
5024 ; CHECK-SD-NOFP16-NEXT: mov v4.d[1], x13
5025 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x14
5026 ; CHECK-SD-NOFP16-NEXT: stp q0, q3, [x8, #96]
5027 ; CHECK-SD-NOFP16-NEXT: stp q4, q1, [x8, #32]
5028 ; CHECK-SD-NOFP16-NEXT: ret
5029 ;
5030 ; CHECK-SD-FP16-LABEL: fptos_v32f16_v32i64:
5031 ; CHECK-SD-FP16: // %bb.0: // %entry
5032 ; CHECK-SD-FP16-NEXT: ext v4.16b, v1.16b, v1.16b, #8
5033 ; CHECK-SD-FP16-NEXT: ext v5.16b, v2.16b, v2.16b, #8
5034 ; CHECK-SD-FP16-NEXT: ext v6.16b, v3.16b, v3.16b, #8
5035 ; CHECK-SD-FP16-NEXT: mov h16, v3.h[2]
5036 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h0
5037 ; CHECK-SD-FP16-NEXT: mov h23, v3.h[3]
5038 ; CHECK-SD-FP16-NEXT: mov h25, v3.h[1]
5039 ; CHECK-SD-FP16-NEXT: fcvtzs x15, h3
5040 ; CHECK-SD-FP16-NEXT: mov h24, v2.h[2]
5041 ; CHECK-SD-FP16-NEXT: mov h19, v1.h[2]
5042 ; CHECK-SD-FP16-NEXT: mov h21, v2.h[1]
5043 ; CHECK-SD-FP16-NEXT: mov h26, v2.h[3]
5044 ; CHECK-SD-FP16-NEXT: mov h17, v4.h[2]
5045 ; CHECK-SD-FP16-NEXT: mov h18, v5.h[2]
5046 ; CHECK-SD-FP16-NEXT: mov h22, v6.h[2]
5047 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h5
5048 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h16
5049 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h6
5050 ; CHECK-SD-FP16-NEXT: mov h7, v1.h[1]
5051 ; CHECK-SD-FP16-NEXT: mov h20, v1.h[3]
5052 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h17
5053 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h18
5054 ; CHECK-SD-FP16-NEXT: fmov d18, x9
5055 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h22
5056 ; CHECK-SD-FP16-NEXT: fmov d3, x10
5057 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h23
5058 ; CHECK-SD-FP16-NEXT: fmov d22, x12
5059 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h25
5060 ; CHECK-SD-FP16-NEXT: fmov d23, x15
5061 ; CHECK-SD-FP16-NEXT: fmov d16, x11
5062 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h2
5063 ; CHECK-SD-FP16-NEXT: fcvtzs x15, h21
5064 ; CHECK-SD-FP16-NEXT: fmov d2, x13
5065 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h24
5066 ; CHECK-SD-FP16-NEXT: fmov d17, x14
5067 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h19
5068 ; CHECK-SD-FP16-NEXT: mov v22.d[1], x10
5069 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h1
5070 ; CHECK-SD-FP16-NEXT: mov v23.d[1], x12
5071 ; CHECK-SD-FP16-NEXT: fmov d19, x9
5072 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h26
5073 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h20
5074 ; CHECK-SD-FP16-NEXT: mov h20, v0.h[2]
5075 ; CHECK-SD-FP16-NEXT: fmov d21, x11
5076 ; CHECK-SD-FP16-NEXT: fmov d1, x13
5077 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h7
5078 ; CHECK-SD-FP16-NEXT: mov h24, v0.h[3]
5079 ; CHECK-SD-FP16-NEXT: fmov d7, x14
5080 ; CHECK-SD-FP16-NEXT: stp q23, q22, [x8, #192]
5081 ; CHECK-SD-FP16-NEXT: fmov d22, x10
5082 ; CHECK-SD-FP16-NEXT: mov v21.d[1], x15
5083 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x9
5084 ; CHECK-SD-FP16-NEXT: mov h23, v0.h[1]
5085 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h20
5086 ; CHECK-SD-FP16-NEXT: mov v7.d[1], x12
5087 ; CHECK-SD-FP16-NEXT: ext v0.16b, v0.16b, v0.16b, #8
5088 ; CHECK-SD-FP16-NEXT: mov h20, v6.h[3]
5089 ; CHECK-SD-FP16-NEXT: mov v22.d[1], x13
5090 ; CHECK-SD-FP16-NEXT: mov h6, v6.h[1]
5091 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h24
5092 ; CHECK-SD-FP16-NEXT: stp q21, q1, [x8, #128]
5093 ; CHECK-SD-FP16-NEXT: mov h1, v5.h[1]
5094 ; CHECK-SD-FP16-NEXT: mov h5, v5.h[3]
5095 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h20
5096 ; CHECK-SD-FP16-NEXT: mov h20, v0.h[2]
5097 ; CHECK-SD-FP16-NEXT: fcvtzs x11, h0
5098 ; CHECK-SD-FP16-NEXT: stp q22, q7, [x8, #64]
5099 ; CHECK-SD-FP16-NEXT: fmov d7, x9
5100 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h23
5101 ; CHECK-SD-FP16-NEXT: mov h21, v4.h[3]
5102 ; CHECK-SD-FP16-NEXT: mov h22, v4.h[1]
5103 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h6
5104 ; CHECK-SD-FP16-NEXT: mov h6, v0.h[3]
5105 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h5
5106 ; CHECK-SD-FP16-NEXT: mov h0, v0.h[1]
5107 ; CHECK-SD-FP16-NEXT: mov v7.d[1], x10
5108 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h1
5109 ; CHECK-SD-FP16-NEXT: mov v19.d[1], x12
5110 ; CHECK-SD-FP16-NEXT: mov v18.d[1], x9
5111 ; CHECK-SD-FP16-NEXT: fcvtzs x9, h4
5112 ; CHECK-SD-FP16-NEXT: fcvtzs x12, h20
5113 ; CHECK-SD-FP16-NEXT: fcvtzs x15, h21
5114 ; CHECK-SD-FP16-NEXT: mov v16.d[1], x13
5115 ; CHECK-SD-FP16-NEXT: fcvtzs x13, h22
5116 ; CHECK-SD-FP16-NEXT: mov v17.d[1], x14
5117 ; CHECK-SD-FP16-NEXT: fcvtzs x14, h6
5118 ; CHECK-SD-FP16-NEXT: fmov d4, x11
5119 ; CHECK-SD-FP16-NEXT: mov v3.d[1], x10
5120 ; CHECK-SD-FP16-NEXT: fcvtzs x10, h0
5121 ; CHECK-SD-FP16-NEXT: stp q18, q7, [x8]
5122 ; CHECK-SD-FP16-NEXT: fmov d0, x9
5123 ; CHECK-SD-FP16-NEXT: fmov d1, x12
5124 ; CHECK-SD-FP16-NEXT: stp q16, q19, [x8, #224]
5125 ; CHECK-SD-FP16-NEXT: mov v2.d[1], x15
5126 ; CHECK-SD-FP16-NEXT: stp q3, q17, [x8, #160]
5127 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x13
5128 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x14
5129 ; CHECK-SD-FP16-NEXT: mov v4.d[1], x10
5130 ; CHECK-SD-FP16-NEXT: stp q0, q2, [x8, #96]
5131 ; CHECK-SD-FP16-NEXT: stp q4, q1, [x8, #32]
5132 ; CHECK-SD-FP16-NEXT: ret
5133 ;
5134 ; CHECK-GI-NOFP16-LABEL: fptos_v32f16_v32i64:
5135 ; CHECK-GI-NOFP16: // %bb.0: // %entry
5136 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.4s, v0.4h
5137 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
5138 ; CHECK-GI-NOFP16-NEXT: fcvtl v5.4s, v1.4h
5139 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
5140 ; CHECK-GI-NOFP16-NEXT: fcvtl v16.4s, v2.4h
5141 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.4s, v2.8h
5142 ; CHECK-GI-NOFP16-NEXT: fcvtl v18.4s, v3.4h
5143 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v3.4s, v3.8h
5144 ; CHECK-GI-NOFP16-NEXT: fcvtl v6.2d, v4.2s
5145 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v4.2d, v4.4s
5146 ; CHECK-GI-NOFP16-NEXT: fcvtl v7.2d, v0.2s
5147 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.2d, v0.4s
5148 ; CHECK-GI-NOFP16-NEXT: fcvtl v17.2d, v5.2s
5149 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v5.2d, v5.4s
5150 ; CHECK-GI-NOFP16-NEXT: fcvtl v19.2d, v1.2s
5151 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.2d, v1.4s
5152 ; CHECK-GI-NOFP16-NEXT: fcvtl v20.2d, v16.2s
5153 ; CHECK-GI-NOFP16-NEXT: fcvtzs v6.2d, v6.2d
5154 ; CHECK-GI-NOFP16-NEXT: fcvtzs v4.2d, v4.2d
5155 ; CHECK-GI-NOFP16-NEXT: fcvtzs v7.2d, v7.2d
5156 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.2d, v0.2d
5157 ; CHECK-GI-NOFP16-NEXT: fcvtzs v17.2d, v17.2d
5158 ; CHECK-GI-NOFP16-NEXT: fcvtzs v5.2d, v5.2d
5159 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.2d, v1.2d
5160 ; CHECK-GI-NOFP16-NEXT: stp q6, q4, [x8]
5161 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v6.2d, v16.4s
5162 ; CHECK-GI-NOFP16-NEXT: fcvtzs v16.2d, v19.2d
5163 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.2d, v2.2s
5164 ; CHECK-GI-NOFP16-NEXT: stp q7, q0, [x8, #32]
5165 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.2d, v2.4s
5166 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.2d, v18.2s
5167 ; CHECK-GI-NOFP16-NEXT: stp q17, q5, [x8, #64]
5168 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v5.2d, v18.4s
5169 ; CHECK-GI-NOFP16-NEXT: fcvtl v17.2d, v3.2s
5170 ; CHECK-GI-NOFP16-NEXT: fcvtzs v7.2d, v20.2d
5171 ; CHECK-GI-NOFP16-NEXT: stp q16, q1, [x8, #96]
5172 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.2d, v3.4s
5173 ; CHECK-GI-NOFP16-NEXT: fcvtzs v6.2d, v6.2d
5174 ; CHECK-GI-NOFP16-NEXT: fcvtzs v4.2d, v4.2d
5175 ; CHECK-GI-NOFP16-NEXT: fcvtzs v2.2d, v2.2d
5176 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.2d, v0.2d
5177 ; CHECK-GI-NOFP16-NEXT: fcvtzs v3.2d, v5.2d
5178 ; CHECK-GI-NOFP16-NEXT: fcvtzs v5.2d, v17.2d
5179 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.2d, v1.2d
5180 ; CHECK-GI-NOFP16-NEXT: stp q7, q6, [x8, #128]
5181 ; CHECK-GI-NOFP16-NEXT: stp q4, q2, [x8, #160]
5182 ; CHECK-GI-NOFP16-NEXT: stp q0, q3, [x8, #192]
5183 ; CHECK-GI-NOFP16-NEXT: stp q5, q1, [x8, #224]
5184 ; CHECK-GI-NOFP16-NEXT: ret
5185 ;
5186 ; CHECK-GI-FP16-LABEL: fptos_v32f16_v32i64:
5187 ; CHECK-GI-FP16: // %bb.0: // %entry
5188 ; CHECK-GI-FP16-NEXT: mov h4, v0.h[1]
5189 ; CHECK-GI-FP16-NEXT: mov h5, v0.h[2]
5190 ; CHECK-GI-FP16-NEXT: mov h6, v0.h[3]
5191 ; CHECK-GI-FP16-NEXT: mov h17, v0.h[4]
5192 ; CHECK-GI-FP16-NEXT: mov h18, v0.h[5]
5193 ; CHECK-GI-FP16-NEXT: mov h19, v0.h[6]
5194 ; CHECK-GI-FP16-NEXT: mov h20, v0.h[7]
5195 ; CHECK-GI-FP16-NEXT: mov h21, v1.h[1]
5196 ; CHECK-GI-FP16-NEXT: fcvt d16, h0
5197 ; CHECK-GI-FP16-NEXT: fcvt d0, h1
5198 ; CHECK-GI-FP16-NEXT: mov h23, v2.h[2]
5199 ; CHECK-GI-FP16-NEXT: mov h24, v2.h[3]
5200 ; CHECK-GI-FP16-NEXT: fcvt d4, h4
5201 ; CHECK-GI-FP16-NEXT: fcvt d7, h5
5202 ; CHECK-GI-FP16-NEXT: fcvt d22, h6
5203 ; CHECK-GI-FP16-NEXT: fcvt d6, h17
5204 ; CHECK-GI-FP16-NEXT: fcvt d17, h18
5205 ; CHECK-GI-FP16-NEXT: fcvt d5, h19
5206 ; CHECK-GI-FP16-NEXT: fcvt d18, h20
5207 ; CHECK-GI-FP16-NEXT: fcvt d19, h21
5208 ; CHECK-GI-FP16-NEXT: mov h20, v1.h[2]
5209 ; CHECK-GI-FP16-NEXT: mov h21, v1.h[3]
5210 ; CHECK-GI-FP16-NEXT: mov h25, v2.h[4]
5211 ; CHECK-GI-FP16-NEXT: mov h26, v2.h[5]
5212 ; CHECK-GI-FP16-NEXT: mov v16.d[1], v4.d[0]
5213 ; CHECK-GI-FP16-NEXT: mov v7.d[1], v22.d[0]
5214 ; CHECK-GI-FP16-NEXT: mov h22, v2.h[1]
5215 ; CHECK-GI-FP16-NEXT: mov v6.d[1], v17.d[0]
5216 ; CHECK-GI-FP16-NEXT: mov h17, v1.h[4]
5217 ; CHECK-GI-FP16-NEXT: mov h27, v2.h[6]
5218 ; CHECK-GI-FP16-NEXT: mov v5.d[1], v18.d[0]
5219 ; CHECK-GI-FP16-NEXT: mov v0.d[1], v19.d[0]
5220 ; CHECK-GI-FP16-NEXT: fcvt d4, h20
5221 ; CHECK-GI-FP16-NEXT: mov h18, v1.h[5]
5222 ; CHECK-GI-FP16-NEXT: mov h19, v1.h[6]
5223 ; CHECK-GI-FP16-NEXT: mov h20, v1.h[7]
5224 ; CHECK-GI-FP16-NEXT: fcvt d21, h21
5225 ; CHECK-GI-FP16-NEXT: mov h28, v2.h[7]
5226 ; CHECK-GI-FP16-NEXT: fcvt d22, h22
5227 ; CHECK-GI-FP16-NEXT: fcvt d1, h17
5228 ; CHECK-GI-FP16-NEXT: fcvt d17, h23
5229 ; CHECK-GI-FP16-NEXT: fcvt d23, h24
5230 ; CHECK-GI-FP16-NEXT: fcvtzs v16.2d, v16.2d
5231 ; CHECK-GI-FP16-NEXT: fcvtzs v7.2d, v7.2d
5232 ; CHECK-GI-FP16-NEXT: fcvtzs v6.2d, v6.2d
5233 ; CHECK-GI-FP16-NEXT: fcvt d29, h18
5234 ; CHECK-GI-FP16-NEXT: fcvt d19, h19
5235 ; CHECK-GI-FP16-NEXT: fcvt d30, h20
5236 ; CHECK-GI-FP16-NEXT: fcvt d20, h2
5237 ; CHECK-GI-FP16-NEXT: fcvtzs v5.2d, v5.2d
5238 ; CHECK-GI-FP16-NEXT: fcvt d18, h25
5239 ; CHECK-GI-FP16-NEXT: fcvt d24, h26
5240 ; CHECK-GI-FP16-NEXT: fcvt d2, h27
5241 ; CHECK-GI-FP16-NEXT: fcvt d25, h28
5242 ; CHECK-GI-FP16-NEXT: stp q16, q7, [x8]
5243 ; CHECK-GI-FP16-NEXT: mov v4.d[1], v21.d[0]
5244 ; CHECK-GI-FP16-NEXT: mov v17.d[1], v23.d[0]
5245 ; CHECK-GI-FP16-NEXT: mov v1.d[1], v29.d[0]
5246 ; CHECK-GI-FP16-NEXT: mov v19.d[1], v30.d[0]
5247 ; CHECK-GI-FP16-NEXT: mov h21, v3.h[1]
5248 ; CHECK-GI-FP16-NEXT: stp q6, q5, [x8, #32]
5249 ; CHECK-GI-FP16-NEXT: mov v20.d[1], v22.d[0]
5250 ; CHECK-GI-FP16-NEXT: mov h16, v3.h[2]
5251 ; CHECK-GI-FP16-NEXT: mov h7, v3.h[3]
5252 ; CHECK-GI-FP16-NEXT: mov h22, v3.h[4]
5253 ; CHECK-GI-FP16-NEXT: mov h23, v3.h[5]
5254 ; CHECK-GI-FP16-NEXT: mov h6, v3.h[6]
5255 ; CHECK-GI-FP16-NEXT: mov h5, v3.h[7]
5256 ; CHECK-GI-FP16-NEXT: mov v18.d[1], v24.d[0]
5257 ; CHECK-GI-FP16-NEXT: mov v2.d[1], v25.d[0]
5258 ; CHECK-GI-FP16-NEXT: fcvt d3, h3
5259 ; CHECK-GI-FP16-NEXT: fcvt d21, h21
5260 ; CHECK-GI-FP16-NEXT: fcvtzs v0.2d, v0.2d
5261 ; CHECK-GI-FP16-NEXT: fcvt d16, h16
5262 ; CHECK-GI-FP16-NEXT: fcvtzs v4.2d, v4.2d
5263 ; CHECK-GI-FP16-NEXT: fcvt d7, h7
5264 ; CHECK-GI-FP16-NEXT: fcvt d22, h22
5265 ; CHECK-GI-FP16-NEXT: fcvt d23, h23
5266 ; CHECK-GI-FP16-NEXT: fcvtzs v1.2d, v1.2d
5267 ; CHECK-GI-FP16-NEXT: fcvt d6, h6
5268 ; CHECK-GI-FP16-NEXT: fcvt d5, h5
5269 ; CHECK-GI-FP16-NEXT: fcvtzs v19.2d, v19.2d
5270 ; CHECK-GI-FP16-NEXT: mov v3.d[1], v21.d[0]
5271 ; CHECK-GI-FP16-NEXT: fcvtzs v20.2d, v20.2d
5272 ; CHECK-GI-FP16-NEXT: stp q0, q4, [x8, #64]
5273 ; CHECK-GI-FP16-NEXT: fcvtzs v0.2d, v17.2d
5274 ; CHECK-GI-FP16-NEXT: fcvtzs v4.2d, v18.2d
5275 ; CHECK-GI-FP16-NEXT: mov v16.d[1], v7.d[0]
5276 ; CHECK-GI-FP16-NEXT: mov v22.d[1], v23.d[0]
5277 ; CHECK-GI-FP16-NEXT: mov v6.d[1], v5.d[0]
5278 ; CHECK-GI-FP16-NEXT: stp q1, q19, [x8, #96]
5279 ; CHECK-GI-FP16-NEXT: fcvtzs v1.2d, v2.2d
5280 ; CHECK-GI-FP16-NEXT: fcvtzs v2.2d, v3.2d
5281 ; CHECK-GI-FP16-NEXT: stp q20, q0, [x8, #128]
5282 ; CHECK-GI-FP16-NEXT: fcvtzs v0.2d, v16.2d
5283 ; CHECK-GI-FP16-NEXT: fcvtzs v3.2d, v22.2d
5284 ; CHECK-GI-FP16-NEXT: stp q4, q1, [x8, #160]
5285 ; CHECK-GI-FP16-NEXT: fcvtzs v1.2d, v6.2d
5286 ; CHECK-GI-FP16-NEXT: stp q2, q0, [x8, #192]
5287 ; CHECK-GI-FP16-NEXT: stp q3, q1, [x8, #224]
5288 ; CHECK-GI-FP16-NEXT: ret
5289 entry:
5290 %c = fptosi <32 x half> %a to <32 x i64>
5291 ret <32 x i64> %c
5292 }
5294 define <32 x i64> @fptou_v32f16_v32i64(<32 x half> %a) {
5295 ; CHECK-SD-NOFP16-LABEL: fptou_v32f16_v32i64:
5296 ; CHECK-SD-NOFP16: // %bb.0: // %entry
5297 ; CHECK-SD-NOFP16-NEXT: ext v4.16b, v1.16b, v1.16b, #8
5298 ; CHECK-SD-NOFP16-NEXT: ext v5.16b, v2.16b, v2.16b, #8
5299 ; CHECK-SD-NOFP16-NEXT: ext v6.16b, v3.16b, v3.16b, #8
5300 ; CHECK-SD-NOFP16-NEXT: ext v7.16b, v0.16b, v0.16b, #8
5301 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h1
5302 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h2
5303 ; CHECK-SD-NOFP16-NEXT: mov h26, v2.h[2]
5304 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h0
5305 ; CHECK-SD-NOFP16-NEXT: mov h27, v3.h[2]
5306 ; CHECK-SD-NOFP16-NEXT: mov h20, v2.h[1]
5307 ; CHECK-SD-NOFP16-NEXT: mov h18, v1.h[1]
5308 ; CHECK-SD-NOFP16-NEXT: mov h16, v4.h[2]
5309 ; CHECK-SD-NOFP16-NEXT: mov h17, v5.h[2]
5310 ; CHECK-SD-NOFP16-NEXT: fcvt s23, h5
5311 ; CHECK-SD-NOFP16-NEXT: fcvt s24, h6
5312 ; CHECK-SD-NOFP16-NEXT: mov h25, v6.h[2]
5313 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s21
5314 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s22
5315 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h7
5316 ; CHECK-SD-NOFP16-NEXT: mov h21, v3.h[3]
5317 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s19
5318 ; CHECK-SD-NOFP16-NEXT: fcvt s27, h27
5319 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h20
5320 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h16
5321 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
5322 ; CHECK-SD-NOFP16-NEXT: fcvtzu x12, s23
5323 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s24
5324 ; CHECK-SD-NOFP16-NEXT: fcvt s23, h25
5325 ; CHECK-SD-NOFP16-NEXT: fcvt s25, h26
5326 ; CHECK-SD-NOFP16-NEXT: mov h26, v3.h[1]
5327 ; CHECK-SD-NOFP16-NEXT: mov h24, v2.h[3]
5328 ; CHECK-SD-NOFP16-NEXT: fmov d19, x9
5329 ; CHECK-SD-NOFP16-NEXT: fcvtzu x9, s22
5330 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h3
5331 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h21
5332 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s16
5333 ; CHECK-SD-NOFP16-NEXT: fcvtzu x15, s17
5334 ; CHECK-SD-NOFP16-NEXT: fmov d2, x12
5335 ; CHECK-SD-NOFP16-NEXT: fmov d16, x13
5336 ; CHECK-SD-NOFP16-NEXT: fcvtzu x12, s23
5337 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s25
5338 ; CHECK-SD-NOFP16-NEXT: mov h23, v1.h[2]
5339 ; CHECK-SD-NOFP16-NEXT: fcvt s25, h26
5340 ; CHECK-SD-NOFP16-NEXT: fcvt s24, h24
5341 ; CHECK-SD-NOFP16-NEXT: mov h1, v1.h[3]
5342 ; CHECK-SD-NOFP16-NEXT: fmov d26, x11
5343 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s21
5344 ; CHECK-SD-NOFP16-NEXT: fmov d3, x14
5345 ; CHECK-SD-NOFP16-NEXT: fmov d17, x15
5346 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s22
5347 ; CHECK-SD-NOFP16-NEXT: fcvtzu x15, s27
5348 ; CHECK-SD-NOFP16-NEXT: mov h22, v0.h[2]
5349 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
5350 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h23
5351 ; CHECK-SD-NOFP16-NEXT: fmov d23, x13
5352 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s25
5353 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
5354 ; CHECK-SD-NOFP16-NEXT: fmov d25, x14
5355 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s24
5356 ; CHECK-SD-NOFP16-NEXT: fmov d24, x15
5357 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h22
5358 ; CHECK-SD-NOFP16-NEXT: fcvtzu x15, s18
5359 ; CHECK-SD-NOFP16-NEXT: mov h18, v7.h[1]
5360 ; CHECK-SD-NOFP16-NEXT: mov v25.d[1], x13
5361 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s21
5362 ; CHECK-SD-NOFP16-NEXT: mov h21, v7.h[2]
5363 ; CHECK-SD-NOFP16-NEXT: mov v24.d[1], x11
5364 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s20
5365 ; CHECK-SD-NOFP16-NEXT: mov h20, v0.h[1]
5366 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[3]
5367 ; CHECK-SD-NOFP16-NEXT: mov v23.d[1], x14
5368 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s1
5369 ; CHECK-SD-NOFP16-NEXT: mov h1, v6.h[3]
5370 ; CHECK-SD-NOFP16-NEXT: mov h6, v6.h[1]
5371 ; CHECK-SD-NOFP16-NEXT: mov v19.d[1], x15
5372 ; CHECK-SD-NOFP16-NEXT: mov h7, v7.h[3]
5373 ; CHECK-SD-NOFP16-NEXT: stp q25, q24, [x8, #192]
5374 ; CHECK-SD-NOFP16-NEXT: fmov d24, x13
5375 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h20
5376 ; CHECK-SD-NOFP16-NEXT: mov v26.d[1], x11
5377 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s22
5378 ; CHECK-SD-NOFP16-NEXT: mov h22, v5.h[1]
5379 ; CHECK-SD-NOFP16-NEXT: mov h5, v5.h[3]
5380 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
5381 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
5382 ; CHECK-SD-NOFP16-NEXT: mov v24.d[1], x14
5383 ; CHECK-SD-NOFP16-NEXT: mov h25, v4.h[3]
5384 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h6
5385 ; CHECK-SD-NOFP16-NEXT: stp q26, q23, [x8, #128]
5386 ; CHECK-SD-NOFP16-NEXT: fmov d23, x12
5387 ; CHECK-SD-NOFP16-NEXT: fcvtzu x12, s20
5388 ; CHECK-SD-NOFP16-NEXT: mov h20, v4.h[1]
5389 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
5390 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s0
5391 ; CHECK-SD-NOFP16-NEXT: stp q19, q24, [x8, #64]
5392 ; CHECK-SD-NOFP16-NEXT: fcvt s22, h22
5393 ; CHECK-SD-NOFP16-NEXT: fmov d0, x10
5394 ; CHECK-SD-NOFP16-NEXT: fmov d19, x11
5395 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
5396 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s1
5397 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h21
5398 ; CHECK-SD-NOFP16-NEXT: fcvt s24, h25
5399 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s6
5400 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h20
5401 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h7
5402 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s5
5403 ; CHECK-SD-NOFP16-NEXT: mov v19.d[1], x13
5404 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h18
5405 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s22
5406 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x12
5407 ; CHECK-SD-NOFP16-NEXT: fcvtzu x12, s4
5408 ; CHECK-SD-NOFP16-NEXT: mov v23.d[1], x10
5409 ; CHECK-SD-NOFP16-NEXT: fcvtzu x10, s1
5410 ; CHECK-SD-NOFP16-NEXT: fcvtzu x15, s24
5411 ; CHECK-SD-NOFP16-NEXT: mov v16.d[1], x11
5412 ; CHECK-SD-NOFP16-NEXT: fcvtzu x11, s20
5413 ; CHECK-SD-NOFP16-NEXT: mov v17.d[1], x14
5414 ; CHECK-SD-NOFP16-NEXT: fcvtzu x14, s6
5415 ; CHECK-SD-NOFP16-NEXT: mov v2.d[1], x13
5416 ; CHECK-SD-NOFP16-NEXT: fcvtzu x13, s5
5417 ; CHECK-SD-NOFP16-NEXT: fmov d4, x9
5418 ; CHECK-SD-NOFP16-NEXT: stp q0, q19, [x8]
5419 ; CHECK-SD-NOFP16-NEXT: fmov d0, x12
5420 ; CHECK-SD-NOFP16-NEXT: stp q16, q23, [x8, #224]
5421 ; CHECK-SD-NOFP16-NEXT: fmov d1, x10
5422 ; CHECK-SD-NOFP16-NEXT: mov v3.d[1], x15
5423 ; CHECK-SD-NOFP16-NEXT: stp q2, q17, [x8, #160]
5424 ; CHECK-SD-NOFP16-NEXT: mov v0.d[1], x11
5425 ; CHECK-SD-NOFP16-NEXT: mov v4.d[1], x13
5426 ; CHECK-SD-NOFP16-NEXT: mov v1.d[1], x14
5427 ; CHECK-SD-NOFP16-NEXT: stp q0, q3, [x8, #96]
5428 ; CHECK-SD-NOFP16-NEXT: stp q4, q1, [x8, #32]
5429 ; CHECK-SD-NOFP16-NEXT: ret
5430 ;
5431 ; CHECK-SD-FP16-LABEL: fptou_v32f16_v32i64:
5432 ; CHECK-SD-FP16: // %bb.0: // %entry
5433 ; CHECK-SD-FP16-NEXT: ext v4.16b, v1.16b, v1.16b, #8
5434 ; CHECK-SD-FP16-NEXT: ext v5.16b, v2.16b, v2.16b, #8
5435 ; CHECK-SD-FP16-NEXT: ext v6.16b, v3.16b, v3.16b, #8
5436 ; CHECK-SD-FP16-NEXT: mov h16, v3.h[2]
5437 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h0
5438 ; CHECK-SD-FP16-NEXT: mov h23, v3.h[3]
5439 ; CHECK-SD-FP16-NEXT: mov h25, v3.h[1]
5440 ; CHECK-SD-FP16-NEXT: fcvtzu x15, h3
5441 ; CHECK-SD-FP16-NEXT: mov h24, v2.h[2]
5442 ; CHECK-SD-FP16-NEXT: mov h19, v1.h[2]
5443 ; CHECK-SD-FP16-NEXT: mov h21, v2.h[1]
5444 ; CHECK-SD-FP16-NEXT: mov h26, v2.h[3]
5445 ; CHECK-SD-FP16-NEXT: mov h17, v4.h[2]
5446 ; CHECK-SD-FP16-NEXT: mov h18, v5.h[2]
5447 ; CHECK-SD-FP16-NEXT: mov h22, v6.h[2]
5448 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h5
5449 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h16
5450 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h6
5451 ; CHECK-SD-FP16-NEXT: mov h7, v1.h[1]
5452 ; CHECK-SD-FP16-NEXT: mov h20, v1.h[3]
5453 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h17
5454 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h18
5455 ; CHECK-SD-FP16-NEXT: fmov d18, x9
5456 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h22
5457 ; CHECK-SD-FP16-NEXT: fmov d3, x10
5458 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h23
5459 ; CHECK-SD-FP16-NEXT: fmov d22, x12
5460 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h25
5461 ; CHECK-SD-FP16-NEXT: fmov d23, x15
5462 ; CHECK-SD-FP16-NEXT: fmov d16, x11
5463 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h2
5464 ; CHECK-SD-FP16-NEXT: fcvtzu x15, h21
5465 ; CHECK-SD-FP16-NEXT: fmov d2, x13
5466 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h24
5467 ; CHECK-SD-FP16-NEXT: fmov d17, x14
5468 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h19
5469 ; CHECK-SD-FP16-NEXT: mov v22.d[1], x10
5470 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h1
5471 ; CHECK-SD-FP16-NEXT: mov v23.d[1], x12
5472 ; CHECK-SD-FP16-NEXT: fmov d19, x9
5473 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h26
5474 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h20
5475 ; CHECK-SD-FP16-NEXT: mov h20, v0.h[2]
5476 ; CHECK-SD-FP16-NEXT: fmov d21, x11
5477 ; CHECK-SD-FP16-NEXT: fmov d1, x13
5478 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h7
5479 ; CHECK-SD-FP16-NEXT: mov h24, v0.h[3]
5480 ; CHECK-SD-FP16-NEXT: fmov d7, x14
5481 ; CHECK-SD-FP16-NEXT: stp q23, q22, [x8, #192]
5482 ; CHECK-SD-FP16-NEXT: fmov d22, x10
5483 ; CHECK-SD-FP16-NEXT: mov v21.d[1], x15
5484 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x9
5485 ; CHECK-SD-FP16-NEXT: mov h23, v0.h[1]
5486 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h20
5487 ; CHECK-SD-FP16-NEXT: mov v7.d[1], x12
5488 ; CHECK-SD-FP16-NEXT: ext v0.16b, v0.16b, v0.16b, #8
5489 ; CHECK-SD-FP16-NEXT: mov h20, v6.h[3]
5490 ; CHECK-SD-FP16-NEXT: mov v22.d[1], x13
5491 ; CHECK-SD-FP16-NEXT: mov h6, v6.h[1]
5492 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h24
5493 ; CHECK-SD-FP16-NEXT: stp q21, q1, [x8, #128]
5494 ; CHECK-SD-FP16-NEXT: mov h1, v5.h[1]
5495 ; CHECK-SD-FP16-NEXT: mov h5, v5.h[3]
5496 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h20
5497 ; CHECK-SD-FP16-NEXT: mov h20, v0.h[2]
5498 ; CHECK-SD-FP16-NEXT: fcvtzu x11, h0
5499 ; CHECK-SD-FP16-NEXT: stp q22, q7, [x8, #64]
5500 ; CHECK-SD-FP16-NEXT: fmov d7, x9
5501 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h23
5502 ; CHECK-SD-FP16-NEXT: mov h21, v4.h[3]
5503 ; CHECK-SD-FP16-NEXT: mov h22, v4.h[1]
5504 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h6
5505 ; CHECK-SD-FP16-NEXT: mov h6, v0.h[3]
5506 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h5
5507 ; CHECK-SD-FP16-NEXT: mov h0, v0.h[1]
5508 ; CHECK-SD-FP16-NEXT: mov v7.d[1], x10
5509 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h1
5510 ; CHECK-SD-FP16-NEXT: mov v19.d[1], x12
5511 ; CHECK-SD-FP16-NEXT: mov v18.d[1], x9
5512 ; CHECK-SD-FP16-NEXT: fcvtzu x9, h4
5513 ; CHECK-SD-FP16-NEXT: fcvtzu x12, h20
5514 ; CHECK-SD-FP16-NEXT: fcvtzu x15, h21
5515 ; CHECK-SD-FP16-NEXT: mov v16.d[1], x13
5516 ; CHECK-SD-FP16-NEXT: fcvtzu x13, h22
5517 ; CHECK-SD-FP16-NEXT: mov v17.d[1], x14
5518 ; CHECK-SD-FP16-NEXT: fcvtzu x14, h6
5519 ; CHECK-SD-FP16-NEXT: fmov d4, x11
5520 ; CHECK-SD-FP16-NEXT: mov v3.d[1], x10
5521 ; CHECK-SD-FP16-NEXT: fcvtzu x10, h0
5522 ; CHECK-SD-FP16-NEXT: stp q18, q7, [x8]
5523 ; CHECK-SD-FP16-NEXT: fmov d0, x9
5524 ; CHECK-SD-FP16-NEXT: fmov d1, x12
5525 ; CHECK-SD-FP16-NEXT: stp q16, q19, [x8, #224]
5526 ; CHECK-SD-FP16-NEXT: mov v2.d[1], x15
5527 ; CHECK-SD-FP16-NEXT: stp q3, q17, [x8, #160]
5528 ; CHECK-SD-FP16-NEXT: mov v0.d[1], x13
5529 ; CHECK-SD-FP16-NEXT: mov v1.d[1], x14
5530 ; CHECK-SD-FP16-NEXT: mov v4.d[1], x10
5531 ; CHECK-SD-FP16-NEXT: stp q0, q2, [x8, #96]
5532 ; CHECK-SD-FP16-NEXT: stp q4, q1, [x8, #32]
5533 ; CHECK-SD-FP16-NEXT: ret
5534 ;
5535 ; CHECK-GI-NOFP16-LABEL: fptou_v32f16_v32i64:
5536 ; CHECK-GI-NOFP16: // %bb.0: // %entry
5537 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.4s, v0.4h
5538 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
5539 ; CHECK-GI-NOFP16-NEXT: fcvtl v5.4s, v1.4h
5540 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
5541 ; CHECK-GI-NOFP16-NEXT: fcvtl v16.4s, v2.4h
5542 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.4s, v2.8h
5543 ; CHECK-GI-NOFP16-NEXT: fcvtl v18.4s, v3.4h
5544 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v3.4s, v3.8h
5545 ; CHECK-GI-NOFP16-NEXT: fcvtl v6.2d, v4.2s
5546 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v4.2d, v4.4s
5547 ; CHECK-GI-NOFP16-NEXT: fcvtl v7.2d, v0.2s
5548 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.2d, v0.4s
5549 ; CHECK-GI-NOFP16-NEXT: fcvtl v17.2d, v5.2s
5550 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v5.2d, v5.4s
5551 ; CHECK-GI-NOFP16-NEXT: fcvtl v19.2d, v1.2s
5552 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.2d, v1.4s
5553 ; CHECK-GI-NOFP16-NEXT: fcvtl v20.2d, v16.2s
5554 ; CHECK-GI-NOFP16-NEXT: fcvtzu v6.2d, v6.2d
5555 ; CHECK-GI-NOFP16-NEXT: fcvtzu v4.2d, v4.2d
5556 ; CHECK-GI-NOFP16-NEXT: fcvtzu v7.2d, v7.2d
5557 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.2d, v0.2d
5558 ; CHECK-GI-NOFP16-NEXT: fcvtzu v17.2d, v17.2d
5559 ; CHECK-GI-NOFP16-NEXT: fcvtzu v5.2d, v5.2d
5560 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.2d, v1.2d
5561 ; CHECK-GI-NOFP16-NEXT: stp q6, q4, [x8]
5562 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v6.2d, v16.4s
5563 ; CHECK-GI-NOFP16-NEXT: fcvtzu v16.2d, v19.2d
5564 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.2d, v2.2s
5565 ; CHECK-GI-NOFP16-NEXT: stp q7, q0, [x8, #32]
5566 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.2d, v2.4s
5567 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.2d, v18.2s
5568 ; CHECK-GI-NOFP16-NEXT: stp q17, q5, [x8, #64]
5569 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v5.2d, v18.4s
5570 ; CHECK-GI-NOFP16-NEXT: fcvtl v17.2d, v3.2s
5571 ; CHECK-GI-NOFP16-NEXT: fcvtzu v7.2d, v20.2d
5572 ; CHECK-GI-NOFP16-NEXT: stp q16, q1, [x8, #96]
5573 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.2d, v3.4s
5574 ; CHECK-GI-NOFP16-NEXT: fcvtzu v6.2d, v6.2d
5575 ; CHECK-GI-NOFP16-NEXT: fcvtzu v4.2d, v4.2d
5576 ; CHECK-GI-NOFP16-NEXT: fcvtzu v2.2d, v2.2d
5577 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.2d, v0.2d
5578 ; CHECK-GI-NOFP16-NEXT: fcvtzu v3.2d, v5.2d
5579 ; CHECK-GI-NOFP16-NEXT: fcvtzu v5.2d, v17.2d
5580 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.2d, v1.2d
5581 ; CHECK-GI-NOFP16-NEXT: stp q7, q6, [x8, #128]
5582 ; CHECK-GI-NOFP16-NEXT: stp q4, q2, [x8, #160]
5583 ; CHECK-GI-NOFP16-NEXT: stp q0, q3, [x8, #192]
5584 ; CHECK-GI-NOFP16-NEXT: stp q5, q1, [x8, #224]
5585 ; CHECK-GI-NOFP16-NEXT: ret
5586 ;
5587 ; CHECK-GI-FP16-LABEL: fptou_v32f16_v32i64:
5588 ; CHECK-GI-FP16: // %bb.0: // %entry
5589 ; CHECK-GI-FP16-NEXT: mov h4, v0.h[1]
5590 ; CHECK-GI-FP16-NEXT: mov h5, v0.h[2]
5591 ; CHECK-GI-FP16-NEXT: mov h6, v0.h[3]
5592 ; CHECK-GI-FP16-NEXT: mov h17, v0.h[4]
5593 ; CHECK-GI-FP16-NEXT: mov h18, v0.h[5]
5594 ; CHECK-GI-FP16-NEXT: mov h19, v0.h[6]
5595 ; CHECK-GI-FP16-NEXT: mov h20, v0.h[7]
5596 ; CHECK-GI-FP16-NEXT: mov h21, v1.h[1]
5597 ; CHECK-GI-FP16-NEXT: fcvt d16, h0
5598 ; CHECK-GI-FP16-NEXT: fcvt d0, h1
5599 ; CHECK-GI-FP16-NEXT: mov h23, v2.h[2]
5600 ; CHECK-GI-FP16-NEXT: mov h24, v2.h[3]
5601 ; CHECK-GI-FP16-NEXT: fcvt d4, h4
5602 ; CHECK-GI-FP16-NEXT: fcvt d7, h5
5603 ; CHECK-GI-FP16-NEXT: fcvt d22, h6
5604 ; CHECK-GI-FP16-NEXT: fcvt d6, h17
5605 ; CHECK-GI-FP16-NEXT: fcvt d17, h18
5606 ; CHECK-GI-FP16-NEXT: fcvt d5, h19
5607 ; CHECK-GI-FP16-NEXT: fcvt d18, h20
5608 ; CHECK-GI-FP16-NEXT: fcvt d19, h21
5609 ; CHECK-GI-FP16-NEXT: mov h20, v1.h[2]
5610 ; CHECK-GI-FP16-NEXT: mov h21, v1.h[3]
5611 ; CHECK-GI-FP16-NEXT: mov h25, v2.h[4]
5612 ; CHECK-GI-FP16-NEXT: mov h26, v2.h[5]
5613 ; CHECK-GI-FP16-NEXT: mov v16.d[1], v4.d[0]
5614 ; CHECK-GI-FP16-NEXT: mov v7.d[1], v22.d[0]
5615 ; CHECK-GI-FP16-NEXT: mov h22, v2.h[1]
5616 ; CHECK-GI-FP16-NEXT: mov v6.d[1], v17.d[0]
5617 ; CHECK-GI-FP16-NEXT: mov h17, v1.h[4]
5618 ; CHECK-GI-FP16-NEXT: mov h27, v2.h[6]
5619 ; CHECK-GI-FP16-NEXT: mov v5.d[1], v18.d[0]
5620 ; CHECK-GI-FP16-NEXT: mov v0.d[1], v19.d[0]
5621 ; CHECK-GI-FP16-NEXT: fcvt d4, h20
5622 ; CHECK-GI-FP16-NEXT: mov h18, v1.h[5]
5623 ; CHECK-GI-FP16-NEXT: mov h19, v1.h[6]
5624 ; CHECK-GI-FP16-NEXT: mov h20, v1.h[7]
5625 ; CHECK-GI-FP16-NEXT: fcvt d21, h21
5626 ; CHECK-GI-FP16-NEXT: mov h28, v2.h[7]
5627 ; CHECK-GI-FP16-NEXT: fcvt d22, h22
5628 ; CHECK-GI-FP16-NEXT: fcvt d1, h17
5629 ; CHECK-GI-FP16-NEXT: fcvt d17, h23
5630 ; CHECK-GI-FP16-NEXT: fcvt d23, h24
5631 ; CHECK-GI-FP16-NEXT: fcvtzu v16.2d, v16.2d
5632 ; CHECK-GI-FP16-NEXT: fcvtzu v7.2d, v7.2d
5633 ; CHECK-GI-FP16-NEXT: fcvtzu v6.2d, v6.2d
5634 ; CHECK-GI-FP16-NEXT: fcvt d29, h18
5635 ; CHECK-GI-FP16-NEXT: fcvt d19, h19
5636 ; CHECK-GI-FP16-NEXT: fcvt d30, h20
5637 ; CHECK-GI-FP16-NEXT: fcvt d20, h2
5638 ; CHECK-GI-FP16-NEXT: fcvtzu v5.2d, v5.2d
5639 ; CHECK-GI-FP16-NEXT: fcvt d18, h25
5640 ; CHECK-GI-FP16-NEXT: fcvt d24, h26
5641 ; CHECK-GI-FP16-NEXT: fcvt d2, h27
5642 ; CHECK-GI-FP16-NEXT: fcvt d25, h28
5643 ; CHECK-GI-FP16-NEXT: stp q16, q7, [x8]
5644 ; CHECK-GI-FP16-NEXT: mov v4.d[1], v21.d[0]
5645 ; CHECK-GI-FP16-NEXT: mov v17.d[1], v23.d[0]
5646 ; CHECK-GI-FP16-NEXT: mov v1.d[1], v29.d[0]
5647 ; CHECK-GI-FP16-NEXT: mov v19.d[1], v30.d[0]
5648 ; CHECK-GI-FP16-NEXT: mov h21, v3.h[1]
5649 ; CHECK-GI-FP16-NEXT: stp q6, q5, [x8, #32]
5650 ; CHECK-GI-FP16-NEXT: mov v20.d[1], v22.d[0]
5651 ; CHECK-GI-FP16-NEXT: mov h16, v3.h[2]
5652 ; CHECK-GI-FP16-NEXT: mov h7, v3.h[3]
5653 ; CHECK-GI-FP16-NEXT: mov h22, v3.h[4]
5654 ; CHECK-GI-FP16-NEXT: mov h23, v3.h[5]
5655 ; CHECK-GI-FP16-NEXT: mov h6, v3.h[6]
5656 ; CHECK-GI-FP16-NEXT: mov h5, v3.h[7]
5657 ; CHECK-GI-FP16-NEXT: mov v18.d[1], v24.d[0]
5658 ; CHECK-GI-FP16-NEXT: mov v2.d[1], v25.d[0]
5659 ; CHECK-GI-FP16-NEXT: fcvt d3, h3
5660 ; CHECK-GI-FP16-NEXT: fcvt d21, h21
5661 ; CHECK-GI-FP16-NEXT: fcvtzu v0.2d, v0.2d
5662 ; CHECK-GI-FP16-NEXT: fcvt d16, h16
5663 ; CHECK-GI-FP16-NEXT: fcvtzu v4.2d, v4.2d
5664 ; CHECK-GI-FP16-NEXT: fcvt d7, h7
5665 ; CHECK-GI-FP16-NEXT: fcvt d22, h22
5666 ; CHECK-GI-FP16-NEXT: fcvt d23, h23
5667 ; CHECK-GI-FP16-NEXT: fcvtzu v1.2d, v1.2d
5668 ; CHECK-GI-FP16-NEXT: fcvt d6, h6
5669 ; CHECK-GI-FP16-NEXT: fcvt d5, h5
5670 ; CHECK-GI-FP16-NEXT: fcvtzu v19.2d, v19.2d
5671 ; CHECK-GI-FP16-NEXT: mov v3.d[1], v21.d[0]
5672 ; CHECK-GI-FP16-NEXT: fcvtzu v20.2d, v20.2d
5673 ; CHECK-GI-FP16-NEXT: stp q0, q4, [x8, #64]
5674 ; CHECK-GI-FP16-NEXT: fcvtzu v0.2d, v17.2d
5675 ; CHECK-GI-FP16-NEXT: fcvtzu v4.2d, v18.2d
5676 ; CHECK-GI-FP16-NEXT: mov v16.d[1], v7.d[0]
5677 ; CHECK-GI-FP16-NEXT: mov v22.d[1], v23.d[0]
5678 ; CHECK-GI-FP16-NEXT: mov v6.d[1], v5.d[0]
5679 ; CHECK-GI-FP16-NEXT: stp q1, q19, [x8, #96]
5680 ; CHECK-GI-FP16-NEXT: fcvtzu v1.2d, v2.2d
5681 ; CHECK-GI-FP16-NEXT: fcvtzu v2.2d, v3.2d
5682 ; CHECK-GI-FP16-NEXT: stp q20, q0, [x8, #128]
5683 ; CHECK-GI-FP16-NEXT: fcvtzu v0.2d, v16.2d
5684 ; CHECK-GI-FP16-NEXT: fcvtzu v3.2d, v22.2d
5685 ; CHECK-GI-FP16-NEXT: stp q4, q1, [x8, #160]
5686 ; CHECK-GI-FP16-NEXT: fcvtzu v1.2d, v6.2d
5687 ; CHECK-GI-FP16-NEXT: stp q2, q0, [x8, #192]
5688 ; CHECK-GI-FP16-NEXT: stp q3, q1, [x8, #224]
5689 ; CHECK-GI-FP16-NEXT: ret
5690 entry:
5691 %c = fptoui <32 x half> %a to <32 x i64>
5692 ret <32 x i64> %c
5693 }
5695 define <2 x i32> @fptos_v2f16_v2i32(<2 x half> %a) {
5696 ; CHECK-SD-LABEL: fptos_v2f16_v2i32:
5697 ; CHECK-SD: // %bb.0: // %entry
5698 ; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h
5699 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
5700 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
5701 ; CHECK-SD-NEXT: ret
5702 ;
5703 ; CHECK-GI-LABEL: fptos_v2f16_v2i32:
5704 ; CHECK-GI: // %bb.0: // %entry
5705 ; CHECK-GI-NEXT: fcvtl v0.4s, v0.4h
5706 ; CHECK-GI-NEXT: fcvtzs v0.2s, v0.2s
5707 ; CHECK-GI-NEXT: ret
5708 entry:
5709 %c = fptosi <2 x half> %a to <2 x i32>
5710 ret <2 x i32> %c
5711 }
5713 define <2 x i32> @fptou_v2f16_v2i32(<2 x half> %a) {
5714 ; CHECK-SD-LABEL: fptou_v2f16_v2i32:
5715 ; CHECK-SD: // %bb.0: // %entry
5716 ; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h
5717 ; CHECK-SD-NEXT: fcvtzu v0.4s, v0.4s
5718 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
5719 ; CHECK-SD-NEXT: ret
5720 ;
5721 ; CHECK-GI-LABEL: fptou_v2f16_v2i32:
5722 ; CHECK-GI: // %bb.0: // %entry
5723 ; CHECK-GI-NEXT: fcvtl v0.4s, v0.4h
5724 ; CHECK-GI-NEXT: fcvtzu v0.2s, v0.2s
5725 ; CHECK-GI-NEXT: ret
5726 entry:
5727 %c = fptoui <2 x half> %a to <2 x i32>
5728 ret <2 x i32> %c
5729 }
5731 define <3 x i32> @fptos_v3f16_v3i32(<3 x half> %a) {
5732 ; CHECK-LABEL: fptos_v3f16_v3i32:
5733 ; CHECK: // %bb.0: // %entry
5734 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
5735 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
5736 ; CHECK-NEXT: ret
5737 entry:
5738 %c = fptosi <3 x half> %a to <3 x i32>
5739 ret <3 x i32> %c
5740 }
5742 define <3 x i32> @fptou_v3f16_v3i32(<3 x half> %a) {
5743 ; CHECK-LABEL: fptou_v3f16_v3i32:
5744 ; CHECK: // %bb.0: // %entry
5745 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
5746 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
5747 ; CHECK-NEXT: ret
5748 entry:
5749 %c = fptoui <3 x half> %a to <3 x i32>
5750 ret <3 x i32> %c
5751 }
5753 define <4 x i32> @fptos_v4f16_v4i32(<4 x half> %a) {
5754 ; CHECK-LABEL: fptos_v4f16_v4i32:
5755 ; CHECK: // %bb.0: // %entry
5756 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
5757 ; CHECK-NEXT: fcvtzs v0.4s, v0.4s
5758 ; CHECK-NEXT: ret
5759 entry:
5760 %c = fptosi <4 x half> %a to <4 x i32>
5761 ret <4 x i32> %c
5762 }
5764 define <4 x i32> @fptou_v4f16_v4i32(<4 x half> %a) {
5765 ; CHECK-LABEL: fptou_v4f16_v4i32:
5766 ; CHECK: // %bb.0: // %entry
5767 ; CHECK-NEXT: fcvtl v0.4s, v0.4h
5768 ; CHECK-NEXT: fcvtzu v0.4s, v0.4s
5769 ; CHECK-NEXT: ret
5770 entry:
5771 %c = fptoui <4 x half> %a to <4 x i32>
5772 ret <4 x i32> %c
5773 }
5775 define <8 x i32> @fptos_v8f16_v8i32(<8 x half> %a) {
5776 ; CHECK-SD-LABEL: fptos_v8f16_v8i32:
5777 ; CHECK-SD: // %bb.0: // %entry
5778 ; CHECK-SD-NEXT: fcvtl2 v1.4s, v0.8h
5779 ; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h
5780 ; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s
5781 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
5782 ; CHECK-SD-NEXT: ret
5783 ;
5784 ; CHECK-GI-LABEL: fptos_v8f16_v8i32:
5785 ; CHECK-GI: // %bb.0: // %entry
5786 ; CHECK-GI-NEXT: fcvtl v1.4s, v0.4h
5787 ; CHECK-GI-NEXT: fcvtl2 v2.4s, v0.8h
5788 ; CHECK-GI-NEXT: fcvtzs v0.4s, v1.4s
5789 ; CHECK-GI-NEXT: fcvtzs v1.4s, v2.4s
5790 ; CHECK-GI-NEXT: ret
5791 entry:
5792 %c = fptosi <8 x half> %a to <8 x i32>
5793 ret <8 x i32> %c
5794 }
5796 define <8 x i32> @fptou_v8f16_v8i32(<8 x half> %a) {
5797 ; CHECK-SD-LABEL: fptou_v8f16_v8i32:
5798 ; CHECK-SD: // %bb.0: // %entry
5799 ; CHECK-SD-NEXT: fcvtl2 v1.4s, v0.8h
5800 ; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h
5801 ; CHECK-SD-NEXT: fcvtzu v1.4s, v1.4s
5802 ; CHECK-SD-NEXT: fcvtzu v0.4s, v0.4s
5803 ; CHECK-SD-NEXT: ret
5804 ;
5805 ; CHECK-GI-LABEL: fptou_v8f16_v8i32:
5806 ; CHECK-GI: // %bb.0: // %entry
5807 ; CHECK-GI-NEXT: fcvtl v1.4s, v0.4h
5808 ; CHECK-GI-NEXT: fcvtl2 v2.4s, v0.8h
5809 ; CHECK-GI-NEXT: fcvtzu v0.4s, v1.4s
5810 ; CHECK-GI-NEXT: fcvtzu v1.4s, v2.4s
5811 ; CHECK-GI-NEXT: ret
5812 entry:
5813 %c = fptoui <8 x half> %a to <8 x i32>
5814 ret <8 x i32> %c
5815 }
5817 define <16 x i32> @fptos_v16f16_v16i32(<16 x half> %a) {
5818 ; CHECK-SD-LABEL: fptos_v16f16_v16i32:
5819 ; CHECK-SD: // %bb.0: // %entry
5820 ; CHECK-SD-NEXT: fcvtl v2.4s, v0.4h
5821 ; CHECK-SD-NEXT: fcvtl2 v3.4s, v0.8h
5822 ; CHECK-SD-NEXT: fcvtl2 v4.4s, v1.8h
5823 ; CHECK-SD-NEXT: fcvtl v5.4s, v1.4h
5824 ; CHECK-SD-NEXT: fcvtzs v0.4s, v2.4s
5825 ; CHECK-SD-NEXT: fcvtzs v1.4s, v3.4s
5826 ; CHECK-SD-NEXT: fcvtzs v3.4s, v4.4s
5827 ; CHECK-SD-NEXT: fcvtzs v2.4s, v5.4s
5828 ; CHECK-SD-NEXT: ret
5829 ;
5830 ; CHECK-GI-LABEL: fptos_v16f16_v16i32:
5831 ; CHECK-GI: // %bb.0: // %entry
5832 ; CHECK-GI-NEXT: fcvtl v2.4s, v0.4h
5833 ; CHECK-GI-NEXT: fcvtl2 v3.4s, v0.8h
5834 ; CHECK-GI-NEXT: fcvtl v4.4s, v1.4h
5835 ; CHECK-GI-NEXT: fcvtl2 v5.4s, v1.8h
5836 ; CHECK-GI-NEXT: fcvtzs v0.4s, v2.4s
5837 ; CHECK-GI-NEXT: fcvtzs v1.4s, v3.4s
5838 ; CHECK-GI-NEXT: fcvtzs v2.4s, v4.4s
5839 ; CHECK-GI-NEXT: fcvtzs v3.4s, v5.4s
5840 ; CHECK-GI-NEXT: ret
5841 entry:
5842 %c = fptosi <16 x half> %a to <16 x i32>
5843 ret <16 x i32> %c
5844 }
5846 define <16 x i32> @fptou_v16f16_v16i32(<16 x half> %a) {
5847 ; CHECK-SD-LABEL: fptou_v16f16_v16i32:
5848 ; CHECK-SD: // %bb.0: // %entry
5849 ; CHECK-SD-NEXT: fcvtl v2.4s, v0.4h
5850 ; CHECK-SD-NEXT: fcvtl2 v3.4s, v0.8h
5851 ; CHECK-SD-NEXT: fcvtl2 v4.4s, v1.8h
5852 ; CHECK-SD-NEXT: fcvtl v5.4s, v1.4h
5853 ; CHECK-SD-NEXT: fcvtzu v0.4s, v2.4s
5854 ; CHECK-SD-NEXT: fcvtzu v1.4s, v3.4s
5855 ; CHECK-SD-NEXT: fcvtzu v3.4s, v4.4s
5856 ; CHECK-SD-NEXT: fcvtzu v2.4s, v5.4s
5857 ; CHECK-SD-NEXT: ret
5858 ;
5859 ; CHECK-GI-LABEL: fptou_v16f16_v16i32:
5860 ; CHECK-GI: // %bb.0: // %entry
5861 ; CHECK-GI-NEXT: fcvtl v2.4s, v0.4h
5862 ; CHECK-GI-NEXT: fcvtl2 v3.4s, v0.8h
5863 ; CHECK-GI-NEXT: fcvtl v4.4s, v1.4h
5864 ; CHECK-GI-NEXT: fcvtl2 v5.4s, v1.8h
5865 ; CHECK-GI-NEXT: fcvtzu v0.4s, v2.4s
5866 ; CHECK-GI-NEXT: fcvtzu v1.4s, v3.4s
5867 ; CHECK-GI-NEXT: fcvtzu v2.4s, v4.4s
5868 ; CHECK-GI-NEXT: fcvtzu v3.4s, v5.4s
5869 ; CHECK-GI-NEXT: ret
5870 entry:
5871 %c = fptoui <16 x half> %a to <16 x i32>
5872 ret <16 x i32> %c
5873 }
5875 define <32 x i32> @fptos_v32f16_v32i32(<32 x half> %a) {
5876 ; CHECK-SD-LABEL: fptos_v32f16_v32i32:
5877 ; CHECK-SD: // %bb.0: // %entry
5878 ; CHECK-SD-NEXT: fcvtl2 v4.4s, v0.8h
5879 ; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h
5880 ; CHECK-SD-NEXT: fcvtl2 v5.4s, v1.8h
5881 ; CHECK-SD-NEXT: fcvtl v6.4s, v1.4h
5882 ; CHECK-SD-NEXT: fcvtl v7.4s, v2.4h
5883 ; CHECK-SD-NEXT: fcvtl2 v16.4s, v2.8h
5884 ; CHECK-SD-NEXT: fcvtl2 v17.4s, v3.8h
5885 ; CHECK-SD-NEXT: fcvtl v18.4s, v3.4h
5886 ; CHECK-SD-NEXT: fcvtzs v1.4s, v4.4s
5887 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
5888 ; CHECK-SD-NEXT: fcvtzs v3.4s, v5.4s
5889 ; CHECK-SD-NEXT: fcvtzs v2.4s, v6.4s
5890 ; CHECK-SD-NEXT: fcvtzs v4.4s, v7.4s
5891 ; CHECK-SD-NEXT: fcvtzs v5.4s, v16.4s
5892 ; CHECK-SD-NEXT: fcvtzs v7.4s, v17.4s
5893 ; CHECK-SD-NEXT: fcvtzs v6.4s, v18.4s
5894 ; CHECK-SD-NEXT: ret
5895 ;
5896 ; CHECK-GI-LABEL: fptos_v32f16_v32i32:
5897 ; CHECK-GI: // %bb.0: // %entry
5898 ; CHECK-GI-NEXT: fcvtl v4.4s, v0.4h
5899 ; CHECK-GI-NEXT: fcvtl2 v5.4s, v0.8h
5900 ; CHECK-GI-NEXT: fcvtl v6.4s, v1.4h
5901 ; CHECK-GI-NEXT: fcvtl2 v7.4s, v1.8h
5902 ; CHECK-GI-NEXT: fcvtl v16.4s, v2.4h
5903 ; CHECK-GI-NEXT: fcvtl2 v17.4s, v2.8h
5904 ; CHECK-GI-NEXT: fcvtl v18.4s, v3.4h
5905 ; CHECK-GI-NEXT: fcvtl2 v19.4s, v3.8h
5906 ; CHECK-GI-NEXT: fcvtzs v0.4s, v4.4s
5907 ; CHECK-GI-NEXT: fcvtzs v1.4s, v5.4s
5908 ; CHECK-GI-NEXT: fcvtzs v2.4s, v6.4s
5909 ; CHECK-GI-NEXT: fcvtzs v3.4s, v7.4s
5910 ; CHECK-GI-NEXT: fcvtzs v4.4s, v16.4s
5911 ; CHECK-GI-NEXT: fcvtzs v5.4s, v17.4s
5912 ; CHECK-GI-NEXT: fcvtzs v6.4s, v18.4s
5913 ; CHECK-GI-NEXT: fcvtzs v7.4s, v19.4s
5914 ; CHECK-GI-NEXT: ret
5915 entry:
5916 %c = fptosi <32 x half> %a to <32 x i32>
5917 ret <32 x i32> %c
5918 }
5920 define <32 x i32> @fptou_v32f16_v32i32(<32 x half> %a) {
5921 ; CHECK-SD-LABEL: fptou_v32f16_v32i32:
5922 ; CHECK-SD: // %bb.0: // %entry
5923 ; CHECK-SD-NEXT: fcvtl2 v4.4s, v0.8h
5924 ; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h
5925 ; CHECK-SD-NEXT: fcvtl2 v5.4s, v1.8h
5926 ; CHECK-SD-NEXT: fcvtl v6.4s, v1.4h
5927 ; CHECK-SD-NEXT: fcvtl v7.4s, v2.4h
5928 ; CHECK-SD-NEXT: fcvtl2 v16.4s, v2.8h
5929 ; CHECK-SD-NEXT: fcvtl2 v17.4s, v3.8h
5930 ; CHECK-SD-NEXT: fcvtl v18.4s, v3.4h
5931 ; CHECK-SD-NEXT: fcvtzu v1.4s, v4.4s
5932 ; CHECK-SD-NEXT: fcvtzu v0.4s, v0.4s
5933 ; CHECK-SD-NEXT: fcvtzu v3.4s, v5.4s
5934 ; CHECK-SD-NEXT: fcvtzu v2.4s, v6.4s
5935 ; CHECK-SD-NEXT: fcvtzu v4.4s, v7.4s
5936 ; CHECK-SD-NEXT: fcvtzu v5.4s, v16.4s
5937 ; CHECK-SD-NEXT: fcvtzu v7.4s, v17.4s
5938 ; CHECK-SD-NEXT: fcvtzu v6.4s, v18.4s
5939 ; CHECK-SD-NEXT: ret
5940 ;
5941 ; CHECK-GI-LABEL: fptou_v32f16_v32i32:
5942 ; CHECK-GI: // %bb.0: // %entry
5943 ; CHECK-GI-NEXT: fcvtl v4.4s, v0.4h
5944 ; CHECK-GI-NEXT: fcvtl2 v5.4s, v0.8h
5945 ; CHECK-GI-NEXT: fcvtl v6.4s, v1.4h
5946 ; CHECK-GI-NEXT: fcvtl2 v7.4s, v1.8h
5947 ; CHECK-GI-NEXT: fcvtl v16.4s, v2.4h
5948 ; CHECK-GI-NEXT: fcvtl2 v17.4s, v2.8h
5949 ; CHECK-GI-NEXT: fcvtl v18.4s, v3.4h
5950 ; CHECK-GI-NEXT: fcvtl2 v19.4s, v3.8h
5951 ; CHECK-GI-NEXT: fcvtzu v0.4s, v4.4s
5952 ; CHECK-GI-NEXT: fcvtzu v1.4s, v5.4s
5953 ; CHECK-GI-NEXT: fcvtzu v2.4s, v6.4s
5954 ; CHECK-GI-NEXT: fcvtzu v3.4s, v7.4s
5955 ; CHECK-GI-NEXT: fcvtzu v4.4s, v16.4s
5956 ; CHECK-GI-NEXT: fcvtzu v5.4s, v17.4s
5957 ; CHECK-GI-NEXT: fcvtzu v6.4s, v18.4s
5958 ; CHECK-GI-NEXT: fcvtzu v7.4s, v19.4s
5959 ; CHECK-GI-NEXT: ret
5960 entry:
5961 %c = fptoui <32 x half> %a to <32 x i32>
5962 ret <32 x i32> %c
5963 }
5965 define <2 x i16> @fptos_v2f16_v2i16(<2 x half> %a) {
5966 ; CHECK-SD-LABEL: fptos_v2f16_v2i16:
5967 ; CHECK-SD: // %bb.0: // %entry
5968 ; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h
5969 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
5970 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
5971 ; CHECK-SD-NEXT: ret
5972 ;
5973 ; CHECK-GI-NOFP16-LABEL: fptos_v2f16_v2i16:
5974 ; CHECK-GI-NOFP16: // %bb.0: // %entry
5975 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
5976 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.2s, v0.2s
5977 ; CHECK-GI-NOFP16-NEXT: ret
5978 ;
5979 ; CHECK-GI-FP16-LABEL: fptos_v2f16_v2i16:
5980 ; CHECK-GI-FP16: // %bb.0: // %entry
5981 ; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h
5982 ; CHECK-GI-FP16-NEXT: ushll v0.4s, v0.4h, #0
5983 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 killed $q0
5984 ; CHECK-GI-FP16-NEXT: ret
5985 entry:
5986 %c = fptosi <2 x half> %a to <2 x i16>
5987 ret <2 x i16> %c
5988 }
5990 define <2 x i16> @fptou_v2f16_v2i16(<2 x half> %a) {
5991 ; CHECK-SD-LABEL: fptou_v2f16_v2i16:
5992 ; CHECK-SD: // %bb.0: // %entry
5993 ; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h
5994 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
5995 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
5996 ; CHECK-SD-NEXT: ret
5997 ;
5998 ; CHECK-GI-NOFP16-LABEL: fptou_v2f16_v2i16:
5999 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6000 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6001 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.2s, v0.2s
6002 ; CHECK-GI-NOFP16-NEXT: ret
6003 ;
6004 ; CHECK-GI-FP16-LABEL: fptou_v2f16_v2i16:
6005 ; CHECK-GI-FP16: // %bb.0: // %entry
6006 ; CHECK-GI-FP16-NEXT: fcvtzu v0.4h, v0.4h
6007 ; CHECK-GI-FP16-NEXT: ushll v0.4s, v0.4h, #0
6008 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 killed $q0
6009 ; CHECK-GI-FP16-NEXT: ret
6010 entry:
6011 %c = fptoui <2 x half> %a to <2 x i16>
6012 ret <2 x i16> %c
6013 }
6015 define <3 x i16> @fptos_v3f16_v3i16(<3 x half> %a) {
6016 ; CHECK-SD-NOFP16-LABEL: fptos_v3f16_v3i16:
6017 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6018 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6019 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6020 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
6021 ; CHECK-SD-NOFP16-NEXT: ret
6022 ;
6023 ; CHECK-SD-FP16-LABEL: fptos_v3f16_v3i16:
6024 ; CHECK-SD-FP16: // %bb.0: // %entry
6025 ; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h
6026 ; CHECK-SD-FP16-NEXT: ret
6027 ;
6028 ; CHECK-GI-NOFP16-LABEL: fptos_v3f16_v3i16:
6029 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6030 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6031 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6032 ; CHECK-GI-NOFP16-NEXT: xtn v0.4h, v0.4s
6033 ; CHECK-GI-NOFP16-NEXT: ret
6034 ;
6035 ; CHECK-GI-FP16-LABEL: fptos_v3f16_v3i16:
6036 ; CHECK-GI-FP16: // %bb.0: // %entry
6037 ; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h
6038 ; CHECK-GI-FP16-NEXT: ret
6039 entry:
6040 %c = fptosi <3 x half> %a to <3 x i16>
6041 ret <3 x i16> %c
6042 }
6044 define <3 x i16> @fptou_v3f16_v3i16(<3 x half> %a) {
6045 ; CHECK-SD-NOFP16-LABEL: fptou_v3f16_v3i16:
6046 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6047 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6048 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6049 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
6050 ; CHECK-SD-NOFP16-NEXT: ret
6051 ;
6052 ; CHECK-SD-FP16-LABEL: fptou_v3f16_v3i16:
6053 ; CHECK-SD-FP16: // %bb.0: // %entry
6054 ; CHECK-SD-FP16-NEXT: fcvtzu v0.4h, v0.4h
6055 ; CHECK-SD-FP16-NEXT: ret
6056 ;
6057 ; CHECK-GI-NOFP16-LABEL: fptou_v3f16_v3i16:
6058 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6059 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6060 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6061 ; CHECK-GI-NOFP16-NEXT: xtn v0.4h, v0.4s
6062 ; CHECK-GI-NOFP16-NEXT: ret
6063 ;
6064 ; CHECK-GI-FP16-LABEL: fptou_v3f16_v3i16:
6065 ; CHECK-GI-FP16: // %bb.0: // %entry
6066 ; CHECK-GI-FP16-NEXT: fcvtzu v0.4h, v0.4h
6067 ; CHECK-GI-FP16-NEXT: ret
6068 entry:
6069 %c = fptoui <3 x half> %a to <3 x i16>
6070 ret <3 x i16> %c
6071 }
6073 define <4 x i16> @fptos_v4f16_v4i16(<4 x half> %a) {
6074 ; CHECK-SD-NOFP16-LABEL: fptos_v4f16_v4i16:
6075 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6076 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6077 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6078 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
6079 ; CHECK-SD-NOFP16-NEXT: ret
6080 ;
6081 ; CHECK-SD-FP16-LABEL: fptos_v4f16_v4i16:
6082 ; CHECK-SD-FP16: // %bb.0: // %entry
6083 ; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h
6084 ; CHECK-SD-FP16-NEXT: ret
6085 ;
6086 ; CHECK-GI-NOFP16-LABEL: fptos_v4f16_v4i16:
6087 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6088 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6089 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6090 ; CHECK-GI-NOFP16-NEXT: xtn v0.4h, v0.4s
6091 ; CHECK-GI-NOFP16-NEXT: ret
6092 ;
6093 ; CHECK-GI-FP16-LABEL: fptos_v4f16_v4i16:
6094 ; CHECK-GI-FP16: // %bb.0: // %entry
6095 ; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h
6096 ; CHECK-GI-FP16-NEXT: ret
6097 entry:
6098 %c = fptosi <4 x half> %a to <4 x i16>
6099 ret <4 x i16> %c
6100 }
6102 define <4 x i16> @fptou_v4f16_v4i16(<4 x half> %a) {
6103 ; CHECK-SD-NOFP16-LABEL: fptou_v4f16_v4i16:
6104 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6105 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6106 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6107 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
6108 ; CHECK-SD-NOFP16-NEXT: ret
6109 ;
6110 ; CHECK-SD-FP16-LABEL: fptou_v4f16_v4i16:
6111 ; CHECK-SD-FP16: // %bb.0: // %entry
6112 ; CHECK-SD-FP16-NEXT: fcvtzu v0.4h, v0.4h
6113 ; CHECK-SD-FP16-NEXT: ret
6114 ;
6115 ; CHECK-GI-NOFP16-LABEL: fptou_v4f16_v4i16:
6116 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6117 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6118 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6119 ; CHECK-GI-NOFP16-NEXT: xtn v0.4h, v0.4s
6120 ; CHECK-GI-NOFP16-NEXT: ret
6121 ;
6122 ; CHECK-GI-FP16-LABEL: fptou_v4f16_v4i16:
6123 ; CHECK-GI-FP16: // %bb.0: // %entry
6124 ; CHECK-GI-FP16-NEXT: fcvtzu v0.4h, v0.4h
6125 ; CHECK-GI-FP16-NEXT: ret
6126 entry:
6127 %c = fptoui <4 x half> %a to <4 x i16>
6128 ret <4 x i16> %c
6129 }
6131 define <8 x i16> @fptos_v8f16_v8i16(<8 x half> %a) {
6132 ; CHECK-SD-NOFP16-LABEL: fptos_v8f16_v8i16:
6133 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6134 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v1.4s, v0.8h
6135 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6136 ; CHECK-SD-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6137 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6138 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v1.8h
6139 ; CHECK-SD-NOFP16-NEXT: ret
6140 ;
6141 ; CHECK-SD-FP16-LABEL: fptos_v8f16_v8i16:
6142 ; CHECK-SD-FP16: // %bb.0: // %entry
6143 ; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h
6144 ; CHECK-SD-FP16-NEXT: ret
6145 ;
6146 ; CHECK-GI-NOFP16-LABEL: fptos_v8f16_v8i16:
6147 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6148 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v0.4h
6149 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6150 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6151 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6152 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v1.8h, v0.8h
6153 ; CHECK-GI-NOFP16-NEXT: ret
6154 ;
6155 ; CHECK-GI-FP16-LABEL: fptos_v8f16_v8i16:
6156 ; CHECK-GI-FP16: // %bb.0: // %entry
6157 ; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h
6158 ; CHECK-GI-FP16-NEXT: ret
6159 entry:
6160 %c = fptosi <8 x half> %a to <8 x i16>
6161 ret <8 x i16> %c
6162 }
6164 define <8 x i16> @fptou_v8f16_v8i16(<8 x half> %a) {
6165 ; CHECK-SD-NOFP16-LABEL: fptou_v8f16_v8i16:
6166 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6167 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v1.4s, v0.8h
6168 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6169 ; CHECK-SD-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6170 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6171 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v1.8h
6172 ; CHECK-SD-NOFP16-NEXT: ret
6173 ;
6174 ; CHECK-SD-FP16-LABEL: fptou_v8f16_v8i16:
6175 ; CHECK-SD-FP16: // %bb.0: // %entry
6176 ; CHECK-SD-FP16-NEXT: fcvtzu v0.8h, v0.8h
6177 ; CHECK-SD-FP16-NEXT: ret
6178 ;
6179 ; CHECK-GI-NOFP16-LABEL: fptou_v8f16_v8i16:
6180 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6181 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v0.4h
6182 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6183 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6184 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6185 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v1.8h, v0.8h
6186 ; CHECK-GI-NOFP16-NEXT: ret
6187 ;
6188 ; CHECK-GI-FP16-LABEL: fptou_v8f16_v8i16:
6189 ; CHECK-GI-FP16: // %bb.0: // %entry
6190 ; CHECK-GI-FP16-NEXT: fcvtzu v0.8h, v0.8h
6191 ; CHECK-GI-FP16-NEXT: ret
6192 entry:
6193 %c = fptoui <8 x half> %a to <8 x i16>
6194 ret <8 x i16> %c
6195 }
6197 define <16 x i16> @fptos_v16f16_v16i16(<16 x half> %a) {
6198 ; CHECK-SD-NOFP16-LABEL: fptos_v16f16_v16i16:
6199 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6200 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v2.4s, v0.8h
6201 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6202 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v3.4s, v1.8h
6203 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
6204 ; CHECK-SD-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
6205 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6206 ; CHECK-SD-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
6207 ; CHECK-SD-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6208 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v2.8h
6209 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v3.8h
6210 ; CHECK-SD-NOFP16-NEXT: ret
6211 ;
6212 ; CHECK-SD-FP16-LABEL: fptos_v16f16_v16i16:
6213 ; CHECK-SD-FP16: // %bb.0: // %entry
6214 ; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h
6215 ; CHECK-SD-FP16-NEXT: fcvtzs v1.8h, v1.8h
6216 ; CHECK-SD-FP16-NEXT: ret
6217 ;
6218 ; CHECK-GI-NOFP16-LABEL: fptos_v16f16_v16i16:
6219 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6220 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v0.4h
6221 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6222 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.4s, v1.4h
6223 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
6224 ; CHECK-GI-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
6225 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6226 ; CHECK-GI-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
6227 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6228 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v2.8h, v0.8h
6229 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v3.8h, v1.8h
6230 ; CHECK-GI-NOFP16-NEXT: ret
6231 ;
6232 ; CHECK-GI-FP16-LABEL: fptos_v16f16_v16i16:
6233 ; CHECK-GI-FP16: // %bb.0: // %entry
6234 ; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h
6235 ; CHECK-GI-FP16-NEXT: fcvtzs v1.8h, v1.8h
6236 ; CHECK-GI-FP16-NEXT: ret
6237 entry:
6238 %c = fptosi <16 x half> %a to <16 x i16>
6239 ret <16 x i16> %c
6240 }
6242 define <16 x i16> @fptou_v16f16_v16i16(<16 x half> %a) {
6243 ; CHECK-SD-NOFP16-LABEL: fptou_v16f16_v16i16:
6244 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6245 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v2.4s, v0.8h
6246 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6247 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v3.4s, v1.8h
6248 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
6249 ; CHECK-SD-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
6250 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6251 ; CHECK-SD-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
6252 ; CHECK-SD-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6253 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v2.8h
6254 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v3.8h
6255 ; CHECK-SD-NOFP16-NEXT: ret
6256 ;
6257 ; CHECK-SD-FP16-LABEL: fptou_v16f16_v16i16:
6258 ; CHECK-SD-FP16: // %bb.0: // %entry
6259 ; CHECK-SD-FP16-NEXT: fcvtzu v0.8h, v0.8h
6260 ; CHECK-SD-FP16-NEXT: fcvtzu v1.8h, v1.8h
6261 ; CHECK-SD-FP16-NEXT: ret
6262 ;
6263 ; CHECK-GI-NOFP16-LABEL: fptou_v16f16_v16i16:
6264 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6265 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v0.4h
6266 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6267 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.4s, v1.4h
6268 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
6269 ; CHECK-GI-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
6270 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6271 ; CHECK-GI-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
6272 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6273 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v2.8h, v0.8h
6274 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v3.8h, v1.8h
6275 ; CHECK-GI-NOFP16-NEXT: ret
6276 ;
6277 ; CHECK-GI-FP16-LABEL: fptou_v16f16_v16i16:
6278 ; CHECK-GI-FP16: // %bb.0: // %entry
6279 ; CHECK-GI-FP16-NEXT: fcvtzu v0.8h, v0.8h
6280 ; CHECK-GI-FP16-NEXT: fcvtzu v1.8h, v1.8h
6281 ; CHECK-GI-FP16-NEXT: ret
6282 entry:
6283 %c = fptoui <16 x half> %a to <16 x i16>
6284 ret <16 x i16> %c
6285 }
6287 define <32 x i16> @fptos_v32f16_v32i16(<32 x half> %a) {
6288 ; CHECK-SD-NOFP16-LABEL: fptos_v32f16_v32i16:
6289 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6290 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v4.4s, v0.8h
6291 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6292 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v5.4s, v1.8h
6293 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
6294 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v6.4s, v2.8h
6295 ; CHECK-SD-NOFP16-NEXT: fcvtl v2.4s, v2.4h
6296 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v7.4s, v3.8h
6297 ; CHECK-SD-NOFP16-NEXT: fcvtl v3.4s, v3.4h
6298 ; CHECK-SD-NOFP16-NEXT: fcvtzs v4.4s, v4.4s
6299 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6300 ; CHECK-SD-NOFP16-NEXT: fcvtzs v5.4s, v5.4s
6301 ; CHECK-SD-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6302 ; CHECK-SD-NOFP16-NEXT: fcvtzs v6.4s, v6.4s
6303 ; CHECK-SD-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
6304 ; CHECK-SD-NOFP16-NEXT: fcvtzs v7.4s, v7.4s
6305 ; CHECK-SD-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
6306 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v4.8h
6307 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v5.8h
6308 ; CHECK-SD-NOFP16-NEXT: uzp1 v2.8h, v2.8h, v6.8h
6309 ; CHECK-SD-NOFP16-NEXT: uzp1 v3.8h, v3.8h, v7.8h
6310 ; CHECK-SD-NOFP16-NEXT: ret
6311 ;
6312 ; CHECK-SD-FP16-LABEL: fptos_v32f16_v32i16:
6313 ; CHECK-SD-FP16: // %bb.0: // %entry
6314 ; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h
6315 ; CHECK-SD-FP16-NEXT: fcvtzs v1.8h, v1.8h
6316 ; CHECK-SD-FP16-NEXT: fcvtzs v2.8h, v2.8h
6317 ; CHECK-SD-FP16-NEXT: fcvtzs v3.8h, v3.8h
6318 ; CHECK-SD-FP16-NEXT: ret
6319 ;
6320 ; CHECK-GI-NOFP16-LABEL: fptos_v32f16_v32i16:
6321 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6322 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.4s, v0.4h
6323 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6324 ; CHECK-GI-NOFP16-NEXT: fcvtl v5.4s, v1.4h
6325 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
6326 ; CHECK-GI-NOFP16-NEXT: fcvtl v6.4s, v2.4h
6327 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.4s, v2.8h
6328 ; CHECK-GI-NOFP16-NEXT: fcvtl v7.4s, v3.4h
6329 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v3.4s, v3.8h
6330 ; CHECK-GI-NOFP16-NEXT: fcvtzs v4.4s, v4.4s
6331 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6332 ; CHECK-GI-NOFP16-NEXT: fcvtzs v5.4s, v5.4s
6333 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6334 ; CHECK-GI-NOFP16-NEXT: fcvtzs v6.4s, v6.4s
6335 ; CHECK-GI-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
6336 ; CHECK-GI-NOFP16-NEXT: fcvtzs v7.4s, v7.4s
6337 ; CHECK-GI-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
6338 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v4.8h, v0.8h
6339 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v5.8h, v1.8h
6340 ; CHECK-GI-NOFP16-NEXT: uzp1 v2.8h, v6.8h, v2.8h
6341 ; CHECK-GI-NOFP16-NEXT: uzp1 v3.8h, v7.8h, v3.8h
6342 ; CHECK-GI-NOFP16-NEXT: ret
6343 ;
6344 ; CHECK-GI-FP16-LABEL: fptos_v32f16_v32i16:
6345 ; CHECK-GI-FP16: // %bb.0: // %entry
6346 ; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h
6347 ; CHECK-GI-FP16-NEXT: fcvtzs v1.8h, v1.8h
6348 ; CHECK-GI-FP16-NEXT: fcvtzs v2.8h, v2.8h
6349 ; CHECK-GI-FP16-NEXT: fcvtzs v3.8h, v3.8h
6350 ; CHECK-GI-FP16-NEXT: ret
6351 entry:
6352 %c = fptosi <32 x half> %a to <32 x i16>
6353 ret <32 x i16> %c
6354 }
6356 define <32 x i16> @fptou_v32f16_v32i16(<32 x half> %a) {
6357 ; CHECK-SD-NOFP16-LABEL: fptou_v32f16_v32i16:
6358 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6359 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v4.4s, v0.8h
6360 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6361 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v5.4s, v1.8h
6362 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
6363 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v6.4s, v2.8h
6364 ; CHECK-SD-NOFP16-NEXT: fcvtl v2.4s, v2.4h
6365 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v7.4s, v3.8h
6366 ; CHECK-SD-NOFP16-NEXT: fcvtl v3.4s, v3.4h
6367 ; CHECK-SD-NOFP16-NEXT: fcvtzu v4.4s, v4.4s
6368 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6369 ; CHECK-SD-NOFP16-NEXT: fcvtzu v5.4s, v5.4s
6370 ; CHECK-SD-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6371 ; CHECK-SD-NOFP16-NEXT: fcvtzu v6.4s, v6.4s
6372 ; CHECK-SD-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
6373 ; CHECK-SD-NOFP16-NEXT: fcvtzu v7.4s, v7.4s
6374 ; CHECK-SD-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
6375 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v4.8h
6376 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v5.8h
6377 ; CHECK-SD-NOFP16-NEXT: uzp1 v2.8h, v2.8h, v6.8h
6378 ; CHECK-SD-NOFP16-NEXT: uzp1 v3.8h, v3.8h, v7.8h
6379 ; CHECK-SD-NOFP16-NEXT: ret
6380 ;
6381 ; CHECK-SD-FP16-LABEL: fptou_v32f16_v32i16:
6382 ; CHECK-SD-FP16: // %bb.0: // %entry
6383 ; CHECK-SD-FP16-NEXT: fcvtzu v0.8h, v0.8h
6384 ; CHECK-SD-FP16-NEXT: fcvtzu v1.8h, v1.8h
6385 ; CHECK-SD-FP16-NEXT: fcvtzu v2.8h, v2.8h
6386 ; CHECK-SD-FP16-NEXT: fcvtzu v3.8h, v3.8h
6387 ; CHECK-SD-FP16-NEXT: ret
6388 ;
6389 ; CHECK-GI-NOFP16-LABEL: fptou_v32f16_v32i16:
6390 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6391 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.4s, v0.4h
6392 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6393 ; CHECK-GI-NOFP16-NEXT: fcvtl v5.4s, v1.4h
6394 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
6395 ; CHECK-GI-NOFP16-NEXT: fcvtl v6.4s, v2.4h
6396 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.4s, v2.8h
6397 ; CHECK-GI-NOFP16-NEXT: fcvtl v7.4s, v3.4h
6398 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v3.4s, v3.8h
6399 ; CHECK-GI-NOFP16-NEXT: fcvtzu v4.4s, v4.4s
6400 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6401 ; CHECK-GI-NOFP16-NEXT: fcvtzu v5.4s, v5.4s
6402 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6403 ; CHECK-GI-NOFP16-NEXT: fcvtzu v6.4s, v6.4s
6404 ; CHECK-GI-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
6405 ; CHECK-GI-NOFP16-NEXT: fcvtzu v7.4s, v7.4s
6406 ; CHECK-GI-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
6407 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v4.8h, v0.8h
6408 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v5.8h, v1.8h
6409 ; CHECK-GI-NOFP16-NEXT: uzp1 v2.8h, v6.8h, v2.8h
6410 ; CHECK-GI-NOFP16-NEXT: uzp1 v3.8h, v7.8h, v3.8h
6411 ; CHECK-GI-NOFP16-NEXT: ret
6412 ;
6413 ; CHECK-GI-FP16-LABEL: fptou_v32f16_v32i16:
6414 ; CHECK-GI-FP16: // %bb.0: // %entry
6415 ; CHECK-GI-FP16-NEXT: fcvtzu v0.8h, v0.8h
6416 ; CHECK-GI-FP16-NEXT: fcvtzu v1.8h, v1.8h
6417 ; CHECK-GI-FP16-NEXT: fcvtzu v2.8h, v2.8h
6418 ; CHECK-GI-FP16-NEXT: fcvtzu v3.8h, v3.8h
6419 ; CHECK-GI-FP16-NEXT: ret
6420 entry:
6421 %c = fptoui <32 x half> %a to <32 x i16>
6422 ret <32 x i16> %c
6423 }
6425 define <2 x i8> @fptos_v2f16_v2i8(<2 x half> %a) {
6426 ; CHECK-SD-LABEL: fptos_v2f16_v2i8:
6427 ; CHECK-SD: // %bb.0: // %entry
6428 ; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h
6429 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
6430 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
6431 ; CHECK-SD-NEXT: ret
6432 ;
6433 ; CHECK-GI-NOFP16-LABEL: fptos_v2f16_v2i8:
6434 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6435 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6436 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.2s, v0.2s
6437 ; CHECK-GI-NOFP16-NEXT: ret
6438 ;
6439 ; CHECK-GI-FP16-LABEL: fptos_v2f16_v2i8:
6440 ; CHECK-GI-FP16: // %bb.0: // %entry
6441 ; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h
6442 ; CHECK-GI-FP16-NEXT: ushll v0.4s, v0.4h, #0
6443 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 killed $q0
6444 ; CHECK-GI-FP16-NEXT: ret
6445 entry:
6446 %c = fptosi <2 x half> %a to <2 x i8>
6447 ret <2 x i8> %c
6448 }
6450 define <2 x i8> @fptou_v2f16_v2i8(<2 x half> %a) {
6451 ; CHECK-SD-LABEL: fptou_v2f16_v2i8:
6452 ; CHECK-SD: // %bb.0: // %entry
6453 ; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h
6454 ; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s
6455 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
6456 ; CHECK-SD-NEXT: ret
6457 ;
6458 ; CHECK-GI-NOFP16-LABEL: fptou_v2f16_v2i8:
6459 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6460 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6461 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.2s, v0.2s
6462 ; CHECK-GI-NOFP16-NEXT: ret
6463 ;
6464 ; CHECK-GI-FP16-LABEL: fptou_v2f16_v2i8:
6465 ; CHECK-GI-FP16: // %bb.0: // %entry
6466 ; CHECK-GI-FP16-NEXT: fcvtzu v0.4h, v0.4h
6467 ; CHECK-GI-FP16-NEXT: ushll v0.4s, v0.4h, #0
6468 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 killed $q0
6469 ; CHECK-GI-FP16-NEXT: ret
6470 entry:
6471 %c = fptoui <2 x half> %a to <2 x i8>
6472 ret <2 x i8> %c
6473 }
6475 define <3 x i8> @fptos_v3f16_v3i8(<3 x half> %a) {
6476 ; CHECK-SD-NOFP16-LABEL: fptos_v3f16_v3i8:
6477 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6478 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6479 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6480 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
6481 ; CHECK-SD-NOFP16-NEXT: umov w0, v0.h[0]
6482 ; CHECK-SD-NOFP16-NEXT: umov w1, v0.h[1]
6483 ; CHECK-SD-NOFP16-NEXT: umov w2, v0.h[2]
6484 ; CHECK-SD-NOFP16-NEXT: ret
6485 ;
6486 ; CHECK-SD-FP16-LABEL: fptos_v3f16_v3i8:
6487 ; CHECK-SD-FP16: // %bb.0: // %entry
6488 ; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h
6489 ; CHECK-SD-FP16-NEXT: umov w0, v0.h[0]
6490 ; CHECK-SD-FP16-NEXT: umov w1, v0.h[1]
6491 ; CHECK-SD-FP16-NEXT: umov w2, v0.h[2]
6492 ; CHECK-SD-FP16-NEXT: ret
6493 ;
6494 ; CHECK-GI-NOFP16-LABEL: fptos_v3f16_v3i8:
6495 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6496 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6497 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6498 ; CHECK-GI-NOFP16-NEXT: mov s1, v0.s[1]
6499 ; CHECK-GI-NOFP16-NEXT: mov s2, v0.s[2]
6500 ; CHECK-GI-NOFP16-NEXT: fmov w0, s0
6501 ; CHECK-GI-NOFP16-NEXT: fmov w1, s1
6502 ; CHECK-GI-NOFP16-NEXT: fmov w2, s2
6503 ; CHECK-GI-NOFP16-NEXT: ret
6504 ;
6505 ; CHECK-GI-FP16-LABEL: fptos_v3f16_v3i8:
6506 ; CHECK-GI-FP16: // %bb.0: // %entry
6507 ; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h
6508 ; CHECK-GI-FP16-NEXT: umov w0, v0.h[0]
6509 ; CHECK-GI-FP16-NEXT: umov w1, v0.h[1]
6510 ; CHECK-GI-FP16-NEXT: umov w2, v0.h[2]
6511 ; CHECK-GI-FP16-NEXT: ret
6512 entry:
6513 %c = fptosi <3 x half> %a to <3 x i8>
6514 ret <3 x i8> %c
6515 }
6517 define <3 x i8> @fptou_v3f16_v3i8(<3 x half> %a) {
6518 ; CHECK-SD-NOFP16-LABEL: fptou_v3f16_v3i8:
6519 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6520 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6521 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6522 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
6523 ; CHECK-SD-NOFP16-NEXT: umov w0, v0.h[0]
6524 ; CHECK-SD-NOFP16-NEXT: umov w1, v0.h[1]
6525 ; CHECK-SD-NOFP16-NEXT: umov w2, v0.h[2]
6526 ; CHECK-SD-NOFP16-NEXT: ret
6527 ;
6528 ; CHECK-SD-FP16-LABEL: fptou_v3f16_v3i8:
6529 ; CHECK-SD-FP16: // %bb.0: // %entry
6530 ; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h
6531 ; CHECK-SD-FP16-NEXT: umov w0, v0.h[0]
6532 ; CHECK-SD-FP16-NEXT: umov w1, v0.h[1]
6533 ; CHECK-SD-FP16-NEXT: umov w2, v0.h[2]
6534 ; CHECK-SD-FP16-NEXT: ret
6535 ;
6536 ; CHECK-GI-NOFP16-LABEL: fptou_v3f16_v3i8:
6537 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6538 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6539 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6540 ; CHECK-GI-NOFP16-NEXT: mov s1, v0.s[1]
6541 ; CHECK-GI-NOFP16-NEXT: mov s2, v0.s[2]
6542 ; CHECK-GI-NOFP16-NEXT: fmov w0, s0
6543 ; CHECK-GI-NOFP16-NEXT: fmov w1, s1
6544 ; CHECK-GI-NOFP16-NEXT: fmov w2, s2
6545 ; CHECK-GI-NOFP16-NEXT: ret
6546 ;
6547 ; CHECK-GI-FP16-LABEL: fptou_v3f16_v3i8:
6548 ; CHECK-GI-FP16: // %bb.0: // %entry
6549 ; CHECK-GI-FP16-NEXT: fcvtzu v0.4h, v0.4h
6550 ; CHECK-GI-FP16-NEXT: umov w0, v0.h[0]
6551 ; CHECK-GI-FP16-NEXT: umov w1, v0.h[1]
6552 ; CHECK-GI-FP16-NEXT: umov w2, v0.h[2]
6553 ; CHECK-GI-FP16-NEXT: ret
6554 entry:
6555 %c = fptoui <3 x half> %a to <3 x i8>
6556 ret <3 x i8> %c
6557 }
6559 define <4 x i8> @fptos_v4f16_v4i8(<4 x half> %a) {
6560 ; CHECK-SD-NOFP16-LABEL: fptos_v4f16_v4i8:
6561 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6562 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6563 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6564 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
6565 ; CHECK-SD-NOFP16-NEXT: ret
6566 ;
6567 ; CHECK-SD-FP16-LABEL: fptos_v4f16_v4i8:
6568 ; CHECK-SD-FP16: // %bb.0: // %entry
6569 ; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h
6570 ; CHECK-SD-FP16-NEXT: ret
6571 ;
6572 ; CHECK-GI-NOFP16-LABEL: fptos_v4f16_v4i8:
6573 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6574 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6575 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6576 ; CHECK-GI-NOFP16-NEXT: xtn v0.4h, v0.4s
6577 ; CHECK-GI-NOFP16-NEXT: ret
6578 ;
6579 ; CHECK-GI-FP16-LABEL: fptos_v4f16_v4i8:
6580 ; CHECK-GI-FP16: // %bb.0: // %entry
6581 ; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h
6582 ; CHECK-GI-FP16-NEXT: ret
6583 entry:
6584 %c = fptosi <4 x half> %a to <4 x i8>
6585 ret <4 x i8> %c
6586 }
6588 define <4 x i8> @fptou_v4f16_v4i8(<4 x half> %a) {
6589 ; CHECK-SD-NOFP16-LABEL: fptou_v4f16_v4i8:
6590 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6591 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6592 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6593 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
6594 ; CHECK-SD-NOFP16-NEXT: ret
6595 ;
6596 ; CHECK-SD-FP16-LABEL: fptou_v4f16_v4i8:
6597 ; CHECK-SD-FP16: // %bb.0: // %entry
6598 ; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h
6599 ; CHECK-SD-FP16-NEXT: ret
6600 ;
6601 ; CHECK-GI-NOFP16-LABEL: fptou_v4f16_v4i8:
6602 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6603 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6604 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6605 ; CHECK-GI-NOFP16-NEXT: xtn v0.4h, v0.4s
6606 ; CHECK-GI-NOFP16-NEXT: ret
6607 ;
6608 ; CHECK-GI-FP16-LABEL: fptou_v4f16_v4i8:
6609 ; CHECK-GI-FP16: // %bb.0: // %entry
6610 ; CHECK-GI-FP16-NEXT: fcvtzu v0.4h, v0.4h
6611 ; CHECK-GI-FP16-NEXT: ret
6612 entry:
6613 %c = fptoui <4 x half> %a to <4 x i8>
6614 ret <4 x i8> %c
6615 }
6617 define <8 x i8> @fptos_v8f16_v8i8(<8 x half> %a) {
6618 ; CHECK-SD-NOFP16-LABEL: fptos_v8f16_v8i8:
6619 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6620 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v1.4s, v0.8h
6621 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6622 ; CHECK-SD-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6623 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6624 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v1.8h
6625 ; CHECK-SD-NOFP16-NEXT: xtn v0.8b, v0.8h
6626 ; CHECK-SD-NOFP16-NEXT: ret
6627 ;
6628 ; CHECK-SD-FP16-LABEL: fptos_v8f16_v8i8:
6629 ; CHECK-SD-FP16: // %bb.0: // %entry
6630 ; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h
6631 ; CHECK-SD-FP16-NEXT: xtn v0.8b, v0.8h
6632 ; CHECK-SD-FP16-NEXT: ret
6633 ;
6634 ; CHECK-GI-NOFP16-LABEL: fptos_v8f16_v8i8:
6635 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6636 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v0.4h
6637 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6638 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6639 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6640 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v1.8h, v0.8h
6641 ; CHECK-GI-NOFP16-NEXT: xtn v0.8b, v0.8h
6642 ; CHECK-GI-NOFP16-NEXT: ret
6643 ;
6644 ; CHECK-GI-FP16-LABEL: fptos_v8f16_v8i8:
6645 ; CHECK-GI-FP16: // %bb.0: // %entry
6646 ; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h
6647 ; CHECK-GI-FP16-NEXT: xtn v0.8b, v0.8h
6648 ; CHECK-GI-FP16-NEXT: ret
6649 entry:
6650 %c = fptosi <8 x half> %a to <8 x i8>
6651 ret <8 x i8> %c
6652 }
6654 define <8 x i8> @fptou_v8f16_v8i8(<8 x half> %a) {
6655 ; CHECK-SD-NOFP16-LABEL: fptou_v8f16_v8i8:
6656 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6657 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v1.4s, v0.8h
6658 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6659 ; CHECK-SD-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6660 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6661 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v1.8h
6662 ; CHECK-SD-NOFP16-NEXT: xtn v0.8b, v0.8h
6663 ; CHECK-SD-NOFP16-NEXT: ret
6664 ;
6665 ; CHECK-SD-FP16-LABEL: fptou_v8f16_v8i8:
6666 ; CHECK-SD-FP16: // %bb.0: // %entry
6667 ; CHECK-SD-FP16-NEXT: fcvtzu v0.8h, v0.8h
6668 ; CHECK-SD-FP16-NEXT: xtn v0.8b, v0.8h
6669 ; CHECK-SD-FP16-NEXT: ret
6670 ;
6671 ; CHECK-GI-NOFP16-LABEL: fptou_v8f16_v8i8:
6672 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6673 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v0.4h
6674 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6675 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6676 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6677 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v1.8h, v0.8h
6678 ; CHECK-GI-NOFP16-NEXT: xtn v0.8b, v0.8h
6679 ; CHECK-GI-NOFP16-NEXT: ret
6680 ;
6681 ; CHECK-GI-FP16-LABEL: fptou_v8f16_v8i8:
6682 ; CHECK-GI-FP16: // %bb.0: // %entry
6683 ; CHECK-GI-FP16-NEXT: fcvtzu v0.8h, v0.8h
6684 ; CHECK-GI-FP16-NEXT: xtn v0.8b, v0.8h
6685 ; CHECK-GI-FP16-NEXT: ret
6686 entry:
6687 %c = fptoui <8 x half> %a to <8 x i8>
6688 ret <8 x i8> %c
6689 }
6691 define <16 x i8> @fptos_v16f16_v16i8(<16 x half> %a) {
6692 ; CHECK-SD-NOFP16-LABEL: fptos_v16f16_v16i8:
6693 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6694 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v2.4s, v1.8h
6695 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
6696 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v3.4s, v0.8h
6697 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6698 ; CHECK-SD-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
6699 ; CHECK-SD-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6700 ; CHECK-SD-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
6701 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6702 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v2.8h
6703 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v3.8h
6704 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6705 ; CHECK-SD-NOFP16-NEXT: ret
6706 ;
6707 ; CHECK-SD-FP16-LABEL: fptos_v16f16_v16i8:
6708 ; CHECK-SD-FP16: // %bb.0: // %entry
6709 ; CHECK-SD-FP16-NEXT: fcvtzs v1.8h, v1.8h
6710 ; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h
6711 ; CHECK-SD-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6712 ; CHECK-SD-FP16-NEXT: ret
6713 ;
6714 ; CHECK-GI-NOFP16-LABEL: fptos_v16f16_v16i8:
6715 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6716 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v0.4h
6717 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6718 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.4s, v1.4h
6719 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
6720 ; CHECK-GI-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
6721 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6722 ; CHECK-GI-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
6723 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6724 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v2.8h, v0.8h
6725 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v3.8h, v1.8h
6726 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6727 ; CHECK-GI-NOFP16-NEXT: ret
6728 ;
6729 ; CHECK-GI-FP16-LABEL: fptos_v16f16_v16i8:
6730 ; CHECK-GI-FP16: // %bb.0: // %entry
6731 ; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h
6732 ; CHECK-GI-FP16-NEXT: fcvtzs v1.8h, v1.8h
6733 ; CHECK-GI-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6734 ; CHECK-GI-FP16-NEXT: ret
6735 entry:
6736 %c = fptosi <16 x half> %a to <16 x i8>
6737 ret <16 x i8> %c
6738 }
6740 define <16 x i8> @fptou_v16f16_v16i8(<16 x half> %a) {
6741 ; CHECK-SD-NOFP16-LABEL: fptou_v16f16_v16i8:
6742 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6743 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v2.4s, v1.8h
6744 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
6745 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v3.4s, v0.8h
6746 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6747 ; CHECK-SD-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
6748 ; CHECK-SD-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6749 ; CHECK-SD-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
6750 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6751 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v2.8h
6752 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v3.8h
6753 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6754 ; CHECK-SD-NOFP16-NEXT: ret
6755 ;
6756 ; CHECK-SD-FP16-LABEL: fptou_v16f16_v16i8:
6757 ; CHECK-SD-FP16: // %bb.0: // %entry
6758 ; CHECK-SD-FP16-NEXT: fcvtzu v1.8h, v1.8h
6759 ; CHECK-SD-FP16-NEXT: fcvtzu v0.8h, v0.8h
6760 ; CHECK-SD-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6761 ; CHECK-SD-FP16-NEXT: ret
6762 ;
6763 ; CHECK-GI-NOFP16-LABEL: fptou_v16f16_v16i8:
6764 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6765 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v0.4h
6766 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6767 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.4s, v1.4h
6768 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
6769 ; CHECK-GI-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
6770 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6771 ; CHECK-GI-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
6772 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6773 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v2.8h, v0.8h
6774 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v3.8h, v1.8h
6775 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6776 ; CHECK-GI-NOFP16-NEXT: ret
6777 ;
6778 ; CHECK-GI-FP16-LABEL: fptou_v16f16_v16i8:
6779 ; CHECK-GI-FP16: // %bb.0: // %entry
6780 ; CHECK-GI-FP16-NEXT: fcvtzu v0.8h, v0.8h
6781 ; CHECK-GI-FP16-NEXT: fcvtzu v1.8h, v1.8h
6782 ; CHECK-GI-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6783 ; CHECK-GI-FP16-NEXT: ret
6784 entry:
6785 %c = fptoui <16 x half> %a to <16 x i8>
6786 ret <16 x i8> %c
6787 }
6789 define <32 x i8> @fptos_v32f16_v32i8(<32 x half> %a) {
6790 ; CHECK-SD-NOFP16-LABEL: fptos_v32f16_v32i8:
6791 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6792 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v4.4s, v1.8h
6793 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
6794 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v5.4s, v0.8h
6795 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6796 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v6.4s, v3.8h
6797 ; CHECK-SD-NOFP16-NEXT: fcvtl v3.4s, v3.4h
6798 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v7.4s, v2.8h
6799 ; CHECK-SD-NOFP16-NEXT: fcvtl v2.4s, v2.4h
6800 ; CHECK-SD-NOFP16-NEXT: fcvtzs v4.4s, v4.4s
6801 ; CHECK-SD-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6802 ; CHECK-SD-NOFP16-NEXT: fcvtzs v5.4s, v5.4s
6803 ; CHECK-SD-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6804 ; CHECK-SD-NOFP16-NEXT: fcvtzs v6.4s, v6.4s
6805 ; CHECK-SD-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
6806 ; CHECK-SD-NOFP16-NEXT: fcvtzs v7.4s, v7.4s
6807 ; CHECK-SD-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
6808 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v4.8h
6809 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v5.8h
6810 ; CHECK-SD-NOFP16-NEXT: uzp1 v3.8h, v3.8h, v6.8h
6811 ; CHECK-SD-NOFP16-NEXT: uzp1 v2.8h, v2.8h, v7.8h
6812 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6813 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
6814 ; CHECK-SD-NOFP16-NEXT: ret
6815 ;
6816 ; CHECK-SD-FP16-LABEL: fptos_v32f16_v32i8:
6817 ; CHECK-SD-FP16: // %bb.0: // %entry
6818 ; CHECK-SD-FP16-NEXT: fcvtzs v1.8h, v1.8h
6819 ; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h
6820 ; CHECK-SD-FP16-NEXT: fcvtzs v3.8h, v3.8h
6821 ; CHECK-SD-FP16-NEXT: fcvtzs v2.8h, v2.8h
6822 ; CHECK-SD-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6823 ; CHECK-SD-FP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
6824 ; CHECK-SD-FP16-NEXT: ret
6825 ;
6826 ; CHECK-GI-NOFP16-LABEL: fptos_v32f16_v32i8:
6827 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6828 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.4s, v0.4h
6829 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6830 ; CHECK-GI-NOFP16-NEXT: fcvtl v5.4s, v1.4h
6831 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
6832 ; CHECK-GI-NOFP16-NEXT: fcvtl v6.4s, v2.4h
6833 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.4s, v2.8h
6834 ; CHECK-GI-NOFP16-NEXT: fcvtl v7.4s, v3.4h
6835 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v3.4s, v3.8h
6836 ; CHECK-GI-NOFP16-NEXT: fcvtzs v4.4s, v4.4s
6837 ; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
6838 ; CHECK-GI-NOFP16-NEXT: fcvtzs v5.4s, v5.4s
6839 ; CHECK-GI-NOFP16-NEXT: fcvtzs v1.4s, v1.4s
6840 ; CHECK-GI-NOFP16-NEXT: fcvtzs v6.4s, v6.4s
6841 ; CHECK-GI-NOFP16-NEXT: fcvtzs v2.4s, v2.4s
6842 ; CHECK-GI-NOFP16-NEXT: fcvtzs v7.4s, v7.4s
6843 ; CHECK-GI-NOFP16-NEXT: fcvtzs v3.4s, v3.4s
6844 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v4.8h, v0.8h
6845 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v5.8h, v1.8h
6846 ; CHECK-GI-NOFP16-NEXT: uzp1 v2.8h, v6.8h, v2.8h
6847 ; CHECK-GI-NOFP16-NEXT: uzp1 v3.8h, v7.8h, v3.8h
6848 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6849 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
6850 ; CHECK-GI-NOFP16-NEXT: ret
6851 ;
6852 ; CHECK-GI-FP16-LABEL: fptos_v32f16_v32i8:
6853 ; CHECK-GI-FP16: // %bb.0: // %entry
6854 ; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h
6855 ; CHECK-GI-FP16-NEXT: fcvtzs v1.8h, v1.8h
6856 ; CHECK-GI-FP16-NEXT: fcvtzs v2.8h, v2.8h
6857 ; CHECK-GI-FP16-NEXT: fcvtzs v3.8h, v3.8h
6858 ; CHECK-GI-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6859 ; CHECK-GI-FP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
6860 ; CHECK-GI-FP16-NEXT: ret
6861 entry:
6862 %c = fptosi <32 x half> %a to <32 x i8>
6863 ret <32 x i8> %c
6864 }
6866 define <32 x i8> @fptou_v32f16_v32i8(<32 x half> %a) {
6867 ; CHECK-SD-NOFP16-LABEL: fptou_v32f16_v32i8:
6868 ; CHECK-SD-NOFP16: // %bb.0: // %entry
6869 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v4.4s, v1.8h
6870 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
6871 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v5.4s, v0.8h
6872 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
6873 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v6.4s, v3.8h
6874 ; CHECK-SD-NOFP16-NEXT: fcvtl v3.4s, v3.4h
6875 ; CHECK-SD-NOFP16-NEXT: fcvtl2 v7.4s, v2.8h
6876 ; CHECK-SD-NOFP16-NEXT: fcvtl v2.4s, v2.4h
6877 ; CHECK-SD-NOFP16-NEXT: fcvtzu v4.4s, v4.4s
6878 ; CHECK-SD-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6879 ; CHECK-SD-NOFP16-NEXT: fcvtzu v5.4s, v5.4s
6880 ; CHECK-SD-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6881 ; CHECK-SD-NOFP16-NEXT: fcvtzu v6.4s, v6.4s
6882 ; CHECK-SD-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
6883 ; CHECK-SD-NOFP16-NEXT: fcvtzu v7.4s, v7.4s
6884 ; CHECK-SD-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
6885 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.8h, v1.8h, v4.8h
6886 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v5.8h
6887 ; CHECK-SD-NOFP16-NEXT: uzp1 v3.8h, v3.8h, v6.8h
6888 ; CHECK-SD-NOFP16-NEXT: uzp1 v2.8h, v2.8h, v7.8h
6889 ; CHECK-SD-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6890 ; CHECK-SD-NOFP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
6891 ; CHECK-SD-NOFP16-NEXT: ret
6892 ;
6893 ; CHECK-SD-FP16-LABEL: fptou_v32f16_v32i8:
6894 ; CHECK-SD-FP16: // %bb.0: // %entry
6895 ; CHECK-SD-FP16-NEXT: fcvtzu v1.8h, v1.8h
6896 ; CHECK-SD-FP16-NEXT: fcvtzu v0.8h, v0.8h
6897 ; CHECK-SD-FP16-NEXT: fcvtzu v3.8h, v3.8h
6898 ; CHECK-SD-FP16-NEXT: fcvtzu v2.8h, v2.8h
6899 ; CHECK-SD-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6900 ; CHECK-SD-FP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
6901 ; CHECK-SD-FP16-NEXT: ret
6902 ;
6903 ; CHECK-GI-NOFP16-LABEL: fptou_v32f16_v32i8:
6904 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6905 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.4s, v0.4h
6906 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
6907 ; CHECK-GI-NOFP16-NEXT: fcvtl v5.4s, v1.4h
6908 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
6909 ; CHECK-GI-NOFP16-NEXT: fcvtl v6.4s, v2.4h
6910 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.4s, v2.8h
6911 ; CHECK-GI-NOFP16-NEXT: fcvtl v7.4s, v3.4h
6912 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v3.4s, v3.8h
6913 ; CHECK-GI-NOFP16-NEXT: fcvtzu v4.4s, v4.4s
6914 ; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
6915 ; CHECK-GI-NOFP16-NEXT: fcvtzu v5.4s, v5.4s
6916 ; CHECK-GI-NOFP16-NEXT: fcvtzu v1.4s, v1.4s
6917 ; CHECK-GI-NOFP16-NEXT: fcvtzu v6.4s, v6.4s
6918 ; CHECK-GI-NOFP16-NEXT: fcvtzu v2.4s, v2.4s
6919 ; CHECK-GI-NOFP16-NEXT: fcvtzu v7.4s, v7.4s
6920 ; CHECK-GI-NOFP16-NEXT: fcvtzu v3.4s, v3.4s
6921 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v4.8h, v0.8h
6922 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v5.8h, v1.8h
6923 ; CHECK-GI-NOFP16-NEXT: uzp1 v2.8h, v6.8h, v2.8h
6924 ; CHECK-GI-NOFP16-NEXT: uzp1 v3.8h, v7.8h, v3.8h
6925 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6926 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
6927 ; CHECK-GI-NOFP16-NEXT: ret
6928 ;
6929 ; CHECK-GI-FP16-LABEL: fptou_v32f16_v32i8:
6930 ; CHECK-GI-FP16: // %bb.0: // %entry
6931 ; CHECK-GI-FP16-NEXT: fcvtzu v0.8h, v0.8h
6932 ; CHECK-GI-FP16-NEXT: fcvtzu v1.8h, v1.8h
6933 ; CHECK-GI-FP16-NEXT: fcvtzu v2.8h, v2.8h
6934 ; CHECK-GI-FP16-NEXT: fcvtzu v3.8h, v3.8h
6935 ; CHECK-GI-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b
6936 ; CHECK-GI-FP16-NEXT: uzp1 v1.16b, v2.16b, v3.16b
6937 ; CHECK-GI-FP16-NEXT: ret
6938 entry:
6939 %c = fptoui <32 x half> %a to <32 x i8>
6940 ret <32 x i8> %c
6941 }
6943 define <2 x i128> @fptos_v2f16_v2i128(<2 x half> %a) {
6944 ; CHECK-SD-LABEL: fptos_v2f16_v2i128:
6945 ; CHECK-SD: // %bb.0: // %entry
6946 ; CHECK-SD-NEXT: sub sp, sp, #48
6947 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
6948 ; CHECK-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
6949 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
6950 ; CHECK-SD-NEXT: .cfi_offset w19, -8
6951 ; CHECK-SD-NEXT: .cfi_offset w20, -16
6952 ; CHECK-SD-NEXT: .cfi_offset w30, -32
6953 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
6954 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
6955 ; CHECK-SD-NEXT: // kill: def $h0 killed $h0 killed $q0
6956 ; CHECK-SD-NEXT: bl __fixhfti
6957 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
6958 ; CHECK-SD-NEXT: mov x19, x0
6959 ; CHECK-SD-NEXT: mov x20, x1
6960 ; CHECK-SD-NEXT: mov h0, v0.h[1]
6961 ; CHECK-SD-NEXT: bl __fixhfti
6962 ; CHECK-SD-NEXT: mov x2, x0
6963 ; CHECK-SD-NEXT: mov x3, x1
6964 ; CHECK-SD-NEXT: mov x0, x19
6965 ; CHECK-SD-NEXT: mov x1, x20
6966 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
6967 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
6968 ; CHECK-SD-NEXT: add sp, sp, #48
6969 ; CHECK-SD-NEXT: ret
6970 ;
6971 ; CHECK-GI-NOFP16-LABEL: fptos_v2f16_v2i128:
6972 ; CHECK-GI-NOFP16: // %bb.0: // %entry
6973 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
6974 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]
6975 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
6976 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
6977 ; CHECK-GI-NOFP16-NEXT: fcvtzs x0, s0
6978 ; CHECK-GI-NOFP16-NEXT: fcvtzs x2, s1
6979 ; CHECK-GI-NOFP16-NEXT: asr x1, x0, #63
6980 ; CHECK-GI-NOFP16-NEXT: asr x3, x2, #63
6981 ; CHECK-GI-NOFP16-NEXT: ret
6982 ;
6983 ; CHECK-GI-FP16-LABEL: fptos_v2f16_v2i128:
6984 ; CHECK-GI-FP16: // %bb.0: // %entry
6985 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
6986 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
6987 ; CHECK-GI-FP16-NEXT: fcvtzs x0, h0
6988 ; CHECK-GI-FP16-NEXT: fcvtzs x2, h1
6989 ; CHECK-GI-FP16-NEXT: asr x1, x0, #63
6990 ; CHECK-GI-FP16-NEXT: asr x3, x2, #63
6991 ; CHECK-GI-FP16-NEXT: ret
6992 entry:
6993 %c = fptosi <2 x half> %a to <2 x i128>
6994 ret <2 x i128> %c
6995 }
6997 define <2 x i128> @fptou_v2f16_v2i128(<2 x half> %a) {
6998 ; CHECK-SD-LABEL: fptou_v2f16_v2i128:
6999 ; CHECK-SD: // %bb.0: // %entry
7000 ; CHECK-SD-NEXT: sub sp, sp, #48
7001 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
7002 ; CHECK-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
7003 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7004 ; CHECK-SD-NEXT: .cfi_offset w19, -8
7005 ; CHECK-SD-NEXT: .cfi_offset w20, -16
7006 ; CHECK-SD-NEXT: .cfi_offset w30, -32
7007 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
7008 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7009 ; CHECK-SD-NEXT: // kill: def $h0 killed $h0 killed $q0
7010 ; CHECK-SD-NEXT: bl __fixunshfti
7011 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7012 ; CHECK-SD-NEXT: mov x19, x0
7013 ; CHECK-SD-NEXT: mov x20, x1
7014 ; CHECK-SD-NEXT: mov h0, v0.h[1]
7015 ; CHECK-SD-NEXT: bl __fixunshfti
7016 ; CHECK-SD-NEXT: mov x2, x0
7017 ; CHECK-SD-NEXT: mov x3, x1
7018 ; CHECK-SD-NEXT: mov x0, x19
7019 ; CHECK-SD-NEXT: mov x1, x20
7020 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
7021 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
7022 ; CHECK-SD-NEXT: add sp, sp, #48
7023 ; CHECK-SD-NEXT: ret
7024 ;
7025 ; CHECK-GI-NOFP16-LABEL: fptou_v2f16_v2i128:
7026 ; CHECK-GI-NOFP16: // %bb.0: // %entry
7027 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
7028 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]
7029 ; CHECK-GI-NOFP16-NEXT: mov x1, xzr
7030 ; CHECK-GI-NOFP16-NEXT: mov x3, xzr
7031 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
7032 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
7033 ; CHECK-GI-NOFP16-NEXT: fcvtzu x0, s0
7034 ; CHECK-GI-NOFP16-NEXT: fcvtzu x2, s1
7035 ; CHECK-GI-NOFP16-NEXT: ret
7036 ;
7037 ; CHECK-GI-FP16-LABEL: fptou_v2f16_v2i128:
7038 ; CHECK-GI-FP16: // %bb.0: // %entry
7039 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
7040 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
7041 ; CHECK-GI-FP16-NEXT: fcvtzu x0, h0
7042 ; CHECK-GI-FP16-NEXT: mov x1, xzr
7043 ; CHECK-GI-FP16-NEXT: mov x3, xzr
7044 ; CHECK-GI-FP16-NEXT: fcvtzu x2, h1
7045 ; CHECK-GI-FP16-NEXT: ret
7046 entry:
7047 %c = fptoui <2 x half> %a to <2 x i128>
7048 ret <2 x i128> %c
7049 }
7051 define <3 x i128> @fptos_v3f16_v3i128(<3 x half> %a) {
7052 ; CHECK-SD-LABEL: fptos_v3f16_v3i128:
7053 ; CHECK-SD: // %bb.0: // %entry
7054 ; CHECK-SD-NEXT: sub sp, sp, #64
7055 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
7056 ; CHECK-SD-NEXT: stp x22, x21, [sp, #32] // 16-byte Folded Spill
7057 ; CHECK-SD-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
7058 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
7059 ; CHECK-SD-NEXT: .cfi_offset w19, -8
7060 ; CHECK-SD-NEXT: .cfi_offset w20, -16
7061 ; CHECK-SD-NEXT: .cfi_offset w21, -24
7062 ; CHECK-SD-NEXT: .cfi_offset w22, -32
7063 ; CHECK-SD-NEXT: .cfi_offset w30, -48
7064 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
7065 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7066 ; CHECK-SD-NEXT: // kill: def $h0 killed $h0 killed $q0
7067 ; CHECK-SD-NEXT: bl __fixhfti
7068 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7069 ; CHECK-SD-NEXT: mov x19, x0
7070 ; CHECK-SD-NEXT: mov x20, x1
7071 ; CHECK-SD-NEXT: mov h0, v0.h[1]
7072 ; CHECK-SD-NEXT: bl __fixhfti
7073 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7074 ; CHECK-SD-NEXT: mov x21, x0
7075 ; CHECK-SD-NEXT: mov x22, x1
7076 ; CHECK-SD-NEXT: mov h0, v0.h[2]
7077 ; CHECK-SD-NEXT: bl __fixhfti
7078 ; CHECK-SD-NEXT: mov x4, x0
7079 ; CHECK-SD-NEXT: mov x5, x1
7080 ; CHECK-SD-NEXT: mov x0, x19
7081 ; CHECK-SD-NEXT: mov x1, x20
7082 ; CHECK-SD-NEXT: mov x2, x21
7083 ; CHECK-SD-NEXT: mov x3, x22
7084 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
7085 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
7086 ; CHECK-SD-NEXT: ldp x22, x21, [sp, #32] // 16-byte Folded Reload
7087 ; CHECK-SD-NEXT: add sp, sp, #64
7088 ; CHECK-SD-NEXT: ret
7089 ;
7090 ; CHECK-GI-NOFP16-LABEL: fptos_v3f16_v3i128:
7091 ; CHECK-GI-NOFP16: // %bb.0: // %entry
7092 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
7093 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]
7094 ; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[2]
7095 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
7096 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
7097 ; CHECK-GI-NOFP16-NEXT: fcvt s2, h2
7098 ; CHECK-GI-NOFP16-NEXT: fcvtzs x0, s0
7099 ; CHECK-GI-NOFP16-NEXT: fcvtzs x2, s1
7100 ; CHECK-GI-NOFP16-NEXT: fcvtzs x4, s2
7101 ; CHECK-GI-NOFP16-NEXT: asr x1, x0, #63
7102 ; CHECK-GI-NOFP16-NEXT: asr x3, x2, #63
7103 ; CHECK-GI-NOFP16-NEXT: asr x5, x4, #63
7104 ; CHECK-GI-NOFP16-NEXT: ret
7105 ;
7106 ; CHECK-GI-FP16-LABEL: fptos_v3f16_v3i128:
7107 ; CHECK-GI-FP16: // %bb.0: // %entry
7108 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
7109 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
7110 ; CHECK-GI-FP16-NEXT: mov h2, v0.h[2]
7111 ; CHECK-GI-FP16-NEXT: fcvtzs x0, h0
7112 ; CHECK-GI-FP16-NEXT: fcvtzs x2, h1
7113 ; CHECK-GI-FP16-NEXT: fcvtzs x4, h2
7114 ; CHECK-GI-FP16-NEXT: asr x1, x0, #63
7115 ; CHECK-GI-FP16-NEXT: asr x3, x2, #63
7116 ; CHECK-GI-FP16-NEXT: asr x5, x4, #63
7117 ; CHECK-GI-FP16-NEXT: ret
7118 entry:
7119 %c = fptosi <3 x half> %a to <3 x i128>
7120 ret <3 x i128> %c
7121 }
7123 define <3 x i128> @fptou_v3f16_v3i128(<3 x half> %a) {
7124 ; CHECK-SD-LABEL: fptou_v3f16_v3i128:
7125 ; CHECK-SD: // %bb.0: // %entry
7126 ; CHECK-SD-NEXT: sub sp, sp, #64
7127 ; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
7128 ; CHECK-SD-NEXT: stp x22, x21, [sp, #32] // 16-byte Folded Spill
7129 ; CHECK-SD-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
7130 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
7131 ; CHECK-SD-NEXT: .cfi_offset w19, -8
7132 ; CHECK-SD-NEXT: .cfi_offset w20, -16
7133 ; CHECK-SD-NEXT: .cfi_offset w21, -24
7134 ; CHECK-SD-NEXT: .cfi_offset w22, -32
7135 ; CHECK-SD-NEXT: .cfi_offset w30, -48
7136 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
7137 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7138 ; CHECK-SD-NEXT: // kill: def $h0 killed $h0 killed $q0
7139 ; CHECK-SD-NEXT: bl __fixunshfti
7140 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7141 ; CHECK-SD-NEXT: mov x19, x0
7142 ; CHECK-SD-NEXT: mov x20, x1
7143 ; CHECK-SD-NEXT: mov h0, v0.h[1]
7144 ; CHECK-SD-NEXT: bl __fixunshfti
7145 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7146 ; CHECK-SD-NEXT: mov x21, x0
7147 ; CHECK-SD-NEXT: mov x22, x1
7148 ; CHECK-SD-NEXT: mov h0, v0.h[2]
7149 ; CHECK-SD-NEXT: bl __fixunshfti
7150 ; CHECK-SD-NEXT: mov x4, x0
7151 ; CHECK-SD-NEXT: mov x5, x1
7152 ; CHECK-SD-NEXT: mov x0, x19
7153 ; CHECK-SD-NEXT: mov x1, x20
7154 ; CHECK-SD-NEXT: mov x2, x21
7155 ; CHECK-SD-NEXT: mov x3, x22
7156 ; CHECK-SD-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
7157 ; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
7158 ; CHECK-SD-NEXT: ldp x22, x21, [sp, #32] // 16-byte Folded Reload
7159 ; CHECK-SD-NEXT: add sp, sp, #64
7160 ; CHECK-SD-NEXT: ret
7161 ;
7162 ; CHECK-GI-NOFP16-LABEL: fptou_v3f16_v3i128:
7163 ; CHECK-GI-NOFP16: // %bb.0: // %entry
7164 ; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
7165 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]
7166 ; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[2]
7167 ; CHECK-GI-NOFP16-NEXT: mov x1, xzr
7168 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
7169 ; CHECK-GI-NOFP16-NEXT: mov x3, xzr
7170 ; CHECK-GI-NOFP16-NEXT: mov x5, xzr
7171 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
7172 ; CHECK-GI-NOFP16-NEXT: fcvt s2, h2
7173 ; CHECK-GI-NOFP16-NEXT: fcvtzu x0, s0
7174 ; CHECK-GI-NOFP16-NEXT: fcvtzu x2, s1
7175 ; CHECK-GI-NOFP16-NEXT: fcvtzu x4, s2
7176 ; CHECK-GI-NOFP16-NEXT: ret
7177 ;
7178 ; CHECK-GI-FP16-LABEL: fptou_v3f16_v3i128:
7179 ; CHECK-GI-FP16: // %bb.0: // %entry
7180 ; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0
7181 ; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]
7182 ; CHECK-GI-FP16-NEXT: mov h2, v0.h[2]
7183 ; CHECK-GI-FP16-NEXT: mov x1, xzr
7184 ; CHECK-GI-FP16-NEXT: fcvtzu x0, h0
7185 ; CHECK-GI-FP16-NEXT: mov x3, xzr
7186 ; CHECK-GI-FP16-NEXT: mov x5, xzr
7187 ; CHECK-GI-FP16-NEXT: fcvtzu x2, h1
7188 ; CHECK-GI-FP16-NEXT: fcvtzu x4, h2
7189 ; CHECK-GI-FP16-NEXT: ret
7190 entry:
7191 %c = fptoui <3 x half> %a to <3 x i128>
7192 ret <3 x i128> %c
7193 }
7195 define <2 x i64> @fptos_v2f128_v2i64(<2 x fp128> %a) {
7196 ; CHECK-SD-LABEL: fptos_v2f128_v2i64:
7197 ; CHECK-SD: // %bb.0: // %entry
7198 ; CHECK-SD-NEXT: sub sp, sp, #48
7199 ; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7200 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7201 ; CHECK-SD-NEXT: .cfi_offset w30, -16
7202 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7203 ; CHECK-SD-NEXT: mov v0.16b, v1.16b
7204 ; CHECK-SD-NEXT: bl __fixtfdi
7205 ; CHECK-SD-NEXT: fmov d0, x0
7206 ; CHECK-SD-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
7207 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7208 ; CHECK-SD-NEXT: bl __fixtfdi
7209 ; CHECK-SD-NEXT: fmov d0, x0
7210 ; CHECK-SD-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload
7211 ; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7212 ; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
7213 ; CHECK-SD-NEXT: add sp, sp, #48
7214 ; CHECK-SD-NEXT: ret
7215 ;
7216 ; CHECK-GI-LABEL: fptos_v2f128_v2i64:
7217 ; CHECK-GI: // %bb.0: // %entry
7218 ; CHECK-GI-NEXT: sub sp, sp, #32
7219 ; CHECK-GI-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill
7220 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
7221 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7222 ; CHECK-GI-NEXT: .cfi_offset w30, -16
7223 ; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill
7224 ; CHECK-GI-NEXT: bl __fixtfdi
7225 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7226 ; CHECK-GI-NEXT: mov x19, x0
7227 ; CHECK-GI-NEXT: bl __fixtfdi
7228 ; CHECK-GI-NEXT: mov v0.d[0], x19
7229 ; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
7230 ; CHECK-GI-NEXT: mov v0.d[1], x0
7231 ; CHECK-GI-NEXT: add sp, sp, #32
7232 ; CHECK-GI-NEXT: ret
7233 entry:
7234 %c = fptosi <2 x fp128> %a to <2 x i64>
7235 ret <2 x i64> %c
7236 }
7238 define <2 x i64> @fptou_v2f128_v2i64(<2 x fp128> %a) {
7239 ; CHECK-SD-LABEL: fptou_v2f128_v2i64:
7240 ; CHECK-SD: // %bb.0: // %entry
7241 ; CHECK-SD-NEXT: sub sp, sp, #48
7242 ; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7243 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7244 ; CHECK-SD-NEXT: .cfi_offset w30, -16
7245 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7246 ; CHECK-SD-NEXT: mov v0.16b, v1.16b
7247 ; CHECK-SD-NEXT: bl __fixunstfdi
7248 ; CHECK-SD-NEXT: fmov d0, x0
7249 ; CHECK-SD-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
7250 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7251 ; CHECK-SD-NEXT: bl __fixunstfdi
7252 ; CHECK-SD-NEXT: fmov d0, x0
7253 ; CHECK-SD-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload
7254 ; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7255 ; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
7256 ; CHECK-SD-NEXT: add sp, sp, #48
7257 ; CHECK-SD-NEXT: ret
7258 ;
7259 ; CHECK-GI-LABEL: fptou_v2f128_v2i64:
7260 ; CHECK-GI: // %bb.0: // %entry
7261 ; CHECK-GI-NEXT: sub sp, sp, #32
7262 ; CHECK-GI-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill
7263 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
7264 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7265 ; CHECK-GI-NEXT: .cfi_offset w30, -16
7266 ; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill
7267 ; CHECK-GI-NEXT: bl __fixunstfdi
7268 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7269 ; CHECK-GI-NEXT: mov x19, x0
7270 ; CHECK-GI-NEXT: bl __fixunstfdi
7271 ; CHECK-GI-NEXT: mov v0.d[0], x19
7272 ; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
7273 ; CHECK-GI-NEXT: mov v0.d[1], x0
7274 ; CHECK-GI-NEXT: add sp, sp, #32
7275 ; CHECK-GI-NEXT: ret
7276 entry:
7277 %c = fptoui <2 x fp128> %a to <2 x i64>
7278 ret <2 x i64> %c
7279 }
7281 define <3 x i64> @fptos_v3f128_v3i64(<3 x fp128> %a) {
7282 ; CHECK-SD-LABEL: fptos_v3f128_v3i64:
7283 ; CHECK-SD: // %bb.0: // %entry
7284 ; CHECK-SD-NEXT: sub sp, sp, #64
7285 ; CHECK-SD-NEXT: str d8, [sp, #48] // 8-byte Folded Spill
7286 ; CHECK-SD-NEXT: str x30, [sp, #56] // 8-byte Folded Spill
7287 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
7288 ; CHECK-SD-NEXT: .cfi_offset w30, -8
7289 ; CHECK-SD-NEXT: .cfi_offset b8, -16
7290 ; CHECK-SD-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill
7291 ; CHECK-SD-NEXT: mov v0.16b, v2.16b
7292 ; CHECK-SD-NEXT: bl __fixtfdi
7293 ; CHECK-SD-NEXT: fmov d0, x0
7294 ; CHECK-SD-NEXT: str q0, [sp, #32] // 16-byte Folded Spill
7295 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7296 ; CHECK-SD-NEXT: bl __fixtfdi
7297 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7298 ; CHECK-SD-NEXT: fmov d8, x0
7299 ; CHECK-SD-NEXT: bl __fixtfdi
7300 ; CHECK-SD-NEXT: fmov d0, d8
7301 ; CHECK-SD-NEXT: ldr q2, [sp, #32] // 16-byte Folded Reload
7302 ; CHECK-SD-NEXT: ldr x30, [sp, #56] // 8-byte Folded Reload
7303 ; CHECK-SD-NEXT: ldr d8, [sp, #48] // 8-byte Folded Reload
7304 ; CHECK-SD-NEXT: fmov d1, x0
7305 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2
7306 ; CHECK-SD-NEXT: add sp, sp, #64
7307 ; CHECK-SD-NEXT: ret
7308 ;
7309 ; CHECK-GI-LABEL: fptos_v3f128_v3i64:
7310 ; CHECK-GI: // %bb.0: // %entry
7311 ; CHECK-GI-NEXT: sub sp, sp, #64
7312 ; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7313 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
7314 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
7315 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7316 ; CHECK-GI-NEXT: .cfi_offset w20, -16
7317 ; CHECK-GI-NEXT: .cfi_offset w30, -32
7318 ; CHECK-GI-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
7319 ; CHECK-GI-NEXT: bl __fixtfdi
7320 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7321 ; CHECK-GI-NEXT: mov x19, x0
7322 ; CHECK-GI-NEXT: bl __fixtfdi
7323 ; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7324 ; CHECK-GI-NEXT: mov x20, x0
7325 ; CHECK-GI-NEXT: bl __fixtfdi
7326 ; CHECK-GI-NEXT: fmov d0, x19
7327 ; CHECK-GI-NEXT: fmov d1, x20
7328 ; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7329 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
7330 ; CHECK-GI-NEXT: fmov d2, x0
7331 ; CHECK-GI-NEXT: add sp, sp, #64
7332 ; CHECK-GI-NEXT: ret
7333 entry:
7334 %c = fptosi <3 x fp128> %a to <3 x i64>
7335 ret <3 x i64> %c
7336 }
7338 define <3 x i64> @fptou_v3f128_v3i64(<3 x fp128> %a) {
7339 ; CHECK-SD-LABEL: fptou_v3f128_v3i64:
7340 ; CHECK-SD: // %bb.0: // %entry
7341 ; CHECK-SD-NEXT: sub sp, sp, #64
7342 ; CHECK-SD-NEXT: str d8, [sp, #48] // 8-byte Folded Spill
7343 ; CHECK-SD-NEXT: str x30, [sp, #56] // 8-byte Folded Spill
7344 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
7345 ; CHECK-SD-NEXT: .cfi_offset w30, -8
7346 ; CHECK-SD-NEXT: .cfi_offset b8, -16
7347 ; CHECK-SD-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill
7348 ; CHECK-SD-NEXT: mov v0.16b, v2.16b
7349 ; CHECK-SD-NEXT: bl __fixunstfdi
7350 ; CHECK-SD-NEXT: fmov d0, x0
7351 ; CHECK-SD-NEXT: str q0, [sp, #32] // 16-byte Folded Spill
7352 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7353 ; CHECK-SD-NEXT: bl __fixunstfdi
7354 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7355 ; CHECK-SD-NEXT: fmov d8, x0
7356 ; CHECK-SD-NEXT: bl __fixunstfdi
7357 ; CHECK-SD-NEXT: fmov d0, d8
7358 ; CHECK-SD-NEXT: ldr q2, [sp, #32] // 16-byte Folded Reload
7359 ; CHECK-SD-NEXT: ldr x30, [sp, #56] // 8-byte Folded Reload
7360 ; CHECK-SD-NEXT: ldr d8, [sp, #48] // 8-byte Folded Reload
7361 ; CHECK-SD-NEXT: fmov d1, x0
7362 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2
7363 ; CHECK-SD-NEXT: add sp, sp, #64
7364 ; CHECK-SD-NEXT: ret
7365 ;
7366 ; CHECK-GI-LABEL: fptou_v3f128_v3i64:
7367 ; CHECK-GI: // %bb.0: // %entry
7368 ; CHECK-GI-NEXT: sub sp, sp, #64
7369 ; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7370 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
7371 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
7372 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7373 ; CHECK-GI-NEXT: .cfi_offset w20, -16
7374 ; CHECK-GI-NEXT: .cfi_offset w30, -32
7375 ; CHECK-GI-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
7376 ; CHECK-GI-NEXT: bl __fixunstfdi
7377 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7378 ; CHECK-GI-NEXT: mov x19, x0
7379 ; CHECK-GI-NEXT: bl __fixunstfdi
7380 ; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7381 ; CHECK-GI-NEXT: mov x20, x0
7382 ; CHECK-GI-NEXT: bl __fixunstfdi
7383 ; CHECK-GI-NEXT: fmov d0, x19
7384 ; CHECK-GI-NEXT: fmov d1, x20
7385 ; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7386 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
7387 ; CHECK-GI-NEXT: fmov d2, x0
7388 ; CHECK-GI-NEXT: add sp, sp, #64
7389 ; CHECK-GI-NEXT: ret
7390 entry:
7391 %c = fptoui <3 x fp128> %a to <3 x i64>
7392 ret <3 x i64> %c
7393 }
7395 define <2 x i32> @fptos_v2f128_v2i32(<2 x fp128> %a) {
7396 ; CHECK-SD-LABEL: fptos_v2f128_v2i32:
7397 ; CHECK-SD: // %bb.0: // %entry
7398 ; CHECK-SD-NEXT: sub sp, sp, #48
7399 ; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7400 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7401 ; CHECK-SD-NEXT: .cfi_offset w30, -16
7402 ; CHECK-SD-NEXT: str q1, [sp, #16] // 16-byte Folded Spill
7403 ; CHECK-SD-NEXT: bl __fixtfsi
7404 ; CHECK-SD-NEXT: fmov s0, w0
7405 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7406 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7407 ; CHECK-SD-NEXT: bl __fixtfsi
7408 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7409 ; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7410 ; CHECK-SD-NEXT: mov v0.s[1], w0
7411 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
7412 ; CHECK-SD-NEXT: add sp, sp, #48
7413 ; CHECK-SD-NEXT: ret
7414 ;
7415 ; CHECK-GI-LABEL: fptos_v2f128_v2i32:
7416 ; CHECK-GI: // %bb.0: // %entry
7417 ; CHECK-GI-NEXT: sub sp, sp, #32
7418 ; CHECK-GI-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill
7419 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
7420 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7421 ; CHECK-GI-NEXT: .cfi_offset w30, -16
7422 ; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill
7423 ; CHECK-GI-NEXT: bl __fixtfsi
7424 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7425 ; CHECK-GI-NEXT: mov w19, w0
7426 ; CHECK-GI-NEXT: bl __fixtfsi
7427 ; CHECK-GI-NEXT: mov v0.s[0], w19
7428 ; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
7429 ; CHECK-GI-NEXT: mov v0.s[1], w0
7430 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
7431 ; CHECK-GI-NEXT: add sp, sp, #32
7432 ; CHECK-GI-NEXT: ret
7433 entry:
7434 %c = fptosi <2 x fp128> %a to <2 x i32>
7435 ret <2 x i32> %c
7436 }
7438 define <2 x i32> @fptou_v2f128_v2i32(<2 x fp128> %a) {
7439 ; CHECK-SD-LABEL: fptou_v2f128_v2i32:
7440 ; CHECK-SD: // %bb.0: // %entry
7441 ; CHECK-SD-NEXT: sub sp, sp, #48
7442 ; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7443 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7444 ; CHECK-SD-NEXT: .cfi_offset w30, -16
7445 ; CHECK-SD-NEXT: str q1, [sp, #16] // 16-byte Folded Spill
7446 ; CHECK-SD-NEXT: bl __fixunstfsi
7447 ; CHECK-SD-NEXT: fmov s0, w0
7448 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7449 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7450 ; CHECK-SD-NEXT: bl __fixunstfsi
7451 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7452 ; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7453 ; CHECK-SD-NEXT: mov v0.s[1], w0
7454 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
7455 ; CHECK-SD-NEXT: add sp, sp, #48
7456 ; CHECK-SD-NEXT: ret
7457 ;
7458 ; CHECK-GI-LABEL: fptou_v2f128_v2i32:
7459 ; CHECK-GI: // %bb.0: // %entry
7460 ; CHECK-GI-NEXT: sub sp, sp, #32
7461 ; CHECK-GI-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill
7462 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
7463 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7464 ; CHECK-GI-NEXT: .cfi_offset w30, -16
7465 ; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill
7466 ; CHECK-GI-NEXT: bl __fixunstfsi
7467 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7468 ; CHECK-GI-NEXT: mov w19, w0
7469 ; CHECK-GI-NEXT: bl __fixunstfsi
7470 ; CHECK-GI-NEXT: mov v0.s[0], w19
7471 ; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
7472 ; CHECK-GI-NEXT: mov v0.s[1], w0
7473 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
7474 ; CHECK-GI-NEXT: add sp, sp, #32
7475 ; CHECK-GI-NEXT: ret
7476 entry:
7477 %c = fptoui <2 x fp128> %a to <2 x i32>
7478 ret <2 x i32> %c
7479 }
7481 define <3 x i32> @fptos_v3f128_v3i32(<3 x fp128> %a) {
7482 ; CHECK-SD-LABEL: fptos_v3f128_v3i32:
7483 ; CHECK-SD: // %bb.0: // %entry
7484 ; CHECK-SD-NEXT: sub sp, sp, #64
7485 ; CHECK-SD-NEXT: str x30, [sp, #48] // 8-byte Folded Spill
7486 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
7487 ; CHECK-SD-NEXT: .cfi_offset w30, -16
7488 ; CHECK-SD-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
7489 ; CHECK-SD-NEXT: bl __fixtfsi
7490 ; CHECK-SD-NEXT: fmov s0, w0
7491 ; CHECK-SD-NEXT: str q0, [sp, #32] // 16-byte Folded Spill
7492 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7493 ; CHECK-SD-NEXT: bl __fixtfsi
7494 ; CHECK-SD-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload
7495 ; CHECK-SD-NEXT: mov v0.s[1], w0
7496 ; CHECK-SD-NEXT: str q0, [sp, #32] // 16-byte Folded Spill
7497 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7498 ; CHECK-SD-NEXT: bl __fixtfsi
7499 ; CHECK-SD-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload
7500 ; CHECK-SD-NEXT: ldr x30, [sp, #48] // 8-byte Folded Reload
7501 ; CHECK-SD-NEXT: mov v0.s[2], w0
7502 ; CHECK-SD-NEXT: add sp, sp, #64
7503 ; CHECK-SD-NEXT: ret
7504 ;
7505 ; CHECK-GI-LABEL: fptos_v3f128_v3i32:
7506 ; CHECK-GI: // %bb.0: // %entry
7507 ; CHECK-GI-NEXT: sub sp, sp, #64
7508 ; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7509 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
7510 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
7511 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7512 ; CHECK-GI-NEXT: .cfi_offset w20, -16
7513 ; CHECK-GI-NEXT: .cfi_offset w30, -32
7514 ; CHECK-GI-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
7515 ; CHECK-GI-NEXT: bl __fixtfsi
7516 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7517 ; CHECK-GI-NEXT: mov w19, w0
7518 ; CHECK-GI-NEXT: bl __fixtfsi
7519 ; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7520 ; CHECK-GI-NEXT: mov w20, w0
7521 ; CHECK-GI-NEXT: bl __fixtfsi
7522 ; CHECK-GI-NEXT: mov v0.s[0], w19
7523 ; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7524 ; CHECK-GI-NEXT: mov v0.s[1], w20
7525 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
7526 ; CHECK-GI-NEXT: mov v0.s[2], w0
7527 ; CHECK-GI-NEXT: add sp, sp, #64
7528 ; CHECK-GI-NEXT: ret
7529 entry:
7530 %c = fptosi <3 x fp128> %a to <3 x i32>
7531 ret <3 x i32> %c
7532 }
7534 define <3 x i32> @fptou_v3f128_v3i32(<3 x fp128> %a) {
7535 ; CHECK-SD-LABEL: fptou_v3f128_v3i32:
7536 ; CHECK-SD: // %bb.0: // %entry
7537 ; CHECK-SD-NEXT: sub sp, sp, #64
7538 ; CHECK-SD-NEXT: str x30, [sp, #48] // 8-byte Folded Spill
7539 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
7540 ; CHECK-SD-NEXT: .cfi_offset w30, -16
7541 ; CHECK-SD-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
7542 ; CHECK-SD-NEXT: bl __fixunstfsi
7543 ; CHECK-SD-NEXT: fmov s0, w0
7544 ; CHECK-SD-NEXT: str q0, [sp, #32] // 16-byte Folded Spill
7545 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7546 ; CHECK-SD-NEXT: bl __fixunstfsi
7547 ; CHECK-SD-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload
7548 ; CHECK-SD-NEXT: mov v0.s[1], w0
7549 ; CHECK-SD-NEXT: str q0, [sp, #32] // 16-byte Folded Spill
7550 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7551 ; CHECK-SD-NEXT: bl __fixunstfsi
7552 ; CHECK-SD-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload
7553 ; CHECK-SD-NEXT: ldr x30, [sp, #48] // 8-byte Folded Reload
7554 ; CHECK-SD-NEXT: mov v0.s[2], w0
7555 ; CHECK-SD-NEXT: add sp, sp, #64
7556 ; CHECK-SD-NEXT: ret
7557 ;
7558 ; CHECK-GI-LABEL: fptou_v3f128_v3i32:
7559 ; CHECK-GI: // %bb.0: // %entry
7560 ; CHECK-GI-NEXT: sub sp, sp, #64
7561 ; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7562 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
7563 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
7564 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7565 ; CHECK-GI-NEXT: .cfi_offset w20, -16
7566 ; CHECK-GI-NEXT: .cfi_offset w30, -32
7567 ; CHECK-GI-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
7568 ; CHECK-GI-NEXT: bl __fixunstfsi
7569 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7570 ; CHECK-GI-NEXT: mov w19, w0
7571 ; CHECK-GI-NEXT: bl __fixunstfsi
7572 ; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7573 ; CHECK-GI-NEXT: mov w20, w0
7574 ; CHECK-GI-NEXT: bl __fixunstfsi
7575 ; CHECK-GI-NEXT: mov v0.s[0], w19
7576 ; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7577 ; CHECK-GI-NEXT: mov v0.s[1], w20
7578 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
7579 ; CHECK-GI-NEXT: mov v0.s[2], w0
7580 ; CHECK-GI-NEXT: add sp, sp, #64
7581 ; CHECK-GI-NEXT: ret
7582 entry:
7583 %c = fptoui <3 x fp128> %a to <3 x i32>
7584 ret <3 x i32> %c
7585 }
7587 define <2 x i16> @fptos_v2f128_v2i16(<2 x fp128> %a) {
7588 ; CHECK-SD-LABEL: fptos_v2f128_v2i16:
7589 ; CHECK-SD: // %bb.0: // %entry
7590 ; CHECK-SD-NEXT: sub sp, sp, #48
7591 ; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7592 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7593 ; CHECK-SD-NEXT: .cfi_offset w30, -16
7594 ; CHECK-SD-NEXT: str q1, [sp, #16] // 16-byte Folded Spill
7595 ; CHECK-SD-NEXT: bl __fixtfsi
7596 ; CHECK-SD-NEXT: fmov s0, w0
7597 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7598 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7599 ; CHECK-SD-NEXT: bl __fixtfsi
7600 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7601 ; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7602 ; CHECK-SD-NEXT: mov v0.s[1], w0
7603 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
7604 ; CHECK-SD-NEXT: add sp, sp, #48
7605 ; CHECK-SD-NEXT: ret
7606 ;
7607 ; CHECK-GI-LABEL: fptos_v2f128_v2i16:
7608 ; CHECK-GI: // %bb.0: // %entry
7609 ; CHECK-GI-NEXT: sub sp, sp, #32
7610 ; CHECK-GI-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill
7611 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
7612 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7613 ; CHECK-GI-NEXT: .cfi_offset w30, -16
7614 ; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill
7615 ; CHECK-GI-NEXT: bl __fixtfsi
7616 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7617 ; CHECK-GI-NEXT: mov w19, w0
7618 ; CHECK-GI-NEXT: bl __fixtfsi
7619 ; CHECK-GI-NEXT: mov v0.s[0], w19
7620 ; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
7621 ; CHECK-GI-NEXT: mov v0.s[1], w0
7622 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
7623 ; CHECK-GI-NEXT: add sp, sp, #32
7624 ; CHECK-GI-NEXT: ret
7625 entry:
7626 %c = fptosi <2 x fp128> %a to <2 x i16>
7627 ret <2 x i16> %c
7628 }
7630 define <2 x i16> @fptou_v2f128_v2i16(<2 x fp128> %a) {
7631 ; CHECK-SD-LABEL: fptou_v2f128_v2i16:
7632 ; CHECK-SD: // %bb.0: // %entry
7633 ; CHECK-SD-NEXT: sub sp, sp, #48
7634 ; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7635 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7636 ; CHECK-SD-NEXT: .cfi_offset w30, -16
7637 ; CHECK-SD-NEXT: str q1, [sp, #16] // 16-byte Folded Spill
7638 ; CHECK-SD-NEXT: bl __fixtfsi
7639 ; CHECK-SD-NEXT: fmov s0, w0
7640 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7641 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7642 ; CHECK-SD-NEXT: bl __fixtfsi
7643 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7644 ; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7645 ; CHECK-SD-NEXT: mov v0.s[1], w0
7646 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
7647 ; CHECK-SD-NEXT: add sp, sp, #48
7648 ; CHECK-SD-NEXT: ret
7649 ;
7650 ; CHECK-GI-LABEL: fptou_v2f128_v2i16:
7651 ; CHECK-GI: // %bb.0: // %entry
7652 ; CHECK-GI-NEXT: sub sp, sp, #32
7653 ; CHECK-GI-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill
7654 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
7655 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7656 ; CHECK-GI-NEXT: .cfi_offset w30, -16
7657 ; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill
7658 ; CHECK-GI-NEXT: bl __fixunstfsi
7659 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7660 ; CHECK-GI-NEXT: mov w19, w0
7661 ; CHECK-GI-NEXT: bl __fixunstfsi
7662 ; CHECK-GI-NEXT: mov v0.s[0], w19
7663 ; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
7664 ; CHECK-GI-NEXT: mov v0.s[1], w0
7665 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
7666 ; CHECK-GI-NEXT: add sp, sp, #32
7667 ; CHECK-GI-NEXT: ret
7668 entry:
7669 %c = fptoui <2 x fp128> %a to <2 x i16>
7670 ret <2 x i16> %c
7671 }
7673 define <3 x i16> @fptos_v3f128_v3i16(<3 x fp128> %a) {
7674 ; CHECK-SD-LABEL: fptos_v3f128_v3i16:
7675 ; CHECK-SD: // %bb.0: // %entry
7676 ; CHECK-SD-NEXT: sub sp, sp, #48
7677 ; CHECK-SD-NEXT: str d8, [sp, #32] // 8-byte Folded Spill
7678 ; CHECK-SD-NEXT: str x30, [sp, #40] // 8-byte Folded Spill
7679 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7680 ; CHECK-SD-NEXT: .cfi_offset w30, -8
7681 ; CHECK-SD-NEXT: .cfi_offset b8, -16
7682 ; CHECK-SD-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill
7683 ; CHECK-SD-NEXT: mov v0.16b, v2.16b
7684 ; CHECK-SD-NEXT: bl __fixtfsi
7685 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7686 ; CHECK-SD-NEXT: fmov s8, w0
7687 ; CHECK-SD-NEXT: bl __fixtfsi
7688 ; CHECK-SD-NEXT: fmov s0, w0
7689 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7690 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7691 ; CHECK-SD-NEXT: bl __fixtfsi
7692 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7693 ; CHECK-SD-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload
7694 ; CHECK-SD-NEXT: mov v0.s[1], w0
7695 ; CHECK-SD-NEXT: uzp1 v0.4h, v0.4h, v8.4h
7696 ; CHECK-SD-NEXT: ldr d8, [sp, #32] // 8-byte Folded Reload
7697 ; CHECK-SD-NEXT: add sp, sp, #48
7698 ; CHECK-SD-NEXT: ret
7699 ;
7700 ; CHECK-GI-LABEL: fptos_v3f128_v3i16:
7701 ; CHECK-GI: // %bb.0: // %entry
7702 ; CHECK-GI-NEXT: sub sp, sp, #64
7703 ; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7704 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
7705 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
7706 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7707 ; CHECK-GI-NEXT: .cfi_offset w20, -16
7708 ; CHECK-GI-NEXT: .cfi_offset w30, -32
7709 ; CHECK-GI-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
7710 ; CHECK-GI-NEXT: bl __fixtfsi
7711 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7712 ; CHECK-GI-NEXT: mov w19, w0
7713 ; CHECK-GI-NEXT: bl __fixtfsi
7714 ; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7715 ; CHECK-GI-NEXT: mov w20, w0
7716 ; CHECK-GI-NEXT: bl __fixtfsi
7717 ; CHECK-GI-NEXT: fmov s0, w19
7718 ; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7719 ; CHECK-GI-NEXT: mov v0.h[1], w20
7720 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
7721 ; CHECK-GI-NEXT: mov v0.h[2], w0
7722 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
7723 ; CHECK-GI-NEXT: add sp, sp, #64
7724 ; CHECK-GI-NEXT: ret
7725 entry:
7726 %c = fptosi <3 x fp128> %a to <3 x i16>
7727 ret <3 x i16> %c
7728 }
7730 define <3 x i16> @fptou_v3f128_v3i16(<3 x fp128> %a) {
7731 ; CHECK-SD-LABEL: fptou_v3f128_v3i16:
7732 ; CHECK-SD: // %bb.0: // %entry
7733 ; CHECK-SD-NEXT: sub sp, sp, #48
7734 ; CHECK-SD-NEXT: str d8, [sp, #32] // 8-byte Folded Spill
7735 ; CHECK-SD-NEXT: str x30, [sp, #40] // 8-byte Folded Spill
7736 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7737 ; CHECK-SD-NEXT: .cfi_offset w30, -8
7738 ; CHECK-SD-NEXT: .cfi_offset b8, -16
7739 ; CHECK-SD-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill
7740 ; CHECK-SD-NEXT: mov v0.16b, v2.16b
7741 ; CHECK-SD-NEXT: bl __fixtfsi
7742 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7743 ; CHECK-SD-NEXT: fmov s8, w0
7744 ; CHECK-SD-NEXT: bl __fixtfsi
7745 ; CHECK-SD-NEXT: fmov s0, w0
7746 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7747 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7748 ; CHECK-SD-NEXT: bl __fixtfsi
7749 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7750 ; CHECK-SD-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload
7751 ; CHECK-SD-NEXT: mov v0.s[1], w0
7752 ; CHECK-SD-NEXT: uzp1 v0.4h, v0.4h, v8.4h
7753 ; CHECK-SD-NEXT: ldr d8, [sp, #32] // 8-byte Folded Reload
7754 ; CHECK-SD-NEXT: add sp, sp, #48
7755 ; CHECK-SD-NEXT: ret
7756 ;
7757 ; CHECK-GI-LABEL: fptou_v3f128_v3i16:
7758 ; CHECK-GI: // %bb.0: // %entry
7759 ; CHECK-GI-NEXT: sub sp, sp, #64
7760 ; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7761 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
7762 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
7763 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7764 ; CHECK-GI-NEXT: .cfi_offset w20, -16
7765 ; CHECK-GI-NEXT: .cfi_offset w30, -32
7766 ; CHECK-GI-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
7767 ; CHECK-GI-NEXT: bl __fixunstfsi
7768 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7769 ; CHECK-GI-NEXT: mov w19, w0
7770 ; CHECK-GI-NEXT: bl __fixunstfsi
7771 ; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7772 ; CHECK-GI-NEXT: mov w20, w0
7773 ; CHECK-GI-NEXT: bl __fixunstfsi
7774 ; CHECK-GI-NEXT: fmov s0, w19
7775 ; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7776 ; CHECK-GI-NEXT: mov v0.h[1], w20
7777 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
7778 ; CHECK-GI-NEXT: mov v0.h[2], w0
7779 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
7780 ; CHECK-GI-NEXT: add sp, sp, #64
7781 ; CHECK-GI-NEXT: ret
7782 entry:
7783 %c = fptoui <3 x fp128> %a to <3 x i16>
7784 ret <3 x i16> %c
7785 }
7787 define <2 x i8> @fptos_v2f128_v2i8(<2 x fp128> %a) {
7788 ; CHECK-SD-LABEL: fptos_v2f128_v2i8:
7789 ; CHECK-SD: // %bb.0: // %entry
7790 ; CHECK-SD-NEXT: sub sp, sp, #48
7791 ; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7792 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7793 ; CHECK-SD-NEXT: .cfi_offset w30, -16
7794 ; CHECK-SD-NEXT: str q1, [sp, #16] // 16-byte Folded Spill
7795 ; CHECK-SD-NEXT: bl __fixtfsi
7796 ; CHECK-SD-NEXT: fmov s0, w0
7797 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7798 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7799 ; CHECK-SD-NEXT: bl __fixtfsi
7800 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7801 ; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7802 ; CHECK-SD-NEXT: mov v0.s[1], w0
7803 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
7804 ; CHECK-SD-NEXT: add sp, sp, #48
7805 ; CHECK-SD-NEXT: ret
7806 ;
7807 ; CHECK-GI-LABEL: fptos_v2f128_v2i8:
7808 ; CHECK-GI: // %bb.0: // %entry
7809 ; CHECK-GI-NEXT: sub sp, sp, #32
7810 ; CHECK-GI-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill
7811 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
7812 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7813 ; CHECK-GI-NEXT: .cfi_offset w30, -16
7814 ; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill
7815 ; CHECK-GI-NEXT: bl __fixtfsi
7816 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7817 ; CHECK-GI-NEXT: mov w19, w0
7818 ; CHECK-GI-NEXT: bl __fixtfsi
7819 ; CHECK-GI-NEXT: mov v0.s[0], w19
7820 ; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
7821 ; CHECK-GI-NEXT: mov v0.s[1], w0
7822 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
7823 ; CHECK-GI-NEXT: add sp, sp, #32
7824 ; CHECK-GI-NEXT: ret
7825 entry:
7826 %c = fptosi <2 x fp128> %a to <2 x i8>
7827 ret <2 x i8> %c
7828 }
7830 define <2 x i8> @fptou_v2f128_v2i8(<2 x fp128> %a) {
7831 ; CHECK-SD-LABEL: fptou_v2f128_v2i8:
7832 ; CHECK-SD: // %bb.0: // %entry
7833 ; CHECK-SD-NEXT: sub sp, sp, #48
7834 ; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7835 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7836 ; CHECK-SD-NEXT: .cfi_offset w30, -16
7837 ; CHECK-SD-NEXT: str q1, [sp, #16] // 16-byte Folded Spill
7838 ; CHECK-SD-NEXT: bl __fixtfsi
7839 ; CHECK-SD-NEXT: fmov s0, w0
7840 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7841 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7842 ; CHECK-SD-NEXT: bl __fixtfsi
7843 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7844 ; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7845 ; CHECK-SD-NEXT: mov v0.s[1], w0
7846 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
7847 ; CHECK-SD-NEXT: add sp, sp, #48
7848 ; CHECK-SD-NEXT: ret
7849 ;
7850 ; CHECK-GI-LABEL: fptou_v2f128_v2i8:
7851 ; CHECK-GI: // %bb.0: // %entry
7852 ; CHECK-GI-NEXT: sub sp, sp, #32
7853 ; CHECK-GI-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill
7854 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
7855 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7856 ; CHECK-GI-NEXT: .cfi_offset w30, -16
7857 ; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill
7858 ; CHECK-GI-NEXT: bl __fixunstfsi
7859 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7860 ; CHECK-GI-NEXT: mov w19, w0
7861 ; CHECK-GI-NEXT: bl __fixunstfsi
7862 ; CHECK-GI-NEXT: mov v0.s[0], w19
7863 ; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
7864 ; CHECK-GI-NEXT: mov v0.s[1], w0
7865 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
7866 ; CHECK-GI-NEXT: add sp, sp, #32
7867 ; CHECK-GI-NEXT: ret
7868 entry:
7869 %c = fptoui <2 x fp128> %a to <2 x i8>
7870 ret <2 x i8> %c
7871 }
7873 define <3 x i8> @fptos_v3f128_v3i8(<3 x fp128> %a) {
7874 ; CHECK-SD-LABEL: fptos_v3f128_v3i8:
7875 ; CHECK-SD: // %bb.0: // %entry
7876 ; CHECK-SD-NEXT: sub sp, sp, #48
7877 ; CHECK-SD-NEXT: str d8, [sp, #32] // 8-byte Folded Spill
7878 ; CHECK-SD-NEXT: str x30, [sp, #40] // 8-byte Folded Spill
7879 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7880 ; CHECK-SD-NEXT: .cfi_offset w30, -8
7881 ; CHECK-SD-NEXT: .cfi_offset b8, -16
7882 ; CHECK-SD-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill
7883 ; CHECK-SD-NEXT: mov v0.16b, v2.16b
7884 ; CHECK-SD-NEXT: bl __fixtfsi
7885 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7886 ; CHECK-SD-NEXT: fmov s8, w0
7887 ; CHECK-SD-NEXT: bl __fixtfsi
7888 ; CHECK-SD-NEXT: fmov s0, w0
7889 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7890 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7891 ; CHECK-SD-NEXT: bl __fixtfsi
7892 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7893 ; CHECK-SD-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload
7894 ; CHECK-SD-NEXT: mov v0.s[1], w0
7895 ; CHECK-SD-NEXT: uzp1 v0.4h, v0.4h, v8.4h
7896 ; CHECK-SD-NEXT: ldr d8, [sp, #32] // 8-byte Folded Reload
7897 ; CHECK-SD-NEXT: umov w0, v0.h[0]
7898 ; CHECK-SD-NEXT: umov w1, v0.h[1]
7899 ; CHECK-SD-NEXT: umov w2, v0.h[2]
7900 ; CHECK-SD-NEXT: add sp, sp, #48
7901 ; CHECK-SD-NEXT: ret
7902 ;
7903 ; CHECK-GI-LABEL: fptos_v3f128_v3i8:
7904 ; CHECK-GI: // %bb.0: // %entry
7905 ; CHECK-GI-NEXT: sub sp, sp, #64
7906 ; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7907 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
7908 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
7909 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7910 ; CHECK-GI-NEXT: .cfi_offset w20, -16
7911 ; CHECK-GI-NEXT: .cfi_offset w30, -32
7912 ; CHECK-GI-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
7913 ; CHECK-GI-NEXT: bl __fixtfsi
7914 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7915 ; CHECK-GI-NEXT: mov w19, w0
7916 ; CHECK-GI-NEXT: bl __fixtfsi
7917 ; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7918 ; CHECK-GI-NEXT: mov w20, w0
7919 ; CHECK-GI-NEXT: bl __fixtfsi
7920 ; CHECK-GI-NEXT: mov w2, w0
7921 ; CHECK-GI-NEXT: mov w0, w19
7922 ; CHECK-GI-NEXT: mov w1, w20
7923 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
7924 ; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7925 ; CHECK-GI-NEXT: add sp, sp, #64
7926 ; CHECK-GI-NEXT: ret
7927 entry:
7928 %c = fptosi <3 x fp128> %a to <3 x i8>
7929 ret <3 x i8> %c
7930 }
7932 define <3 x i8> @fptou_v3f128_v3i8(<3 x fp128> %a) {
7933 ; CHECK-SD-LABEL: fptou_v3f128_v3i8:
7934 ; CHECK-SD: // %bb.0: // %entry
7935 ; CHECK-SD-NEXT: sub sp, sp, #48
7936 ; CHECK-SD-NEXT: str d8, [sp, #32] // 8-byte Folded Spill
7937 ; CHECK-SD-NEXT: str x30, [sp, #40] // 8-byte Folded Spill
7938 ; CHECK-SD-NEXT: .cfi_def_cfa_offset 48
7939 ; CHECK-SD-NEXT: .cfi_offset w30, -8
7940 ; CHECK-SD-NEXT: .cfi_offset b8, -16
7941 ; CHECK-SD-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill
7942 ; CHECK-SD-NEXT: mov v0.16b, v2.16b
7943 ; CHECK-SD-NEXT: bl __fixtfsi
7944 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7945 ; CHECK-SD-NEXT: fmov s8, w0
7946 ; CHECK-SD-NEXT: bl __fixtfsi
7947 ; CHECK-SD-NEXT: fmov s0, w0
7948 ; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill
7949 ; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7950 ; CHECK-SD-NEXT: bl __fixtfsi
7951 ; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7952 ; CHECK-SD-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload
7953 ; CHECK-SD-NEXT: mov v0.s[1], w0
7954 ; CHECK-SD-NEXT: uzp1 v0.4h, v0.4h, v8.4h
7955 ; CHECK-SD-NEXT: ldr d8, [sp, #32] // 8-byte Folded Reload
7956 ; CHECK-SD-NEXT: umov w0, v0.h[0]
7957 ; CHECK-SD-NEXT: umov w1, v0.h[1]
7958 ; CHECK-SD-NEXT: umov w2, v0.h[2]
7959 ; CHECK-SD-NEXT: add sp, sp, #48
7960 ; CHECK-SD-NEXT: ret
7961 ;
7962 ; CHECK-GI-LABEL: fptou_v3f128_v3i8:
7963 ; CHECK-GI: // %bb.0: // %entry
7964 ; CHECK-GI-NEXT: sub sp, sp, #64
7965 ; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
7966 ; CHECK-GI-NEXT: stp x20, x19, [sp, #48] // 16-byte Folded Spill
7967 ; CHECK-GI-NEXT: .cfi_def_cfa_offset 64
7968 ; CHECK-GI-NEXT: .cfi_offset w19, -8
7969 ; CHECK-GI-NEXT: .cfi_offset w20, -16
7970 ; CHECK-GI-NEXT: .cfi_offset w30, -32
7971 ; CHECK-GI-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
7972 ; CHECK-GI-NEXT: bl __fixunstfsi
7973 ; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
7974 ; CHECK-GI-NEXT: mov w19, w0
7975 ; CHECK-GI-NEXT: bl __fixunstfsi
7976 ; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
7977 ; CHECK-GI-NEXT: mov w20, w0
7978 ; CHECK-GI-NEXT: bl __fixunstfsi
7979 ; CHECK-GI-NEXT: mov w2, w0
7980 ; CHECK-GI-NEXT: mov w0, w19
7981 ; CHECK-GI-NEXT: mov w1, w20
7982 ; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
7983 ; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
7984 ; CHECK-GI-NEXT: add sp, sp, #64
7985 ; CHECK-GI-NEXT: ret
7986 entry:
7987 %c = fptoui <3 x fp128> %a to <3 x i8>
7988 ret <3 x i8> %c
7989 }
7991 define <2 x i128> @fptos_v2f128_v2i128(<2 x fp128> %a) {
7992 ; CHECK-LABEL: fptos_v2f128_v2i128:
7993 ; CHECK: // %bb.0: // %entry
7994 ; CHECK-NEXT: sub sp, sp, #48
7995 ; CHECK-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
7996 ; CHECK-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
7997 ; CHECK-NEXT: .cfi_def_cfa_offset 48
7998 ; CHECK-NEXT: .cfi_offset w19, -8
7999 ; CHECK-NEXT: .cfi_offset w20, -16
8000 ; CHECK-NEXT: .cfi_offset w30, -32
8001 ; CHECK-NEXT: str q1, [sp] // 16-byte Folded Spill
8002 ; CHECK-NEXT: bl __fixtfti
8003 ; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
8004 ; CHECK-NEXT: mov x19, x0
8005 ; CHECK-NEXT: mov x20, x1
8006 ; CHECK-NEXT: bl __fixtfti
8007 ; CHECK-NEXT: mov x2, x0
8008 ; CHECK-NEXT: mov x3, x1
8009 ; CHECK-NEXT: mov x0, x19
8010 ; CHECK-NEXT: mov x1, x20
8011 ; CHECK-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
8012 ; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
8013 ; CHECK-NEXT: add sp, sp, #48
8014 ; CHECK-NEXT: ret
8015 entry:
8016 %c = fptosi <2 x fp128> %a to <2 x i128>
8017 ret <2 x i128> %c
8018 }
8020 define <2 x i128> @fptou_v2f128_v2i128(<2 x fp128> %a) {
8021 ; CHECK-LABEL: fptou_v2f128_v2i128:
8022 ; CHECK: // %bb.0: // %entry
8023 ; CHECK-NEXT: sub sp, sp, #48
8024 ; CHECK-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
8025 ; CHECK-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
8026 ; CHECK-NEXT: .cfi_def_cfa_offset 48
8027 ; CHECK-NEXT: .cfi_offset w19, -8
8028 ; CHECK-NEXT: .cfi_offset w20, -16
8029 ; CHECK-NEXT: .cfi_offset w30, -32
8030 ; CHECK-NEXT: str q1, [sp] // 16-byte Folded Spill
8031 ; CHECK-NEXT: bl __fixunstfti
8032 ; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
8033 ; CHECK-NEXT: mov x19, x0
8034 ; CHECK-NEXT: mov x20, x1
8035 ; CHECK-NEXT: bl __fixunstfti
8036 ; CHECK-NEXT: mov x2, x0
8037 ; CHECK-NEXT: mov x3, x1
8038 ; CHECK-NEXT: mov x0, x19
8039 ; CHECK-NEXT: mov x1, x20
8040 ; CHECK-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
8041 ; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
8042 ; CHECK-NEXT: add sp, sp, #48
8043 ; CHECK-NEXT: ret
8044 entry:
8045 %c = fptoui <2 x fp128> %a to <2 x i128>
8046 ret <2 x i128> %c
8047 }
8049 define <3 x i128> @fptos_v3f128_v3i128(<3 x fp128> %a) {
8050 ; CHECK-LABEL: fptos_v3f128_v3i128:
8051 ; CHECK: // %bb.0: // %entry
8052 ; CHECK-NEXT: sub sp, sp, #80
8053 ; CHECK-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
8054 ; CHECK-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill
8055 ; CHECK-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill
8056 ; CHECK-NEXT: .cfi_def_cfa_offset 80
8057 ; CHECK-NEXT: .cfi_offset w19, -8
8058 ; CHECK-NEXT: .cfi_offset w20, -16
8059 ; CHECK-NEXT: .cfi_offset w21, -24
8060 ; CHECK-NEXT: .cfi_offset w22, -32
8061 ; CHECK-NEXT: .cfi_offset w30, -48
8062 ; CHECK-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
8063 ; CHECK-NEXT: bl __fixtfti
8064 ; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
8065 ; CHECK-NEXT: mov x19, x0
8066 ; CHECK-NEXT: mov x20, x1
8067 ; CHECK-NEXT: bl __fixtfti
8068 ; CHECK-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
8069 ; CHECK-NEXT: mov x21, x0
8070 ; CHECK-NEXT: mov x22, x1
8071 ; CHECK-NEXT: bl __fixtfti
8072 ; CHECK-NEXT: mov x4, x0
8073 ; CHECK-NEXT: mov x5, x1
8074 ; CHECK-NEXT: mov x0, x19
8075 ; CHECK-NEXT: mov x1, x20
8076 ; CHECK-NEXT: mov x2, x21
8077 ; CHECK-NEXT: mov x3, x22
8078 ; CHECK-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload
8079 ; CHECK-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
8080 ; CHECK-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload
8081 ; CHECK-NEXT: add sp, sp, #80
8082 ; CHECK-NEXT: ret
8083 entry:
8084 %c = fptosi <3 x fp128> %a to <3 x i128>
8085 ret <3 x i128> %c
8086 }
8088 define <3 x i128> @fptou_v3f128_v3i128(<3 x fp128> %a) {
8089 ; CHECK-LABEL: fptou_v3f128_v3i128:
8090 ; CHECK: // %bb.0: // %entry
8091 ; CHECK-NEXT: sub sp, sp, #80
8092 ; CHECK-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
8093 ; CHECK-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill
8094 ; CHECK-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill
8095 ; CHECK-NEXT: .cfi_def_cfa_offset 80
8096 ; CHECK-NEXT: .cfi_offset w19, -8
8097 ; CHECK-NEXT: .cfi_offset w20, -16
8098 ; CHECK-NEXT: .cfi_offset w21, -24
8099 ; CHECK-NEXT: .cfi_offset w22, -32
8100 ; CHECK-NEXT: .cfi_offset w30, -48
8101 ; CHECK-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
8102 ; CHECK-NEXT: bl __fixunstfti
8103 ; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
8104 ; CHECK-NEXT: mov x19, x0
8105 ; CHECK-NEXT: mov x20, x1
8106 ; CHECK-NEXT: bl __fixunstfti
8107 ; CHECK-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
8108 ; CHECK-NEXT: mov x21, x0
8109 ; CHECK-NEXT: mov x22, x1
8110 ; CHECK-NEXT: bl __fixunstfti
8111 ; CHECK-NEXT: mov x4, x0
8112 ; CHECK-NEXT: mov x5, x1
8113 ; CHECK-NEXT: mov x0, x19
8114 ; CHECK-NEXT: mov x1, x20
8115 ; CHECK-NEXT: mov x2, x21
8116 ; CHECK-NEXT: mov x3, x22
8117 ; CHECK-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload
8118 ; CHECK-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
8119 ; CHECK-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload
8120 ; CHECK-NEXT: add sp, sp, #80
8121 ; CHECK-NEXT: ret
8122 entry:
8123 %c = fptoui <3 x fp128> %a to <3 x i128>
8124 ret <3 x i128> %c
8125 }