1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mattr=+sve -force-streaming-compatible < %s | FileCheck %s
3 ; RUN: llc -mattr=+sme -force-streaming < %s | FileCheck %s
4 ; RUN: llc -force-streaming-compatible < %s | FileCheck %s --check-prefix=NONEON-NOSVE
6 target triple = "aarch64-unknown-linux-gnu"
8 define void @build_vector_7_inc1_v4i1(ptr %a) {
9 ; CHECK-LABEL: build_vector_7_inc1_v4i1:
11 ; CHECK-NEXT: mov w8, #5 // =0x5
12 ; CHECK-NEXT: strb w8, [x0]
15 ; NONEON-NOSVE-LABEL: build_vector_7_inc1_v4i1:
16 ; NONEON-NOSVE: // %bb.0:
17 ; NONEON-NOSVE-NEXT: mov w8, #5 // =0x5
18 ; NONEON-NOSVE-NEXT: strb w8, [x0]
19 ; NONEON-NOSVE-NEXT: ret
20 store <4 x i1> <i1 true, i1 false, i1 true, i1 false>, ptr %a, align 1
24 define void @build_vector_7_inc1_v32i8(ptr %a) {
25 ; CHECK-LABEL: build_vector_7_inc1_v32i8:
27 ; CHECK-NEXT: index z0.b, #0, #1
28 ; CHECK-NEXT: mov z1.d, z0.d
29 ; CHECK-NEXT: add z0.b, z0.b, #7 // =0x7
30 ; CHECK-NEXT: add z1.b, z1.b, #23 // =0x17
31 ; CHECK-NEXT: stp q0, q1, [x0]
34 ; NONEON-NOSVE-LABEL: build_vector_7_inc1_v32i8:
35 ; NONEON-NOSVE: // %bb.0:
36 ; NONEON-NOSVE-NEXT: adrp x8, .LCPI1_0
37 ; NONEON-NOSVE-NEXT: adrp x9, .LCPI1_1
38 ; NONEON-NOSVE-NEXT: ldr q0, [x8, :lo12:.LCPI1_0]
39 ; NONEON-NOSVE-NEXT: ldr q1, [x9, :lo12:.LCPI1_1]
40 ; NONEON-NOSVE-NEXT: stp q1, q0, [x0]
41 ; NONEON-NOSVE-NEXT: ret
42 store <32 x i8> <i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31, i8 32, i8 33, i8 34, i8 35, i8 36, i8 37, i8 38>, ptr %a, align 1
46 define void @build_vector_0_inc2_v16i16(ptr %a) {
47 ; CHECK-LABEL: build_vector_0_inc2_v16i16:
49 ; CHECK-NEXT: index z0.h, #0, #2
50 ; CHECK-NEXT: str q0, [x0]
51 ; CHECK-NEXT: add z0.h, z0.h, #16 // =0x10
52 ; CHECK-NEXT: str q0, [x0, #16]
55 ; NONEON-NOSVE-LABEL: build_vector_0_inc2_v16i16:
56 ; NONEON-NOSVE: // %bb.0:
57 ; NONEON-NOSVE-NEXT: adrp x8, .LCPI2_0
58 ; NONEON-NOSVE-NEXT: adrp x9, .LCPI2_1
59 ; NONEON-NOSVE-NEXT: ldr q0, [x8, :lo12:.LCPI2_0]
60 ; NONEON-NOSVE-NEXT: ldr q1, [x9, :lo12:.LCPI2_1]
61 ; NONEON-NOSVE-NEXT: stp q1, q0, [x0]
62 ; NONEON-NOSVE-NEXT: ret
63 store <16 x i16> <i16 0, i16 2, i16 4, i16 6, i16 8, i16 10, i16 12, i16 14, i16 16, i16 18, i16 20, i16 22, i16 24, i16 26, i16 28, i16 30>, ptr %a, align 2
67 ; Negative const stride.
68 define void @build_vector_0_dec3_v8i32(ptr %a) {
69 ; CHECK-LABEL: build_vector_0_dec3_v8i32:
71 ; CHECK-NEXT: index z0.s, #0, #-3
72 ; CHECK-NEXT: mov z1.s, #-12 // =0xfffffffffffffff4
73 ; CHECK-NEXT: add z1.s, z0.s, z1.s
74 ; CHECK-NEXT: stp q0, q1, [x0]
77 ; NONEON-NOSVE-LABEL: build_vector_0_dec3_v8i32:
78 ; NONEON-NOSVE: // %bb.0:
79 ; NONEON-NOSVE-NEXT: adrp x8, .LCPI3_0
80 ; NONEON-NOSVE-NEXT: adrp x9, .LCPI3_1
81 ; NONEON-NOSVE-NEXT: ldr q0, [x8, :lo12:.LCPI3_0]
82 ; NONEON-NOSVE-NEXT: ldr q1, [x9, :lo12:.LCPI3_1]
83 ; NONEON-NOSVE-NEXT: stp q1, q0, [x0]
84 ; NONEON-NOSVE-NEXT: ret
85 store <8 x i32> <i32 0, i32 -3, i32 -6, i32 -9, i32 -12, i32 -15, i32 -18, i32 -21>, ptr %a, align 4
89 ; Constant stride that's too big to be directly encoded into the index.
90 define void @build_vector_minus2_dec32_v4i64(ptr %a) {
91 ; CHECK-LABEL: build_vector_minus2_dec32_v4i64:
93 ; CHECK-NEXT: mov x8, #-32 // =0xffffffffffffffe0
94 ; CHECK-NEXT: mov z1.d, #-66 // =0xffffffffffffffbe
95 ; CHECK-NEXT: mov z2.d, #-2 // =0xfffffffffffffffe
96 ; CHECK-NEXT: index z0.d, #0, x8
97 ; CHECK-NEXT: add z1.d, z0.d, z1.d
98 ; CHECK-NEXT: add z0.d, z0.d, z2.d
99 ; CHECK-NEXT: stp q0, q1, [x0]
102 ; NONEON-NOSVE-LABEL: build_vector_minus2_dec32_v4i64:
103 ; NONEON-NOSVE: // %bb.0:
104 ; NONEON-NOSVE-NEXT: adrp x8, .LCPI4_0
105 ; NONEON-NOSVE-NEXT: adrp x9, .LCPI4_1
106 ; NONEON-NOSVE-NEXT: ldr q0, [x8, :lo12:.LCPI4_0]
107 ; NONEON-NOSVE-NEXT: ldr q1, [x9, :lo12:.LCPI4_1]
108 ; NONEON-NOSVE-NEXT: stp q1, q0, [x0]
109 ; NONEON-NOSVE-NEXT: ret
110 store <4 x i64> <i64 -2, i64 -34, i64 -66, i64 -98>, ptr %a, align 8
114 ; Constant but not a sequence.
115 define void @build_vector_no_stride_v4i64(ptr %a) {
116 ; CHECK-LABEL: build_vector_no_stride_v4i64:
118 ; CHECK-NEXT: index z0.d, #1, #7
119 ; CHECK-NEXT: index z1.d, #0, #4
120 ; CHECK-NEXT: stp q1, q0, [x0]
123 ; NONEON-NOSVE-LABEL: build_vector_no_stride_v4i64:
124 ; NONEON-NOSVE: // %bb.0:
125 ; NONEON-NOSVE-NEXT: adrp x8, .LCPI5_0
126 ; NONEON-NOSVE-NEXT: adrp x9, .LCPI5_1
127 ; NONEON-NOSVE-NEXT: ldr q0, [x8, :lo12:.LCPI5_0]
128 ; NONEON-NOSVE-NEXT: ldr q1, [x9, :lo12:.LCPI5_1]
129 ; NONEON-NOSVE-NEXT: stp q1, q0, [x0]
130 ; NONEON-NOSVE-NEXT: ret
131 store <4 x i64> <i64 0, i64 4, i64 1, i64 8>, ptr %a, align 8
135 define void @build_vector_0_inc2_v16f16(ptr %a) {
136 ; CHECK-LABEL: build_vector_0_inc2_v16f16:
138 ; CHECK-NEXT: adrp x8, .LCPI6_0
139 ; CHECK-NEXT: adrp x9, .LCPI6_1
140 ; CHECK-NEXT: ldr q0, [x8, :lo12:.LCPI6_0]
141 ; CHECK-NEXT: ldr q1, [x9, :lo12:.LCPI6_1]
142 ; CHECK-NEXT: stp q1, q0, [x0]
145 ; NONEON-NOSVE-LABEL: build_vector_0_inc2_v16f16:
146 ; NONEON-NOSVE: // %bb.0:
147 ; NONEON-NOSVE-NEXT: adrp x8, .LCPI6_0
148 ; NONEON-NOSVE-NEXT: adrp x9, .LCPI6_1
149 ; NONEON-NOSVE-NEXT: ldr q0, [x8, :lo12:.LCPI6_0]
150 ; NONEON-NOSVE-NEXT: ldr q1, [x9, :lo12:.LCPI6_1]
151 ; NONEON-NOSVE-NEXT: stp q1, q0, [x0]
152 ; NONEON-NOSVE-NEXT: ret
153 store <16 x half> <half 0.0, half 2.0, half 4.0, half 6.0, half 8.0, half 10.0, half 12.0, half 14.0, half 16.0, half 18.0, half 20.0, half 22.0, half 24.0, half 26.0, half 28.0, half 30.0>, ptr %a, align 2
157 ; Negative const stride.
158 define void @build_vector_0_dec3_v8f32(ptr %a) {
159 ; CHECK-LABEL: build_vector_0_dec3_v8f32:
161 ; CHECK-NEXT: adrp x8, .LCPI7_0
162 ; CHECK-NEXT: adrp x9, .LCPI7_1
163 ; CHECK-NEXT: ldr q0, [x8, :lo12:.LCPI7_0]
164 ; CHECK-NEXT: ldr q1, [x9, :lo12:.LCPI7_1]
165 ; CHECK-NEXT: stp q1, q0, [x0]
168 ; NONEON-NOSVE-LABEL: build_vector_0_dec3_v8f32:
169 ; NONEON-NOSVE: // %bb.0:
170 ; NONEON-NOSVE-NEXT: adrp x8, .LCPI7_0
171 ; NONEON-NOSVE-NEXT: adrp x9, .LCPI7_1
172 ; NONEON-NOSVE-NEXT: ldr q0, [x8, :lo12:.LCPI7_0]
173 ; NONEON-NOSVE-NEXT: ldr q1, [x9, :lo12:.LCPI7_1]
174 ; NONEON-NOSVE-NEXT: stp q1, q0, [x0]
175 ; NONEON-NOSVE-NEXT: ret
176 store <8 x float> <float 0.0, float -3.0, float -6.0, float -9.0, float -12.0, float -15.0, float -18.0, float -21.0>, ptr %a, align 4
180 ; Constant stride that's too big to be directly encoded into the index.
181 define void @build_vector_minus2_dec32_v4f64(ptr %a) {
182 ; CHECK-LABEL: build_vector_minus2_dec32_v4f64:
184 ; CHECK-NEXT: adrp x8, .LCPI8_0
185 ; CHECK-NEXT: adrp x9, .LCPI8_1
186 ; CHECK-NEXT: ldr q0, [x8, :lo12:.LCPI8_0]
187 ; CHECK-NEXT: ldr q1, [x9, :lo12:.LCPI8_1]
188 ; CHECK-NEXT: stp q1, q0, [x0]
191 ; NONEON-NOSVE-LABEL: build_vector_minus2_dec32_v4f64:
192 ; NONEON-NOSVE: // %bb.0:
193 ; NONEON-NOSVE-NEXT: adrp x8, .LCPI8_0
194 ; NONEON-NOSVE-NEXT: adrp x9, .LCPI8_1
195 ; NONEON-NOSVE-NEXT: ldr q0, [x8, :lo12:.LCPI8_0]
196 ; NONEON-NOSVE-NEXT: ldr q1, [x9, :lo12:.LCPI8_1]
197 ; NONEON-NOSVE-NEXT: stp q1, q0, [x0]
198 ; NONEON-NOSVE-NEXT: ret
199 store <4 x double> <double -2.0, double -34.0, double -66.0, double -98.0>, ptr %a, align 8
203 ; Constant but not a sequence.
204 define void @build_vector_no_stride_v4f64(ptr %a) {
205 ; CHECK-LABEL: build_vector_no_stride_v4f64:
207 ; CHECK-NEXT: adrp x8, .LCPI9_0
208 ; CHECK-NEXT: adrp x9, .LCPI9_1
209 ; CHECK-NEXT: ldr q0, [x8, :lo12:.LCPI9_0]
210 ; CHECK-NEXT: ldr q1, [x9, :lo12:.LCPI9_1]
211 ; CHECK-NEXT: stp q1, q0, [x0]
214 ; NONEON-NOSVE-LABEL: build_vector_no_stride_v4f64:
215 ; NONEON-NOSVE: // %bb.0:
216 ; NONEON-NOSVE-NEXT: adrp x8, .LCPI9_0
217 ; NONEON-NOSVE-NEXT: adrp x9, .LCPI9_1
218 ; NONEON-NOSVE-NEXT: ldr q0, [x8, :lo12:.LCPI9_0]
219 ; NONEON-NOSVE-NEXT: ldr q1, [x9, :lo12:.LCPI9_1]
220 ; NONEON-NOSVE-NEXT: stp q1, q0, [x0]
221 ; NONEON-NOSVE-NEXT: ret
222 store <4 x double> <double 0.0, double 4.0, double 1.0, double 8.0>, ptr %a, align 8
226 define void @build_vector_non_const_v4i1(i1 %a, i1 %b, i1 %c, i1 %d, ptr %out) {
227 ; CHECK-LABEL: build_vector_non_const_v4i1:
229 ; CHECK-NEXT: orr w8, w0, w1, lsl #1
230 ; CHECK-NEXT: orr w8, w8, w2, lsl #2
231 ; CHECK-NEXT: orr w8, w8, w3, lsl #3
232 ; CHECK-NEXT: strb w8, [x4]
235 ; NONEON-NOSVE-LABEL: build_vector_non_const_v4i1:
236 ; NONEON-NOSVE: // %bb.0:
237 ; NONEON-NOSVE-NEXT: orr w8, w0, w1, lsl #1
238 ; NONEON-NOSVE-NEXT: orr w8, w8, w2, lsl #2
239 ; NONEON-NOSVE-NEXT: orr w8, w8, w3, lsl #3
240 ; NONEON-NOSVE-NEXT: strb w8, [x4]
241 ; NONEON-NOSVE-NEXT: ret
242 %1 = insertelement <4 x i1> undef, i1 %a, i64 0
243 %2 = insertelement <4 x i1> %1, i1 %b, i64 1
244 %3 = insertelement <4 x i1> %2, i1 %c, i64 2
245 %4 = insertelement <4 x i1> %3, i1 %d, i64 3
246 store <4 x i1> %4, ptr %out
250 define void @build_vector_non_const_v2f64(double %a, double %b, ptr %out) {
251 ; CHECK-LABEL: build_vector_non_const_v2f64:
253 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
254 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
255 ; CHECK-NEXT: zip1 z0.d, z0.d, z1.d
256 ; CHECK-NEXT: str q0, [x0]
259 ; NONEON-NOSVE-LABEL: build_vector_non_const_v2f64:
260 ; NONEON-NOSVE: // %bb.0:
261 ; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #-16]!
262 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16
263 ; NONEON-NOSVE-NEXT: ldr q0, [sp]
264 ; NONEON-NOSVE-NEXT: str q0, [x0]
265 ; NONEON-NOSVE-NEXT: add sp, sp, #16
266 ; NONEON-NOSVE-NEXT: ret
267 %1 = insertelement <2 x double> undef, double %a, i64 0
268 %2 = insertelement <2 x double> %1, double %b, i64 1
269 store <2 x double> %2, ptr %out
273 define void @build_vector_non_const_v2f32(float %a, float %b, ptr %out) {
274 ; CHECK-LABEL: build_vector_non_const_v2f32:
276 ; CHECK-NEXT: // kill: def $s0 killed $s0 def $z0
277 ; CHECK-NEXT: // kill: def $s1 killed $s1 def $z1
278 ; CHECK-NEXT: zip1 z0.s, z0.s, z1.s
279 ; CHECK-NEXT: str d0, [x0]
282 ; NONEON-NOSVE-LABEL: build_vector_non_const_v2f32:
283 ; NONEON-NOSVE: // %bb.0:
284 ; NONEON-NOSVE-NEXT: sub sp, sp, #16
285 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16
286 ; NONEON-NOSVE-NEXT: stp s0, s1, [sp, #8]
287 ; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]
288 ; NONEON-NOSVE-NEXT: str d0, [x0]
289 ; NONEON-NOSVE-NEXT: add sp, sp, #16
290 ; NONEON-NOSVE-NEXT: ret
291 %1 = insertelement <2 x float> undef, float %a, i64 0
292 %2 = insertelement <2 x float> %1, float %b, i64 1
293 store <2 x float> %2, ptr %out
297 define void @build_vector_non_const_v4f32(float %a, float %b, float %c, float %d, ptr %out) {
298 ; CHECK-LABEL: build_vector_non_const_v4f32:
300 ; CHECK-NEXT: // kill: def $s2 killed $s2 def $z2
301 ; CHECK-NEXT: // kill: def $s0 killed $s0 def $z0
302 ; CHECK-NEXT: // kill: def $s3 killed $s3 def $z3
303 ; CHECK-NEXT: // kill: def $s1 killed $s1 def $z1
304 ; CHECK-NEXT: zip1 z2.s, z2.s, z3.s
305 ; CHECK-NEXT: zip1 z0.s, z0.s, z1.s
306 ; CHECK-NEXT: zip1 z0.d, z0.d, z2.d
307 ; CHECK-NEXT: str q0, [x0]
310 ; NONEON-NOSVE-LABEL: build_vector_non_const_v4f32:
311 ; NONEON-NOSVE: // %bb.0:
312 ; NONEON-NOSVE-NEXT: sub sp, sp, #16
313 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16
314 ; NONEON-NOSVE-NEXT: stp s2, s3, [sp, #8]
315 ; NONEON-NOSVE-NEXT: stp s0, s1, [sp]
316 ; NONEON-NOSVE-NEXT: ldr q0, [sp]
317 ; NONEON-NOSVE-NEXT: str q0, [x0]
318 ; NONEON-NOSVE-NEXT: add sp, sp, #16
319 ; NONEON-NOSVE-NEXT: ret
320 %1 = insertelement <4 x float> undef, float %a, i64 0
321 %2 = insertelement <4 x float> %1, float %b, i64 1
322 %3 = insertelement <4 x float> %2, float %c, i64 2
323 %4 = insertelement <4 x float> %3, float %d, i64 3
324 store <4 x float> %4, ptr %out
328 define void @build_vector_non_const_v4f64(double %a, double %b, double %c, double %d, ptr %out) {
329 ; CHECK-LABEL: build_vector_non_const_v4f64:
331 ; CHECK-NEXT: // kill: def $d2 killed $d2 def $z2
332 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
333 ; CHECK-NEXT: // kill: def $d3 killed $d3 def $z3
334 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
335 ; CHECK-NEXT: zip1 z2.d, z2.d, z3.d
336 ; CHECK-NEXT: zip1 z0.d, z0.d, z1.d
337 ; CHECK-NEXT: stp q0, q2, [x0]
340 ; NONEON-NOSVE-LABEL: build_vector_non_const_v4f64:
341 ; NONEON-NOSVE: // %bb.0:
342 ; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #-32]!
343 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32
344 ; NONEON-NOSVE-NEXT: stp d2, d3, [sp, #16]
345 ; NONEON-NOSVE-NEXT: ldp q1, q0, [sp]
346 ; NONEON-NOSVE-NEXT: stp q1, q0, [x0]
347 ; NONEON-NOSVE-NEXT: add sp, sp, #32
348 ; NONEON-NOSVE-NEXT: ret
349 %1 = insertelement <4 x double> undef, double %a, i64 0
350 %2 = insertelement <4 x double> %1, double %b, i64 1
351 %3 = insertelement <4 x double> %2, double %c, i64 2
352 %4 = insertelement <4 x double> %3, double %d, i64 3
353 store <4 x double> %4, ptr %out
357 define void @build_vector_non_const_v8f16(half %a, half %b, half %c, half %d, half %e, half %f, half %g, half %h, ptr %out) {
358 ; CHECK-LABEL: build_vector_non_const_v8f16:
360 ; CHECK-NEXT: // kill: def $h6 killed $h6 def $z6
361 ; CHECK-NEXT: // kill: def $h4 killed $h4 def $z4
362 ; CHECK-NEXT: // kill: def $h2 killed $h2 def $z2
363 ; CHECK-NEXT: // kill: def $h0 killed $h0 def $z0
364 ; CHECK-NEXT: // kill: def $h7 killed $h7 def $z7
365 ; CHECK-NEXT: // kill: def $h5 killed $h5 def $z5
366 ; CHECK-NEXT: // kill: def $h3 killed $h3 def $z3
367 ; CHECK-NEXT: // kill: def $h1 killed $h1 def $z1
368 ; CHECK-NEXT: zip1 z6.h, z6.h, z7.h
369 ; CHECK-NEXT: zip1 z4.h, z4.h, z5.h
370 ; CHECK-NEXT: zip1 z2.h, z2.h, z3.h
371 ; CHECK-NEXT: zip1 z0.h, z0.h, z1.h
372 ; CHECK-NEXT: zip1 z1.s, z4.s, z6.s
373 ; CHECK-NEXT: zip1 z0.s, z0.s, z2.s
374 ; CHECK-NEXT: zip1 z0.d, z0.d, z1.d
375 ; CHECK-NEXT: str q0, [x0]
378 ; NONEON-NOSVE-LABEL: build_vector_non_const_v8f16:
379 ; NONEON-NOSVE: // %bb.0:
380 ; NONEON-NOSVE-NEXT: sub sp, sp, #16
381 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16
382 ; NONEON-NOSVE-NEXT: str h7, [sp, #14]
383 ; NONEON-NOSVE-NEXT: str h6, [sp, #12]
384 ; NONEON-NOSVE-NEXT: str h5, [sp, #10]
385 ; NONEON-NOSVE-NEXT: str h4, [sp, #8]
386 ; NONEON-NOSVE-NEXT: str h3, [sp, #6]
387 ; NONEON-NOSVE-NEXT: str h2, [sp, #4]
388 ; NONEON-NOSVE-NEXT: str h1, [sp, #2]
389 ; NONEON-NOSVE-NEXT: str h0, [sp]
390 ; NONEON-NOSVE-NEXT: ldr q0, [sp]
391 ; NONEON-NOSVE-NEXT: str q0, [x0]
392 ; NONEON-NOSVE-NEXT: add sp, sp, #16
393 ; NONEON-NOSVE-NEXT: ret
394 %1 = insertelement <8 x half> undef, half %a, i64 0
395 %2 = insertelement <8 x half> %1, half %b, i64 1
396 %3 = insertelement <8 x half> %2, half %c, i64 2
397 %4 = insertelement <8 x half> %3, half %d, i64 3
398 %5 = insertelement <8 x half> %4, half %e, i64 4
399 %6 = insertelement <8 x half> %5, half %f, i64 5
400 %7 = insertelement <8 x half> %6, half %g, i64 6
401 %8 = insertelement <8 x half> %7, half %h, i64 7
402 store <8 x half> %8, ptr %out
406 define void @build_vector_non_const_v2i32(i32 %a, i32 %b, ptr %out) {
407 ; CHECK-LABEL: build_vector_non_const_v2i32:
409 ; CHECK-NEXT: fmov s0, w1
410 ; CHECK-NEXT: fmov s1, w0
411 ; CHECK-NEXT: zip1 z0.s, z1.s, z0.s
412 ; CHECK-NEXT: str d0, [x2]
415 ; NONEON-NOSVE-LABEL: build_vector_non_const_v2i32:
416 ; NONEON-NOSVE: // %bb.0:
417 ; NONEON-NOSVE-NEXT: sub sp, sp, #16
418 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16
419 ; NONEON-NOSVE-NEXT: stp w0, w1, [sp, #8]
420 ; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]
421 ; NONEON-NOSVE-NEXT: str d0, [x2]
422 ; NONEON-NOSVE-NEXT: add sp, sp, #16
423 ; NONEON-NOSVE-NEXT: ret
424 %1 = insertelement <2 x i32> undef, i32 %a, i64 0
425 %2 = insertelement <2 x i32> %1, i32 %b, i64 1
426 store <2 x i32> %2, ptr %out
430 define void @build_vector_non_const_v8i8(i8 %a, i8 %b, i8 %c, i8 %d, i8 %e, i8 %f, i8 %g, i8 %h, ptr %out) {
431 ; CHECK-LABEL: build_vector_non_const_v8i8:
433 ; CHECK-NEXT: sub sp, sp, #16
434 ; CHECK-NEXT: .cfi_def_cfa_offset 16
435 ; CHECK-NEXT: strb w7, [sp, #15]
436 ; CHECK-NEXT: ldr x8, [sp, #16]
437 ; CHECK-NEXT: strb w6, [sp, #14]
438 ; CHECK-NEXT: strb w5, [sp, #13]
439 ; CHECK-NEXT: strb w4, [sp, #12]
440 ; CHECK-NEXT: strb w3, [sp, #11]
441 ; CHECK-NEXT: strb w2, [sp, #10]
442 ; CHECK-NEXT: strb w1, [sp, #9]
443 ; CHECK-NEXT: strb w0, [sp, #8]
444 ; CHECK-NEXT: ldr d0, [sp, #8]
445 ; CHECK-NEXT: str d0, [x8]
446 ; CHECK-NEXT: add sp, sp, #16
449 ; NONEON-NOSVE-LABEL: build_vector_non_const_v8i8:
450 ; NONEON-NOSVE: // %bb.0:
451 ; NONEON-NOSVE-NEXT: sub sp, sp, #16
452 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16
453 ; NONEON-NOSVE-NEXT: strb w7, [sp, #15]
454 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #16]
455 ; NONEON-NOSVE-NEXT: strb w6, [sp, #14]
456 ; NONEON-NOSVE-NEXT: strb w5, [sp, #13]
457 ; NONEON-NOSVE-NEXT: strb w4, [sp, #12]
458 ; NONEON-NOSVE-NEXT: strb w3, [sp, #11]
459 ; NONEON-NOSVE-NEXT: strb w2, [sp, #10]
460 ; NONEON-NOSVE-NEXT: strb w1, [sp, #9]
461 ; NONEON-NOSVE-NEXT: strb w0, [sp, #8]
462 ; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]
463 ; NONEON-NOSVE-NEXT: str d0, [x8]
464 ; NONEON-NOSVE-NEXT: add sp, sp, #16
465 ; NONEON-NOSVE-NEXT: ret
466 %1 = insertelement <8 x i8> undef, i8 %a, i64 0
467 %2 = insertelement <8 x i8> %1, i8 %b, i64 1
468 %3 = insertelement <8 x i8> %2, i8 %c, i64 2
469 %4 = insertelement <8 x i8> %3, i8 %d, i64 3
470 %5 = insertelement <8 x i8> %4, i8 %e, i64 4
471 %6 = insertelement <8 x i8> %5, i8 %f, i64 5
472 %7 = insertelement <8 x i8> %6, i8 %g, i64 6
473 %8 = insertelement <8 x i8> %7, i8 %h, i64 7
474 store <8 x i8> %8, ptr %out