1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
2 # RUN: llc -mtriple=riscv64 -mattr='+zba' -run-pass=instruction-select -simplify-mir -verify-machineinstrs %s -o - \
9 tracksRegLiveness: true
14 ; CHECK-LABEL: name: sh1add
15 ; CHECK: liveins: $x10, $x11
17 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
18 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
19 ; CHECK-NEXT: [[SH1ADD:%[0-9]+]]:gpr = SH1ADD [[COPY]], [[COPY1]]
20 ; CHECK-NEXT: $x10 = COPY [[SH1ADD]]
21 %0:gprb(s64) = COPY $x10
22 %1:gprb(s64) = COPY $x11
23 %2:gprb(s64) = G_CONSTANT i64 1
24 %3:gprb(s64) = G_SHL %0, %2
25 %4:gprb(s64) = G_ADD %3, %1
32 tracksRegLiveness: true
37 ; CHECK-LABEL: name: sh2add
38 ; CHECK: liveins: $x10, $x11
40 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
41 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
42 ; CHECK-NEXT: [[SH2ADD:%[0-9]+]]:gpr = SH2ADD [[COPY]], [[COPY1]]
43 ; CHECK-NEXT: $x10 = COPY [[SH2ADD]]
44 %0:gprb(s64) = COPY $x10
45 %1:gprb(s64) = COPY $x11
46 %2:gprb(s64) = G_CONSTANT i64 2
47 %3:gprb(s64) = G_SHL %0, %2
48 %4:gprb(s64) = G_ADD %3, %1
55 tracksRegLiveness: true
60 ; CHECK-LABEL: name: sh3add
61 ; CHECK: liveins: $x10, $x11
63 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
64 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
65 ; CHECK-NEXT: [[SH3ADD:%[0-9]+]]:gpr = SH3ADD [[COPY]], [[COPY1]]
66 ; CHECK-NEXT: $x10 = COPY [[SH3ADD]]
67 %0:gprb(s64) = COPY $x10
68 %1:gprb(s64) = COPY $x11
69 %2:gprb(s64) = G_CONSTANT i64 3
70 %3:gprb(s64) = G_SHL %0, %2
71 %4:gprb(s64) = G_ADD %3, %1
78 tracksRegLiveness: true
83 ; CHECK-LABEL: name: no_sh1add
84 ; CHECK: liveins: $x10, $x11
86 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
87 ; CHECK-NEXT: [[SLLI:%[0-9]+]]:gpr = SLLI [[COPY]], 1
88 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[SLLI]], 37
89 ; CHECK-NEXT: $x10 = COPY [[ADDI]]
90 %0:gprb(s64) = COPY $x10
91 %1:gprb(s64) = G_CONSTANT i64 37
92 %2:gprb(s64) = G_CONSTANT i64 1
93 %3:gprb(s64) = G_SHL %0, %2
94 %4:gprb(s64) = G_ADD %3, %1
98 name: shXadd_complex_and_shl
100 regBankSelected: true
101 tracksRegLiveness: true
106 ; CHECK-LABEL: name: shXadd_complex_and_shl
107 ; CHECK: liveins: $x10, $x11
109 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
110 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
111 ; CHECK-NEXT: [[SRLIW:%[0-9]+]]:gpr = SRLIW [[COPY]], 1
112 ; CHECK-NEXT: [[SH3ADD:%[0-9]+]]:gpr = SH3ADD [[SRLIW]], [[COPY1]]
113 ; CHECK-NEXT: $x10 = COPY [[SH3ADD]]
114 %0:gprb(s64) = COPY $x10
115 %1:gprb(s64) = COPY $x11
117 %2:gprb(s64) = G_CONSTANT i64 4294967294
118 %3:gprb(s64) = G_AND %0, %2
119 %4:gprb(s64) = G_CONSTANT i64 2
120 %5:gprb(s64) = G_SHL %3, %4
122 %6:gprb(s64) = G_ADD %5, %1
126 name: shXadd_complex_and_lshr
128 regBankSelected: true
129 tracksRegLiveness: true
134 ; CHECK-LABEL: name: shXadd_complex_and_lshr
135 ; CHECK: liveins: $x10, $x11
137 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
138 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
139 ; CHECK-NEXT: [[SRLIW:%[0-9]+]]:gpr = SRLIW [[COPY]], 2
140 ; CHECK-NEXT: [[SH1ADD:%[0-9]+]]:gpr = SH1ADD [[SRLIW]], [[COPY1]]
141 ; CHECK-NEXT: $x10 = COPY [[SH1ADD]]
142 %0:gprb(s64) = COPY $x10
143 %1:gprb(s64) = COPY $x11
145 %2:gprb(s64) = G_CONSTANT i64 4294967292
146 %3:gprb(s64) = G_AND %0, %2
147 %4:gprb(s64) = G_CONSTANT i64 1
148 %5:gprb(s64) = G_LSHR %3, %4
150 %6:gprb(s64) = G_ADD %5, %1
154 name: shXadd_uw_complex_shl_and
156 regBankSelected: true
157 tracksRegLiveness: true
162 ; CHECK-LABEL: name: shXadd_uw_complex_shl_and
163 ; CHECK: liveins: $x10, $x11
165 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
166 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
167 ; CHECK-NEXT: [[SLLI:%[0-9]+]]:gpr = SLLI [[COPY]], 1
168 ; CHECK-NEXT: [[SH2ADD_UW:%[0-9]+]]:gpr = SH2ADD_UW [[SLLI]], [[COPY1]]
169 ; CHECK-NEXT: $x10 = COPY [[SH2ADD_UW]]
170 %0:gprb(s64) = COPY $x10
171 %1:gprb(s64) = COPY $x11
173 %2:gprb(s64) = G_CONSTANT i64 3
174 %3:gprb(s64) = G_SHL %0, %2
175 %4:gprb(s64) = G_CONSTANT i64 17179869183
176 %5:gprb(s64) = G_AND %3, %4
178 %6:gprb(s64) = G_ADD %5, %1
184 regBankSelected: true
185 tracksRegLiveness: true
190 ; CHECK-LABEL: name: slli_uw
191 ; CHECK: liveins: $x10
193 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
194 ; CHECK-NEXT: [[SLLI_UW:%[0-9]+]]:gpr = SLLI_UW [[COPY]], 7
195 ; CHECK-NEXT: $x10 = COPY [[SLLI_UW]]
196 %0:gprb(s64) = COPY $x10
198 %1:gprb(s64) = G_CONSTANT i64 4294967295
199 %2:gprb(s64) = G_AND %0, %1
200 %3:gprb(s64) = G_CONSTANT i64 7
201 %4:gprb(s64) = G_SHL %2, %3
206 name: slli_uw_complex
208 regBankSelected: true
209 tracksRegLiveness: true
214 ; CHECK-LABEL: name: slli_uw_complex
215 ; CHECK: liveins: $x10
217 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
218 ; CHECK-NEXT: [[SRLI:%[0-9]+]]:gpr = SRLI [[COPY]], 2
219 ; CHECK-NEXT: [[SLLI_UW:%[0-9]+]]:gpr = SLLI_UW [[SRLI]], 2
220 ; CHECK-NEXT: $x10 = COPY [[SLLI_UW]]
221 %0:gprb(s64) = COPY $x10
223 %1:gprb(s64) = G_CONSTANT i64 17179869180
224 %2:gprb(s64) = G_AND %0, %1
231 regBankSelected: true
232 tracksRegLiveness: true
237 ; CHECK-LABEL: name: adduw
238 ; CHECK: liveins: $x10, $x11
240 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
241 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
242 ; CHECK-NEXT: [[ADD_UW:%[0-9]+]]:gpr = ADD_UW [[COPY]], [[COPY1]]
243 ; CHECK-NEXT: $x10 = COPY [[ADD_UW]]
244 %0:gprb(s64) = COPY $x10
245 %1:gprb(s64) = COPY $x11
246 %2:gprb(s64) = G_CONSTANT i64 4294967295
247 %3:gprb(s64) = G_AND %0, %2
248 %4:gprb(s64) = G_ADD %3, %1