| blob | 2667fde89e9354f9a491b8cba2658ce46e4039f9 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2 ; RUN: llc -mtriple=riscv32 -target-abi ilp32d -mattr=+c,+f,+d \
3 ; RUN: -riscv-no-aliases < %s \
4 ; RUN: | FileCheck -check-prefix=RV32IFDC %s
5 ; RUN: llc -mtriple=riscv32 -target-abi ilp32d -mattr=-c,+f,+d \
6 ; RUN: -riscv-no-aliases < %s \
7 ; RUN: | FileCheck -check-prefix=RV32IFD %s
9 ; constant is small and fit in 6 bit (compress imm)
10 define i32 @ne_small_pos(i32 %in0) minsize {
11 ; RV32IFDC-LABEL: ne_small_pos:
12 ; RV32IFDC: # %bb.0:
13 ; RV32IFDC-NEXT: c.mv a1, a0
14 ; RV32IFDC-NEXT: c.li a2, 20
15 ; RV32IFDC-NEXT: addi a0, zero, -99
16 ; RV32IFDC-NEXT: bne a1, a2, .LBB0_2
17 ; RV32IFDC-NEXT: # %bb.1:
18 ; RV32IFDC-NEXT: addi a0, zero, 42
19 ; RV32IFDC-NEXT: .LBB0_2:
20 ; RV32IFDC-NEXT: c.jr ra
21 ;
22 ; RV32IFD-LABEL: ne_small_pos:
23 ; RV32IFD: # %bb.0:
24 ; RV32IFD-NEXT: addi a1, a0, 0
25 ; RV32IFD-NEXT: addi a2, zero, 20
26 ; RV32IFD-NEXT: addi a0, zero, -99
27 ; RV32IFD-NEXT: bne a1, a2, .LBB0_2
28 ; RV32IFD-NEXT: # %bb.1:
29 ; RV32IFD-NEXT: addi a0, zero, 42
30 ; RV32IFD-NEXT: .LBB0_2:
31 ; RV32IFD-NEXT: jalr zero, 0(ra)
32 %cmp = icmp ne i32 %in0, 20
33 %toRet = select i1 %cmp, i32 -99, i32 42
34 ret i32 %toRet
35 }
37 ; constant is small and fit in 6 bit (compress imm)
38 define i32 @ne_small_neg(i32 %in0) minsize {
39 ; RV32IFDC-LABEL: ne_small_neg:
40 ; RV32IFDC: # %bb.0:
41 ; RV32IFDC-NEXT: c.mv a1, a0
42 ; RV32IFDC-NEXT: c.li a2, -20
43 ; RV32IFDC-NEXT: addi a0, zero, -99
44 ; RV32IFDC-NEXT: bne a1, a2, .LBB1_2
45 ; RV32IFDC-NEXT: # %bb.1:
46 ; RV32IFDC-NEXT: addi a0, zero, 42
47 ; RV32IFDC-NEXT: .LBB1_2:
48 ; RV32IFDC-NEXT: c.jr ra
49 ;
50 ; RV32IFD-LABEL: ne_small_neg:
51 ; RV32IFD: # %bb.0:
52 ; RV32IFD-NEXT: addi a1, a0, 0
53 ; RV32IFD-NEXT: addi a2, zero, -20
54 ; RV32IFD-NEXT: addi a0, zero, -99
55 ; RV32IFD-NEXT: bne a1, a2, .LBB1_2
56 ; RV32IFD-NEXT: # %bb.1:
57 ; RV32IFD-NEXT: addi a0, zero, 42
58 ; RV32IFD-NEXT: .LBB1_2:
59 ; RV32IFD-NEXT: jalr zero, 0(ra)
60 %cmp = icmp ne i32 %in0, -20
61 %toRet = select i1 %cmp, i32 -99, i32 42
62 ret i32 %toRet
63 }
65 ; constant is small and fit in 6 bit (compress imm)
66 define i32 @ne_small_edge_pos(i32 %in0) minsize {
67 ; RV32IFDC-LABEL: ne_small_edge_pos:
68 ; RV32IFDC: # %bb.0:
69 ; RV32IFDC-NEXT: c.mv a1, a0
70 ; RV32IFDC-NEXT: c.li a2, 31
71 ; RV32IFDC-NEXT: addi a0, zero, -99
72 ; RV32IFDC-NEXT: bne a1, a2, .LBB2_2
73 ; RV32IFDC-NEXT: # %bb.1:
74 ; RV32IFDC-NEXT: addi a0, zero, 42
75 ; RV32IFDC-NEXT: .LBB2_2:
76 ; RV32IFDC-NEXT: c.jr ra
77 ;
78 ; RV32IFD-LABEL: ne_small_edge_pos:
79 ; RV32IFD: # %bb.0:
80 ; RV32IFD-NEXT: addi a1, a0, 0
81 ; RV32IFD-NEXT: addi a2, zero, 31
82 ; RV32IFD-NEXT: addi a0, zero, -99
83 ; RV32IFD-NEXT: bne a1, a2, .LBB2_2
84 ; RV32IFD-NEXT: # %bb.1:
85 ; RV32IFD-NEXT: addi a0, zero, 42
86 ; RV32IFD-NEXT: .LBB2_2:
87 ; RV32IFD-NEXT: jalr zero, 0(ra)
88 %cmp = icmp ne i32 %in0, 31
89 %toRet = select i1 %cmp, i32 -99, i32 42
90 ret i32 %toRet
91 }
93 ; constant is small and fit in 6 bit (compress imm)
94 define i32 @ne_small_edge_neg(i32 %in0) minsize {
95 ; RV32IFDC-LABEL: ne_small_edge_neg:
96 ; RV32IFDC: # %bb.0:
97 ; RV32IFDC-NEXT: c.mv a1, a0
98 ; RV32IFDC-NEXT: c.li a2, -32
99 ; RV32IFDC-NEXT: addi a0, zero, -99
100 ; RV32IFDC-NEXT: bne a1, a2, .LBB3_2
101 ; RV32IFDC-NEXT: # %bb.1:
102 ; RV32IFDC-NEXT: addi a0, zero, 42
103 ; RV32IFDC-NEXT: .LBB3_2:
104 ; RV32IFDC-NEXT: c.jr ra
105 ;
106 ; RV32IFD-LABEL: ne_small_edge_neg:
107 ; RV32IFD: # %bb.0:
108 ; RV32IFD-NEXT: addi a1, a0, 0
109 ; RV32IFD-NEXT: addi a2, zero, -32
110 ; RV32IFD-NEXT: addi a0, zero, -99
111 ; RV32IFD-NEXT: bne a1, a2, .LBB3_2
112 ; RV32IFD-NEXT: # %bb.1:
113 ; RV32IFD-NEXT: addi a0, zero, 42
114 ; RV32IFD-NEXT: .LBB3_2:
115 ; RV32IFD-NEXT: jalr zero, 0(ra)
116 %cmp = icmp ne i32 %in0, -32
117 %toRet = select i1 %cmp, i32 -99, i32 42
118 ret i32 %toRet
119 }
121 ; constant is medium and not fit in 6 bit (compress imm),
122 ; but fit in 12 bit (imm)
123 define i32 @ne_medium_ledge_pos(i32 %in0) minsize {
124 ; RV32IFDC-LABEL: ne_medium_ledge_pos:
125 ; RV32IFDC: # %bb.0:
126 ; RV32IFDC-NEXT: addi a1, a0, -33
127 ; RV32IFDC-NEXT: addi a0, zero, -99
128 ; RV32IFDC-NEXT: c.bnez a1, .LBB4_2
129 ; RV32IFDC-NEXT: # %bb.1:
130 ; RV32IFDC-NEXT: addi a0, zero, 42
131 ; RV32IFDC-NEXT: .LBB4_2:
132 ; RV32IFDC-NEXT: c.jr ra
133 ;
134 ; RV32IFD-LABEL: ne_medium_ledge_pos:
135 ; RV32IFD: # %bb.0:
136 ; RV32IFD-NEXT: addi a1, a0, 0
137 ; RV32IFD-NEXT: addi a2, zero, 33
138 ; RV32IFD-NEXT: addi a0, zero, -99
139 ; RV32IFD-NEXT: bne a1, a2, .LBB4_2
140 ; RV32IFD-NEXT: # %bb.1:
141 ; RV32IFD-NEXT: addi a0, zero, 42
142 ; RV32IFD-NEXT: .LBB4_2:
143 ; RV32IFD-NEXT: jalr zero, 0(ra)
144 %cmp = icmp ne i32 %in0, 33
145 %toRet = select i1 %cmp, i32 -99, i32 42
146 ret i32 %toRet
147 }
149 ; constant is medium and not fit in 6 bit (compress imm),
150 ; but fit in 12 bit (imm)
151 define i32 @ne_medium_ledge_neg(i32 %in0) minsize {
152 ; RV32IFDC-LABEL: ne_medium_ledge_neg:
153 ; RV32IFDC: # %bb.0:
154 ; RV32IFDC-NEXT: addi a1, a0, 33
155 ; RV32IFDC-NEXT: addi a0, zero, -99
156 ; RV32IFDC-NEXT: c.bnez a1, .LBB5_2
157 ; RV32IFDC-NEXT: # %bb.1:
158 ; RV32IFDC-NEXT: addi a0, zero, 42
159 ; RV32IFDC-NEXT: .LBB5_2:
160 ; RV32IFDC-NEXT: c.jr ra
161 ;
162 ; RV32IFD-LABEL: ne_medium_ledge_neg:
163 ; RV32IFD: # %bb.0:
164 ; RV32IFD-NEXT: addi a1, a0, 0
165 ; RV32IFD-NEXT: addi a2, zero, -33
166 ; RV32IFD-NEXT: addi a0, zero, -99
167 ; RV32IFD-NEXT: bne a1, a2, .LBB5_2
168 ; RV32IFD-NEXT: # %bb.1:
169 ; RV32IFD-NEXT: addi a0, zero, 42
170 ; RV32IFD-NEXT: .LBB5_2:
171 ; RV32IFD-NEXT: jalr zero, 0(ra)
172 %cmp = icmp ne i32 %in0, -33
173 %toRet = select i1 %cmp, i32 -99, i32 42
174 ret i32 %toRet
175 }
177 ; constant is medium and not fit in 6 bit (compress imm),
178 ; but fit in 12 bit (imm)
179 define i32 @ne_medium_pos(i32 %in0) minsize {
180 ; RV32IFDC-LABEL: ne_medium_pos:
181 ; RV32IFDC: # %bb.0:
182 ; RV32IFDC-NEXT: addi a1, a0, -63
183 ; RV32IFDC-NEXT: addi a0, zero, -99
184 ; RV32IFDC-NEXT: c.bnez a1, .LBB6_2
185 ; RV32IFDC-NEXT: # %bb.1:
186 ; RV32IFDC-NEXT: addi a0, zero, 42
187 ; RV32IFDC-NEXT: .LBB6_2:
188 ; RV32IFDC-NEXT: c.jr ra
189 ;
190 ; RV32IFD-LABEL: ne_medium_pos:
191 ; RV32IFD: # %bb.0:
192 ; RV32IFD-NEXT: addi a1, a0, 0
193 ; RV32IFD-NEXT: addi a2, zero, 63
194 ; RV32IFD-NEXT: addi a0, zero, -99
195 ; RV32IFD-NEXT: bne a1, a2, .LBB6_2
196 ; RV32IFD-NEXT: # %bb.1:
197 ; RV32IFD-NEXT: addi a0, zero, 42
198 ; RV32IFD-NEXT: .LBB6_2:
199 ; RV32IFD-NEXT: jalr zero, 0(ra)
200 %cmp = icmp ne i32 %in0, 63
201 %toRet = select i1 %cmp, i32 -99, i32 42
202 ret i32 %toRet
203 }
205 ; constant is medium and not fit in 6 bit (compress imm),
206 ; but fit in 12 bit (imm)
207 define i32 @ne_medium_neg(i32 %in0) minsize {
208 ; RV32IFDC-LABEL: ne_medium_neg:
209 ; RV32IFDC: # %bb.0:
210 ; RV32IFDC-NEXT: addi a1, a0, 63
211 ; RV32IFDC-NEXT: addi a0, zero, -99
212 ; RV32IFDC-NEXT: c.bnez a1, .LBB7_2
213 ; RV32IFDC-NEXT: # %bb.1:
214 ; RV32IFDC-NEXT: addi a0, zero, 42
215 ; RV32IFDC-NEXT: .LBB7_2:
216 ; RV32IFDC-NEXT: c.jr ra
217 ;
218 ; RV32IFD-LABEL: ne_medium_neg:
219 ; RV32IFD: # %bb.0:
220 ; RV32IFD-NEXT: addi a1, a0, 0
221 ; RV32IFD-NEXT: addi a2, zero, -63
222 ; RV32IFD-NEXT: addi a0, zero, -99
223 ; RV32IFD-NEXT: bne a1, a2, .LBB7_2
224 ; RV32IFD-NEXT: # %bb.1:
225 ; RV32IFD-NEXT: addi a0, zero, 42
226 ; RV32IFD-NEXT: .LBB7_2:
227 ; RV32IFD-NEXT: jalr zero, 0(ra)
228 %cmp = icmp ne i32 %in0, -63
229 %toRet = select i1 %cmp, i32 -99, i32 42
230 ret i32 %toRet
231 }
233 ; constant is medium and not fit in 6 bit (compress imm),
234 ; but fit in 12 bit (imm)
235 define i32 @ne_medium_bedge_pos(i32 %in0) minsize {
236 ; RV32IFDC-LABEL: ne_medium_bedge_pos:
237 ; RV32IFDC: # %bb.0:
238 ; RV32IFDC-NEXT: addi a1, a0, -2047
239 ; RV32IFDC-NEXT: addi a0, zero, -99
240 ; RV32IFDC-NEXT: c.bnez a1, .LBB8_2
241 ; RV32IFDC-NEXT: # %bb.1:
242 ; RV32IFDC-NEXT: addi a0, zero, 42
243 ; RV32IFDC-NEXT: .LBB8_2:
244 ; RV32IFDC-NEXT: c.jr ra
245 ;
246 ; RV32IFD-LABEL: ne_medium_bedge_pos:
247 ; RV32IFD: # %bb.0:
248 ; RV32IFD-NEXT: addi a1, a0, 0
249 ; RV32IFD-NEXT: addi a2, zero, 2047
250 ; RV32IFD-NEXT: addi a0, zero, -99
251 ; RV32IFD-NEXT: bne a1, a2, .LBB8_2
252 ; RV32IFD-NEXT: # %bb.1:
253 ; RV32IFD-NEXT: addi a0, zero, 42
254 ; RV32IFD-NEXT: .LBB8_2:
255 ; RV32IFD-NEXT: jalr zero, 0(ra)
256 %cmp = icmp ne i32 %in0, 2047
257 %toRet = select i1 %cmp, i32 -99, i32 42
258 ret i32 %toRet
259 }
261 ; constant is medium and not fit in 6 bit (compress imm),
262 ; but fit in 12 bit (imm), negative value fit in 12 bit too.
263 define i32 @ne_medium_bedge_neg(i32 %in0) minsize {
264 ; RV32IFDC-LABEL: ne_medium_bedge_neg:
265 ; RV32IFDC: # %bb.0:
266 ; RV32IFDC-NEXT: addi a1, a0, 2047
267 ; RV32IFDC-NEXT: addi a0, zero, -99
268 ; RV32IFDC-NEXT: c.bnez a1, .LBB9_2
269 ; RV32IFDC-NEXT: # %bb.1:
270 ; RV32IFDC-NEXT: addi a0, zero, 42
271 ; RV32IFDC-NEXT: .LBB9_2:
272 ; RV32IFDC-NEXT: c.jr ra
273 ;
274 ; RV32IFD-LABEL: ne_medium_bedge_neg:
275 ; RV32IFD: # %bb.0:
276 ; RV32IFD-NEXT: addi a1, a0, 0
277 ; RV32IFD-NEXT: addi a2, zero, -2047
278 ; RV32IFD-NEXT: addi a0, zero, -99
279 ; RV32IFD-NEXT: bne a1, a2, .LBB9_2
280 ; RV32IFD-NEXT: # %bb.1:
281 ; RV32IFD-NEXT: addi a0, zero, 42
282 ; RV32IFD-NEXT: .LBB9_2:
283 ; RV32IFD-NEXT: jalr zero, 0(ra)
284 %cmp = icmp ne i32 %in0, -2047
285 %toRet = select i1 %cmp, i32 -99, i32 42
286 ret i32 %toRet
287 }
289 ; constant is big and do not fit in 12 bit (imm), fit in i32
290 define i32 @ne_big_ledge_pos(i32 %in0) minsize {
291 ; RV32IFDC-LABEL: ne_big_ledge_pos:
292 ; RV32IFDC: # %bb.0:
293 ; RV32IFDC-NEXT: c.mv a1, a0
294 ; RV32IFDC-NEXT: c.li a0, 1
295 ; RV32IFDC-NEXT: slli a2, a0, 11
296 ; RV32IFDC-NEXT: addi a0, zero, -99
297 ; RV32IFDC-NEXT: bne a1, a2, .LBB10_2
298 ; RV32IFDC-NEXT: # %bb.1:
299 ; RV32IFDC-NEXT: addi a0, zero, 42
300 ; RV32IFDC-NEXT: .LBB10_2:
301 ; RV32IFDC-NEXT: c.jr ra
302 ;
303 ; RV32IFD-LABEL: ne_big_ledge_pos:
304 ; RV32IFD: # %bb.0:
305 ; RV32IFD-NEXT: addi a1, a0, 0
306 ; RV32IFD-NEXT: addi a0, zero, 1
307 ; RV32IFD-NEXT: slli a2, a0, 11
308 ; RV32IFD-NEXT: addi a0, zero, -99
309 ; RV32IFD-NEXT: bne a1, a2, .LBB10_2
310 ; RV32IFD-NEXT: # %bb.1:
311 ; RV32IFD-NEXT: addi a0, zero, 42
312 ; RV32IFD-NEXT: .LBB10_2:
313 ; RV32IFD-NEXT: jalr zero, 0(ra)
314 %cmp = icmp ne i32 %in0, 2048
315 %toRet = select i1 %cmp, i32 -99, i32 42
316 ret i32 %toRet
317 }
319 ; constant is big and do not fit in 12 bit (imm), fit in i32
320 define i32 @ne_big_ledge_neg(i32 %in0) minsize {
321 ; RV32IFDC-LABEL: ne_big_ledge_neg:
322 ; RV32IFDC: # %bb.0:
323 ; RV32IFDC-NEXT: c.mv a1, a0
324 ; RV32IFDC-NEXT: addi a2, zero, -2048
325 ; RV32IFDC-NEXT: addi a0, zero, -99
326 ; RV32IFDC-NEXT: bne a1, a2, .LBB11_2
327 ; RV32IFDC-NEXT: # %bb.1:
328 ; RV32IFDC-NEXT: addi a0, zero, 42
329 ; RV32IFDC-NEXT: .LBB11_2:
330 ; RV32IFDC-NEXT: c.jr ra
331 ;
332 ; RV32IFD-LABEL: ne_big_ledge_neg:
333 ; RV32IFD: # %bb.0:
334 ; RV32IFD-NEXT: addi a1, a0, 0
335 ; RV32IFD-NEXT: addi a2, zero, -2048
336 ; RV32IFD-NEXT: addi a0, zero, -99
337 ; RV32IFD-NEXT: bne a1, a2, .LBB11_2
338 ; RV32IFD-NEXT: # %bb.1:
339 ; RV32IFD-NEXT: addi a0, zero, 42
340 ; RV32IFD-NEXT: .LBB11_2:
341 ; RV32IFD-NEXT: jalr zero, 0(ra)
342 %cmp = icmp ne i32 %in0, -2048
343 %toRet = select i1 %cmp, i32 -99, i32 42
344 ret i32 %toRet
345 }
348 ;; Same as above, but for eq
350 ; constant is small and fit in 6 bit (compress imm)
351 define i32 @eq_small_pos(i32 %in0) minsize {
352 ; RV32IFDC-LABEL: eq_small_pos:
353 ; RV32IFDC: # %bb.0:
354 ; RV32IFDC-NEXT: c.mv a1, a0
355 ; RV32IFDC-NEXT: c.li a2, 20
356 ; RV32IFDC-NEXT: addi a0, zero, -99
357 ; RV32IFDC-NEXT: beq a1, a2, .LBB12_2
358 ; RV32IFDC-NEXT: # %bb.1:
359 ; RV32IFDC-NEXT: addi a0, zero, 42
360 ; RV32IFDC-NEXT: .LBB12_2:
361 ; RV32IFDC-NEXT: c.jr ra
362 ;
363 ; RV32IFD-LABEL: eq_small_pos:
364 ; RV32IFD: # %bb.0:
365 ; RV32IFD-NEXT: addi a1, a0, 0
366 ; RV32IFD-NEXT: addi a2, zero, 20
367 ; RV32IFD-NEXT: addi a0, zero, -99
368 ; RV32IFD-NEXT: beq a1, a2, .LBB12_2
369 ; RV32IFD-NEXT: # %bb.1:
370 ; RV32IFD-NEXT: addi a0, zero, 42
371 ; RV32IFD-NEXT: .LBB12_2:
372 ; RV32IFD-NEXT: jalr zero, 0(ra)
373 %cmp = icmp eq i32 %in0, 20
374 %toRet = select i1 %cmp, i32 -99, i32 42
375 ret i32 %toRet
376 }
378 ; constant is small and fit in 6 bit (compress imm)
379 define i32 @eq_small_neg(i32 %in0) minsize {
380 ; RV32IFDC-LABEL: eq_small_neg:
381 ; RV32IFDC: # %bb.0:
382 ; RV32IFDC-NEXT: c.mv a1, a0
383 ; RV32IFDC-NEXT: c.li a2, -20
384 ; RV32IFDC-NEXT: addi a0, zero, -99
385 ; RV32IFDC-NEXT: beq a1, a2, .LBB13_2
386 ; RV32IFDC-NEXT: # %bb.1:
387 ; RV32IFDC-NEXT: addi a0, zero, 42
388 ; RV32IFDC-NEXT: .LBB13_2:
389 ; RV32IFDC-NEXT: c.jr ra
390 ;
391 ; RV32IFD-LABEL: eq_small_neg:
392 ; RV32IFD: # %bb.0:
393 ; RV32IFD-NEXT: addi a1, a0, 0
394 ; RV32IFD-NEXT: addi a2, zero, -20
395 ; RV32IFD-NEXT: addi a0, zero, -99
396 ; RV32IFD-NEXT: beq a1, a2, .LBB13_2
397 ; RV32IFD-NEXT: # %bb.1:
398 ; RV32IFD-NEXT: addi a0, zero, 42
399 ; RV32IFD-NEXT: .LBB13_2:
400 ; RV32IFD-NEXT: jalr zero, 0(ra)
401 %cmp = icmp eq i32 %in0, -20
402 %toRet = select i1 %cmp, i32 -99, i32 42
403 ret i32 %toRet
404 }
406 ; constant is small and fit in 6 bit (compress imm)
407 define i32 @eq_small_edge_pos(i32 %in0) minsize {
408 ; RV32IFDC-LABEL: eq_small_edge_pos:
409 ; RV32IFDC: # %bb.0:
410 ; RV32IFDC-NEXT: c.mv a1, a0
411 ; RV32IFDC-NEXT: c.li a2, 31
412 ; RV32IFDC-NEXT: addi a0, zero, -99
413 ; RV32IFDC-NEXT: beq a1, a2, .LBB14_2
414 ; RV32IFDC-NEXT: # %bb.1:
415 ; RV32IFDC-NEXT: addi a0, zero, 42
416 ; RV32IFDC-NEXT: .LBB14_2:
417 ; RV32IFDC-NEXT: c.jr ra
418 ;
419 ; RV32IFD-LABEL: eq_small_edge_pos:
420 ; RV32IFD: # %bb.0:
421 ; RV32IFD-NEXT: addi a1, a0, 0
422 ; RV32IFD-NEXT: addi a2, zero, 31
423 ; RV32IFD-NEXT: addi a0, zero, -99
424 ; RV32IFD-NEXT: beq a1, a2, .LBB14_2
425 ; RV32IFD-NEXT: # %bb.1:
426 ; RV32IFD-NEXT: addi a0, zero, 42
427 ; RV32IFD-NEXT: .LBB14_2:
428 ; RV32IFD-NEXT: jalr zero, 0(ra)
429 %cmp = icmp eq i32 %in0, 31
430 %toRet = select i1 %cmp, i32 -99, i32 42
431 ret i32 %toRet
432 }
434 ; constant is small and fit in 6 bit (compress imm)
435 define i32 @eq_small_edge_neg(i32 %in0) minsize {
436 ; RV32IFDC-LABEL: eq_small_edge_neg:
437 ; RV32IFDC: # %bb.0:
438 ; RV32IFDC-NEXT: c.mv a1, a0
439 ; RV32IFDC-NEXT: c.li a2, -32
440 ; RV32IFDC-NEXT: addi a0, zero, -99
441 ; RV32IFDC-NEXT: beq a1, a2, .LBB15_2
442 ; RV32IFDC-NEXT: # %bb.1:
443 ; RV32IFDC-NEXT: addi a0, zero, 42
444 ; RV32IFDC-NEXT: .LBB15_2:
445 ; RV32IFDC-NEXT: c.jr ra
446 ;
447 ; RV32IFD-LABEL: eq_small_edge_neg:
448 ; RV32IFD: # %bb.0:
449 ; RV32IFD-NEXT: addi a1, a0, 0
450 ; RV32IFD-NEXT: addi a2, zero, -32
451 ; RV32IFD-NEXT: addi a0, zero, -99
452 ; RV32IFD-NEXT: beq a1, a2, .LBB15_2
453 ; RV32IFD-NEXT: # %bb.1:
454 ; RV32IFD-NEXT: addi a0, zero, 42
455 ; RV32IFD-NEXT: .LBB15_2:
456 ; RV32IFD-NEXT: jalr zero, 0(ra)
457 %cmp = icmp eq i32 %in0, -32
458 %toRet = select i1 %cmp, i32 -99, i32 42
459 ret i32 %toRet
460 }
462 ; constant is medium and not fit in 6 bit (compress imm),
463 ; but fit in 12 bit (imm)
464 define i32 @eq_medium_ledge_pos(i32 %in0) minsize {
465 ; RV32IFDC-LABEL: eq_medium_ledge_pos:
466 ; RV32IFDC: # %bb.0:
467 ; RV32IFDC-NEXT: addi a1, a0, -33
468 ; RV32IFDC-NEXT: addi a0, zero, -99
469 ; RV32IFDC-NEXT: c.beqz a1, .LBB16_2
470 ; RV32IFDC-NEXT: # %bb.1:
471 ; RV32IFDC-NEXT: addi a0, zero, 42
472 ; RV32IFDC-NEXT: .LBB16_2:
473 ; RV32IFDC-NEXT: c.jr ra
474 ;
475 ; RV32IFD-LABEL: eq_medium_ledge_pos:
476 ; RV32IFD: # %bb.0:
477 ; RV32IFD-NEXT: addi a1, a0, 0
478 ; RV32IFD-NEXT: addi a2, zero, 33
479 ; RV32IFD-NEXT: addi a0, zero, -99
480 ; RV32IFD-NEXT: beq a1, a2, .LBB16_2
481 ; RV32IFD-NEXT: # %bb.1:
482 ; RV32IFD-NEXT: addi a0, zero, 42
483 ; RV32IFD-NEXT: .LBB16_2:
484 ; RV32IFD-NEXT: jalr zero, 0(ra)
485 %cmp = icmp eq i32 %in0, 33
486 %toRet = select i1 %cmp, i32 -99, i32 42
487 ret i32 %toRet
488 }
490 ; constant is medium and not fit in 6 bit (compress imm),
491 ; but fit in 12 bit (imm)
492 define i32 @eq_medium_ledge_neg(i32 %in0) minsize {
493 ; RV32IFDC-LABEL: eq_medium_ledge_neg:
494 ; RV32IFDC: # %bb.0:
495 ; RV32IFDC-NEXT: addi a1, a0, 33
496 ; RV32IFDC-NEXT: addi a0, zero, -99
497 ; RV32IFDC-NEXT: c.beqz a1, .LBB17_2
498 ; RV32IFDC-NEXT: # %bb.1:
499 ; RV32IFDC-NEXT: addi a0, zero, 42
500 ; RV32IFDC-NEXT: .LBB17_2:
501 ; RV32IFDC-NEXT: c.jr ra
502 ;
503 ; RV32IFD-LABEL: eq_medium_ledge_neg:
504 ; RV32IFD: # %bb.0:
505 ; RV32IFD-NEXT: addi a1, a0, 0
506 ; RV32IFD-NEXT: addi a2, zero, -33
507 ; RV32IFD-NEXT: addi a0, zero, -99
508 ; RV32IFD-NEXT: beq a1, a2, .LBB17_2
509 ; RV32IFD-NEXT: # %bb.1:
510 ; RV32IFD-NEXT: addi a0, zero, 42
511 ; RV32IFD-NEXT: .LBB17_2:
512 ; RV32IFD-NEXT: jalr zero, 0(ra)
513 %cmp = icmp eq i32 %in0, -33
514 %toRet = select i1 %cmp, i32 -99, i32 42
515 ret i32 %toRet
516 }
518 ; constant is medium and not fit in 6 bit (compress imm),
519 ; but fit in 12 bit (imm)
520 define i32 @eq_medium_pos(i32 %in0) minsize {
521 ; RV32IFDC-LABEL: eq_medium_pos:
522 ; RV32IFDC: # %bb.0:
523 ; RV32IFDC-NEXT: addi a1, a0, -63
524 ; RV32IFDC-NEXT: addi a0, zero, -99
525 ; RV32IFDC-NEXT: c.beqz a1, .LBB18_2
526 ; RV32IFDC-NEXT: # %bb.1:
527 ; RV32IFDC-NEXT: addi a0, zero, 42
528 ; RV32IFDC-NEXT: .LBB18_2:
529 ; RV32IFDC-NEXT: c.jr ra
530 ;
531 ; RV32IFD-LABEL: eq_medium_pos:
532 ; RV32IFD: # %bb.0:
533 ; RV32IFD-NEXT: addi a1, a0, 0
534 ; RV32IFD-NEXT: addi a2, zero, 63
535 ; RV32IFD-NEXT: addi a0, zero, -99
536 ; RV32IFD-NEXT: beq a1, a2, .LBB18_2
537 ; RV32IFD-NEXT: # %bb.1:
538 ; RV32IFD-NEXT: addi a0, zero, 42
539 ; RV32IFD-NEXT: .LBB18_2:
540 ; RV32IFD-NEXT: jalr zero, 0(ra)
541 %cmp = icmp eq i32 %in0, 63
542 %toRet = select i1 %cmp, i32 -99, i32 42
543 ret i32 %toRet
544 }
546 ; constant is medium and not fit in 6 bit (compress imm),
547 ; but fit in 12 bit (imm)
548 define i32 @eq_medium_neg(i32 %in0) minsize {
549 ; RV32IFDC-LABEL: eq_medium_neg:
550 ; RV32IFDC: # %bb.0:
551 ; RV32IFDC-NEXT: addi a1, a0, 63
552 ; RV32IFDC-NEXT: addi a0, zero, -99
553 ; RV32IFDC-NEXT: c.beqz a1, .LBB19_2
554 ; RV32IFDC-NEXT: # %bb.1:
555 ; RV32IFDC-NEXT: addi a0, zero, 42
556 ; RV32IFDC-NEXT: .LBB19_2:
557 ; RV32IFDC-NEXT: c.jr ra
558 ;
559 ; RV32IFD-LABEL: eq_medium_neg:
560 ; RV32IFD: # %bb.0:
561 ; RV32IFD-NEXT: addi a1, a0, 0
562 ; RV32IFD-NEXT: addi a2, zero, -63
563 ; RV32IFD-NEXT: addi a0, zero, -99
564 ; RV32IFD-NEXT: beq a1, a2, .LBB19_2
565 ; RV32IFD-NEXT: # %bb.1:
566 ; RV32IFD-NEXT: addi a0, zero, 42
567 ; RV32IFD-NEXT: .LBB19_2:
568 ; RV32IFD-NEXT: jalr zero, 0(ra)
569 %cmp = icmp eq i32 %in0, -63
570 %toRet = select i1 %cmp, i32 -99, i32 42
571 ret i32 %toRet
572 }
574 ; constant is medium and not fit in 6 bit (compress imm),
575 ; but fit in 12 bit (imm)
576 define i32 @eq_medium_bedge_pos(i32 %in0) minsize {
577 ; RV32IFDC-LABEL: eq_medium_bedge_pos:
578 ; RV32IFDC: # %bb.0:
579 ; RV32IFDC-NEXT: addi a1, a0, -2047
580 ; RV32IFDC-NEXT: addi a0, zero, -99
581 ; RV32IFDC-NEXT: c.beqz a1, .LBB20_2
582 ; RV32IFDC-NEXT: # %bb.1:
583 ; RV32IFDC-NEXT: addi a0, zero, 42
584 ; RV32IFDC-NEXT: .LBB20_2:
585 ; RV32IFDC-NEXT: c.jr ra
586 ;
587 ; RV32IFD-LABEL: eq_medium_bedge_pos:
588 ; RV32IFD: # %bb.0:
589 ; RV32IFD-NEXT: addi a1, a0, 0
590 ; RV32IFD-NEXT: addi a2, zero, 2047
591 ; RV32IFD-NEXT: addi a0, zero, -99
592 ; RV32IFD-NEXT: beq a1, a2, .LBB20_2
593 ; RV32IFD-NEXT: # %bb.1:
594 ; RV32IFD-NEXT: addi a0, zero, 42
595 ; RV32IFD-NEXT: .LBB20_2:
596 ; RV32IFD-NEXT: jalr zero, 0(ra)
597 %cmp = icmp eq i32 %in0, 2047
598 %toRet = select i1 %cmp, i32 -99, i32 42
599 ret i32 %toRet
600 }
602 ; constant is medium and not fit in 6 bit (compress imm),
603 ; but fit in 12 bit (imm), negative value fit in 12 bit too.
604 define i32 @eq_medium_bedge_neg(i32 %in0) minsize {
605 ; RV32IFDC-LABEL: eq_medium_bedge_neg:
606 ; RV32IFDC: # %bb.0:
607 ; RV32IFDC-NEXT: addi a1, a0, 2047
608 ; RV32IFDC-NEXT: addi a0, zero, -99
609 ; RV32IFDC-NEXT: c.beqz a1, .LBB21_2
610 ; RV32IFDC-NEXT: # %bb.1:
611 ; RV32IFDC-NEXT: addi a0, zero, 42
612 ; RV32IFDC-NEXT: .LBB21_2:
613 ; RV32IFDC-NEXT: c.jr ra
614 ;
615 ; RV32IFD-LABEL: eq_medium_bedge_neg:
616 ; RV32IFD: # %bb.0:
617 ; RV32IFD-NEXT: addi a1, a0, 0
618 ; RV32IFD-NEXT: addi a2, zero, -2047
619 ; RV32IFD-NEXT: addi a0, zero, -99
620 ; RV32IFD-NEXT: beq a1, a2, .LBB21_2
621 ; RV32IFD-NEXT: # %bb.1:
622 ; RV32IFD-NEXT: addi a0, zero, 42
623 ; RV32IFD-NEXT: .LBB21_2:
624 ; RV32IFD-NEXT: jalr zero, 0(ra)
625 %cmp = icmp eq i32 %in0, -2047
626 %toRet = select i1 %cmp, i32 -99, i32 42
627 ret i32 %toRet
628 }
630 ; constant is big and do not fit in 12 bit (imm), fit in i32
631 define i32 @eq_big_ledge_pos(i32 %in0) minsize {
632 ; RV32IFDC-LABEL: eq_big_ledge_pos:
633 ; RV32IFDC: # %bb.0:
634 ; RV32IFDC-NEXT: c.mv a1, a0
635 ; RV32IFDC-NEXT: c.li a0, 1
636 ; RV32IFDC-NEXT: slli a2, a0, 11
637 ; RV32IFDC-NEXT: addi a0, zero, -99
638 ; RV32IFDC-NEXT: beq a1, a2, .LBB22_2
639 ; RV32IFDC-NEXT: # %bb.1:
640 ; RV32IFDC-NEXT: addi a0, zero, 42
641 ; RV32IFDC-NEXT: .LBB22_2:
642 ; RV32IFDC-NEXT: c.jr ra
643 ;
644 ; RV32IFD-LABEL: eq_big_ledge_pos:
645 ; RV32IFD: # %bb.0:
646 ; RV32IFD-NEXT: addi a1, a0, 0
647 ; RV32IFD-NEXT: addi a0, zero, 1
648 ; RV32IFD-NEXT: slli a2, a0, 11
649 ; RV32IFD-NEXT: addi a0, zero, -99
650 ; RV32IFD-NEXT: beq a1, a2, .LBB22_2
651 ; RV32IFD-NEXT: # %bb.1:
652 ; RV32IFD-NEXT: addi a0, zero, 42
653 ; RV32IFD-NEXT: .LBB22_2:
654 ; RV32IFD-NEXT: jalr zero, 0(ra)
655 %cmp = icmp eq i32 %in0, 2048
656 %toRet = select i1 %cmp, i32 -99, i32 42
657 ret i32 %toRet
658 }
660 ; constant is big and do not fit in 12 bit (imm), fit in i32
661 define i32 @eq_big_ledge_neg(i32 %in0) minsize {
662 ; RV32IFDC-LABEL: eq_big_ledge_neg:
663 ; RV32IFDC: # %bb.0:
664 ; RV32IFDC-NEXT: c.mv a1, a0
665 ; RV32IFDC-NEXT: addi a2, zero, -2048
666 ; RV32IFDC-NEXT: addi a0, zero, -99
667 ; RV32IFDC-NEXT: beq a1, a2, .LBB23_2
668 ; RV32IFDC-NEXT: # %bb.1:
669 ; RV32IFDC-NEXT: addi a0, zero, 42
670 ; RV32IFDC-NEXT: .LBB23_2:
671 ; RV32IFDC-NEXT: c.jr ra
672 ;
673 ; RV32IFD-LABEL: eq_big_ledge_neg:
674 ; RV32IFD: # %bb.0:
675 ; RV32IFD-NEXT: addi a1, a0, 0
676 ; RV32IFD-NEXT: addi a2, zero, -2048
677 ; RV32IFD-NEXT: addi a0, zero, -99
678 ; RV32IFD-NEXT: beq a1, a2, .LBB23_2
679 ; RV32IFD-NEXT: # %bb.1:
680 ; RV32IFD-NEXT: addi a0, zero, 42
681 ; RV32IFD-NEXT: .LBB23_2:
682 ; RV32IFD-NEXT: jalr zero, 0(ra)
683 %cmp = icmp eq i32 %in0, -2048
684 %toRet = select i1 %cmp, i32 -99, i32 42
685 ret i32 %toRet
686 }