| blob | 35caa627b57bc3c16a354408319693a2ba9084df |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -mattr=+f -verify-machineinstrs < %s \
3 ; RUN: -target-abi=ilp32f | FileCheck -check-prefix=RV32IF %s
4 ; RUN: llc -mtriple=riscv64 -mattr=+f -verify-machineinstrs < %s \
5 ; RUN: -target-abi=lp64f | FileCheck -check-prefix=RV64IF %s
6 ; RUN: llc -mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs < %s \
7 ; RUN: -target-abi=ilp32 | FileCheck -check-prefix=RV32IZFINX %s
8 ; RUN: llc -mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs < %s \
9 ; RUN: -target-abi=lp64 | FileCheck -check-prefix=RV64IZFINX %s
11 declare void @abort()
12 declare void @exit(i32)
13 declare float @dummy(float)
15 define void @br_fcmp_false(float %a, float %b) nounwind {
16 ; RV32IF-LABEL: br_fcmp_false:
17 ; RV32IF: # %bb.0:
18 ; RV32IF-NEXT: li a0, 1
19 ; RV32IF-NEXT: bnez a0, .LBB0_2
20 ; RV32IF-NEXT: # %bb.1: # %if.then
21 ; RV32IF-NEXT: ret
22 ; RV32IF-NEXT: .LBB0_2: # %if.else
23 ; RV32IF-NEXT: addi sp, sp, -16
24 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
25 ; RV32IF-NEXT: call abort
26 ;
27 ; RV64IF-LABEL: br_fcmp_false:
28 ; RV64IF: # %bb.0:
29 ; RV64IF-NEXT: li a0, 1
30 ; RV64IF-NEXT: bnez a0, .LBB0_2
31 ; RV64IF-NEXT: # %bb.1: # %if.then
32 ; RV64IF-NEXT: ret
33 ; RV64IF-NEXT: .LBB0_2: # %if.else
34 ; RV64IF-NEXT: addi sp, sp, -16
35 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
36 ; RV64IF-NEXT: call abort
37 ;
38 ; RV32IZFINX-LABEL: br_fcmp_false:
39 ; RV32IZFINX: # %bb.0:
40 ; RV32IZFINX-NEXT: li a0, 1
41 ; RV32IZFINX-NEXT: bnez a0, .LBB0_2
42 ; RV32IZFINX-NEXT: # %bb.1: # %if.then
43 ; RV32IZFINX-NEXT: ret
44 ; RV32IZFINX-NEXT: .LBB0_2: # %if.else
45 ; RV32IZFINX-NEXT: addi sp, sp, -16
46 ; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
47 ; RV32IZFINX-NEXT: call abort
48 ;
49 ; RV64IZFINX-LABEL: br_fcmp_false:
50 ; RV64IZFINX: # %bb.0:
51 ; RV64IZFINX-NEXT: li a0, 1
52 ; RV64IZFINX-NEXT: bnez a0, .LBB0_2
53 ; RV64IZFINX-NEXT: # %bb.1: # %if.then
54 ; RV64IZFINX-NEXT: ret
55 ; RV64IZFINX-NEXT: .LBB0_2: # %if.else
56 ; RV64IZFINX-NEXT: addi sp, sp, -16
57 ; RV64IZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
58 ; RV64IZFINX-NEXT: call abort
59 %1 = fcmp false float %a, %b
60 br i1 %1, label %if.then, label %if.else
61 if.then:
62 ret void
63 if.else:
64 tail call void @abort()
65 unreachable
66 }
68 define void @br_fcmp_oeq(float %a, float %b) nounwind {
69 ; RV32IF-LABEL: br_fcmp_oeq:
70 ; RV32IF: # %bb.0:
71 ; RV32IF-NEXT: feq.s a0, fa0, fa1
72 ; RV32IF-NEXT: bnez a0, .LBB1_2
73 ; RV32IF-NEXT: # %bb.1: # %if.else
74 ; RV32IF-NEXT: ret
75 ; RV32IF-NEXT: .LBB1_2: # %if.then
76 ; RV32IF-NEXT: addi sp, sp, -16
77 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
78 ; RV32IF-NEXT: call abort
79 ;
80 ; RV64IF-LABEL: br_fcmp_oeq:
81 ; RV64IF: # %bb.0:
82 ; RV64IF-NEXT: feq.s a0, fa0, fa1
83 ; RV64IF-NEXT: bnez a0, .LBB1_2
84 ; RV64IF-NEXT: # %bb.1: # %if.else
85 ; RV64IF-NEXT: ret
86 ; RV64IF-NEXT: .LBB1_2: # %if.then
87 ; RV64IF-NEXT: addi sp, sp, -16
88 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
89 ; RV64IF-NEXT: call abort
90 ;
91 ; RV32IZFINX-LABEL: br_fcmp_oeq:
92 ; RV32IZFINX: # %bb.0:
93 ; RV32IZFINX-NEXT: feq.s a0, a0, a1
94 ; RV32IZFINX-NEXT: bnez a0, .LBB1_2
95 ; RV32IZFINX-NEXT: # %bb.1: # %if.else
96 ; RV32IZFINX-NEXT: ret
97 ; RV32IZFINX-NEXT: .LBB1_2: # %if.then
98 ; RV32IZFINX-NEXT: addi sp, sp, -16
99 ; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
100 ; RV32IZFINX-NEXT: call abort
101 ;
102 ; RV64IZFINX-LABEL: br_fcmp_oeq:
103 ; RV64IZFINX: # %bb.0:
104 ; RV64IZFINX-NEXT: feq.s a0, a0, a1
105 ; RV64IZFINX-NEXT: bnez a0, .LBB1_2
106 ; RV64IZFINX-NEXT: # %bb.1: # %if.else
107 ; RV64IZFINX-NEXT: ret
108 ; RV64IZFINX-NEXT: .LBB1_2: # %if.then
109 ; RV64IZFINX-NEXT: addi sp, sp, -16
110 ; RV64IZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
111 ; RV64IZFINX-NEXT: call abort
112 %1 = fcmp oeq float %a, %b
113 br i1 %1, label %if.then, label %if.else
114 if.else:
115 ret void
116 if.then:
117 tail call void @abort()
118 unreachable
119 }
121 ; TODO: generated code quality for this is very poor due to
122 ; DAGCombiner::visitXOR converting the legal setoeq to setune, which requires
123 ; expansion.
124 define void @br_fcmp_oeq_alt(float %a, float %b) nounwind {
125 ; RV32IF-LABEL: br_fcmp_oeq_alt:
126 ; RV32IF: # %bb.0:
127 ; RV32IF-NEXT: feq.s a0, fa0, fa1
128 ; RV32IF-NEXT: bnez a0, .LBB2_2
129 ; RV32IF-NEXT: # %bb.1: # %if.else
130 ; RV32IF-NEXT: ret
131 ; RV32IF-NEXT: .LBB2_2: # %if.then
132 ; RV32IF-NEXT: addi sp, sp, -16
133 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
134 ; RV32IF-NEXT: call abort
135 ;
136 ; RV64IF-LABEL: br_fcmp_oeq_alt:
137 ; RV64IF: # %bb.0:
138 ; RV64IF-NEXT: feq.s a0, fa0, fa1
139 ; RV64IF-NEXT: bnez a0, .LBB2_2
140 ; RV64IF-NEXT: # %bb.1: # %if.else
141 ; RV64IF-NEXT: ret
142 ; RV64IF-NEXT: .LBB2_2: # %if.then
143 ; RV64IF-NEXT: addi sp, sp, -16
144 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
145 ; RV64IF-NEXT: call abort
146 ;
147 ; RV32IZFINX-LABEL: br_fcmp_oeq_alt:
148 ; RV32IZFINX: # %bb.0:
149 ; RV32IZFINX-NEXT: feq.s a0, a0, a1
150 ; RV32IZFINX-NEXT: bnez a0, .LBB2_2
151 ; RV32IZFINX-NEXT: # %bb.1: # %if.else
152 ; RV32IZFINX-NEXT: ret
153 ; RV32IZFINX-NEXT: .LBB2_2: # %if.then
154 ; RV32IZFINX-NEXT: addi sp, sp, -16
155 ; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
156 ; RV32IZFINX-NEXT: call abort
157 ;
158 ; RV64IZFINX-LABEL: br_fcmp_oeq_alt:
159 ; RV64IZFINX: # %bb.0:
160 ; RV64IZFINX-NEXT: feq.s a0, a0, a1
161 ; RV64IZFINX-NEXT: bnez a0, .LBB2_2
162 ; RV64IZFINX-NEXT: # %bb.1: # %if.else
163 ; RV64IZFINX-NEXT: ret
164 ; RV64IZFINX-NEXT: .LBB2_2: # %if.then
165 ; RV64IZFINX-NEXT: addi sp, sp, -16
166 ; RV64IZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
167 ; RV64IZFINX-NEXT: call abort
168 %1 = fcmp oeq float %a, %b
169 br i1 %1, label %if.then, label %if.else
170 if.then:
171 tail call void @abort()
172 unreachable
173 if.else:
174 ret void
175 }
177 define void @br_fcmp_ogt(float %a, float %b) nounwind {
178 ; RV32IF-LABEL: br_fcmp_ogt:
179 ; RV32IF: # %bb.0:
180 ; RV32IF-NEXT: flt.s a0, fa1, fa0
181 ; RV32IF-NEXT: bnez a0, .LBB3_2
182 ; RV32IF-NEXT: # %bb.1: # %if.else
183 ; RV32IF-NEXT: ret
184 ; RV32IF-NEXT: .LBB3_2: # %if.then
185 ; RV32IF-NEXT: addi sp, sp, -16
186 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
187 ; RV32IF-NEXT: call abort
188 ;
189 ; RV64IF-LABEL: br_fcmp_ogt:
190 ; RV64IF: # %bb.0:
191 ; RV64IF-NEXT: flt.s a0, fa1, fa0
192 ; RV64IF-NEXT: bnez a0, .LBB3_2
193 ; RV64IF-NEXT: # %bb.1: # %if.else
194 ; RV64IF-NEXT: ret
195 ; RV64IF-NEXT: .LBB3_2: # %if.then
196 ; RV64IF-NEXT: addi sp, sp, -16
197 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
198 ; RV64IF-NEXT: call abort
199 ;
200 ; RV32IZFINX-LABEL: br_fcmp_ogt:
201 ; RV32IZFINX: # %bb.0:
202 ; RV32IZFINX-NEXT: flt.s a0, a1, a0
203 ; RV32IZFINX-NEXT: bnez a0, .LBB3_2
204 ; RV32IZFINX-NEXT: # %bb.1: # %if.else
205 ; RV32IZFINX-NEXT: ret
206 ; RV32IZFINX-NEXT: .LBB3_2: # %if.then
207 ; RV32IZFINX-NEXT: addi sp, sp, -16
208 ; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
209 ; RV32IZFINX-NEXT: call abort
210 ;
211 ; RV64IZFINX-LABEL: br_fcmp_ogt:
212 ; RV64IZFINX: # %bb.0:
213 ; RV64IZFINX-NEXT: flt.s a0, a1, a0
214 ; RV64IZFINX-NEXT: bnez a0, .LBB3_2
215 ; RV64IZFINX-NEXT: # %bb.1: # %if.else
216 ; RV64IZFINX-NEXT: ret
217 ; RV64IZFINX-NEXT: .LBB3_2: # %if.then
218 ; RV64IZFINX-NEXT: addi sp, sp, -16
219 ; RV64IZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
220 ; RV64IZFINX-NEXT: call abort
221 %1 = fcmp ogt float %a, %b
222 br i1 %1, label %if.then, label %if.else
223 if.else:
224 ret void
225 if.then:
226 tail call void @abort()
227 unreachable
228 }
230 define void @br_fcmp_oge(float %a, float %b) nounwind {
231 ; RV32IF-LABEL: br_fcmp_oge:
232 ; RV32IF: # %bb.0:
233 ; RV32IF-NEXT: fle.s a0, fa1, fa0
234 ; RV32IF-NEXT: bnez a0, .LBB4_2
235 ; RV32IF-NEXT: # %bb.1: # %if.else
236 ; RV32IF-NEXT: ret
237 ; RV32IF-NEXT: .LBB4_2: # %if.then
238 ; RV32IF-NEXT: addi sp, sp, -16
239 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
240 ; RV32IF-NEXT: call abort
241 ;
242 ; RV64IF-LABEL: br_fcmp_oge:
243 ; RV64IF: # %bb.0:
244 ; RV64IF-NEXT: fle.s a0, fa1, fa0
245 ; RV64IF-NEXT: bnez a0, .LBB4_2
246 ; RV64IF-NEXT: # %bb.1: # %if.else
247 ; RV64IF-NEXT: ret
248 ; RV64IF-NEXT: .LBB4_2: # %if.then
249 ; RV64IF-NEXT: addi sp, sp, -16
250 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
251 ; RV64IF-NEXT: call abort
252 ;
253 ; RV32IZFINX-LABEL: br_fcmp_oge:
254 ; RV32IZFINX: # %bb.0:
255 ; RV32IZFINX-NEXT: fle.s a0, a1, a0
256 ; RV32IZFINX-NEXT: bnez a0, .LBB4_2
257 ; RV32IZFINX-NEXT: # %bb.1: # %if.else
258 ; RV32IZFINX-NEXT: ret
259 ; RV32IZFINX-NEXT: .LBB4_2: # %if.then
260 ; RV32IZFINX-NEXT: addi sp, sp, -16
261 ; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
262 ; RV32IZFINX-NEXT: call abort
263 ;
264 ; RV64IZFINX-LABEL: br_fcmp_oge:
265 ; RV64IZFINX: # %bb.0:
266 ; RV64IZFINX-NEXT: fle.s a0, a1, a0
267 ; RV64IZFINX-NEXT: bnez a0, .LBB4_2
268 ; RV64IZFINX-NEXT: # %bb.1: # %if.else
269 ; RV64IZFINX-NEXT: ret
270 ; RV64IZFINX-NEXT: .LBB4_2: # %if.then
271 ; RV64IZFINX-NEXT: addi sp, sp, -16
272 ; RV64IZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
273 ; RV64IZFINX-NEXT: call abort
274 %1 = fcmp oge float %a, %b
275 br i1 %1, label %if.then, label %if.else
276 if.else:
277 ret void
278 if.then:
279 tail call void @abort()
280 unreachable
281 }
283 define void @br_fcmp_olt(float %a, float %b) nounwind {
284 ; RV32IF-LABEL: br_fcmp_olt:
285 ; RV32IF: # %bb.0:
286 ; RV32IF-NEXT: flt.s a0, fa0, fa1
287 ; RV32IF-NEXT: bnez a0, .LBB5_2
288 ; RV32IF-NEXT: # %bb.1: # %if.else
289 ; RV32IF-NEXT: ret
290 ; RV32IF-NEXT: .LBB5_2: # %if.then
291 ; RV32IF-NEXT: addi sp, sp, -16
292 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
293 ; RV32IF-NEXT: call abort
294 ;
295 ; RV64IF-LABEL: br_fcmp_olt:
296 ; RV64IF: # %bb.0:
297 ; RV64IF-NEXT: flt.s a0, fa0, fa1
298 ; RV64IF-NEXT: bnez a0, .LBB5_2
299 ; RV64IF-NEXT: # %bb.1: # %if.else
300 ; RV64IF-NEXT: ret
301 ; RV64IF-NEXT: .LBB5_2: # %if.then
302 ; RV64IF-NEXT: addi sp, sp, -16
303 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
304 ; RV64IF-NEXT: call abort
305 ;
306 ; RV32IZFINX-LABEL: br_fcmp_olt:
307 ; RV32IZFINX: # %bb.0:
308 ; RV32IZFINX-NEXT: flt.s a0, a0, a1
309 ; RV32IZFINX-NEXT: bnez a0, .LBB5_2
310 ; RV32IZFINX-NEXT: # %bb.1: # %if.else
311 ; RV32IZFINX-NEXT: ret
312 ; RV32IZFINX-NEXT: .LBB5_2: # %if.then
313 ; RV32IZFINX-NEXT: addi sp, sp, -16
314 ; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
315 ; RV32IZFINX-NEXT: call abort
316 ;
317 ; RV64IZFINX-LABEL: br_fcmp_olt:
318 ; RV64IZFINX: # %bb.0:
319 ; RV64IZFINX-NEXT: flt.s a0, a0, a1
320 ; RV64IZFINX-NEXT: bnez a0, .LBB5_2
321 ; RV64IZFINX-NEXT: # %bb.1: # %if.else
322 ; RV64IZFINX-NEXT: ret
323 ; RV64IZFINX-NEXT: .LBB5_2: # %if.then
324 ; RV64IZFINX-NEXT: addi sp, sp, -16
325 ; RV64IZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
326 ; RV64IZFINX-NEXT: call abort
327 %1 = fcmp olt float %a, %b
328 br i1 %1, label %if.then, label %if.else
329 if.else:
330 ret void
331 if.then:
332 tail call void @abort()
333 unreachable
334 }
336 define void @br_fcmp_ole(float %a, float %b) nounwind {
337 ; RV32IF-LABEL: br_fcmp_ole:
338 ; RV32IF: # %bb.0:
339 ; RV32IF-NEXT: fle.s a0, fa0, fa1
340 ; RV32IF-NEXT: bnez a0, .LBB6_2
341 ; RV32IF-NEXT: # %bb.1: # %if.else
342 ; RV32IF-NEXT: ret
343 ; RV32IF-NEXT: .LBB6_2: # %if.then
344 ; RV32IF-NEXT: addi sp, sp, -16
345 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
346 ; RV32IF-NEXT: call abort
347 ;
348 ; RV64IF-LABEL: br_fcmp_ole:
349 ; RV64IF: # %bb.0:
350 ; RV64IF-NEXT: fle.s a0, fa0, fa1
351 ; RV64IF-NEXT: bnez a0, .LBB6_2
352 ; RV64IF-NEXT: # %bb.1: # %if.else
353 ; RV64IF-NEXT: ret
354 ; RV64IF-NEXT: .LBB6_2: # %if.then
355 ; RV64IF-NEXT: addi sp, sp, -16
356 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
357 ; RV64IF-NEXT: call abort
358 ;
359 ; RV32IZFINX-LABEL: br_fcmp_ole:
360 ; RV32IZFINX: # %bb.0:
361 ; RV32IZFINX-NEXT: fle.s a0, a0, a1
362 ; RV32IZFINX-NEXT: bnez a0, .LBB6_2
363 ; RV32IZFINX-NEXT: # %bb.1: # %if.else
364 ; RV32IZFINX-NEXT: ret
365 ; RV32IZFINX-NEXT: .LBB6_2: # %if.then
366 ; RV32IZFINX-NEXT: addi sp, sp, -16
367 ; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
368 ; RV32IZFINX-NEXT: call abort
369 ;
370 ; RV64IZFINX-LABEL: br_fcmp_ole:
371 ; RV64IZFINX: # %bb.0:
372 ; RV64IZFINX-NEXT: fle.s a0, a0, a1
373 ; RV64IZFINX-NEXT: bnez a0, .LBB6_2
374 ; RV64IZFINX-NEXT: # %bb.1: # %if.else
375 ; RV64IZFINX-NEXT: ret
376 ; RV64IZFINX-NEXT: .LBB6_2: # %if.then
377 ; RV64IZFINX-NEXT: addi sp, sp, -16
378 ; RV64IZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
379 ; RV64IZFINX-NEXT: call abort
380 %1 = fcmp ole float %a, %b
381 br i1 %1, label %if.then, label %if.else
382 if.else:
383 ret void
384 if.then:
385 tail call void @abort()
386 unreachable
387 }
389 define void @br_fcmp_one(float %a, float %b) nounwind {
390 ; RV32IF-LABEL: br_fcmp_one:
391 ; RV32IF: # %bb.0:
392 ; RV32IF-NEXT: flt.s a0, fa0, fa1
393 ; RV32IF-NEXT: flt.s a1, fa1, fa0
394 ; RV32IF-NEXT: or a0, a1, a0
395 ; RV32IF-NEXT: bnez a0, .LBB7_2
396 ; RV32IF-NEXT: # %bb.1: # %if.else
397 ; RV32IF-NEXT: ret
398 ; RV32IF-NEXT: .LBB7_2: # %if.then
399 ; RV32IF-NEXT: addi sp, sp, -16
400 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
401 ; RV32IF-NEXT: call abort
402 ;
403 ; RV64IF-LABEL: br_fcmp_one:
404 ; RV64IF: # %bb.0:
405 ; RV64IF-NEXT: flt.s a0, fa0, fa1
406 ; RV64IF-NEXT: flt.s a1, fa1, fa0
407 ; RV64IF-NEXT: or a0, a1, a0
408 ; RV64IF-NEXT: bnez a0, .LBB7_2
409 ; RV64IF-NEXT: # %bb.1: # %if.else
410 ; RV64IF-NEXT: ret
411 ; RV64IF-NEXT: .LBB7_2: # %if.then
412 ; RV64IF-NEXT: addi sp, sp, -16
413 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
414 ; RV64IF-NEXT: call abort
415 ;
416 ; RV32IZFINX-LABEL: br_fcmp_one:
417 ; RV32IZFINX: # %bb.0:
418 ; RV32IZFINX-NEXT: flt.s a2, a0, a1
419 ; RV32IZFINX-NEXT: flt.s a0, a1, a0
420 ; RV32IZFINX-NEXT: or a0, a0, a2
421 ; RV32IZFINX-NEXT: bnez a0, .LBB7_2
422 ; RV32IZFINX-NEXT: # %bb.1: # %if.else
423 ; RV32IZFINX-NEXT: ret
424 ; RV32IZFINX-NEXT: .LBB7_2: # %if.then
425 ; RV32IZFINX-NEXT: addi sp, sp, -16
426 ; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
427 ; RV32IZFINX-NEXT: call abort
428 ;
429 ; RV64IZFINX-LABEL: br_fcmp_one:
430 ; RV64IZFINX: # %bb.0:
431 ; RV64IZFINX-NEXT: flt.s a2, a0, a1
432 ; RV64IZFINX-NEXT: flt.s a0, a1, a0
433 ; RV64IZFINX-NEXT: or a0, a0, a2
434 ; RV64IZFINX-NEXT: bnez a0, .LBB7_2
435 ; RV64IZFINX-NEXT: # %bb.1: # %if.else
436 ; RV64IZFINX-NEXT: ret
437 ; RV64IZFINX-NEXT: .LBB7_2: # %if.then
438 ; RV64IZFINX-NEXT: addi sp, sp, -16
439 ; RV64IZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
440 ; RV64IZFINX-NEXT: call abort
441 %1 = fcmp one float %a, %b
442 br i1 %1, label %if.then, label %if.else
443 if.else:
444 ret void
445 if.then:
446 tail call void @abort()
447 unreachable
448 }
450 define void @br_fcmp_ord(float %a, float %b) nounwind {
451 ; RV32IF-LABEL: br_fcmp_ord:
452 ; RV32IF: # %bb.0:
453 ; RV32IF-NEXT: feq.s a0, fa1, fa1
454 ; RV32IF-NEXT: feq.s a1, fa0, fa0
455 ; RV32IF-NEXT: and a0, a1, a0
456 ; RV32IF-NEXT: bnez a0, .LBB8_2
457 ; RV32IF-NEXT: # %bb.1: # %if.else
458 ; RV32IF-NEXT: ret
459 ; RV32IF-NEXT: .LBB8_2: # %if.then
460 ; RV32IF-NEXT: addi sp, sp, -16
461 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
462 ; RV32IF-NEXT: call abort
463 ;
464 ; RV64IF-LABEL: br_fcmp_ord:
465 ; RV64IF: # %bb.0:
466 ; RV64IF-NEXT: feq.s a0, fa1, fa1
467 ; RV64IF-NEXT: feq.s a1, fa0, fa0
468 ; RV64IF-NEXT: and a0, a1, a0
469 ; RV64IF-NEXT: bnez a0, .LBB8_2
470 ; RV64IF-NEXT: # %bb.1: # %if.else
471 ; RV64IF-NEXT: ret
472 ; RV64IF-NEXT: .LBB8_2: # %if.then
473 ; RV64IF-NEXT: addi sp, sp, -16
474 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
475 ; RV64IF-NEXT: call abort
476 ;
477 ; RV32IZFINX-LABEL: br_fcmp_ord:
478 ; RV32IZFINX: # %bb.0:
479 ; RV32IZFINX-NEXT: feq.s a1, a1, a1
480 ; RV32IZFINX-NEXT: feq.s a0, a0, a0
481 ; RV32IZFINX-NEXT: and a0, a0, a1
482 ; RV32IZFINX-NEXT: bnez a0, .LBB8_2
483 ; RV32IZFINX-NEXT: # %bb.1: # %if.else
484 ; RV32IZFINX-NEXT: ret
485 ; RV32IZFINX-NEXT: .LBB8_2: # %if.then
486 ; RV32IZFINX-NEXT: addi sp, sp, -16
487 ; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
488 ; RV32IZFINX-NEXT: call abort
489 ;
490 ; RV64IZFINX-LABEL: br_fcmp_ord:
491 ; RV64IZFINX: # %bb.0:
492 ; RV64IZFINX-NEXT: feq.s a1, a1, a1
493 ; RV64IZFINX-NEXT: feq.s a0, a0, a0
494 ; RV64IZFINX-NEXT: and a0, a0, a1
495 ; RV64IZFINX-NEXT: bnez a0, .LBB8_2
496 ; RV64IZFINX-NEXT: # %bb.1: # %if.else
497 ; RV64IZFINX-NEXT: ret
498 ; RV64IZFINX-NEXT: .LBB8_2: # %if.then
499 ; RV64IZFINX-NEXT: addi sp, sp, -16
500 ; RV64IZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
501 ; RV64IZFINX-NEXT: call abort
502 %1 = fcmp ord float %a, %b
503 br i1 %1, label %if.then, label %if.else
504 if.else:
505 ret void
506 if.then:
507 tail call void @abort()
508 unreachable
509 }
511 define void @br_fcmp_ueq(float %a, float %b) nounwind {
512 ; RV32IF-LABEL: br_fcmp_ueq:
513 ; RV32IF: # %bb.0:
514 ; RV32IF-NEXT: flt.s a0, fa0, fa1
515 ; RV32IF-NEXT: flt.s a1, fa1, fa0
516 ; RV32IF-NEXT: or a0, a1, a0
517 ; RV32IF-NEXT: beqz a0, .LBB9_2
518 ; RV32IF-NEXT: # %bb.1: # %if.else
519 ; RV32IF-NEXT: ret
520 ; RV32IF-NEXT: .LBB9_2: # %if.then
521 ; RV32IF-NEXT: addi sp, sp, -16
522 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
523 ; RV32IF-NEXT: call abort
524 ;
525 ; RV64IF-LABEL: br_fcmp_ueq:
526 ; RV64IF: # %bb.0:
527 ; RV64IF-NEXT: flt.s a0, fa0, fa1
528 ; RV64IF-NEXT: flt.s a1, fa1, fa0
529 ; RV64IF-NEXT: or a0, a1, a0
530 ; RV64IF-NEXT: beqz a0, .LBB9_2
531 ; RV64IF-NEXT: # %bb.1: # %if.else
532 ; RV64IF-NEXT: ret
533 ; RV64IF-NEXT: .LBB9_2: # %if.then
534 ; RV64IF-NEXT: addi sp, sp, -16
535 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
536 ; RV64IF-NEXT: call abort
537 ;
538 ; RV32IZFINX-LABEL: br_fcmp_ueq:
539 ; RV32IZFINX: # %bb.0:
540 ; RV32IZFINX-NEXT: flt.s a2, a0, a1
541 ; RV32IZFINX-NEXT: flt.s a0, a1, a0
542 ; RV32IZFINX-NEXT: or a0, a0, a2
543 ; RV32IZFINX-NEXT: beqz a0, .LBB9_2
544 ; RV32IZFINX-NEXT: # %bb.1: # %if.else
545 ; RV32IZFINX-NEXT: ret
546 ; RV32IZFINX-NEXT: .LBB9_2: # %if.then
547 ; RV32IZFINX-NEXT: addi sp, sp, -16
548 ; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
549 ; RV32IZFINX-NEXT: call abort
550 ;
551 ; RV64IZFINX-LABEL: br_fcmp_ueq:
552 ; RV64IZFINX: # %bb.0:
553 ; RV64IZFINX-NEXT: flt.s a2, a0, a1
554 ; RV64IZFINX-NEXT: flt.s a0, a1, a0
555 ; RV64IZFINX-NEXT: or a0, a0, a2
556 ; RV64IZFINX-NEXT: beqz a0, .LBB9_2
557 ; RV64IZFINX-NEXT: # %bb.1: # %if.else
558 ; RV64IZFINX-NEXT: ret
559 ; RV64IZFINX-NEXT: .LBB9_2: # %if.then
560 ; RV64IZFINX-NEXT: addi sp, sp, -16
561 ; RV64IZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
562 ; RV64IZFINX-NEXT: call abort
563 %1 = fcmp ueq float %a, %b
564 br i1 %1, label %if.then, label %if.else
565 if.else:
566 ret void
567 if.then:
568 tail call void @abort()
569 unreachable
570 }
572 define void @br_fcmp_ugt(float %a, float %b) nounwind {
573 ; RV32IF-LABEL: br_fcmp_ugt:
574 ; RV32IF: # %bb.0:
575 ; RV32IF-NEXT: fle.s a0, fa0, fa1
576 ; RV32IF-NEXT: beqz a0, .LBB10_2
577 ; RV32IF-NEXT: # %bb.1: # %if.else
578 ; RV32IF-NEXT: ret
579 ; RV32IF-NEXT: .LBB10_2: # %if.then
580 ; RV32IF-NEXT: addi sp, sp, -16
581 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
582 ; RV32IF-NEXT: call abort
583 ;
584 ; RV64IF-LABEL: br_fcmp_ugt:
585 ; RV64IF: # %bb.0:
586 ; RV64IF-NEXT: fle.s a0, fa0, fa1
587 ; RV64IF-NEXT: beqz a0, .LBB10_2
588 ; RV64IF-NEXT: # %bb.1: # %if.else
589 ; RV64IF-NEXT: ret
590 ; RV64IF-NEXT: .LBB10_2: # %if.then
591 ; RV64IF-NEXT: addi sp, sp, -16
592 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
593 ; RV64IF-NEXT: call abort
594 ;
595 ; RV32IZFINX-LABEL: br_fcmp_ugt:
596 ; RV32IZFINX: # %bb.0:
597 ; RV32IZFINX-NEXT: fle.s a0, a0, a1
598 ; RV32IZFINX-NEXT: beqz a0, .LBB10_2
599 ; RV32IZFINX-NEXT: # %bb.1: # %if.else
600 ; RV32IZFINX-NEXT: ret
601 ; RV32IZFINX-NEXT: .LBB10_2: # %if.then
602 ; RV32IZFINX-NEXT: addi sp, sp, -16
603 ; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
604 ; RV32IZFINX-NEXT: call abort
605 ;
606 ; RV64IZFINX-LABEL: br_fcmp_ugt:
607 ; RV64IZFINX: # %bb.0:
608 ; RV64IZFINX-NEXT: fle.s a0, a0, a1
609 ; RV64IZFINX-NEXT: beqz a0, .LBB10_2
610 ; RV64IZFINX-NEXT: # %bb.1: # %if.else
611 ; RV64IZFINX-NEXT: ret
612 ; RV64IZFINX-NEXT: .LBB10_2: # %if.then
613 ; RV64IZFINX-NEXT: addi sp, sp, -16
614 ; RV64IZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
615 ; RV64IZFINX-NEXT: call abort
616 %1 = fcmp ugt float %a, %b
617 br i1 %1, label %if.then, label %if.else
618 if.else:
619 ret void
620 if.then:
621 tail call void @abort()
622 unreachable
623 }
625 define void @br_fcmp_uge(float %a, float %b) nounwind {
626 ; RV32IF-LABEL: br_fcmp_uge:
627 ; RV32IF: # %bb.0:
628 ; RV32IF-NEXT: flt.s a0, fa0, fa1
629 ; RV32IF-NEXT: beqz a0, .LBB11_2
630 ; RV32IF-NEXT: # %bb.1: # %if.else
631 ; RV32IF-NEXT: ret
632 ; RV32IF-NEXT: .LBB11_2: # %if.then
633 ; RV32IF-NEXT: addi sp, sp, -16
634 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
635 ; RV32IF-NEXT: call abort
636 ;
637 ; RV64IF-LABEL: br_fcmp_uge:
638 ; RV64IF: # %bb.0:
639 ; RV64IF-NEXT: flt.s a0, fa0, fa1
640 ; RV64IF-NEXT: beqz a0, .LBB11_2
641 ; RV64IF-NEXT: # %bb.1: # %if.else
642 ; RV64IF-NEXT: ret
643 ; RV64IF-NEXT: .LBB11_2: # %if.then
644 ; RV64IF-NEXT: addi sp, sp, -16
645 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
646 ; RV64IF-NEXT: call abort
647 ;
648 ; RV32IZFINX-LABEL: br_fcmp_uge:
649 ; RV32IZFINX: # %bb.0:
650 ; RV32IZFINX-NEXT: flt.s a0, a0, a1
651 ; RV32IZFINX-NEXT: beqz a0, .LBB11_2
652 ; RV32IZFINX-NEXT: # %bb.1: # %if.else
653 ; RV32IZFINX-NEXT: ret
654 ; RV32IZFINX-NEXT: .LBB11_2: # %if.then
655 ; RV32IZFINX-NEXT: addi sp, sp, -16
656 ; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
657 ; RV32IZFINX-NEXT: call abort
658 ;
659 ; RV64IZFINX-LABEL: br_fcmp_uge:
660 ; RV64IZFINX: # %bb.0:
661 ; RV64IZFINX-NEXT: flt.s a0, a0, a1
662 ; RV64IZFINX-NEXT: beqz a0, .LBB11_2
663 ; RV64IZFINX-NEXT: # %bb.1: # %if.else
664 ; RV64IZFINX-NEXT: ret
665 ; RV64IZFINX-NEXT: .LBB11_2: # %if.then
666 ; RV64IZFINX-NEXT: addi sp, sp, -16
667 ; RV64IZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
668 ; RV64IZFINX-NEXT: call abort
669 %1 = fcmp uge float %a, %b
670 br i1 %1, label %if.then, label %if.else
671 if.else:
672 ret void
673 if.then:
674 tail call void @abort()
675 unreachable
676 }
678 define void @br_fcmp_ult(float %a, float %b) nounwind {
679 ; RV32IF-LABEL: br_fcmp_ult:
680 ; RV32IF: # %bb.0:
681 ; RV32IF-NEXT: fle.s a0, fa1, fa0
682 ; RV32IF-NEXT: beqz a0, .LBB12_2
683 ; RV32IF-NEXT: # %bb.1: # %if.else
684 ; RV32IF-NEXT: ret
685 ; RV32IF-NEXT: .LBB12_2: # %if.then
686 ; RV32IF-NEXT: addi sp, sp, -16
687 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
688 ; RV32IF-NEXT: call abort
689 ;
690 ; RV64IF-LABEL: br_fcmp_ult:
691 ; RV64IF: # %bb.0:
692 ; RV64IF-NEXT: fle.s a0, fa1, fa0
693 ; RV64IF-NEXT: beqz a0, .LBB12_2
694 ; RV64IF-NEXT: # %bb.1: # %if.else
695 ; RV64IF-NEXT: ret
696 ; RV64IF-NEXT: .LBB12_2: # %if.then
697 ; RV64IF-NEXT: addi sp, sp, -16
698 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
699 ; RV64IF-NEXT: call abort
700 ;
701 ; RV32IZFINX-LABEL: br_fcmp_ult:
702 ; RV32IZFINX: # %bb.0:
703 ; RV32IZFINX-NEXT: fle.s a0, a1, a0
704 ; RV32IZFINX-NEXT: beqz a0, .LBB12_2
705 ; RV32IZFINX-NEXT: # %bb.1: # %if.else
706 ; RV32IZFINX-NEXT: ret
707 ; RV32IZFINX-NEXT: .LBB12_2: # %if.then
708 ; RV32IZFINX-NEXT: addi sp, sp, -16
709 ; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
710 ; RV32IZFINX-NEXT: call abort
711 ;
712 ; RV64IZFINX-LABEL: br_fcmp_ult:
713 ; RV64IZFINX: # %bb.0:
714 ; RV64IZFINX-NEXT: fle.s a0, a1, a0
715 ; RV64IZFINX-NEXT: beqz a0, .LBB12_2
716 ; RV64IZFINX-NEXT: # %bb.1: # %if.else
717 ; RV64IZFINX-NEXT: ret
718 ; RV64IZFINX-NEXT: .LBB12_2: # %if.then
719 ; RV64IZFINX-NEXT: addi sp, sp, -16
720 ; RV64IZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
721 ; RV64IZFINX-NEXT: call abort
722 %1 = fcmp ult float %a, %b
723 br i1 %1, label %if.then, label %if.else
724 if.else:
725 ret void
726 if.then:
727 tail call void @abort()
728 unreachable
729 }
731 define void @br_fcmp_ule(float %a, float %b) nounwind {
732 ; RV32IF-LABEL: br_fcmp_ule:
733 ; RV32IF: # %bb.0:
734 ; RV32IF-NEXT: flt.s a0, fa1, fa0
735 ; RV32IF-NEXT: beqz a0, .LBB13_2
736 ; RV32IF-NEXT: # %bb.1: # %if.else
737 ; RV32IF-NEXT: ret
738 ; RV32IF-NEXT: .LBB13_2: # %if.then
739 ; RV32IF-NEXT: addi sp, sp, -16
740 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
741 ; RV32IF-NEXT: call abort
742 ;
743 ; RV64IF-LABEL: br_fcmp_ule:
744 ; RV64IF: # %bb.0:
745 ; RV64IF-NEXT: flt.s a0, fa1, fa0
746 ; RV64IF-NEXT: beqz a0, .LBB13_2
747 ; RV64IF-NEXT: # %bb.1: # %if.else
748 ; RV64IF-NEXT: ret
749 ; RV64IF-NEXT: .LBB13_2: # %if.then
750 ; RV64IF-NEXT: addi sp, sp, -16
751 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
752 ; RV64IF-NEXT: call abort
753 ;
754 ; RV32IZFINX-LABEL: br_fcmp_ule:
755 ; RV32IZFINX: # %bb.0:
756 ; RV32IZFINX-NEXT: flt.s a0, a1, a0
757 ; RV32IZFINX-NEXT: beqz a0, .LBB13_2
758 ; RV32IZFINX-NEXT: # %bb.1: # %if.else
759 ; RV32IZFINX-NEXT: ret
760 ; RV32IZFINX-NEXT: .LBB13_2: # %if.then
761 ; RV32IZFINX-NEXT: addi sp, sp, -16
762 ; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
763 ; RV32IZFINX-NEXT: call abort
764 ;
765 ; RV64IZFINX-LABEL: br_fcmp_ule:
766 ; RV64IZFINX: # %bb.0:
767 ; RV64IZFINX-NEXT: flt.s a0, a1, a0
768 ; RV64IZFINX-NEXT: beqz a0, .LBB13_2
769 ; RV64IZFINX-NEXT: # %bb.1: # %if.else
770 ; RV64IZFINX-NEXT: ret
771 ; RV64IZFINX-NEXT: .LBB13_2: # %if.then
772 ; RV64IZFINX-NEXT: addi sp, sp, -16
773 ; RV64IZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
774 ; RV64IZFINX-NEXT: call abort
775 %1 = fcmp ule float %a, %b
776 br i1 %1, label %if.then, label %if.else
777 if.else:
778 ret void
779 if.then:
780 tail call void @abort()
781 unreachable
782 }
784 define void @br_fcmp_une(float %a, float %b) nounwind {
785 ; RV32IF-LABEL: br_fcmp_une:
786 ; RV32IF: # %bb.0:
787 ; RV32IF-NEXT: feq.s a0, fa0, fa1
788 ; RV32IF-NEXT: beqz a0, .LBB14_2
789 ; RV32IF-NEXT: # %bb.1: # %if.else
790 ; RV32IF-NEXT: ret
791 ; RV32IF-NEXT: .LBB14_2: # %if.then
792 ; RV32IF-NEXT: addi sp, sp, -16
793 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
794 ; RV32IF-NEXT: call abort
795 ;
796 ; RV64IF-LABEL: br_fcmp_une:
797 ; RV64IF: # %bb.0:
798 ; RV64IF-NEXT: feq.s a0, fa0, fa1
799 ; RV64IF-NEXT: beqz a0, .LBB14_2
800 ; RV64IF-NEXT: # %bb.1: # %if.else
801 ; RV64IF-NEXT: ret
802 ; RV64IF-NEXT: .LBB14_2: # %if.then
803 ; RV64IF-NEXT: addi sp, sp, -16
804 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
805 ; RV64IF-NEXT: call abort
806 ;
807 ; RV32IZFINX-LABEL: br_fcmp_une:
808 ; RV32IZFINX: # %bb.0:
809 ; RV32IZFINX-NEXT: feq.s a0, a0, a1
810 ; RV32IZFINX-NEXT: beqz a0, .LBB14_2
811 ; RV32IZFINX-NEXT: # %bb.1: # %if.else
812 ; RV32IZFINX-NEXT: ret
813 ; RV32IZFINX-NEXT: .LBB14_2: # %if.then
814 ; RV32IZFINX-NEXT: addi sp, sp, -16
815 ; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
816 ; RV32IZFINX-NEXT: call abort
817 ;
818 ; RV64IZFINX-LABEL: br_fcmp_une:
819 ; RV64IZFINX: # %bb.0:
820 ; RV64IZFINX-NEXT: feq.s a0, a0, a1
821 ; RV64IZFINX-NEXT: beqz a0, .LBB14_2
822 ; RV64IZFINX-NEXT: # %bb.1: # %if.else
823 ; RV64IZFINX-NEXT: ret
824 ; RV64IZFINX-NEXT: .LBB14_2: # %if.then
825 ; RV64IZFINX-NEXT: addi sp, sp, -16
826 ; RV64IZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
827 ; RV64IZFINX-NEXT: call abort
828 %1 = fcmp une float %a, %b
829 br i1 %1, label %if.then, label %if.else
830 if.else:
831 ret void
832 if.then:
833 tail call void @abort()
834 unreachable
835 }
837 define void @br_fcmp_uno(float %a, float %b) nounwind {
838 ; RV32IF-LABEL: br_fcmp_uno:
839 ; RV32IF: # %bb.0:
840 ; RV32IF-NEXT: feq.s a0, fa1, fa1
841 ; RV32IF-NEXT: feq.s a1, fa0, fa0
842 ; RV32IF-NEXT: and a0, a1, a0
843 ; RV32IF-NEXT: beqz a0, .LBB15_2
844 ; RV32IF-NEXT: # %bb.1: # %if.else
845 ; RV32IF-NEXT: ret
846 ; RV32IF-NEXT: .LBB15_2: # %if.then
847 ; RV32IF-NEXT: addi sp, sp, -16
848 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
849 ; RV32IF-NEXT: call abort
850 ;
851 ; RV64IF-LABEL: br_fcmp_uno:
852 ; RV64IF: # %bb.0:
853 ; RV64IF-NEXT: feq.s a0, fa1, fa1
854 ; RV64IF-NEXT: feq.s a1, fa0, fa0
855 ; RV64IF-NEXT: and a0, a1, a0
856 ; RV64IF-NEXT: beqz a0, .LBB15_2
857 ; RV64IF-NEXT: # %bb.1: # %if.else
858 ; RV64IF-NEXT: ret
859 ; RV64IF-NEXT: .LBB15_2: # %if.then
860 ; RV64IF-NEXT: addi sp, sp, -16
861 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
862 ; RV64IF-NEXT: call abort
863 ;
864 ; RV32IZFINX-LABEL: br_fcmp_uno:
865 ; RV32IZFINX: # %bb.0:
866 ; RV32IZFINX-NEXT: feq.s a1, a1, a1
867 ; RV32IZFINX-NEXT: feq.s a0, a0, a0
868 ; RV32IZFINX-NEXT: and a0, a0, a1
869 ; RV32IZFINX-NEXT: beqz a0, .LBB15_2
870 ; RV32IZFINX-NEXT: # %bb.1: # %if.else
871 ; RV32IZFINX-NEXT: ret
872 ; RV32IZFINX-NEXT: .LBB15_2: # %if.then
873 ; RV32IZFINX-NEXT: addi sp, sp, -16
874 ; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
875 ; RV32IZFINX-NEXT: call abort
876 ;
877 ; RV64IZFINX-LABEL: br_fcmp_uno:
878 ; RV64IZFINX: # %bb.0:
879 ; RV64IZFINX-NEXT: feq.s a1, a1, a1
880 ; RV64IZFINX-NEXT: feq.s a0, a0, a0
881 ; RV64IZFINX-NEXT: and a0, a0, a1
882 ; RV64IZFINX-NEXT: beqz a0, .LBB15_2
883 ; RV64IZFINX-NEXT: # %bb.1: # %if.else
884 ; RV64IZFINX-NEXT: ret
885 ; RV64IZFINX-NEXT: .LBB15_2: # %if.then
886 ; RV64IZFINX-NEXT: addi sp, sp, -16
887 ; RV64IZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
888 ; RV64IZFINX-NEXT: call abort
889 %1 = fcmp uno float %a, %b
890 br i1 %1, label %if.then, label %if.else
891 if.else:
892 ret void
893 if.then:
894 tail call void @abort()
895 unreachable
896 }
898 define void @br_fcmp_true(float %a, float %b) nounwind {
899 ; RV32IF-LABEL: br_fcmp_true:
900 ; RV32IF: # %bb.0:
901 ; RV32IF-NEXT: li a0, 1
902 ; RV32IF-NEXT: bnez a0, .LBB16_2
903 ; RV32IF-NEXT: # %bb.1: # %if.else
904 ; RV32IF-NEXT: ret
905 ; RV32IF-NEXT: .LBB16_2: # %if.then
906 ; RV32IF-NEXT: addi sp, sp, -16
907 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
908 ; RV32IF-NEXT: call abort
909 ;
910 ; RV64IF-LABEL: br_fcmp_true:
911 ; RV64IF: # %bb.0:
912 ; RV64IF-NEXT: li a0, 1
913 ; RV64IF-NEXT: bnez a0, .LBB16_2
914 ; RV64IF-NEXT: # %bb.1: # %if.else
915 ; RV64IF-NEXT: ret
916 ; RV64IF-NEXT: .LBB16_2: # %if.then
917 ; RV64IF-NEXT: addi sp, sp, -16
918 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
919 ; RV64IF-NEXT: call abort
920 ;
921 ; RV32IZFINX-LABEL: br_fcmp_true:
922 ; RV32IZFINX: # %bb.0:
923 ; RV32IZFINX-NEXT: li a0, 1
924 ; RV32IZFINX-NEXT: bnez a0, .LBB16_2
925 ; RV32IZFINX-NEXT: # %bb.1: # %if.else
926 ; RV32IZFINX-NEXT: ret
927 ; RV32IZFINX-NEXT: .LBB16_2: # %if.then
928 ; RV32IZFINX-NEXT: addi sp, sp, -16
929 ; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
930 ; RV32IZFINX-NEXT: call abort
931 ;
932 ; RV64IZFINX-LABEL: br_fcmp_true:
933 ; RV64IZFINX: # %bb.0:
934 ; RV64IZFINX-NEXT: li a0, 1
935 ; RV64IZFINX-NEXT: bnez a0, .LBB16_2
936 ; RV64IZFINX-NEXT: # %bb.1: # %if.else
937 ; RV64IZFINX-NEXT: ret
938 ; RV64IZFINX-NEXT: .LBB16_2: # %if.then
939 ; RV64IZFINX-NEXT: addi sp, sp, -16
940 ; RV64IZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
941 ; RV64IZFINX-NEXT: call abort
942 %1 = fcmp true float %a, %b
943 br i1 %1, label %if.then, label %if.else
944 if.else:
945 ret void
946 if.then:
947 tail call void @abort()
948 unreachable
949 }
951 ; This test exists primarily to trigger RISCVInstrInfo::storeRegToStackSlot
952 ; and RISCVInstrInfo::loadRegFromStackSlot
953 define i32 @br_fcmp_store_load_stack_slot(float %a, float %b) nounwind {
954 ; RV32IF-LABEL: br_fcmp_store_load_stack_slot:
955 ; RV32IF: # %bb.0: # %entry
956 ; RV32IF-NEXT: addi sp, sp, -16
957 ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
958 ; RV32IF-NEXT: fsw fs0, 8(sp) # 4-byte Folded Spill
959 ; RV32IF-NEXT: fmv.w.x fs0, zero
960 ; RV32IF-NEXT: fmv.s fa0, fs0
961 ; RV32IF-NEXT: call dummy
962 ; RV32IF-NEXT: feq.s a0, fa0, fs0
963 ; RV32IF-NEXT: beqz a0, .LBB17_3
964 ; RV32IF-NEXT: # %bb.1: # %if.end
965 ; RV32IF-NEXT: fmv.s fa0, fs0
966 ; RV32IF-NEXT: call dummy
967 ; RV32IF-NEXT: feq.s a0, fa0, fs0
968 ; RV32IF-NEXT: beqz a0, .LBB17_3
969 ; RV32IF-NEXT: # %bb.2: # %if.end4
970 ; RV32IF-NEXT: li a0, 0
971 ; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
972 ; RV32IF-NEXT: flw fs0, 8(sp) # 4-byte Folded Reload
973 ; RV32IF-NEXT: addi sp, sp, 16
974 ; RV32IF-NEXT: ret
975 ; RV32IF-NEXT: .LBB17_3: # %if.then
976 ; RV32IF-NEXT: call abort
977 ;
978 ; RV64IF-LABEL: br_fcmp_store_load_stack_slot:
979 ; RV64IF: # %bb.0: # %entry
980 ; RV64IF-NEXT: addi sp, sp, -16
981 ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
982 ; RV64IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
983 ; RV64IF-NEXT: fmv.w.x fs0, zero
984 ; RV64IF-NEXT: fmv.s fa0, fs0
985 ; RV64IF-NEXT: call dummy
986 ; RV64IF-NEXT: feq.s a0, fa0, fs0
987 ; RV64IF-NEXT: beqz a0, .LBB17_3
988 ; RV64IF-NEXT: # %bb.1: # %if.end
989 ; RV64IF-NEXT: fmv.s fa0, fs0
990 ; RV64IF-NEXT: call dummy
991 ; RV64IF-NEXT: feq.s a0, fa0, fs0
992 ; RV64IF-NEXT: beqz a0, .LBB17_3
993 ; RV64IF-NEXT: # %bb.2: # %if.end4
994 ; RV64IF-NEXT: li a0, 0
995 ; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
996 ; RV64IF-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload
997 ; RV64IF-NEXT: addi sp, sp, 16
998 ; RV64IF-NEXT: ret
999 ; RV64IF-NEXT: .LBB17_3: # %if.then
1000 ; RV64IF-NEXT: call abort
1001 ;
1002 ; RV32IZFINX-LABEL: br_fcmp_store_load_stack_slot:
1003 ; RV32IZFINX: # %bb.0: # %entry
1004 ; RV32IZFINX-NEXT: addi sp, sp, -16
1005 ; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
1006 ; RV32IZFINX-NEXT: li a0, 0
1007 ; RV32IZFINX-NEXT: call dummy
1008 ; RV32IZFINX-NEXT: feq.s a0, a0, zero
1009 ; RV32IZFINX-NEXT: beqz a0, .LBB17_3
1010 ; RV32IZFINX-NEXT: # %bb.1: # %if.end
1011 ; RV32IZFINX-NEXT: li a0, 0
1012 ; RV32IZFINX-NEXT: call dummy
1013 ; RV32IZFINX-NEXT: feq.s a0, a0, zero
1014 ; RV32IZFINX-NEXT: beqz a0, .LBB17_3
1015 ; RV32IZFINX-NEXT: # %bb.2: # %if.end4
1016 ; RV32IZFINX-NEXT: li a0, 0
1017 ; RV32IZFINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
1018 ; RV32IZFINX-NEXT: addi sp, sp, 16
1019 ; RV32IZFINX-NEXT: ret
1020 ; RV32IZFINX-NEXT: .LBB17_3: # %if.then
1021 ; RV32IZFINX-NEXT: call abort
1022 ;
1023 ; RV64IZFINX-LABEL: br_fcmp_store_load_stack_slot:
1024 ; RV64IZFINX: # %bb.0: # %entry
1025 ; RV64IZFINX-NEXT: addi sp, sp, -16
1026 ; RV64IZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
1027 ; RV64IZFINX-NEXT: li a0, 0
1028 ; RV64IZFINX-NEXT: call dummy
1029 ; RV64IZFINX-NEXT: feq.s a0, a0, zero
1030 ; RV64IZFINX-NEXT: beqz a0, .LBB17_3
1031 ; RV64IZFINX-NEXT: # %bb.1: # %if.end
1032 ; RV64IZFINX-NEXT: li a0, 0
1033 ; RV64IZFINX-NEXT: call dummy
1034 ; RV64IZFINX-NEXT: feq.s a0, a0, zero
1035 ; RV64IZFINX-NEXT: beqz a0, .LBB17_3
1036 ; RV64IZFINX-NEXT: # %bb.2: # %if.end4
1037 ; RV64IZFINX-NEXT: li a0, 0
1038 ; RV64IZFINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
1039 ; RV64IZFINX-NEXT: addi sp, sp, 16
1040 ; RV64IZFINX-NEXT: ret
1041 ; RV64IZFINX-NEXT: .LBB17_3: # %if.then
1042 ; RV64IZFINX-NEXT: call abort
1043 entry:
1044 %call = call float @dummy(float 0.000000e+00)
1045 %cmp = fcmp une float %call, 0.000000e+00
1046 br i1 %cmp, label %if.then, label %if.end
1048 if.then:
1049 call void @abort()
1050 unreachable
1052 if.end:
1053 %call1 = call float @dummy(float 0.000000e+00)
1054 %cmp2 = fcmp une float %call1, 0.000000e+00
1055 br i1 %cmp2, label %if.then3, label %if.end4
1057 if.then3:
1058 call void @abort()
1059 unreachable
1061 if.end4:
1062 ret i32 0
1063 }