1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -o - %s -mtriple=riscv32 -mattr=+c,+f,+d -simplify-mir \
3 # RUN: -run-pass=riscv-make-compressible | FileCheck --check-prefixes=RV32,RV32C %s
4 # RUN: llc -o - %s -mtriple=riscv64 -mattr=+c,+f,+d -simplify-mir \
5 # RUN: -run-pass=riscv-make-compressible | FileCheck --check-prefixes=RV64,RV64C %s
6 # RUN: llc -o - %s -mtriple=riscv32 -mattr=+d,+zcf -simplify-mir \
7 # RUN: -run-pass=riscv-make-compressible | FileCheck --check-prefixes=RV32,RV32ZCF %s
8 # RUN: llc -o - %s -mtriple=riscv32 -mattr=+d,+zca -simplify-mir \
9 # RUN: -run-pass=riscv-make-compressible | FileCheck --check-prefixes=RV32,RV32ZCA %s
10 # RUN: llc -o - %s -mtriple=riscv64 -mattr=+d,+zca -simplify-mir \
11 # RUN: -run-pass=riscv-make-compressible | FileCheck --check-prefixes=RV64,RV64ZCA %s
14 define void @store_common_value(ptr %a, ptr %b, ptr %c) #0 {
16 store i32 0, ptr %a, align 4
17 store i32 0, ptr %b, align 4
18 store i32 0, ptr %c, align 4
22 define void @store_common_value_float(ptr %a, ptr %b, ptr %c, float %d, float %e, float %f, float %g, float %h, float %i, float %j) #0 {
24 store float %j, ptr %a, align 4
25 store float %j, ptr %b, align 4
26 store float %j, ptr %c, align 4
30 define void @store_common_value_double(ptr %a, ptr %b, ptr %c, double %d, double %e, double %f, double %g, double %h, double %i, double %j) #0 {
32 store double %j, ptr %a, align 8
33 store double %j, ptr %b, align 8
34 store double %j, ptr %c, align 8
38 define void @store_common_ptr(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %p) #0 {
40 store volatile i32 1, ptr %p, align 4
41 store volatile i32 3, ptr %p, align 4
42 store volatile i32 5, ptr %p, align 4
46 define void @store_common_ptr_self(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %p) #0 {
48 %q = bitcast ptr %p to ptr
49 store volatile i32 1, ptr %p, align 4
50 store volatile i32 3, ptr %p, align 4
51 store volatile ptr %p, ptr %q, align 4
55 define void @store_common_ptr_float(float %a, float %b, float %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, ptr %p) #0 {
57 store volatile float %a, ptr %p, align 4
58 store volatile float %b, ptr %p, align 4
59 store volatile float %c, ptr %p, align 4
63 define void @store_common_ptr_double(double %a, double %b, double %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, ptr %p) #0 {
65 store volatile double %a, ptr %p, align 8
66 store volatile double %b, ptr %p, align 8
67 store volatile double %c, ptr %p, align 8
71 define void @load_common_ptr(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %p) #0 {
73 %g = load volatile i32, ptr %p, align 4
74 %h = load volatile i32, ptr %p, align 4
75 %i = load volatile i32, ptr %p, align 4
79 define void @load_common_ptr_float(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %g) #0 {
81 %0 = load float, ptr %g, align 4
82 %arrayidx1 = getelementptr inbounds float, ptr %g, i32 1
83 %1 = load float, ptr %arrayidx1, align 4
84 %arrayidx2 = getelementptr inbounds float, ptr %g, i32 2
85 %2 = load float, ptr %arrayidx2, align 4
86 tail call void @load_common_ptr_float_1(float %0, float %1, float %2)
90 declare void @load_common_ptr_float_1(float, float, float) #0
92 define void @load_common_ptr_double(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %g) #0 {
94 %0 = load double, ptr %g, align 8
95 %arrayidx1 = getelementptr inbounds double, ptr %g, i32 1
96 %1 = load double, ptr %arrayidx1, align 8
97 %arrayidx2 = getelementptr inbounds double, ptr %g, i32 2
98 %2 = load double, ptr %arrayidx2, align 8
99 tail call void @load_common_ptr_double_1(double %0, double %1, double %2)
103 declare void @load_common_ptr_double_1(double, double, double) #0
105 define void @store_large_offset(ptr %p) #0 {
107 %0 = getelementptr inbounds i32, ptr %p, i32 100
108 store volatile i32 1, ptr %0, align 4
109 %1 = getelementptr inbounds i32, ptr %p, i32 101
110 store volatile i32 3, ptr %1, align 4
111 %2 = getelementptr inbounds i32, ptr %p, i32 102
112 store volatile i32 5, ptr %2, align 4
113 %3 = getelementptr inbounds i32, ptr %p, i32 103
114 store volatile i32 7, ptr %3, align 4
118 define void @store_large_offset_float(ptr %p, float %a, float %b, float %c, float %d) #0 {
120 %0 = getelementptr inbounds float, ptr %p, i32 100
121 store volatile float %a, ptr %0, align 4
122 %1 = getelementptr inbounds float, ptr %p, i32 101
123 store volatile float %b, ptr %1, align 4
124 %2 = getelementptr inbounds float, ptr %p, i32 102
125 store volatile float %c, ptr %2, align 4
126 %3 = getelementptr inbounds float, ptr %p, i32 103
127 store volatile float %d, ptr %3, align 4
131 define void @store_large_offset_double(ptr %p, double %a, double %b, double %c, double %d) #0 {
133 %0 = getelementptr inbounds double, ptr %p, i32 100
134 store volatile double %a, ptr %0, align 8
135 %1 = getelementptr inbounds double, ptr %p, i32 101
136 store volatile double %b, ptr %1, align 8
137 %2 = getelementptr inbounds double, ptr %p, i32 102
138 store volatile double %c, ptr %2, align 8
139 %3 = getelementptr inbounds double, ptr %p, i32 103
140 store volatile double %d, ptr %3, align 8
144 define void @load_large_offset(ptr %p) #0 {
146 %0 = getelementptr inbounds i32, ptr %p, i32 100
147 %a = load volatile i32, ptr %0, align 4
148 %1 = getelementptr inbounds i32, ptr %p, i32 101
149 %b = load volatile i32, ptr %1, align 4
150 %2 = getelementptr inbounds i32, ptr %p, i32 102
151 %c = load volatile i32, ptr %2, align 4
152 %3 = getelementptr inbounds i32, ptr %p, i32 103
153 %d = load volatile i32, ptr %3, align 4
157 define void @load_large_offset_float(ptr %p) #0 {
159 %arrayidx = getelementptr inbounds float, ptr %p, i32 100
160 %0 = load float, ptr %arrayidx, align 4
161 %arrayidx1 = getelementptr inbounds float, ptr %p, i32 101
162 %1 = load float, ptr %arrayidx1, align 4
163 %arrayidx2 = getelementptr inbounds float, ptr %p, i32 102
164 %2 = load float, ptr %arrayidx2, align 4
165 tail call void @load_large_offset_float_1(float %0, float %1, float %2)
169 declare void @load_large_offset_float_1(float, float, float) #0
171 define void @load_large_offset_double(ptr %p) #0 {
173 %arrayidx = getelementptr inbounds double, ptr %p, i32 100
174 %0 = load double, ptr %arrayidx, align 8
175 %arrayidx1 = getelementptr inbounds double, ptr %p, i32 101
176 %1 = load double, ptr %arrayidx1, align 8
177 %arrayidx2 = getelementptr inbounds double, ptr %p, i32 102
178 %2 = load double, ptr %arrayidx2, align 8
179 tail call void @load_large_offset_double_1(double %0, double %1, double %2)
183 declare void @load_large_offset_double_1(double, double, double) #0
185 define void @store_common_value_no_opt(ptr %a) #0 {
187 store i32 0, ptr %a, align 4
191 define void @store_common_value_float_no_opt(ptr %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h) #0 {
193 store float %h, ptr %a, align 4
197 define void @store_common_value_double_no_opt(ptr %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h) #0 {
199 store double %h, ptr %a, align 8
203 define void @store_common_ptr_no_opt(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %p) #0 {
205 store volatile i32 1, ptr %p, align 4
209 define void @store_common_ptr_float_no_opt(float %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, ptr %p) #0 {
211 store volatile float %a, ptr %p, align 4
215 define void @store_common_ptr_double_no_opt(double %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, ptr %p) #0 {
217 store volatile double %a, ptr %p, align 8
221 define void @load_common_ptr_no_opt(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %p) #0 {
223 %g = load volatile i32, ptr %p, align 4
227 define float @load_common_ptr_float_no_opt(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %g) #0 {
229 %0 = load float, ptr %g, align 4
233 define double @load_common_ptr_double_no_opt(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %g) #0 {
235 %0 = load double, ptr %g, align 8
239 define void @store_large_offset_no_opt(ptr %p) #0 {
241 %0 = getelementptr inbounds i32, ptr %p, i32 100
242 store volatile i32 1, ptr %0, align 4
243 %1 = getelementptr inbounds i32, ptr %p, i32 101
244 store volatile i32 3, ptr %1, align 4
248 define void @store_large_offset_float_no_opt(ptr %p, float %a, float %b) #0 {
250 %0 = getelementptr inbounds float, ptr %p, i32 100
251 store volatile float %a, ptr %0, align 4
252 %1 = getelementptr inbounds float, ptr %p, i32 101
253 store volatile float %b, ptr %1, align 4
257 define void @store_large_offset_double_no_opt(ptr %p, double %a, double %b) #0 {
259 %0 = getelementptr inbounds double, ptr %p, i32 100
260 store volatile double %a, ptr %0, align 8
261 %1 = getelementptr inbounds double, ptr %p, i32 101
262 store volatile double %b, ptr %1, align 8
266 define void @load_large_offset_no_opt(ptr %p) #0 {
268 %0 = getelementptr inbounds i32, ptr %p, i32 100
269 %a = load volatile i32, ptr %0, align 4
270 %1 = getelementptr inbounds i32, ptr %p, i32 101
271 %b = load volatile i32, ptr %1, align 4
275 define { float, float } @load_large_offset_float_no_opt(ptr %p) #0 {
277 %arrayidx = getelementptr inbounds float, ptr %p, i32 100
278 %0 = load float, ptr %arrayidx, align 4
279 %arrayidx1 = getelementptr inbounds float, ptr %p, i32 101
280 %1 = load float, ptr %arrayidx1, align 4
281 %2 = insertvalue { float, float } undef, float %0, 0
282 %3 = insertvalue { float, float } %2, float %1, 1
283 ret { float, float } %3
286 define { double, double } @load_large_offset_double_no_opt(ptr %p) #0 {
288 %arrayidx = getelementptr inbounds double, ptr %p, i32 100
289 %0 = load double, ptr %arrayidx, align 8
290 %arrayidx1 = getelementptr inbounds double, ptr %p, i32 101
291 %1 = load double, ptr %arrayidx1, align 8
292 %2 = insertvalue { double, double } undef, double %0, 0
293 %3 = insertvalue { double, double } %2, double %1, 1
294 ret { double, double } %3
297 attributes #0 = { minsize }
301 name: store_common_value
302 tracksRegLiveness: true
305 liveins: $x10, $x11, $x12
307 ; RV32-LABEL: name: store_common_value
308 ; RV32: liveins: $x10, $x11, $x12
310 ; RV32-NEXT: $x13 = ADDI $x0, 0
311 ; RV32-NEXT: SW $x13, killed renamable $x10, 0 :: (store (s32) into %ir.a)
312 ; RV32-NEXT: SW $x13, killed renamable $x11, 0 :: (store (s32) into %ir.b)
313 ; RV32-NEXT: SW $x13, killed renamable $x12, 0 :: (store (s32) into %ir.c)
314 ; RV32-NEXT: PseudoRET
316 ; RV64-LABEL: name: store_common_value
317 ; RV64: liveins: $x10, $x11, $x12
319 ; RV64-NEXT: $x13 = ADDI $x0, 0
320 ; RV64-NEXT: SW $x13, killed renamable $x10, 0 :: (store (s32) into %ir.a)
321 ; RV64-NEXT: SW $x13, killed renamable $x11, 0 :: (store (s32) into %ir.b)
322 ; RV64-NEXT: SW $x13, killed renamable $x12, 0 :: (store (s32) into %ir.c)
323 ; RV64-NEXT: PseudoRET
324 SW $x0, killed renamable $x10, 0 :: (store (s32) into %ir.a)
325 SW $x0, killed renamable $x11, 0 :: (store (s32) into %ir.b)
326 SW $x0, killed renamable $x12, 0 :: (store (s32) into %ir.c)
331 name: store_common_value_float
332 tracksRegLiveness: true
335 liveins: $x10, $x11, $x12, $f16_f
337 ; RV32C-LABEL: name: store_common_value_float
338 ; RV32C: liveins: $x10, $x11, $x12, $f16_f
340 ; RV32C-NEXT: $f15_f = FSGNJ_S $f16_f, $f16_f
341 ; RV32C-NEXT: FSW $f15_f, killed renamable $x10, 0 :: (store (s32) into %ir.a)
342 ; RV32C-NEXT: FSW $f15_f, killed renamable $x11, 0 :: (store (s32) into %ir.b)
343 ; RV32C-NEXT: FSW killed $f15_f, killed renamable $x12, 0 :: (store (s32) into %ir.c)
344 ; RV32C-NEXT: PseudoRET
346 ; RV64-LABEL: name: store_common_value_float
347 ; RV64: liveins: $x10, $x11, $x12, $f16_f
349 ; RV64-NEXT: FSW renamable $f16_f, killed renamable $x10, 0 :: (store (s32) into %ir.a)
350 ; RV64-NEXT: FSW renamable $f16_f, killed renamable $x11, 0 :: (store (s32) into %ir.b)
351 ; RV64-NEXT: FSW killed renamable $f16_f, killed renamable $x12, 0 :: (store (s32) into %ir.c)
352 ; RV64-NEXT: PseudoRET
354 ; RV32ZCF-LABEL: name: store_common_value_float
355 ; RV32ZCF: liveins: $x10, $x11, $x12, $f16_f
356 ; RV32ZCF-NEXT: {{ $}}
357 ; RV32ZCF-NEXT: $f15_f = FSGNJ_S $f16_f, $f16_f
358 ; RV32ZCF-NEXT: FSW $f15_f, killed renamable $x10, 0 :: (store (s32) into %ir.a)
359 ; RV32ZCF-NEXT: FSW $f15_f, killed renamable $x11, 0 :: (store (s32) into %ir.b)
360 ; RV32ZCF-NEXT: FSW killed $f15_f, killed renamable $x12, 0 :: (store (s32) into %ir.c)
361 ; RV32ZCF-NEXT: PseudoRET
363 ; RV32ZCA-LABEL: name: store_common_value_float
364 ; RV32ZCA: liveins: $x10, $x11, $x12, $f16_f
365 ; RV32ZCA-NEXT: {{ $}}
366 ; RV32ZCA-NEXT: FSW renamable $f16_f, killed renamable $x10, 0 :: (store (s32) into %ir.a)
367 ; RV32ZCA-NEXT: FSW renamable $f16_f, killed renamable $x11, 0 :: (store (s32) into %ir.b)
368 ; RV32ZCA-NEXT: FSW killed renamable $f16_f, killed renamable $x12, 0 :: (store (s32) into %ir.c)
369 ; RV32ZCA-NEXT: PseudoRET
370 FSW renamable $f16_f, killed renamable $x10, 0 :: (store (s32) into %ir.a)
371 FSW renamable $f16_f, killed renamable $x11, 0 :: (store (s32) into %ir.b)
372 FSW killed renamable $f16_f, killed renamable $x12, 0 :: (store (s32) into %ir.c)
377 name: store_common_value_double
378 tracksRegLiveness: true
381 liveins: $x10, $x11, $x12, $f16_d
383 ; RV32C-LABEL: name: store_common_value_double
384 ; RV32C: liveins: $x10, $x11, $x12, $f16_d
386 ; RV32C-NEXT: $f15_d = FSGNJ_D $f16_d, $f16_d
387 ; RV32C-NEXT: FSD $f15_d, killed renamable $x10, 0 :: (store (s64) into %ir.a)
388 ; RV32C-NEXT: FSD $f15_d, killed renamable $x11, 0 :: (store (s64) into %ir.b)
389 ; RV32C-NEXT: FSD killed $f15_d, killed renamable $x12, 0 :: (store (s64) into %ir.c)
390 ; RV32C-NEXT: PseudoRET
392 ; RV64C-LABEL: name: store_common_value_double
393 ; RV64C: liveins: $x10, $x11, $x12, $f16_d
395 ; RV64C-NEXT: $f15_d = FSGNJ_D $f16_d, $f16_d
396 ; RV64C-NEXT: FSD $f15_d, killed renamable $x10, 0 :: (store (s64) into %ir.a)
397 ; RV64C-NEXT: FSD $f15_d, killed renamable $x11, 0 :: (store (s64) into %ir.b)
398 ; RV64C-NEXT: FSD killed $f15_d, killed renamable $x12, 0 :: (store (s64) into %ir.c)
399 ; RV64C-NEXT: PseudoRET
401 ; RV32ZCF-LABEL: name: store_common_value_double
402 ; RV32ZCF: liveins: $x10, $x11, $x12, $f16_d
403 ; RV32ZCF-NEXT: {{ $}}
404 ; RV32ZCF-NEXT: FSD renamable $f16_d, killed renamable $x10, 0 :: (store (s64) into %ir.a)
405 ; RV32ZCF-NEXT: FSD renamable $f16_d, killed renamable $x11, 0 :: (store (s64) into %ir.b)
406 ; RV32ZCF-NEXT: FSD killed renamable $f16_d, killed renamable $x12, 0 :: (store (s64) into %ir.c)
407 ; RV32ZCF-NEXT: PseudoRET
409 ; RV32ZCA-LABEL: name: store_common_value_double
410 ; RV32ZCA: liveins: $x10, $x11, $x12, $f16_d
411 ; RV32ZCA-NEXT: {{ $}}
412 ; RV32ZCA-NEXT: FSD renamable $f16_d, killed renamable $x10, 0 :: (store (s64) into %ir.a)
413 ; RV32ZCA-NEXT: FSD renamable $f16_d, killed renamable $x11, 0 :: (store (s64) into %ir.b)
414 ; RV32ZCA-NEXT: FSD killed renamable $f16_d, killed renamable $x12, 0 :: (store (s64) into %ir.c)
415 ; RV32ZCA-NEXT: PseudoRET
417 ; RV64ZCA-LABEL: name: store_common_value_double
418 ; RV64ZCA: liveins: $x10, $x11, $x12, $f16_d
419 ; RV64ZCA-NEXT: {{ $}}
420 ; RV64ZCA-NEXT: FSD renamable $f16_d, killed renamable $x10, 0 :: (store (s64) into %ir.a)
421 ; RV64ZCA-NEXT: FSD renamable $f16_d, killed renamable $x11, 0 :: (store (s64) into %ir.b)
422 ; RV64ZCA-NEXT: FSD killed renamable $f16_d, killed renamable $x12, 0 :: (store (s64) into %ir.c)
423 ; RV64ZCA-NEXT: PseudoRET
424 FSD renamable $f16_d, killed renamable $x10, 0 :: (store (s64) into %ir.a)
425 FSD renamable $f16_d, killed renamable $x11, 0 :: (store (s64) into %ir.b)
426 FSD killed renamable $f16_d, killed renamable $x12, 0 :: (store (s64) into %ir.c)
431 name: store_common_ptr
432 tracksRegLiveness: true
437 ; RV32-LABEL: name: store_common_ptr
438 ; RV32: liveins: $x16
440 ; RV32-NEXT: renamable $x10 = ADDI $x0, 1
441 ; RV32-NEXT: $x11 = ADDI $x16, 0
442 ; RV32-NEXT: SW killed renamable $x10, $x11, 0 :: (volatile store (s32) into %ir.p)
443 ; RV32-NEXT: renamable $x10 = ADDI $x0, 3
444 ; RV32-NEXT: SW killed renamable $x10, $x11, 0 :: (volatile store (s32) into %ir.p)
445 ; RV32-NEXT: renamable $x10 = ADDI $x0, 5
446 ; RV32-NEXT: SW killed renamable $x10, killed $x11, 0 :: (volatile store (s32) into %ir.p)
447 ; RV32-NEXT: PseudoRET
449 ; RV64-LABEL: name: store_common_ptr
450 ; RV64: liveins: $x16
452 ; RV64-NEXT: renamable $x10 = ADDI $x0, 1
453 ; RV64-NEXT: $x11 = ADDI $x16, 0
454 ; RV64-NEXT: SW killed renamable $x10, $x11, 0 :: (volatile store (s32) into %ir.p)
455 ; RV64-NEXT: renamable $x10 = ADDI $x0, 3
456 ; RV64-NEXT: SW killed renamable $x10, $x11, 0 :: (volatile store (s32) into %ir.p)
457 ; RV64-NEXT: renamable $x10 = ADDI $x0, 5
458 ; RV64-NEXT: SW killed renamable $x10, killed $x11, 0 :: (volatile store (s32) into %ir.p)
459 ; RV64-NEXT: PseudoRET
460 renamable $x10 = ADDI $x0, 1
461 SW killed renamable $x10, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
462 renamable $x10 = ADDI $x0, 3
463 SW killed renamable $x10, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
464 renamable $x10 = ADDI $x0, 5
465 SW killed renamable $x10, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
470 name: store_common_ptr_self
471 tracksRegLiveness: true
476 ; RV32-LABEL: name: store_common_ptr_self
477 ; RV32: liveins: $x16
479 ; RV32-NEXT: renamable $x10 = ADDI $x0, 1
480 ; RV32-NEXT: $x11 = ADDI $x16, 0
481 ; RV32-NEXT: SW killed renamable $x10, $x11, 0 :: (volatile store (s32) into %ir.p)
482 ; RV32-NEXT: renamable $x10 = ADDI $x0, 3
483 ; RV32-NEXT: SW killed renamable $x10, $x11, 0 :: (volatile store (s32) into %ir.p)
484 ; RV32-NEXT: SW killed $x11, $x11, 0 :: (volatile store (s32) into %ir.q)
485 ; RV32-NEXT: PseudoRET
487 ; RV64-LABEL: name: store_common_ptr_self
488 ; RV64: liveins: $x16
490 ; RV64-NEXT: renamable $x10 = ADDI $x0, 1
491 ; RV64-NEXT: $x11 = ADDI $x16, 0
492 ; RV64-NEXT: SW killed renamable $x10, $x11, 0 :: (volatile store (s32) into %ir.p)
493 ; RV64-NEXT: renamable $x10 = ADDI $x0, 3
494 ; RV64-NEXT: SW killed renamable $x10, $x11, 0 :: (volatile store (s32) into %ir.p)
495 ; RV64-NEXT: SW killed $x11, $x11, 0 :: (volatile store (s32) into %ir.q)
496 ; RV64-NEXT: PseudoRET
497 renamable $x10 = ADDI $x0, 1
498 SW killed renamable $x10, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
499 renamable $x10 = ADDI $x0, 3
500 SW killed renamable $x10, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
501 SW killed renamable $x16, renamable $x16, 0 :: (volatile store (s32) into %ir.q)
506 name: store_common_ptr_float
507 tracksRegLiveness: true
510 liveins: $x16, $f10_f, $f11_f, $f12_f
512 ; RV32C-LABEL: name: store_common_ptr_float
513 ; RV32C: liveins: $x16, $f10_f, $f11_f, $f12_f
515 ; RV32C-NEXT: $x10 = ADDI $x16, 0
516 ; RV32C-NEXT: FSW killed renamable $f10_f, $x10, 0 :: (volatile store (s32) into %ir.p)
517 ; RV32C-NEXT: FSW killed renamable $f11_f, $x10, 0 :: (volatile store (s32) into %ir.p)
518 ; RV32C-NEXT: FSW killed renamable $f12_f, killed $x10, 0 :: (volatile store (s32) into %ir.p)
519 ; RV32C-NEXT: PseudoRET
521 ; RV64-LABEL: name: store_common_ptr_float
522 ; RV64: liveins: $x16, $f10_f, $f11_f, $f12_f
524 ; RV64-NEXT: FSW killed renamable $f10_f, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
525 ; RV64-NEXT: FSW killed renamable $f11_f, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
526 ; RV64-NEXT: FSW killed renamable $f12_f, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
527 ; RV64-NEXT: PseudoRET
529 ; RV32ZCF-LABEL: name: store_common_ptr_float
530 ; RV32ZCF: liveins: $x16, $f10_f, $f11_f, $f12_f
531 ; RV32ZCF-NEXT: {{ $}}
532 ; RV32ZCF-NEXT: $x10 = ADDI $x16, 0
533 ; RV32ZCF-NEXT: FSW killed renamable $f10_f, $x10, 0 :: (volatile store (s32) into %ir.p)
534 ; RV32ZCF-NEXT: FSW killed renamable $f11_f, $x10, 0 :: (volatile store (s32) into %ir.p)
535 ; RV32ZCF-NEXT: FSW killed renamable $f12_f, killed $x10, 0 :: (volatile store (s32) into %ir.p)
536 ; RV32ZCF-NEXT: PseudoRET
538 ; RV32ZCA-LABEL: name: store_common_ptr_float
539 ; RV32ZCA: liveins: $x16, $f10_f, $f11_f, $f12_f
540 ; RV32ZCA-NEXT: {{ $}}
541 ; RV32ZCA-NEXT: FSW killed renamable $f10_f, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
542 ; RV32ZCA-NEXT: FSW killed renamable $f11_f, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
543 ; RV32ZCA-NEXT: FSW killed renamable $f12_f, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
544 ; RV32ZCA-NEXT: PseudoRET
545 FSW killed renamable $f10_f, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
546 FSW killed renamable $f11_f, renamable $x16, 0 :: (volatile store (s32) into %ir.p)
547 FSW killed renamable $f12_f, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
552 name: store_common_ptr_double
553 tracksRegLiveness: true
556 liveins: $x16, $f10_d, $f11_d, $f12_d
558 ; RV32C-LABEL: name: store_common_ptr_double
559 ; RV32C: liveins: $x16, $f10_d, $f11_d, $f12_d
561 ; RV32C-NEXT: $x10 = ADDI $x16, 0
562 ; RV32C-NEXT: FSD killed renamable $f10_d, $x10, 0 :: (volatile store (s64) into %ir.p)
563 ; RV32C-NEXT: FSD killed renamable $f11_d, $x10, 0 :: (volatile store (s64) into %ir.p)
564 ; RV32C-NEXT: FSD killed renamable $f12_d, killed $x10, 0 :: (volatile store (s64) into %ir.p)
565 ; RV32C-NEXT: PseudoRET
567 ; RV64C-LABEL: name: store_common_ptr_double
568 ; RV64C: liveins: $x16, $f10_d, $f11_d, $f12_d
570 ; RV64C-NEXT: $x10 = ADDI $x16, 0
571 ; RV64C-NEXT: FSD killed renamable $f10_d, $x10, 0 :: (volatile store (s64) into %ir.p)
572 ; RV64C-NEXT: FSD killed renamable $f11_d, $x10, 0 :: (volatile store (s64) into %ir.p)
573 ; RV64C-NEXT: FSD killed renamable $f12_d, killed $x10, 0 :: (volatile store (s64) into %ir.p)
574 ; RV64C-NEXT: PseudoRET
576 ; RV32ZCF-LABEL: name: store_common_ptr_double
577 ; RV32ZCF: liveins: $x16, $f10_d, $f11_d, $f12_d
578 ; RV32ZCF-NEXT: {{ $}}
579 ; RV32ZCF-NEXT: FSD killed renamable $f10_d, renamable $x16, 0 :: (volatile store (s64) into %ir.p)
580 ; RV32ZCF-NEXT: FSD killed renamable $f11_d, renamable $x16, 0 :: (volatile store (s64) into %ir.p)
581 ; RV32ZCF-NEXT: FSD killed renamable $f12_d, killed renamable $x16, 0 :: (volatile store (s64) into %ir.p)
582 ; RV32ZCF-NEXT: PseudoRET
584 ; RV32ZCA-LABEL: name: store_common_ptr_double
585 ; RV32ZCA: liveins: $x16, $f10_d, $f11_d, $f12_d
586 ; RV32ZCA-NEXT: {{ $}}
587 ; RV32ZCA-NEXT: FSD killed renamable $f10_d, renamable $x16, 0 :: (volatile store (s64) into %ir.p)
588 ; RV32ZCA-NEXT: FSD killed renamable $f11_d, renamable $x16, 0 :: (volatile store (s64) into %ir.p)
589 ; RV32ZCA-NEXT: FSD killed renamable $f12_d, killed renamable $x16, 0 :: (volatile store (s64) into %ir.p)
590 ; RV32ZCA-NEXT: PseudoRET
592 ; RV64ZCA-LABEL: name: store_common_ptr_double
593 ; RV64ZCA: liveins: $x16, $f10_d, $f11_d, $f12_d
594 ; RV64ZCA-NEXT: {{ $}}
595 ; RV64ZCA-NEXT: FSD killed renamable $f10_d, renamable $x16, 0 :: (volatile store (s64) into %ir.p)
596 ; RV64ZCA-NEXT: FSD killed renamable $f11_d, renamable $x16, 0 :: (volatile store (s64) into %ir.p)
597 ; RV64ZCA-NEXT: FSD killed renamable $f12_d, killed renamable $x16, 0 :: (volatile store (s64) into %ir.p)
598 ; RV64ZCA-NEXT: PseudoRET
599 FSD killed renamable $f10_d, renamable $x16, 0 :: (volatile store (s64) into %ir.p)
600 FSD killed renamable $f11_d, renamable $x16, 0 :: (volatile store (s64) into %ir.p)
601 FSD killed renamable $f12_d, killed renamable $x16, 0 :: (volatile store (s64) into %ir.p)
606 name: load_common_ptr
607 tracksRegLiveness: true
612 ; RV32-LABEL: name: load_common_ptr
613 ; RV32: liveins: $x16
615 ; RV32-NEXT: $x11 = ADDI $x16, 0
616 ; RV32-NEXT: dead renamable $x10 = LW $x11, 0 :: (volatile load (s32) from %ir.p)
617 ; RV32-NEXT: dead renamable $x10 = LW $x11, 0 :: (volatile load (s32) from %ir.p)
618 ; RV32-NEXT: dead renamable $x10 = LW killed $x11, 0 :: (volatile load (s32) from %ir.p)
619 ; RV32-NEXT: PseudoRET
621 ; RV64-LABEL: name: load_common_ptr
622 ; RV64: liveins: $x16
624 ; RV64-NEXT: $x11 = ADDI $x16, 0
625 ; RV64-NEXT: dead renamable $x10 = LW $x11, 0 :: (volatile load (s32) from %ir.p)
626 ; RV64-NEXT: dead renamable $x10 = LW $x11, 0 :: (volatile load (s32) from %ir.p)
627 ; RV64-NEXT: dead renamable $x10 = LW killed $x11, 0 :: (volatile load (s32) from %ir.p)
628 ; RV64-NEXT: PseudoRET
629 dead renamable $x10 = LW renamable $x16, 0 :: (volatile load (s32) from %ir.p)
630 dead renamable $x10 = LW renamable $x16, 0 :: (volatile load (s32) from %ir.p)
631 dead renamable $x10 = LW killed renamable $x16, 0 :: (volatile load (s32) from %ir.p)
636 name: load_common_ptr_float
637 tracksRegLiveness: true
642 ; RV32C-LABEL: name: load_common_ptr_float
643 ; RV32C: liveins: $x16
645 ; RV32C-NEXT: $x10 = ADDI $x16, 0
646 ; RV32C-NEXT: renamable $f10_f = FLW $x10, 0 :: (load (s32) from %ir.g)
647 ; RV32C-NEXT: renamable $f11_f = FLW $x10, 4 :: (load (s32) from %ir.arrayidx1)
648 ; RV32C-NEXT: renamable $f12_f = FLW killed $x10, 8 :: (load (s32) from %ir.arrayidx2)
649 ; RV32C-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
651 ; RV64-LABEL: name: load_common_ptr_float
652 ; RV64: liveins: $x16
654 ; RV64-NEXT: renamable $f10_f = FLW renamable $x16, 0 :: (load (s32) from %ir.g)
655 ; RV64-NEXT: renamable $f11_f = FLW renamable $x16, 4 :: (load (s32) from %ir.arrayidx1)
656 ; RV64-NEXT: renamable $f12_f = FLW killed renamable $x16, 8 :: (load (s32) from %ir.arrayidx2)
657 ; RV64-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
659 ; RV32ZCF-LABEL: name: load_common_ptr_float
660 ; RV32ZCF: liveins: $x16
661 ; RV32ZCF-NEXT: {{ $}}
662 ; RV32ZCF-NEXT: $x10 = ADDI $x16, 0
663 ; RV32ZCF-NEXT: renamable $f10_f = FLW $x10, 0 :: (load (s32) from %ir.g)
664 ; RV32ZCF-NEXT: renamable $f11_f = FLW $x10, 4 :: (load (s32) from %ir.arrayidx1)
665 ; RV32ZCF-NEXT: renamable $f12_f = FLW killed $x10, 8 :: (load (s32) from %ir.arrayidx2)
666 ; RV32ZCF-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
668 ; RV32ZCA-LABEL: name: load_common_ptr_float
669 ; RV32ZCA: liveins: $x16
670 ; RV32ZCA-NEXT: {{ $}}
671 ; RV32ZCA-NEXT: renamable $f10_f = FLW renamable $x16, 0 :: (load (s32) from %ir.g)
672 ; RV32ZCA-NEXT: renamable $f11_f = FLW renamable $x16, 4 :: (load (s32) from %ir.arrayidx1)
673 ; RV32ZCA-NEXT: renamable $f12_f = FLW killed renamable $x16, 8 :: (load (s32) from %ir.arrayidx2)
674 ; RV32ZCA-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
675 renamable $f10_f = FLW renamable $x16, 0 :: (load (s32) from %ir.g)
676 renamable $f11_f = FLW renamable $x16, 4 :: (load (s32) from %ir.arrayidx1)
677 renamable $f12_f = FLW killed renamable $x16, 8 :: (load (s32) from %ir.arrayidx2)
678 PseudoTAIL target-flags(riscv-call) @load_common_ptr_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
682 name: load_common_ptr_double
683 tracksRegLiveness: true
688 ; RV32C-LABEL: name: load_common_ptr_double
689 ; RV32C: liveins: $x16
691 ; RV32C-NEXT: $x10 = ADDI $x16, 0
692 ; RV32C-NEXT: renamable $f10_d = FLD $x10, 0 :: (load (s64) from %ir.g)
693 ; RV32C-NEXT: renamable $f11_d = FLD $x10, 8 :: (load (s64) from %ir.arrayidx1)
694 ; RV32C-NEXT: renamable $f12_d = FLD killed $x10, 16 :: (load (s64) from %ir.arrayidx2)
695 ; RV32C-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
697 ; RV64C-LABEL: name: load_common_ptr_double
698 ; RV64C: liveins: $x16
700 ; RV64C-NEXT: $x10 = ADDI $x16, 0
701 ; RV64C-NEXT: renamable $f10_d = FLD $x10, 0 :: (load (s64) from %ir.g)
702 ; RV64C-NEXT: renamable $f11_d = FLD $x10, 8 :: (load (s64) from %ir.arrayidx1)
703 ; RV64C-NEXT: renamable $f12_d = FLD killed $x10, 16 :: (load (s64) from %ir.arrayidx2)
704 ; RV64C-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
706 ; RV32ZCF-LABEL: name: load_common_ptr_double
707 ; RV32ZCF: liveins: $x16
708 ; RV32ZCF-NEXT: {{ $}}
709 ; RV32ZCF-NEXT: renamable $f10_d = FLD renamable $x16, 0 :: (load (s64) from %ir.g)
710 ; RV32ZCF-NEXT: renamable $f11_d = FLD renamable $x16, 8 :: (load (s64) from %ir.arrayidx1)
711 ; RV32ZCF-NEXT: renamable $f12_d = FLD killed renamable $x16, 16 :: (load (s64) from %ir.arrayidx2)
712 ; RV32ZCF-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
714 ; RV32ZCA-LABEL: name: load_common_ptr_double
715 ; RV32ZCA: liveins: $x16
716 ; RV32ZCA-NEXT: {{ $}}
717 ; RV32ZCA-NEXT: renamable $f10_d = FLD renamable $x16, 0 :: (load (s64) from %ir.g)
718 ; RV32ZCA-NEXT: renamable $f11_d = FLD renamable $x16, 8 :: (load (s64) from %ir.arrayidx1)
719 ; RV32ZCA-NEXT: renamable $f12_d = FLD killed renamable $x16, 16 :: (load (s64) from %ir.arrayidx2)
720 ; RV32ZCA-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
722 ; RV64ZCA-LABEL: name: load_common_ptr_double
723 ; RV64ZCA: liveins: $x16
724 ; RV64ZCA-NEXT: {{ $}}
725 ; RV64ZCA-NEXT: renamable $f10_d = FLD renamable $x16, 0 :: (load (s64) from %ir.g)
726 ; RV64ZCA-NEXT: renamable $f11_d = FLD renamable $x16, 8 :: (load (s64) from %ir.arrayidx1)
727 ; RV64ZCA-NEXT: renamable $f12_d = FLD killed renamable $x16, 16 :: (load (s64) from %ir.arrayidx2)
728 ; RV64ZCA-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
729 renamable $f10_d = FLD renamable $x16, 0 :: (load (s64) from %ir.g)
730 renamable $f11_d = FLD renamable $x16, 8 :: (load (s64) from %ir.arrayidx1)
731 renamable $f12_d = FLD killed renamable $x16, 16 :: (load (s64) from %ir.arrayidx2)
732 PseudoTAIL target-flags(riscv-call) @load_common_ptr_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
736 name: store_large_offset
737 tracksRegLiveness: true
742 ; RV32-LABEL: name: store_large_offset
743 ; RV32: liveins: $x10
745 ; RV32-NEXT: renamable $x11 = ADDI $x0, 1
746 ; RV32-NEXT: $x12 = ADDI $x10, 384
747 ; RV32-NEXT: SW killed renamable $x11, $x12, 16 :: (volatile store (s32) into %ir.0)
748 ; RV32-NEXT: renamable $x11 = ADDI $x0, 3
749 ; RV32-NEXT: SW killed renamable $x11, $x12, 20 :: (volatile store (s32) into %ir.1)
750 ; RV32-NEXT: renamable $x11 = ADDI $x0, 5
751 ; RV32-NEXT: SW killed renamable $x11, $x12, 24 :: (volatile store (s32) into %ir.2)
752 ; RV32-NEXT: renamable $x11 = ADDI $x0, 7
753 ; RV32-NEXT: SW killed renamable $x11, killed $x12, 28 :: (volatile store (s32) into %ir.3)
754 ; RV32-NEXT: PseudoRET
756 ; RV64-LABEL: name: store_large_offset
757 ; RV64: liveins: $x10
759 ; RV64-NEXT: renamable $x11 = ADDI $x0, 1
760 ; RV64-NEXT: $x12 = ADDI $x10, 384
761 ; RV64-NEXT: SW killed renamable $x11, $x12, 16 :: (volatile store (s32) into %ir.0)
762 ; RV64-NEXT: renamable $x11 = ADDI $x0, 3
763 ; RV64-NEXT: SW killed renamable $x11, $x12, 20 :: (volatile store (s32) into %ir.1)
764 ; RV64-NEXT: renamable $x11 = ADDI $x0, 5
765 ; RV64-NEXT: SW killed renamable $x11, $x12, 24 :: (volatile store (s32) into %ir.2)
766 ; RV64-NEXT: renamable $x11 = ADDI $x0, 7
767 ; RV64-NEXT: SW killed renamable $x11, killed $x12, 28 :: (volatile store (s32) into %ir.3)
768 ; RV64-NEXT: PseudoRET
769 renamable $x11 = ADDI $x0, 1
770 SW killed renamable $x11, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
771 renamable $x11 = ADDI $x0, 3
772 SW killed renamable $x11, renamable $x10, 404 :: (volatile store (s32) into %ir.1)
773 renamable $x11 = ADDI $x0, 5
774 SW killed renamable $x11, renamable $x10, 408 :: (volatile store (s32) into %ir.2)
775 renamable $x11 = ADDI $x0, 7
776 SW killed renamable $x11, killed renamable $x10, 412 :: (volatile store (s32) into %ir.3)
781 name: store_large_offset_float
782 tracksRegLiveness: true
785 liveins: $x10, $f10_f, $f11_f, $f12_f, $f13_f
787 ; RV32C-LABEL: name: store_large_offset_float
788 ; RV32C: liveins: $x10, $f10_f, $f11_f, $f12_f, $f13_f
790 ; RV32C-NEXT: $x11 = ADDI $x10, 384
791 ; RV32C-NEXT: FSW killed renamable $f10_f, $x11, 16 :: (volatile store (s32) into %ir.0)
792 ; RV32C-NEXT: FSW killed renamable $f11_f, $x11, 20 :: (volatile store (s32) into %ir.1)
793 ; RV32C-NEXT: FSW killed renamable $f12_f, $x11, 24 :: (volatile store (s32) into %ir.2)
794 ; RV32C-NEXT: FSW killed renamable $f13_f, killed $x11, 28 :: (volatile store (s32) into %ir.3)
795 ; RV32C-NEXT: PseudoRET
797 ; RV64-LABEL: name: store_large_offset_float
798 ; RV64: liveins: $x10, $f10_f, $f11_f, $f12_f, $f13_f
800 ; RV64-NEXT: FSW killed renamable $f10_f, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
801 ; RV64-NEXT: FSW killed renamable $f11_f, renamable $x10, 404 :: (volatile store (s32) into %ir.1)
802 ; RV64-NEXT: FSW killed renamable $f12_f, renamable $x10, 408 :: (volatile store (s32) into %ir.2)
803 ; RV64-NEXT: FSW killed renamable $f13_f, killed renamable $x10, 412 :: (volatile store (s32) into %ir.3)
804 ; RV64-NEXT: PseudoRET
806 ; RV32ZCF-LABEL: name: store_large_offset_float
807 ; RV32ZCF: liveins: $x10, $f10_f, $f11_f, $f12_f, $f13_f
808 ; RV32ZCF-NEXT: {{ $}}
809 ; RV32ZCF-NEXT: $x11 = ADDI $x10, 384
810 ; RV32ZCF-NEXT: FSW killed renamable $f10_f, $x11, 16 :: (volatile store (s32) into %ir.0)
811 ; RV32ZCF-NEXT: FSW killed renamable $f11_f, $x11, 20 :: (volatile store (s32) into %ir.1)
812 ; RV32ZCF-NEXT: FSW killed renamable $f12_f, $x11, 24 :: (volatile store (s32) into %ir.2)
813 ; RV32ZCF-NEXT: FSW killed renamable $f13_f, killed $x11, 28 :: (volatile store (s32) into %ir.3)
814 ; RV32ZCF-NEXT: PseudoRET
816 ; RV32ZCA-LABEL: name: store_large_offset_float
817 ; RV32ZCA: liveins: $x10, $f10_f, $f11_f, $f12_f, $f13_f
818 ; RV32ZCA-NEXT: {{ $}}
819 ; RV32ZCA-NEXT: FSW killed renamable $f10_f, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
820 ; RV32ZCA-NEXT: FSW killed renamable $f11_f, renamable $x10, 404 :: (volatile store (s32) into %ir.1)
821 ; RV32ZCA-NEXT: FSW killed renamable $f12_f, renamable $x10, 408 :: (volatile store (s32) into %ir.2)
822 ; RV32ZCA-NEXT: FSW killed renamable $f13_f, killed renamable $x10, 412 :: (volatile store (s32) into %ir.3)
823 ; RV32ZCA-NEXT: PseudoRET
824 FSW killed renamable $f10_f, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
825 FSW killed renamable $f11_f, renamable $x10, 404 :: (volatile store (s32) into %ir.1)
826 FSW killed renamable $f12_f, renamable $x10, 408 :: (volatile store (s32) into %ir.2)
827 FSW killed renamable $f13_f, killed renamable $x10, 412 :: (volatile store (s32) into %ir.3)
832 name: store_large_offset_double
833 tracksRegLiveness: true
836 liveins: $x10, $f10_d, $f11_d, $f12_d, $f13_d
838 ; RV32C-LABEL: name: store_large_offset_double
839 ; RV32C: liveins: $x10, $f10_d, $f11_d, $f12_d, $f13_d
841 ; RV32C-NEXT: $x11 = ADDI $x10, 768
842 ; RV32C-NEXT: FSD killed renamable $f10_d, $x11, 32 :: (volatile store (s64) into %ir.0)
843 ; RV32C-NEXT: FSD killed renamable $f11_d, $x11, 40 :: (volatile store (s64) into %ir.1)
844 ; RV32C-NEXT: FSD killed renamable $f12_d, $x11, 48 :: (volatile store (s64) into %ir.2)
845 ; RV32C-NEXT: FSD killed renamable $f13_d, killed $x11, 56 :: (volatile store (s64) into %ir.3)
846 ; RV32C-NEXT: PseudoRET
848 ; RV64C-LABEL: name: store_large_offset_double
849 ; RV64C: liveins: $x10, $f10_d, $f11_d, $f12_d, $f13_d
851 ; RV64C-NEXT: $x11 = ADDI $x10, 768
852 ; RV64C-NEXT: FSD killed renamable $f10_d, $x11, 32 :: (volatile store (s64) into %ir.0)
853 ; RV64C-NEXT: FSD killed renamable $f11_d, $x11, 40 :: (volatile store (s64) into %ir.1)
854 ; RV64C-NEXT: FSD killed renamable $f12_d, $x11, 48 :: (volatile store (s64) into %ir.2)
855 ; RV64C-NEXT: FSD killed renamable $f13_d, killed $x11, 56 :: (volatile store (s64) into %ir.3)
856 ; RV64C-NEXT: PseudoRET
858 ; RV32ZCF-LABEL: name: store_large_offset_double
859 ; RV32ZCF: liveins: $x10, $f10_d, $f11_d, $f12_d, $f13_d
860 ; RV32ZCF-NEXT: {{ $}}
861 ; RV32ZCF-NEXT: FSD killed renamable $f10_d, renamable $x10, 800 :: (volatile store (s64) into %ir.0)
862 ; RV32ZCF-NEXT: FSD killed renamable $f11_d, renamable $x10, 808 :: (volatile store (s64) into %ir.1)
863 ; RV32ZCF-NEXT: FSD killed renamable $f12_d, renamable $x10, 816 :: (volatile store (s64) into %ir.2)
864 ; RV32ZCF-NEXT: FSD killed renamable $f13_d, killed renamable $x10, 824 :: (volatile store (s64) into %ir.3)
865 ; RV32ZCF-NEXT: PseudoRET
867 ; RV32ZCA-LABEL: name: store_large_offset_double
868 ; RV32ZCA: liveins: $x10, $f10_d, $f11_d, $f12_d, $f13_d
869 ; RV32ZCA-NEXT: {{ $}}
870 ; RV32ZCA-NEXT: FSD killed renamable $f10_d, renamable $x10, 800 :: (volatile store (s64) into %ir.0)
871 ; RV32ZCA-NEXT: FSD killed renamable $f11_d, renamable $x10, 808 :: (volatile store (s64) into %ir.1)
872 ; RV32ZCA-NEXT: FSD killed renamable $f12_d, renamable $x10, 816 :: (volatile store (s64) into %ir.2)
873 ; RV32ZCA-NEXT: FSD killed renamable $f13_d, killed renamable $x10, 824 :: (volatile store (s64) into %ir.3)
874 ; RV32ZCA-NEXT: PseudoRET
876 ; RV64ZCA-LABEL: name: store_large_offset_double
877 ; RV64ZCA: liveins: $x10, $f10_d, $f11_d, $f12_d, $f13_d
878 ; RV64ZCA-NEXT: {{ $}}
879 ; RV64ZCA-NEXT: FSD killed renamable $f10_d, renamable $x10, 800 :: (volatile store (s64) into %ir.0)
880 ; RV64ZCA-NEXT: FSD killed renamable $f11_d, renamable $x10, 808 :: (volatile store (s64) into %ir.1)
881 ; RV64ZCA-NEXT: FSD killed renamable $f12_d, renamable $x10, 816 :: (volatile store (s64) into %ir.2)
882 ; RV64ZCA-NEXT: FSD killed renamable $f13_d, killed renamable $x10, 824 :: (volatile store (s64) into %ir.3)
883 ; RV64ZCA-NEXT: PseudoRET
884 FSD killed renamable $f10_d, renamable $x10, 800 :: (volatile store (s64) into %ir.0)
885 FSD killed renamable $f11_d, renamable $x10, 808 :: (volatile store (s64) into %ir.1)
886 FSD killed renamable $f12_d, renamable $x10, 816 :: (volatile store (s64) into %ir.2)
887 FSD killed renamable $f13_d, killed renamable $x10, 824 :: (volatile store (s64) into %ir.3)
892 name: load_large_offset
893 tracksRegLiveness: true
898 ; RV32-LABEL: name: load_large_offset
899 ; RV32: liveins: $x10
901 ; RV32-NEXT: $x12 = ADDI $x10, 384
902 ; RV32-NEXT: dead renamable $x11 = LW $x12, 16 :: (volatile load (s32) from %ir.0)
903 ; RV32-NEXT: dead renamable $x11 = LW $x12, 20 :: (volatile load (s32) from %ir.1)
904 ; RV32-NEXT: dead renamable $x11 = LW $x12, 24 :: (volatile load (s32) from %ir.2)
905 ; RV32-NEXT: dead renamable $x10 = LW killed $x12, 28 :: (volatile load (s32) from %ir.3)
906 ; RV32-NEXT: PseudoRET
908 ; RV64-LABEL: name: load_large_offset
909 ; RV64: liveins: $x10
911 ; RV64-NEXT: $x12 = ADDI $x10, 384
912 ; RV64-NEXT: dead renamable $x11 = LW $x12, 16 :: (volatile load (s32) from %ir.0)
913 ; RV64-NEXT: dead renamable $x11 = LW $x12, 20 :: (volatile load (s32) from %ir.1)
914 ; RV64-NEXT: dead renamable $x11 = LW $x12, 24 :: (volatile load (s32) from %ir.2)
915 ; RV64-NEXT: dead renamable $x10 = LW killed $x12, 28 :: (volatile load (s32) from %ir.3)
916 ; RV64-NEXT: PseudoRET
917 dead renamable $x11 = LW renamable $x10, 400 :: (volatile load (s32) from %ir.0)
918 dead renamable $x11 = LW renamable $x10, 404 :: (volatile load (s32) from %ir.1)
919 dead renamable $x11 = LW renamable $x10, 408 :: (volatile load (s32) from %ir.2)
920 dead renamable $x10 = LW killed renamable $x10, 412 :: (volatile load (s32) from %ir.3)
925 name: load_large_offset_float
926 tracksRegLiveness: true
931 ; RV32C-LABEL: name: load_large_offset_float
932 ; RV32C: liveins: $x10
934 ; RV32C-NEXT: $x11 = ADDI $x10, 384
935 ; RV32C-NEXT: renamable $f10_f = FLW $x11, 16 :: (load (s32) from %ir.arrayidx)
936 ; RV32C-NEXT: renamable $f11_f = FLW $x11, 20 :: (load (s32) from %ir.arrayidx1)
937 ; RV32C-NEXT: renamable $f12_f = FLW killed $x11, 24 :: (load (s32) from %ir.arrayidx2)
938 ; RV32C-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
940 ; RV64-LABEL: name: load_large_offset_float
941 ; RV64: liveins: $x10
943 ; RV64-NEXT: renamable $f10_f = FLW renamable $x10, 400 :: (load (s32) from %ir.arrayidx)
944 ; RV64-NEXT: renamable $f11_f = FLW renamable $x10, 404 :: (load (s32) from %ir.arrayidx1)
945 ; RV64-NEXT: renamable $f12_f = FLW killed renamable $x10, 408 :: (load (s32) from %ir.arrayidx2)
946 ; RV64-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
948 ; RV32ZCF-LABEL: name: load_large_offset_float
949 ; RV32ZCF: liveins: $x10
950 ; RV32ZCF-NEXT: {{ $}}
951 ; RV32ZCF-NEXT: $x11 = ADDI $x10, 384
952 ; RV32ZCF-NEXT: renamable $f10_f = FLW $x11, 16 :: (load (s32) from %ir.arrayidx)
953 ; RV32ZCF-NEXT: renamable $f11_f = FLW $x11, 20 :: (load (s32) from %ir.arrayidx1)
954 ; RV32ZCF-NEXT: renamable $f12_f = FLW killed $x11, 24 :: (load (s32) from %ir.arrayidx2)
955 ; RV32ZCF-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
957 ; RV32ZCA-LABEL: name: load_large_offset_float
958 ; RV32ZCA: liveins: $x10
959 ; RV32ZCA-NEXT: {{ $}}
960 ; RV32ZCA-NEXT: renamable $f10_f = FLW renamable $x10, 400 :: (load (s32) from %ir.arrayidx)
961 ; RV32ZCA-NEXT: renamable $f11_f = FLW renamable $x10, 404 :: (load (s32) from %ir.arrayidx1)
962 ; RV32ZCA-NEXT: renamable $f12_f = FLW killed renamable $x10, 408 :: (load (s32) from %ir.arrayidx2)
963 ; RV32ZCA-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
964 renamable $f10_f = FLW renamable $x10, 400 :: (load (s32) from %ir.arrayidx)
965 renamable $f11_f = FLW renamable $x10, 404 :: (load (s32) from %ir.arrayidx1)
966 renamable $f12_f = FLW killed renamable $x10, 408 :: (load (s32) from %ir.arrayidx2)
967 PseudoTAIL target-flags(riscv-call) @load_large_offset_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
971 name: load_large_offset_double
972 tracksRegLiveness: true
977 ; RV32C-LABEL: name: load_large_offset_double
978 ; RV32C: liveins: $x10
980 ; RV32C-NEXT: $x11 = ADDI $x10, 768
981 ; RV32C-NEXT: renamable $f10_d = FLD $x11, 32 :: (load (s64) from %ir.arrayidx)
982 ; RV32C-NEXT: renamable $f11_d = FLD $x11, 40 :: (load (s64) from %ir.arrayidx1)
983 ; RV32C-NEXT: renamable $f12_d = FLD killed $x11, 48 :: (load (s64) from %ir.arrayidx2)
984 ; RV32C-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
986 ; RV64C-LABEL: name: load_large_offset_double
987 ; RV64C: liveins: $x10
989 ; RV64C-NEXT: $x11 = ADDI $x10, 768
990 ; RV64C-NEXT: renamable $f10_d = FLD $x11, 32 :: (load (s64) from %ir.arrayidx)
991 ; RV64C-NEXT: renamable $f11_d = FLD $x11, 40 :: (load (s64) from %ir.arrayidx1)
992 ; RV64C-NEXT: renamable $f12_d = FLD killed $x11, 48 :: (load (s64) from %ir.arrayidx2)
993 ; RV64C-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
995 ; RV32ZCF-LABEL: name: load_large_offset_double
996 ; RV32ZCF: liveins: $x10
997 ; RV32ZCF-NEXT: {{ $}}
998 ; RV32ZCF-NEXT: renamable $f10_d = FLD renamable $x10, 800 :: (load (s64) from %ir.arrayidx)
999 ; RV32ZCF-NEXT: renamable $f11_d = FLD renamable $x10, 808 :: (load (s64) from %ir.arrayidx1)
1000 ; RV32ZCF-NEXT: renamable $f12_d = FLD killed renamable $x10, 816 :: (load (s64) from %ir.arrayidx2)
1001 ; RV32ZCF-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
1003 ; RV32ZCA-LABEL: name: load_large_offset_double
1004 ; RV32ZCA: liveins: $x10
1005 ; RV32ZCA-NEXT: {{ $}}
1006 ; RV32ZCA-NEXT: renamable $f10_d = FLD renamable $x10, 800 :: (load (s64) from %ir.arrayidx)
1007 ; RV32ZCA-NEXT: renamable $f11_d = FLD renamable $x10, 808 :: (load (s64) from %ir.arrayidx1)
1008 ; RV32ZCA-NEXT: renamable $f12_d = FLD killed renamable $x10, 816 :: (load (s64) from %ir.arrayidx2)
1009 ; RV32ZCA-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
1011 ; RV64ZCA-LABEL: name: load_large_offset_double
1012 ; RV64ZCA: liveins: $x10
1013 ; RV64ZCA-NEXT: {{ $}}
1014 ; RV64ZCA-NEXT: renamable $f10_d = FLD renamable $x10, 800 :: (load (s64) from %ir.arrayidx)
1015 ; RV64ZCA-NEXT: renamable $f11_d = FLD renamable $x10, 808 :: (load (s64) from %ir.arrayidx1)
1016 ; RV64ZCA-NEXT: renamable $f12_d = FLD killed renamable $x10, 816 :: (load (s64) from %ir.arrayidx2)
1017 ; RV64ZCA-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
1018 renamable $f10_d = FLD renamable $x10, 800 :: (load (s64) from %ir.arrayidx)
1019 renamable $f11_d = FLD renamable $x10, 808 :: (load (s64) from %ir.arrayidx1)
1020 renamable $f12_d = FLD killed renamable $x10, 816 :: (load (s64) from %ir.arrayidx2)
1021 PseudoTAIL target-flags(riscv-call) @load_large_offset_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
1025 name: store_common_value_no_opt
1026 tracksRegLiveness: true
1031 ; RV32-LABEL: name: store_common_value_no_opt
1032 ; RV32: liveins: $x10
1034 ; RV32-NEXT: SW $x0, killed renamable $x10, 0 :: (store (s32) into %ir.a)
1035 ; RV32-NEXT: PseudoRET
1037 ; RV64-LABEL: name: store_common_value_no_opt
1038 ; RV64: liveins: $x10
1040 ; RV64-NEXT: SW $x0, killed renamable $x10, 0 :: (store (s32) into %ir.a)
1041 ; RV64-NEXT: PseudoRET
1042 SW $x0, killed renamable $x10, 0 :: (store (s32) into %ir.a)
1047 name: store_common_value_float_no_opt
1048 tracksRegLiveness: true
1051 liveins: $x10, $f16_f
1053 ; RV32-LABEL: name: store_common_value_float_no_opt
1054 ; RV32: liveins: $x10, $f16_f
1056 ; RV32-NEXT: FSW killed renamable $f16_f, killed renamable $x10, 0 :: (store (s32) into %ir.a)
1057 ; RV32-NEXT: PseudoRET
1059 ; RV64-LABEL: name: store_common_value_float_no_opt
1060 ; RV64: liveins: $x10, $f16_f
1062 ; RV64-NEXT: FSW killed renamable $f16_f, killed renamable $x10, 0 :: (store (s32) into %ir.a)
1063 ; RV64-NEXT: PseudoRET
1064 FSW killed renamable $f16_f, killed renamable $x10, 0 :: (store (s32) into %ir.a)
1069 name: store_common_value_double_no_opt
1070 tracksRegLiveness: true
1073 liveins: $x10, $f16_d
1075 ; RV32-LABEL: name: store_common_value_double_no_opt
1076 ; RV32: liveins: $x10, $f16_d
1078 ; RV32-NEXT: FSD killed renamable $f16_d, killed renamable $x10, 0 :: (store (s64) into %ir.a)
1079 ; RV32-NEXT: PseudoRET
1081 ; RV64-LABEL: name: store_common_value_double_no_opt
1082 ; RV64: liveins: $x10, $f16_d
1084 ; RV64-NEXT: FSD killed renamable $f16_d, killed renamable $x10, 0 :: (store (s64) into %ir.a)
1085 ; RV64-NEXT: PseudoRET
1086 FSD killed renamable $f16_d, killed renamable $x10, 0 :: (store (s64) into %ir.a)
1091 name: store_common_ptr_no_opt
1092 tracksRegLiveness: true
1097 ; RV32-LABEL: name: store_common_ptr_no_opt
1098 ; RV32: liveins: $x16
1100 ; RV32-NEXT: renamable $x10 = ADDI $x0, 1
1101 ; RV32-NEXT: SW killed renamable $x10, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
1102 ; RV32-NEXT: PseudoRET
1104 ; RV64-LABEL: name: store_common_ptr_no_opt
1105 ; RV64: liveins: $x16
1107 ; RV64-NEXT: renamable $x10 = ADDI $x0, 1
1108 ; RV64-NEXT: SW killed renamable $x10, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
1109 ; RV64-NEXT: PseudoRET
1110 renamable $x10 = ADDI $x0, 1
1111 SW killed renamable $x10, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
1116 name: store_common_ptr_float_no_opt
1117 tracksRegLiveness: true
1120 liveins: $x16, $f10_f
1122 ; RV32-LABEL: name: store_common_ptr_float_no_opt
1123 ; RV32: liveins: $x16, $f10_f
1125 ; RV32-NEXT: FSW killed renamable $f10_f, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
1126 ; RV32-NEXT: PseudoRET
1128 ; RV64-LABEL: name: store_common_ptr_float_no_opt
1129 ; RV64: liveins: $x16, $f10_f
1131 ; RV64-NEXT: FSW killed renamable $f10_f, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
1132 ; RV64-NEXT: PseudoRET
1133 FSW killed renamable $f10_f, killed renamable $x16, 0 :: (volatile store (s32) into %ir.p)
1138 name: store_common_ptr_double_no_opt
1139 tracksRegLiveness: true
1142 liveins: $x16, $f10_d
1144 ; RV32-LABEL: name: store_common_ptr_double_no_opt
1145 ; RV32: liveins: $x16, $f10_d
1147 ; RV32-NEXT: FSD killed renamable $f10_d, killed renamable $x16, 0 :: (volatile store (s64) into %ir.p)
1148 ; RV32-NEXT: PseudoRET
1150 ; RV64-LABEL: name: store_common_ptr_double_no_opt
1151 ; RV64: liveins: $x16, $f10_d
1153 ; RV64-NEXT: FSD killed renamable $f10_d, killed renamable $x16, 0 :: (volatile store (s64) into %ir.p)
1154 ; RV64-NEXT: PseudoRET
1155 FSD killed renamable $f10_d, killed renamable $x16, 0 :: (volatile store (s64) into %ir.p)
1160 name: load_common_ptr_no_opt
1161 tracksRegLiveness: true
1166 ; RV32-LABEL: name: load_common_ptr_no_opt
1167 ; RV32: liveins: $x16
1169 ; RV32-NEXT: dead renamable $x10 = LW killed renamable $x16, 0 :: (volatile load (s32) from %ir.p)
1170 ; RV32-NEXT: PseudoRET
1172 ; RV64-LABEL: name: load_common_ptr_no_opt
1173 ; RV64: liveins: $x16
1175 ; RV64-NEXT: dead renamable $x10 = LW killed renamable $x16, 0 :: (volatile load (s32) from %ir.p)
1176 ; RV64-NEXT: PseudoRET
1177 dead renamable $x10 = LW killed renamable $x16, 0 :: (volatile load (s32) from %ir.p)
1182 name: load_common_ptr_float_no_opt
1183 tracksRegLiveness: true
1188 ; RV32-LABEL: name: load_common_ptr_float_no_opt
1189 ; RV32: liveins: $x16
1191 ; RV32-NEXT: renamable $f10_f = FLW killed renamable $x16, 0 :: (load (s32) from %ir.g)
1192 ; RV32-NEXT: PseudoRET implicit $f10_f
1194 ; RV64-LABEL: name: load_common_ptr_float_no_opt
1195 ; RV64: liveins: $x16
1197 ; RV64-NEXT: renamable $f10_f = FLW killed renamable $x16, 0 :: (load (s32) from %ir.g)
1198 ; RV64-NEXT: PseudoRET implicit $f10_f
1199 renamable $f10_f = FLW killed renamable $x16, 0 :: (load (s32) from %ir.g)
1200 PseudoRET implicit $f10_f
1204 name: load_common_ptr_double_no_opt
1205 tracksRegLiveness: true
1210 ; RV32-LABEL: name: load_common_ptr_double_no_opt
1211 ; RV32: liveins: $x16
1213 ; RV32-NEXT: renamable $f10_d = FLD killed renamable $x16, 0 :: (load (s64) from %ir.g)
1214 ; RV32-NEXT: PseudoRET implicit $f10_d
1216 ; RV64-LABEL: name: load_common_ptr_double_no_opt
1217 ; RV64: liveins: $x16
1219 ; RV64-NEXT: renamable $f10_d = FLD killed renamable $x16, 0 :: (load (s64) from %ir.g)
1220 ; RV64-NEXT: PseudoRET implicit $f10_d
1221 renamable $f10_d = FLD killed renamable $x16, 0 :: (load (s64) from %ir.g)
1222 PseudoRET implicit $f10_d
1226 name: store_large_offset_no_opt
1227 tracksRegLiveness: true
1232 ; RV32-LABEL: name: store_large_offset_no_opt
1233 ; RV32: liveins: $x10
1235 ; RV32-NEXT: renamable $x11 = ADDI $x0, 1
1236 ; RV32-NEXT: SW killed renamable $x11, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
1237 ; RV32-NEXT: renamable $x11 = ADDI $x0, 3
1238 ; RV32-NEXT: SW killed renamable $x11, killed renamable $x10, 404 :: (volatile store (s32) into %ir.1)
1239 ; RV32-NEXT: PseudoRET
1241 ; RV64-LABEL: name: store_large_offset_no_opt
1242 ; RV64: liveins: $x10
1244 ; RV64-NEXT: renamable $x11 = ADDI $x0, 1
1245 ; RV64-NEXT: SW killed renamable $x11, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
1246 ; RV64-NEXT: renamable $x11 = ADDI $x0, 3
1247 ; RV64-NEXT: SW killed renamable $x11, killed renamable $x10, 404 :: (volatile store (s32) into %ir.1)
1248 ; RV64-NEXT: PseudoRET
1249 renamable $x11 = ADDI $x0, 1
1250 SW killed renamable $x11, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
1251 renamable $x11 = ADDI $x0, 3
1252 SW killed renamable $x11, killed renamable $x10, 404 :: (volatile store (s32) into %ir.1)
1257 name: store_large_offset_float_no_opt
1258 tracksRegLiveness: true
1261 liveins: $x10, $f10_f, $f11_f
1263 ; RV32-LABEL: name: store_large_offset_float_no_opt
1264 ; RV32: liveins: $x10, $f10_f, $f11_f
1266 ; RV32-NEXT: FSW killed renamable $f10_f, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
1267 ; RV32-NEXT: FSW killed renamable $f11_f, killed renamable $x10, 404 :: (volatile store (s32) into %ir.1)
1268 ; RV32-NEXT: PseudoRET
1270 ; RV64-LABEL: name: store_large_offset_float_no_opt
1271 ; RV64: liveins: $x10, $f10_f, $f11_f
1273 ; RV64-NEXT: FSW killed renamable $f10_f, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
1274 ; RV64-NEXT: FSW killed renamable $f11_f, killed renamable $x10, 404 :: (volatile store (s32) into %ir.1)
1275 ; RV64-NEXT: PseudoRET
1276 FSW killed renamable $f10_f, renamable $x10, 400 :: (volatile store (s32) into %ir.0)
1277 FSW killed renamable $f11_f, killed renamable $x10, 404 :: (volatile store (s32) into %ir.1)
1282 name: store_large_offset_double_no_opt
1283 tracksRegLiveness: true
1286 liveins: $x10, $f10_d, $f11_d
1288 ; RV32-LABEL: name: store_large_offset_double_no_opt
1289 ; RV32: liveins: $x10, $f10_d, $f11_d
1291 ; RV32-NEXT: FSD killed renamable $f10_d, renamable $x10, 800 :: (volatile store (s64) into %ir.0)
1292 ; RV32-NEXT: FSD killed renamable $f11_d, killed renamable $x10, 808 :: (volatile store (s64) into %ir.1)
1293 ; RV32-NEXT: PseudoRET
1295 ; RV64-LABEL: name: store_large_offset_double_no_opt
1296 ; RV64: liveins: $x10, $f10_d, $f11_d
1298 ; RV64-NEXT: FSD killed renamable $f10_d, renamable $x10, 800 :: (volatile store (s64) into %ir.0)
1299 ; RV64-NEXT: FSD killed renamable $f11_d, killed renamable $x10, 808 :: (volatile store (s64) into %ir.1)
1300 ; RV64-NEXT: PseudoRET
1301 FSD killed renamable $f10_d, renamable $x10, 800 :: (volatile store (s64) into %ir.0)
1302 FSD killed renamable $f11_d, killed renamable $x10, 808 :: (volatile store (s64) into %ir.1)
1307 name: load_large_offset_no_opt
1308 tracksRegLiveness: true
1313 ; RV32-LABEL: name: load_large_offset_no_opt
1314 ; RV32: liveins: $x10
1316 ; RV32-NEXT: dead renamable $x11 = LW renamable $x10, 400 :: (volatile load (s32) from %ir.0)
1317 ; RV32-NEXT: dead renamable $x10 = LW killed renamable $x10, 404 :: (volatile load (s32) from %ir.1)
1318 ; RV32-NEXT: PseudoRET
1320 ; RV64-LABEL: name: load_large_offset_no_opt
1321 ; RV64: liveins: $x10
1323 ; RV64-NEXT: dead renamable $x11 = LW renamable $x10, 400 :: (volatile load (s32) from %ir.0)
1324 ; RV64-NEXT: dead renamable $x10 = LW killed renamable $x10, 404 :: (volatile load (s32) from %ir.1)
1325 ; RV64-NEXT: PseudoRET
1326 dead renamable $x11 = LW renamable $x10, 400 :: (volatile load (s32) from %ir.0)
1327 dead renamable $x10 = LW killed renamable $x10, 404 :: (volatile load (s32) from %ir.1)
1332 name: load_large_offset_float_no_opt
1333 tracksRegLiveness: true
1338 ; RV32-LABEL: name: load_large_offset_float_no_opt
1339 ; RV32: liveins: $x10
1341 ; RV32-NEXT: renamable $f10_f = FLW renamable $x10, 400 :: (load (s32) from %ir.arrayidx)
1342 ; RV32-NEXT: renamable $f11_f = FLW killed renamable $x10, 404 :: (load (s32) from %ir.arrayidx1)
1343 ; RV32-NEXT: PseudoRET implicit $f10_f, implicit $f11_f
1345 ; RV64-LABEL: name: load_large_offset_float_no_opt
1346 ; RV64: liveins: $x10
1348 ; RV64-NEXT: renamable $f10_f = FLW renamable $x10, 400 :: (load (s32) from %ir.arrayidx)
1349 ; RV64-NEXT: renamable $f11_f = FLW killed renamable $x10, 404 :: (load (s32) from %ir.arrayidx1)
1350 ; RV64-NEXT: PseudoRET implicit $f10_f, implicit $f11_f
1351 renamable $f10_f = FLW renamable $x10, 400 :: (load (s32) from %ir.arrayidx)
1352 renamable $f11_f = FLW killed renamable $x10, 404 :: (load (s32) from %ir.arrayidx1)
1353 PseudoRET implicit $f10_f, implicit $f11_f
1357 name: load_large_offset_double_no_opt
1358 tracksRegLiveness: true
1363 ; RV32-LABEL: name: load_large_offset_double_no_opt
1364 ; RV32: liveins: $x10
1366 ; RV32-NEXT: renamable $f10_d = FLD renamable $x10, 800 :: (load (s64) from %ir.arrayidx)
1367 ; RV32-NEXT: renamable $f11_d = FLD killed renamable $x10, 808 :: (load (s64) from %ir.arrayidx1)
1368 ; RV32-NEXT: PseudoRET implicit $f10_d, implicit $f11_d
1370 ; RV64-LABEL: name: load_large_offset_double_no_opt
1371 ; RV64: liveins: $x10
1373 ; RV64-NEXT: renamable $f10_d = FLD renamable $x10, 800 :: (load (s64) from %ir.arrayidx)
1374 ; RV64-NEXT: renamable $f11_d = FLD killed renamable $x10, 808 :: (load (s64) from %ir.arrayidx1)
1375 ; RV64-NEXT: PseudoRET implicit $f10_d, implicit $f11_d
1376 renamable $f10_d = FLD renamable $x10, 800 :: (load (s64) from %ir.arrayidx)
1377 renamable $f11_d = FLD killed renamable $x10, 808 :: (load (s64) from %ir.arrayidx1)
1378 PseudoRET implicit $f10_d, implicit $f11_d