1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt -passes=newgvn -S %s | FileCheck %s
4 declare void @use.i16(ptr)
5 declare void @use.i32(i32)
7 ; Test cases from PR35074, where the simplification dependencies need to be
8 ; tracked for phi-of-ops root instructions.
10 define void @test1() {
11 ; CHECK-LABEL: @test1(
13 ; CHECK-NEXT: br label [[FOR_COND:%.*]]
15 ; CHECK-NEXT: [[PHIOFOPS:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[Y_0:%.*]], [[FOR_INC6:%.*]] ]
16 ; CHECK-NEXT: [[Y_0]] = phi i32 [ 1, [[ENTRY]] ], [ [[INC7:%.*]], [[FOR_INC6]] ]
17 ; CHECK-NEXT: br i1 undef, label [[FOR_INC6]], label [[FOR_BODY_LR_PH:%.*]]
18 ; CHECK: for.body.lr.ph:
19 ; CHECK-NEXT: br label [[FOR_BODY4:%.*]]
21 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[PHIOFOPS]], [[Y_0]]
22 ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_END:%.*]], label [[FOR_BODY4_1:%.*]]
24 ; CHECK-NEXT: ret void
26 ; CHECK-NEXT: [[INC7]] = add nuw nsw i32 [[Y_0]], 1
27 ; CHECK-NEXT: br label [[FOR_COND]]
29 ; CHECK-NEXT: [[INC_1:%.*]] = add nuw nsw i32 [[Y_0]], 1
30 ; CHECK-NEXT: tail call void @use.i32(i32 [[INC_1]])
31 ; CHECK-NEXT: br label [[FOR_END]]
36 for.cond: ; preds = %for.inc6, %entry
37 %y.0 = phi i32 [ 1, %entry ], [ %inc7, %for.inc6 ]
38 br i1 undef, label %for.inc6, label %for.body.lr.ph
40 for.body.lr.ph: ; preds = %for.cond
41 %sub = add nsw i32 %y.0, -1
44 for.body4: ; preds = %for.body.lr.ph
45 %cmp = icmp ugt i32 %sub, %y.0
46 br i1 %cmp, label %for.end, label %for.body4.1
48 for.end: ; preds = %for.body4.1, %for.body4
51 for.inc6: ; preds = %for.cond
52 %inc7 = add nuw nsw i32 %y.0, 1
55 for.body4.1: ; preds = %for.body4
56 %inc.1 = add nuw nsw i32 %y.0, 1
57 tail call void @use.i32(i32 %inc.1)
61 define void @test2(i1 %c, ptr %ptr, i64 %N) {
62 ; CHECK-LABEL: @test2(
64 ; CHECK-NEXT: br label [[HEADER:%.*]]
66 ; CHECK-NEXT: [[PHIOFOPS:%.*]] = phi i64 [ -1, [[ENTRY:%.*]] ], [ [[IV:%.*]], [[LATCH:%.*]] ]
67 ; CHECK-NEXT: [[IV]] = phi i64 [ [[IV_NEXT:%.*]], [[LATCH]] ], [ 0, [[ENTRY]] ]
68 ; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
70 ; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i64 [[IV]], 0
71 ; CHECK-NEXT: br i1 [[CMP1]], label [[LATCH]], label [[LOR_RHS:%.*]]
73 ; CHECK-NEXT: [[IV_ADD_1:%.*]] = add i64 [[IV]], 1
74 ; CHECK-NEXT: [[IDX_1:%.*]] = getelementptr inbounds i16, ptr [[PTR:%.*]], i64 [[IV_ADD_1]]
75 ; CHECK-NEXT: call void @use.i16(ptr [[IDX_1]])
76 ; CHECK-NEXT: ret void
78 ; CHECK-NEXT: [[IDX_2:%.*]] = getelementptr inbounds i16, ptr [[PTR]], i64 [[PHIOFOPS]]
79 ; CHECK-NEXT: call void @use.i16(ptr [[IDX_2]])
80 ; CHECK-NEXT: br label [[LATCH]]
82 ; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
83 ; CHECK-NEXT: [[EC:%.*]] = icmp ugt i64 [[IV_NEXT]], [[N:%.*]]
84 ; CHECK-NEXT: br i1 [[EC]], label [[HEADER]], label [[EXIT:%.*]]
86 ; CHECK-NEXT: ret void
91 header: ; preds = %for.inc, %entry
92 %iv = phi i64 [ %iv.next, %latch ], [ 0, %entry ]
93 br i1 %c, label %if.then, label %if.else
96 %cmp1 = icmp eq i64 %iv, 0
97 br i1 %cmp1, label %latch, label %lor.rhs
99 lor.rhs: ; preds = %if.then
100 %iv.add.1 = add i64 %iv, 1
101 %idx.1 = getelementptr inbounds i16, ptr %ptr, i64 %iv.add.1
102 call void @use.i16(ptr %idx.1)
106 %iv.sub.1 = add i64 %iv, -1
107 %idx.2 = getelementptr inbounds i16, ptr %ptr, i64 %iv.sub.1
108 call void @use.i16(ptr %idx.2)
112 %iv.next = add i64 %iv, 1
113 %ec = icmp ugt i64 %iv.next, %N
114 br i1 %ec, label %header, label %exit
120 define void @pr49873_cmp_simplification_dependency(ptr %ptr, i1 %c.0) {
121 ; CHECK-LABEL: @pr49873_cmp_simplification_dependency(
123 ; CHECK-NEXT: br label [[LOOP_1:%.*]]
125 ; CHECK-NEXT: br i1 [[C_0:%.*]], label [[LOOP_1_LATCH:%.*]], label [[LOOP_2:%.*]]
127 ; CHECK-NEXT: [[I130:%.*]] = phi i32 [ [[I132:%.*]], [[LOOP_2]] ], [ 0, [[LOOP_1]] ]
128 ; CHECK-NEXT: [[I132]] = add nuw i32 [[I130]], 1
129 ; CHECK-NEXT: [[I133:%.*]] = load i32, ptr [[PTR:%.*]], align 4
130 ; CHECK-NEXT: [[C_1:%.*]] = icmp ult i32 [[I132]], [[I133]]
131 ; CHECK-NEXT: br i1 [[C_1]], label [[LOOP_2]], label [[LOOP_2_EXIT:%.*]]
132 ; CHECK: loop.2.exit:
133 ; CHECK-NEXT: br label [[LOOP_1_LATCH]]
134 ; CHECK: loop.1.latch:
135 ; CHECK-NEXT: [[DOTLCSSA:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[I133]], [[LOOP_2_EXIT]] ]
136 ; CHECK-NEXT: [[C_2:%.*]] = icmp ult i32 1, [[DOTLCSSA]]
137 ; CHECK-NEXT: br i1 [[C_2]], label [[LOOP_1]], label [[EXIT:%.*]]
139 ; CHECK-NEXT: ret void
145 %i65 = add nuw i32 0, 1
146 br i1 %c.0, label %loop.1.latch, label %loop.2
149 %i130 = phi i32 [ %i132, %loop.2 ], [ 0, %loop.1 ]
150 %i132 = add nuw i32 %i130, 1
151 %i133 = load i32, ptr %ptr, align 4
152 %c.1 = icmp ult i32 %i132, %i133
153 br i1 %c.1, label %loop.2, label %loop.2.exit
156 br label %loop.1.latch
158 loop.1.latch: ; preds = %loop.2.exit, %loop.1
159 %.lcssa = phi i32 [ 0, %loop.1 ], [ %i133, %loop.2.exit ]
160 %c.2 = icmp ult i32 %i65, %.lcssa
161 br i1 %c.2, label %loop.1, label %exit