1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // Test target codegen - host bc file has to be created first.
3 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc
4 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck --check-prefixes=CHECK-64 %s
5 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc
6 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck --check-prefixes=CHECK-32 %s
7 // RUN: %clang_cc1 -verify -fopenmp -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck --check-prefixes=CHECK-32-EX %s
8 // expected-no-diagnostics
15 #pragma omp target teams distribute parallel for simd if(a)
16 for (int i
= 0; i
< 10; ++i
)
18 #pragma omp target teams distribute parallel for simd schedule(static)
19 for (int i
= 0; i
< 10; ++i
)
21 #pragma omp target teams distribute parallel for simd schedule(static, 1)
22 for (int i
= 0; i
< 10; ++i
)
24 #pragma omp target teams distribute parallel for simd schedule(auto)
25 for (int i
= 0; i
< 10; ++i
)
27 #pragma omp target teams distribute parallel for simd schedule(runtime)
28 for (int i
= 0; i
< 10; ++i
)
30 #pragma omp target teams distribute parallel for simd schedule(dynamic)
31 for (int i
= 0; i
< 10; ++i
)
33 #pragma omp target teams distribute parallel for simd schedule(guided)
34 for (int i
= 0; i
< 10; ++i
)
37 #pragma omp target teams distribute parallel for lastprivate(a)
38 for (int i
= 0; i
< 10; ++i
)
40 #pragma omp target teams distribute parallel for schedule(static)
41 for (int i
= 0; i
< 10; ++i
)
43 #pragma omp target teams distribute parallel for schedule(static, 1)
44 for (int i
= 0; i
< 10; ++i
)
46 #pragma omp target teams distribute parallel for schedule(auto)
47 for (int i
= 0; i
< 10; ++i
)
49 #pragma omp target teams distribute parallel for schedule(runtime)
50 for (int i
= 0; i
< 10; ++i
)
52 #pragma omp target teams distribute parallel for schedule(dynamic)
53 for (int i
= 0; i
< 10; ++i
)
55 #pragma omp target teams distribute parallel for schedule(guided)
56 for (int i
= 0; i
< 10; ++i
)
58 #pragma omp target teams
61 #pragma omp distribute parallel for simd
62 for (int i
= 0; i
< 10; ++i
)
66 #pragma omp target teams
68 int b
[] = {2, 3, sizeof(int)};
69 #pragma omp distribute parallel for simd schedule(static)
70 for (int i
= 0; i
< 10; ++i
)
73 #pragma omp target teams
76 #pragma omp distribute parallel for simd schedule(static, 1)
77 for (int i
= 0; i
< 10; ++i
)
81 #pragma omp target teams
82 #pragma omp distribute parallel for simd schedule(auto)
83 for (int i
= 0; i
< 10; ++i
)
85 #pragma omp target teams
86 #pragma omp distribute parallel for simd schedule(runtime)
87 for (int i
= 0; i
< 10; ++i
)
89 #pragma omp target teams
90 #pragma omp distribute parallel for simd schedule(dynamic)
91 for (int i
= 0; i
< 10; ++i
)
93 #pragma omp target teams
94 #pragma omp distribute parallel for simd schedule(guided)
95 for (int i
= 0; i
< 10; ++i
)
97 #pragma omp target teams
98 #pragma omp distribute parallel for
99 for (int i
= 0; i
< 10; ++i
)
101 #pragma omp target teams
102 #pragma omp distribute parallel for schedule(static)
103 for (int i
= 0; i
< 10; ++i
)
105 #pragma omp target teams
106 #pragma omp distribute parallel for schedule(static, 1)
107 for (int i
= 0; i
< 10; ++i
)
109 #pragma omp target teams
110 #pragma omp distribute parallel for schedule(auto)
111 for (int i
= 0; i
< 10; ++i
)
113 #pragma omp target teams
114 #pragma omp distribute parallel for schedule(runtime)
115 for (int i
= 0; i
< 10; ++i
)
117 #pragma omp target teams
118 #pragma omp distribute parallel for schedule(dynamic)
119 for (int i
= 0; i
< 10; ++i
)
121 #pragma omp target teams
122 #pragma omp distribute parallel for schedule(guided)
123 for (int i
= 0; i
< 10; ++i
)
127 #pragma omp distribute parallel for
128 for (int i
= 0; i
< 10; ++i
)
132 #pragma omp distribute parallel for schedule(static)
133 for (int i
= 0; i
< 10; ++i
)
137 #pragma omp distribute parallel for schedule(static, 1)
138 for (int i
= 0; i
< 10; ++i
)
142 #pragma omp distribute parallel for schedule(auto)
143 for (int i
= 0; i
< 10; ++i
)
147 #pragma omp distribute parallel for schedule(runtime)
148 for (int i
= 0; i
< 10; ++i
)
152 #pragma omp distribute parallel for schedule(dynamic)
153 for (int i
= 0; i
< 10; ++i
)
157 #pragma omp distribute parallel for schedule(guided)
158 for (int i
= 0; i
< 10; ++i
)
160 #pragma omp target parallel for if(a)
161 for (int i
= 0; i
< 10; ++i
)
163 #pragma omp target parallel for schedule(static)
164 for (int i
= 0; i
< 10; ++i
)
166 #pragma omp target parallel for schedule(static, 1)
167 for (int i
= 0; i
< 10; ++i
)
169 #pragma omp target parallel for schedule(auto)
170 for (int i
= 0; i
< 10; ++i
)
172 #pragma omp target parallel for schedule(runtime)
173 for (int i
= 0; i
< 10; ++i
)
175 #pragma omp target parallel for schedule(dynamic)
176 for (int i
= 0; i
< 10; ++i
)
178 #pragma omp target parallel for schedule(guided)
179 for (int i
= 0; i
< 10; ++i
)
181 #pragma omp target parallel if(a)
183 for (int i
= 0; i
< 10; ++i
)
185 #pragma omp target parallel
186 #pragma omp for simd schedule(static)
187 for (int i
= 0; i
< 10; ++i
)
189 #pragma omp target parallel
190 #pragma omp for simd schedule(static, 1)
191 for (int i
= 0; i
< 10; ++i
)
193 #pragma omp target parallel
194 #pragma omp for simd schedule(auto)
195 for (int i
= 0; i
< 10; ++i
)
197 #pragma omp target parallel
198 #pragma omp for simd schedule(runtime)
199 for (int i
= 0; i
< 10; ++i
)
201 #pragma omp target parallel
202 #pragma omp for simd schedule(dynamic)
203 for (int i
= 0; i
< 10; ++i
)
205 #pragma omp target parallel
206 #pragma omp for simd schedule(guided)
207 for (int i
= 0; i
< 10; ++i
)
211 #pragma omp for simd ordered
212 for (int i
= 0; i
< 10; ++i
)
216 #pragma omp for simd schedule(static)
217 for (int i
= 0; i
< 10; ++i
)
221 #pragma omp for simd schedule(static, 1)
222 for (int i
= 0; i
< 10; ++i
)
226 #pragma omp for simd schedule(auto)
227 for (int i
= 0; i
< 10; ++i
)
231 #pragma omp for simd schedule(runtime)
232 for (int i
= 0; i
< 10; ++i
)
236 #pragma omp for simd schedule(dynamic)
237 for (int i
= 0; i
< 10; ++i
)
241 #pragma omp for simd schedule(guided)
242 for (int i
= 0; i
< 10; ++i
)
245 #pragma omp parallel for
246 for (int i
= 0; i
< 10; ++i
)
249 #pragma omp parallel for schedule(static)
250 for (int i
= 0; i
< 10; ++i
)
253 #pragma omp parallel for schedule(static, 1)
254 for (int i
= 0; i
< 10; ++i
)
257 #pragma omp parallel for schedule(auto)
258 for (int i
= 0; i
< 10; ++i
)
261 #pragma omp parallel for schedule(runtime)
262 for (int i
= 0; i
< 10; ++i
)
265 #pragma omp parallel for schedule(dynamic)
266 for (int i
= 0; i
< 10; ++i
)
269 #pragma omp parallel for schedule(guided)
270 for (int i
= 0; i
< 10; ++i
)
275 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15
276 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] {
277 // CHECK-64-NEXT: entry:
278 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
279 // CHECK-64-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
280 // CHECK-64-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
281 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
282 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
283 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
284 // CHECK-64-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
285 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_kernel_environment, ptr [[DYN_PTR]])
286 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
287 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
288 // CHECK-64: user_code.entry:
289 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
290 // CHECK-64-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
291 // CHECK-64-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
292 // CHECK-64-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
293 // CHECK-64-NEXT: store i8 [[FROMBOOL]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
294 // CHECK-64-NEXT: [[TMP3:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
295 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
296 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
297 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i64 [[TMP3]]) #[[ATTR2:[0-9]+]]
298 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
299 // CHECK-64-NEXT: ret void
300 // CHECK-64: worker.exit:
301 // CHECK-64-NEXT: ret void
304 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined
305 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] {
306 // CHECK-64-NEXT: entry:
307 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
308 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
309 // CHECK-64-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
310 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
311 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
312 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
313 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
314 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
315 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
316 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
317 // CHECK-64-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
318 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x ptr], align 8
319 // CHECK-64-NEXT: [[DOTCAPTURE_EXPR__CASTED15:%.*]] = alloca i64, align 8
320 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS17:%.*]] = alloca [3 x ptr], align 8
321 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
322 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
323 // CHECK-64-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
324 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
325 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
326 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
327 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
328 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
329 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
330 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
331 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
332 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
333 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
334 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
335 // CHECK-64: cond.true:
336 // CHECK-64-NEXT: br label [[COND_END:%.*]]
337 // CHECK-64: cond.false:
338 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
339 // CHECK-64-NEXT: br label [[COND_END]]
340 // CHECK-64: cond.end:
341 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
342 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
343 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
344 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
345 // CHECK-64-NEXT: [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
346 // CHECK-64-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP5]] to i1
347 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
348 // CHECK-64: omp_if.then:
349 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
350 // CHECK-64: omp.inner.for.cond:
351 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP221:![0-9]+]]
352 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
353 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
354 // CHECK-64: omp.inner.for.body:
355 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP221]]
356 // CHECK-64-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
357 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP221]]
358 // CHECK-64-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
359 // CHECK-64-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP221]]
360 // CHECK-64-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP11]] to i1
361 // CHECK-64-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL2]] to i8
362 // CHECK-64-NEXT: store i8 [[FROMBOOL]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1, !llvm.access.group [[ACC_GRP221]]
363 // CHECK-64-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP221]]
364 // CHECK-64-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
365 // CHECK-64-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP8]] to ptr
366 // CHECK-64-NEXT: store ptr [[TMP14]], ptr [[TMP13]], align 8, !llvm.access.group [[ACC_GRP221]]
367 // CHECK-64-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
368 // CHECK-64-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP10]] to ptr
369 // CHECK-64-NEXT: store ptr [[TMP16]], ptr [[TMP15]], align 8, !llvm.access.group [[ACC_GRP221]]
370 // CHECK-64-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
371 // CHECK-64-NEXT: [[TMP18:%.*]] = inttoptr i64 [[TMP12]] to ptr
372 // CHECK-64-NEXT: store ptr [[TMP18]], ptr [[TMP17]], align 8, !llvm.access.group [[ACC_GRP221]]
373 // CHECK-64-NEXT: [[TMP19:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP221]]
374 // CHECK-64-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP19]] to i1
375 // CHECK-64-NEXT: [[TMP20:%.*]] = zext i1 [[TOBOOL3]] to i32
376 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP20]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 3), !llvm.access.group [[ACC_GRP221]]
377 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
378 // CHECK-64: omp.inner.for.inc:
379 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP221]]
380 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP221]]
381 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
382 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP221]]
383 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP221]]
384 // CHECK-64-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP221]]
385 // CHECK-64-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
386 // CHECK-64-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP221]]
387 // CHECK-64-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP221]]
388 // CHECK-64-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP221]]
389 // CHECK-64-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
390 // CHECK-64-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP221]]
391 // CHECK-64-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP221]]
392 // CHECK-64-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP27]], 9
393 // CHECK-64-NEXT: br i1 [[CMP6]], label [[COND_TRUE7:%.*]], label [[COND_FALSE8:%.*]]
394 // CHECK-64: cond.true7:
395 // CHECK-64-NEXT: br label [[COND_END9:%.*]]
396 // CHECK-64: cond.false8:
397 // CHECK-64-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP221]]
398 // CHECK-64-NEXT: br label [[COND_END9]]
399 // CHECK-64: cond.end9:
400 // CHECK-64-NEXT: [[COND10:%.*]] = phi i32 [ 9, [[COND_TRUE7]] ], [ [[TMP28]], [[COND_FALSE8]] ]
401 // CHECK-64-NEXT: store i32 [[COND10]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP221]]
402 // CHECK-64-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP221]]
403 // CHECK-64-NEXT: store i32 [[TMP29]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP221]]
404 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP222:![0-9]+]]
405 // CHECK-64: omp.inner.for.end:
406 // CHECK-64-NEXT: br label [[OMP_IF_END:%.*]]
407 // CHECK-64: omp_if.else:
408 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND11:%.*]]
409 // CHECK-64: omp.inner.for.cond11:
410 // CHECK-64-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
411 // CHECK-64-NEXT: [[CMP12:%.*]] = icmp slt i32 [[TMP30]], 10
412 // CHECK-64-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY13:%.*]], label [[OMP_INNER_FOR_END28:%.*]]
413 // CHECK-64: omp.inner.for.body13:
414 // CHECK-64-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
415 // CHECK-64-NEXT: [[TMP32:%.*]] = zext i32 [[TMP31]] to i64
416 // CHECK-64-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
417 // CHECK-64-NEXT: [[TMP34:%.*]] = zext i32 [[TMP33]] to i64
418 // CHECK-64-NEXT: [[TMP35:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
419 // CHECK-64-NEXT: [[TOBOOL14:%.*]] = trunc i8 [[TMP35]] to i1
420 // CHECK-64-NEXT: [[FROMBOOL16:%.*]] = zext i1 [[TOBOOL14]] to i8
421 // CHECK-64-NEXT: store i8 [[FROMBOOL16]], ptr [[DOTCAPTURE_EXPR__CASTED15]], align 1
422 // CHECK-64-NEXT: [[TMP36:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED15]], align 8
423 // CHECK-64-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS17]], i64 0, i64 0
424 // CHECK-64-NEXT: [[TMP38:%.*]] = inttoptr i64 [[TMP32]] to ptr
425 // CHECK-64-NEXT: store ptr [[TMP38]], ptr [[TMP37]], align 8
426 // CHECK-64-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS17]], i64 0, i64 1
427 // CHECK-64-NEXT: [[TMP40:%.*]] = inttoptr i64 [[TMP34]] to ptr
428 // CHECK-64-NEXT: store ptr [[TMP40]], ptr [[TMP39]], align 8
429 // CHECK-64-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS17]], i64 0, i64 2
430 // CHECK-64-NEXT: [[TMP42:%.*]] = inttoptr i64 [[TMP36]] to ptr
431 // CHECK-64-NEXT: store ptr [[TMP42]], ptr [[TMP41]], align 8
432 // CHECK-64-NEXT: [[TMP43:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
433 // CHECK-64-NEXT: [[TOBOOL18:%.*]] = trunc i8 [[TMP43]] to i1
434 // CHECK-64-NEXT: [[TMP44:%.*]] = zext i1 [[TOBOOL18]] to i32
435 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP44]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined_omp_outlined1, ptr null, ptr [[CAPTURED_VARS_ADDRS17]], i64 3)
436 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]
437 // CHECK-64: omp.inner.for.inc19:
438 // CHECK-64-NEXT: [[TMP45:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
439 // CHECK-64-NEXT: [[TMP46:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
440 // CHECK-64-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP45]], [[TMP46]]
441 // CHECK-64-NEXT: store i32 [[ADD20]], ptr [[DOTOMP_IV]], align 4
442 // CHECK-64-NEXT: [[TMP47:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
443 // CHECK-64-NEXT: [[TMP48:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
444 // CHECK-64-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP47]], [[TMP48]]
445 // CHECK-64-NEXT: store i32 [[ADD21]], ptr [[DOTOMP_COMB_LB]], align 4
446 // CHECK-64-NEXT: [[TMP49:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
447 // CHECK-64-NEXT: [[TMP50:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
448 // CHECK-64-NEXT: [[ADD22:%.*]] = add nsw i32 [[TMP49]], [[TMP50]]
449 // CHECK-64-NEXT: store i32 [[ADD22]], ptr [[DOTOMP_COMB_UB]], align 4
450 // CHECK-64-NEXT: [[TMP51:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
451 // CHECK-64-NEXT: [[CMP23:%.*]] = icmp sgt i32 [[TMP51]], 9
452 // CHECK-64-NEXT: br i1 [[CMP23]], label [[COND_TRUE24:%.*]], label [[COND_FALSE25:%.*]]
453 // CHECK-64: cond.true24:
454 // CHECK-64-NEXT: br label [[COND_END26:%.*]]
455 // CHECK-64: cond.false25:
456 // CHECK-64-NEXT: [[TMP52:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
457 // CHECK-64-NEXT: br label [[COND_END26]]
458 // CHECK-64: cond.end26:
459 // CHECK-64-NEXT: [[COND27:%.*]] = phi i32 [ 9, [[COND_TRUE24]] ], [ [[TMP52]], [[COND_FALSE25]] ]
460 // CHECK-64-NEXT: store i32 [[COND27]], ptr [[DOTOMP_COMB_UB]], align 4
461 // CHECK-64-NEXT: [[TMP53:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
462 // CHECK-64-NEXT: store i32 [[TMP53]], ptr [[DOTOMP_IV]], align 4
463 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND11]], !llvm.loop [[LOOP225:![0-9]+]]
464 // CHECK-64: omp.inner.for.end28:
465 // CHECK-64-NEXT: br label [[OMP_IF_END]]
466 // CHECK-64: omp_if.end:
467 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
468 // CHECK-64: omp.loop.exit:
469 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
470 // CHECK-64-NEXT: [[TMP54:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
471 // CHECK-64-NEXT: [[TMP55:%.*]] = icmp ne i32 [[TMP54]], 0
472 // CHECK-64-NEXT: br i1 [[TMP55]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
473 // CHECK-64: .omp.final.then:
474 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
475 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
476 // CHECK-64: .omp.final.done:
477 // CHECK-64-NEXT: ret void
480 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined_omp_outlined
481 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
482 // CHECK-64-NEXT: entry:
483 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
484 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
485 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
486 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
487 // CHECK-64-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
488 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
489 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
490 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
491 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
492 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
493 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
494 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
495 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
496 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
497 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
498 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
499 // CHECK-64-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
500 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
501 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
502 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
503 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
504 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
505 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
506 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
507 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
508 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
509 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
510 // CHECK-64-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
511 // CHECK-64-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
512 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
513 // CHECK-64: omp_if.then:
514 // CHECK-64-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
515 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
516 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
517 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
518 // CHECK-64-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
519 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
520 // CHECK-64: omp.inner.for.cond:
521 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP227:![0-9]+]]
522 // CHECK-64-NEXT: [[CONV2:%.*]] = sext i32 [[TMP6]] to i64
523 // CHECK-64-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8, !llvm.access.group [[ACC_GRP227]]
524 // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP7]]
525 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
526 // CHECK-64: omp.inner.for.body:
527 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP227]]
528 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
529 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
530 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP227]]
531 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
532 // CHECK-64: omp.body.continue:
533 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
534 // CHECK-64: omp.inner.for.inc:
535 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP227]]
536 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP227]]
537 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
538 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP227]]
539 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP228:![0-9]+]]
540 // CHECK-64: omp.inner.for.end:
541 // CHECK-64-NEXT: br label [[OMP_IF_END:%.*]]
542 // CHECK-64: omp_if.else:
543 // CHECK-64-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
544 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
545 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
546 // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
547 // CHECK-64-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
548 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND4:%.*]]
549 // CHECK-64: omp.inner.for.cond4:
550 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
551 // CHECK-64-NEXT: [[CONV5:%.*]] = sext i32 [[TMP14]] to i64
552 // CHECK-64-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
553 // CHECK-64-NEXT: [[CMP6:%.*]] = icmp ule i64 [[CONV5]], [[TMP15]]
554 // CHECK-64-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY7:%.*]], label [[OMP_INNER_FOR_END13:%.*]]
555 // CHECK-64: omp.inner.for.body7:
556 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
557 // CHECK-64-NEXT: [[MUL8:%.*]] = mul nsw i32 [[TMP16]], 1
558 // CHECK-64-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
559 // CHECK-64-NEXT: store i32 [[ADD9]], ptr [[I]], align 4
560 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE10:%.*]]
561 // CHECK-64: omp.body.continue10:
562 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC11:%.*]]
563 // CHECK-64: omp.inner.for.inc11:
564 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
565 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
566 // CHECK-64-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
567 // CHECK-64-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4
568 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND4]], !llvm.loop [[LOOP230:![0-9]+]]
569 // CHECK-64: omp.inner.for.end13:
570 // CHECK-64-NEXT: br label [[OMP_IF_END]]
571 // CHECK-64: omp_if.end:
572 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
573 // CHECK-64: omp.loop.exit:
574 // CHECK-64-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
575 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
576 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP20]])
577 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
578 // CHECK-64-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
579 // CHECK-64-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
580 // CHECK-64: .omp.final.then:
581 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
582 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
583 // CHECK-64: .omp.final.done:
584 // CHECK-64-NEXT: ret void
587 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined_omp_outlined1
588 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
589 // CHECK-64-NEXT: entry:
590 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
591 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
592 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
593 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
594 // CHECK-64-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
595 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
596 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
597 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
598 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
599 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
600 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
601 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
602 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
603 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
604 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
605 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
606 // CHECK-64-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
607 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
608 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
609 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
610 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
611 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
612 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
613 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
614 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
615 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
616 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
617 // CHECK-64-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
618 // CHECK-64-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
619 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
620 // CHECK-64: omp_if.then:
621 // CHECK-64-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
622 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
623 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
624 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
625 // CHECK-64-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
626 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
627 // CHECK-64: omp.inner.for.cond:
628 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231:![0-9]+]]
629 // CHECK-64-NEXT: [[CONV2:%.*]] = sext i32 [[TMP6]] to i64
630 // CHECK-64-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8, !llvm.access.group [[ACC_GRP231]]
631 // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP7]]
632 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
633 // CHECK-64: omp.inner.for.body:
634 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231]]
635 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
636 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
637 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP231]]
638 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
639 // CHECK-64: omp.body.continue:
640 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
641 // CHECK-64: omp.inner.for.inc:
642 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231]]
643 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP231]]
644 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
645 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231]]
646 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP232:![0-9]+]]
647 // CHECK-64: omp.inner.for.end:
648 // CHECK-64-NEXT: br label [[OMP_IF_END:%.*]]
649 // CHECK-64: omp_if.else:
650 // CHECK-64-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
651 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
652 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
653 // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
654 // CHECK-64-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
655 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND4:%.*]]
656 // CHECK-64: omp.inner.for.cond4:
657 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
658 // CHECK-64-NEXT: [[CONV5:%.*]] = sext i32 [[TMP14]] to i64
659 // CHECK-64-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
660 // CHECK-64-NEXT: [[CMP6:%.*]] = icmp ule i64 [[CONV5]], [[TMP15]]
661 // CHECK-64-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY7:%.*]], label [[OMP_INNER_FOR_END13:%.*]]
662 // CHECK-64: omp.inner.for.body7:
663 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
664 // CHECK-64-NEXT: [[MUL8:%.*]] = mul nsw i32 [[TMP16]], 1
665 // CHECK-64-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
666 // CHECK-64-NEXT: store i32 [[ADD9]], ptr [[I]], align 4
667 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE10:%.*]]
668 // CHECK-64: omp.body.continue10:
669 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC11:%.*]]
670 // CHECK-64: omp.inner.for.inc11:
671 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
672 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
673 // CHECK-64-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
674 // CHECK-64-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4
675 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND4]], !llvm.loop [[LOOP234:![0-9]+]]
676 // CHECK-64: omp.inner.for.end13:
677 // CHECK-64-NEXT: br label [[OMP_IF_END]]
678 // CHECK-64: omp_if.end:
679 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
680 // CHECK-64: omp.loop.exit:
681 // CHECK-64-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
682 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
683 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP20]])
684 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
685 // CHECK-64-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
686 // CHECK-64-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
687 // CHECK-64: .omp.final.then:
688 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
689 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
690 // CHECK-64: .omp.final.done:
691 // CHECK-64-NEXT: ret void
694 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18
695 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
696 // CHECK-64-NEXT: entry:
697 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
698 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
699 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
700 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
701 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18_kernel_environment, ptr [[DYN_PTR]])
702 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
703 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
704 // CHECK-64: user_code.entry:
705 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
706 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
707 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
708 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
709 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
710 // CHECK-64-NEXT: ret void
711 // CHECK-64: worker.exit:
712 // CHECK-64-NEXT: ret void
715 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18_omp_outlined
716 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
717 // CHECK-64-NEXT: entry:
718 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
719 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
720 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
721 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
722 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
723 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
724 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
725 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
726 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
727 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
728 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
729 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
730 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
731 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
732 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
733 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
734 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
735 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
736 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
737 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
738 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
739 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
740 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
741 // CHECK-64: cond.true:
742 // CHECK-64-NEXT: br label [[COND_END:%.*]]
743 // CHECK-64: cond.false:
744 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
745 // CHECK-64-NEXT: br label [[COND_END]]
746 // CHECK-64: cond.end:
747 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
748 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
749 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
750 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
751 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
752 // CHECK-64: omp.inner.for.cond:
753 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP235:![0-9]+]]
754 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
755 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
756 // CHECK-64: omp.inner.for.body:
757 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP235]]
758 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
759 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP235]]
760 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
761 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
762 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
763 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8, !llvm.access.group [[ACC_GRP235]]
764 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
765 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
766 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8, !llvm.access.group [[ACC_GRP235]]
767 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2), !llvm.access.group [[ACC_GRP235]]
768 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
769 // CHECK-64: omp.inner.for.inc:
770 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP235]]
771 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP235]]
772 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
773 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP235]]
774 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP235]]
775 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP235]]
776 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
777 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP235]]
778 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP235]]
779 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP235]]
780 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
781 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP235]]
782 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP235]]
783 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
784 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
785 // CHECK-64: cond.true5:
786 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
787 // CHECK-64: cond.false6:
788 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP235]]
789 // CHECK-64-NEXT: br label [[COND_END7]]
790 // CHECK-64: cond.end7:
791 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
792 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP235]]
793 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP235]]
794 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP235]]
795 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP236:![0-9]+]]
796 // CHECK-64: omp.inner.for.end:
797 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
798 // CHECK-64: omp.loop.exit:
799 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
800 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
801 // CHECK-64-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
802 // CHECK-64-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
803 // CHECK-64: .omp.final.then:
804 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
805 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
806 // CHECK-64: .omp.final.done:
807 // CHECK-64-NEXT: ret void
810 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18_omp_outlined_omp_outlined
811 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
812 // CHECK-64-NEXT: entry:
813 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
814 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
815 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
816 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
817 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
818 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
819 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
820 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
821 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
822 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
823 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
824 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
825 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
826 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
827 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
828 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
829 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
830 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
831 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
832 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
833 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
834 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
835 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
836 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
837 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
838 // CHECK-64-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
839 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
840 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
841 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
842 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9
843 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
844 // CHECK-64: cond.true:
845 // CHECK-64-NEXT: br label [[COND_END:%.*]]
846 // CHECK-64: cond.false:
847 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
848 // CHECK-64-NEXT: br label [[COND_END]]
849 // CHECK-64: cond.end:
850 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
851 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
852 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
853 // CHECK-64-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
854 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
855 // CHECK-64: omp.inner.for.cond:
856 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP238:![0-9]+]]
857 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP238]]
858 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
859 // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
860 // CHECK-64: omp.inner.for.body:
861 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP238]]
862 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
863 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
864 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP238]]
865 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
866 // CHECK-64: omp.body.continue:
867 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
868 // CHECK-64: omp.inner.for.inc:
869 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP238]]
870 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
871 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP238]]
872 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP239:![0-9]+]]
873 // CHECK-64: omp.inner.for.end:
874 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
875 // CHECK-64: omp.loop.exit:
876 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
877 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
878 // CHECK-64-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
879 // CHECK-64-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
880 // CHECK-64: .omp.final.then:
881 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
882 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
883 // CHECK-64: .omp.final.done:
884 // CHECK-64-NEXT: ret void
887 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21
888 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
889 // CHECK-64-NEXT: entry:
890 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
891 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
892 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
893 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
894 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21_kernel_environment, ptr [[DYN_PTR]])
895 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
896 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
897 // CHECK-64: user_code.entry:
898 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
899 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
900 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
901 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
902 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
903 // CHECK-64-NEXT: ret void
904 // CHECK-64: worker.exit:
905 // CHECK-64-NEXT: ret void
908 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21_omp_outlined
909 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
910 // CHECK-64-NEXT: entry:
911 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
912 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
913 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
914 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
915 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
916 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
917 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
918 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
919 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
920 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
921 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
922 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
923 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
924 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
925 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
926 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
927 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
928 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
929 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
930 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
931 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
932 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
933 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
934 // CHECK-64: cond.true:
935 // CHECK-64-NEXT: br label [[COND_END:%.*]]
936 // CHECK-64: cond.false:
937 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
938 // CHECK-64-NEXT: br label [[COND_END]]
939 // CHECK-64: cond.end:
940 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
941 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
942 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
943 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
944 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
945 // CHECK-64: omp.inner.for.cond:
946 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP241:![0-9]+]]
947 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
948 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
949 // CHECK-64: omp.inner.for.body:
950 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP241]]
951 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
952 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP241]]
953 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
954 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
955 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
956 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8, !llvm.access.group [[ACC_GRP241]]
957 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
958 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
959 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8, !llvm.access.group [[ACC_GRP241]]
960 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2), !llvm.access.group [[ACC_GRP241]]
961 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
962 // CHECK-64: omp.inner.for.inc:
963 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP241]]
964 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP241]]
965 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
966 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP241]]
967 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP241]]
968 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP241]]
969 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
970 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP241]]
971 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP241]]
972 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP241]]
973 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
974 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP241]]
975 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP241]]
976 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
977 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
978 // CHECK-64: cond.true5:
979 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
980 // CHECK-64: cond.false6:
981 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP241]]
982 // CHECK-64-NEXT: br label [[COND_END7]]
983 // CHECK-64: cond.end7:
984 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
985 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP241]]
986 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP241]]
987 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP241]]
988 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP242:![0-9]+]]
989 // CHECK-64: omp.inner.for.end:
990 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
991 // CHECK-64: omp.loop.exit:
992 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
993 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
994 // CHECK-64-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
995 // CHECK-64-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
996 // CHECK-64: .omp.final.then:
997 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
998 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
999 // CHECK-64: .omp.final.done:
1000 // CHECK-64-NEXT: ret void
1003 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21_omp_outlined_omp_outlined
1004 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1005 // CHECK-64-NEXT: entry:
1006 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1007 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1008 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1009 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1010 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1011 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
1012 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1013 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1014 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1015 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1016 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
1017 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1018 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1019 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1020 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1021 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1022 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
1023 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1024 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1025 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1026 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1027 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1028 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1029 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1030 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1031 // CHECK-64-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1032 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
1033 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1034 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1035 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1036 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1037 // CHECK-64: omp.inner.for.cond:
1038 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP244:![0-9]+]]
1039 // CHECK-64-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64
1040 // CHECK-64-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8, !llvm.access.group [[ACC_GRP244]]
1041 // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP6]]
1042 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1043 // CHECK-64: omp.inner.for.body:
1044 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP244]]
1045 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
1046 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1047 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP244]]
1048 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1049 // CHECK-64: omp.body.continue:
1050 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1051 // CHECK-64: omp.inner.for.inc:
1052 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP244]]
1053 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP244]]
1054 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
1055 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP244]]
1056 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP245:![0-9]+]]
1057 // CHECK-64: omp.inner.for.end:
1058 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1059 // CHECK-64: omp.loop.exit:
1060 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
1061 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1062 // CHECK-64-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
1063 // CHECK-64-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1064 // CHECK-64: .omp.final.then:
1065 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
1066 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
1067 // CHECK-64: .omp.final.done:
1068 // CHECK-64-NEXT: ret void
1071 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24
1072 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
1073 // CHECK-64-NEXT: entry:
1074 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
1075 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
1076 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1077 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
1078 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24_kernel_environment, ptr [[DYN_PTR]])
1079 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
1080 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
1081 // CHECK-64: user_code.entry:
1082 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
1083 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
1084 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
1085 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
1086 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
1087 // CHECK-64-NEXT: ret void
1088 // CHECK-64: worker.exit:
1089 // CHECK-64-NEXT: ret void
1092 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24_omp_outlined
1093 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1094 // CHECK-64-NEXT: entry:
1095 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1096 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1097 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1098 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
1099 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1100 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1101 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1102 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1103 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
1104 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
1105 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1106 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1107 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1108 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
1109 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1110 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1111 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
1112 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1113 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1114 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
1115 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1116 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
1117 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1118 // CHECK-64: cond.true:
1119 // CHECK-64-NEXT: br label [[COND_END:%.*]]
1120 // CHECK-64: cond.false:
1121 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1122 // CHECK-64-NEXT: br label [[COND_END]]
1123 // CHECK-64: cond.end:
1124 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1125 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1126 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1127 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1128 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1129 // CHECK-64: omp.inner.for.cond:
1130 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP247:![0-9]+]]
1131 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
1132 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1133 // CHECK-64: omp.inner.for.body:
1134 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP247]]
1135 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
1136 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP247]]
1137 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1138 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
1139 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
1140 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8, !llvm.access.group [[ACC_GRP247]]
1141 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
1142 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
1143 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8, !llvm.access.group [[ACC_GRP247]]
1144 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2), !llvm.access.group [[ACC_GRP247]]
1145 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1146 // CHECK-64: omp.inner.for.inc:
1147 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP247]]
1148 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP247]]
1149 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
1150 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP247]]
1151 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP247]]
1152 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP247]]
1153 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
1154 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP247]]
1155 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP247]]
1156 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP247]]
1157 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1158 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP247]]
1159 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP247]]
1160 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
1161 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
1162 // CHECK-64: cond.true5:
1163 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
1164 // CHECK-64: cond.false6:
1165 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP247]]
1166 // CHECK-64-NEXT: br label [[COND_END7]]
1167 // CHECK-64: cond.end7:
1168 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
1169 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP247]]
1170 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP247]]
1171 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP247]]
1172 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP248:![0-9]+]]
1173 // CHECK-64: omp.inner.for.end:
1174 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1175 // CHECK-64: omp.loop.exit:
1176 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
1177 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1178 // CHECK-64-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1179 // CHECK-64-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1180 // CHECK-64: .omp.final.then:
1181 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
1182 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
1183 // CHECK-64: .omp.final.done:
1184 // CHECK-64-NEXT: ret void
1187 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24_omp_outlined_omp_outlined
1188 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1189 // CHECK-64-NEXT: entry:
1190 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1191 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1192 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1193 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1194 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1195 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
1196 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1197 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1198 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1199 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1200 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
1201 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1202 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1203 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1204 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1205 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1206 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
1207 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1208 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1209 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1210 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1211 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1212 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1213 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1214 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1215 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1216 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1217 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1218 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
1219 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
1220 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1221 // CHECK-64: omp.dispatch.cond:
1222 // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
1223 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
1224 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1225 // CHECK-64: omp.dispatch.body:
1226 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1227 // CHECK-64-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
1228 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1229 // CHECK-64: omp.inner.for.cond:
1230 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP250:![0-9]+]]
1231 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP250]]
1232 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1233 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1234 // CHECK-64: omp.inner.for.body:
1235 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP250]]
1236 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1237 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1238 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP250]]
1239 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1240 // CHECK-64: omp.body.continue:
1241 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1242 // CHECK-64: omp.inner.for.inc:
1243 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP250]]
1244 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
1245 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP250]]
1246 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP251:![0-9]+]]
1247 // CHECK-64: omp.inner.for.end:
1248 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1249 // CHECK-64: omp.dispatch.inc:
1250 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
1251 // CHECK-64: omp.dispatch.end:
1252 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
1253 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1254 // CHECK-64-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
1255 // CHECK-64-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1256 // CHECK-64: .omp.final.then:
1257 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
1258 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
1259 // CHECK-64: .omp.final.done:
1260 // CHECK-64-NEXT: ret void
1263 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27
1264 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
1265 // CHECK-64-NEXT: entry:
1266 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
1267 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
1268 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1269 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
1270 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27_kernel_environment, ptr [[DYN_PTR]])
1271 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
1272 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
1273 // CHECK-64: user_code.entry:
1274 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
1275 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
1276 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
1277 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
1278 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
1279 // CHECK-64-NEXT: ret void
1280 // CHECK-64: worker.exit:
1281 // CHECK-64-NEXT: ret void
1284 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27_omp_outlined
1285 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1286 // CHECK-64-NEXT: entry:
1287 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1288 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1289 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1290 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
1291 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1292 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1293 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1294 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1295 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
1296 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
1297 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1298 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1299 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1300 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
1301 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1302 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1303 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
1304 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1305 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1306 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
1307 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1308 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
1309 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1310 // CHECK-64: cond.true:
1311 // CHECK-64-NEXT: br label [[COND_END:%.*]]
1312 // CHECK-64: cond.false:
1313 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1314 // CHECK-64-NEXT: br label [[COND_END]]
1315 // CHECK-64: cond.end:
1316 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1317 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1318 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1319 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1320 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1321 // CHECK-64: omp.inner.for.cond:
1322 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP253:![0-9]+]]
1323 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
1324 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1325 // CHECK-64: omp.inner.for.body:
1326 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP253]]
1327 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
1328 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP253]]
1329 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1330 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
1331 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
1332 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8, !llvm.access.group [[ACC_GRP253]]
1333 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
1334 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
1335 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8, !llvm.access.group [[ACC_GRP253]]
1336 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2), !llvm.access.group [[ACC_GRP253]]
1337 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1338 // CHECK-64: omp.inner.for.inc:
1339 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP253]]
1340 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP253]]
1341 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
1342 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP253]]
1343 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP253]]
1344 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP253]]
1345 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
1346 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP253]]
1347 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP253]]
1348 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP253]]
1349 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1350 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP253]]
1351 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP253]]
1352 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
1353 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
1354 // CHECK-64: cond.true5:
1355 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
1356 // CHECK-64: cond.false6:
1357 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP253]]
1358 // CHECK-64-NEXT: br label [[COND_END7]]
1359 // CHECK-64: cond.end7:
1360 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
1361 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP253]]
1362 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP253]]
1363 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP253]]
1364 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP254:![0-9]+]]
1365 // CHECK-64: omp.inner.for.end:
1366 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1367 // CHECK-64: omp.loop.exit:
1368 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
1369 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1370 // CHECK-64-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1371 // CHECK-64-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1372 // CHECK-64: .omp.final.then:
1373 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
1374 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
1375 // CHECK-64: .omp.final.done:
1376 // CHECK-64-NEXT: ret void
1379 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27_omp_outlined_omp_outlined
1380 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1381 // CHECK-64-NEXT: entry:
1382 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1383 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1384 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1385 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1386 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1387 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
1388 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1389 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1390 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1391 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1392 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
1393 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1394 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1395 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1396 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1397 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1398 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
1399 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1400 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1401 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1402 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1403 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1404 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1405 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1406 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1407 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1408 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1409 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1410 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
1411 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
1412 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1413 // CHECK-64: omp.dispatch.cond:
1414 // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
1415 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
1416 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1417 // CHECK-64: omp.dispatch.body:
1418 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1419 // CHECK-64-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
1420 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1421 // CHECK-64: omp.inner.for.cond:
1422 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP256:![0-9]+]]
1423 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP256]]
1424 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1425 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1426 // CHECK-64: omp.inner.for.body:
1427 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP256]]
1428 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1429 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1430 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP256]]
1431 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1432 // CHECK-64: omp.body.continue:
1433 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1434 // CHECK-64: omp.inner.for.inc:
1435 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP256]]
1436 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
1437 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP256]]
1438 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP257:![0-9]+]]
1439 // CHECK-64: omp.inner.for.end:
1440 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1441 // CHECK-64: omp.dispatch.inc:
1442 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
1443 // CHECK-64: omp.dispatch.end:
1444 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
1445 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1446 // CHECK-64-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
1447 // CHECK-64-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1448 // CHECK-64: .omp.final.then:
1449 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
1450 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
1451 // CHECK-64: .omp.final.done:
1452 // CHECK-64-NEXT: ret void
1455 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30
1456 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
1457 // CHECK-64-NEXT: entry:
1458 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
1459 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
1460 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1461 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
1462 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30_kernel_environment, ptr [[DYN_PTR]])
1463 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
1464 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
1465 // CHECK-64: user_code.entry:
1466 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
1467 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
1468 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
1469 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
1470 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
1471 // CHECK-64-NEXT: ret void
1472 // CHECK-64: worker.exit:
1473 // CHECK-64-NEXT: ret void
1476 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30_omp_outlined
1477 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1478 // CHECK-64-NEXT: entry:
1479 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1480 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1481 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1482 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
1483 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1484 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1485 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1486 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1487 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
1488 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
1489 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1490 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1491 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1492 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
1493 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1494 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1495 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
1496 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1497 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1498 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
1499 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1500 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
1501 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1502 // CHECK-64: cond.true:
1503 // CHECK-64-NEXT: br label [[COND_END:%.*]]
1504 // CHECK-64: cond.false:
1505 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1506 // CHECK-64-NEXT: br label [[COND_END]]
1507 // CHECK-64: cond.end:
1508 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1509 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1510 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1511 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1512 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1513 // CHECK-64: omp.inner.for.cond:
1514 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP259:![0-9]+]]
1515 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
1516 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1517 // CHECK-64: omp.inner.for.body:
1518 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP259]]
1519 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
1520 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP259]]
1521 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1522 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
1523 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
1524 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8, !llvm.access.group [[ACC_GRP259]]
1525 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
1526 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
1527 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8, !llvm.access.group [[ACC_GRP259]]
1528 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2), !llvm.access.group [[ACC_GRP259]]
1529 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1530 // CHECK-64: omp.inner.for.inc:
1531 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP259]]
1532 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP259]]
1533 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
1534 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP259]]
1535 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP259]]
1536 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP259]]
1537 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
1538 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP259]]
1539 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP259]]
1540 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP259]]
1541 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1542 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP259]]
1543 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP259]]
1544 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
1545 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
1546 // CHECK-64: cond.true5:
1547 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
1548 // CHECK-64: cond.false6:
1549 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP259]]
1550 // CHECK-64-NEXT: br label [[COND_END7]]
1551 // CHECK-64: cond.end7:
1552 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
1553 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP259]]
1554 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP259]]
1555 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP259]]
1556 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP260:![0-9]+]]
1557 // CHECK-64: omp.inner.for.end:
1558 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1559 // CHECK-64: omp.loop.exit:
1560 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
1561 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1562 // CHECK-64-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1563 // CHECK-64-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1564 // CHECK-64: .omp.final.then:
1565 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
1566 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
1567 // CHECK-64: .omp.final.done:
1568 // CHECK-64-NEXT: ret void
1571 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30_omp_outlined_omp_outlined
1572 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1573 // CHECK-64-NEXT: entry:
1574 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1575 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1576 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1577 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1578 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1579 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
1580 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1581 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1582 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1583 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1584 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
1585 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1586 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1587 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1588 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1589 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1590 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
1591 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1592 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1593 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1594 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1595 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1596 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1597 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1598 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1599 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1600 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1601 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1602 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
1603 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
1604 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1605 // CHECK-64: omp.dispatch.cond:
1606 // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
1607 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
1608 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1609 // CHECK-64: omp.dispatch.body:
1610 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1611 // CHECK-64-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
1612 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1613 // CHECK-64: omp.inner.for.cond:
1614 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP262:![0-9]+]]
1615 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP262]]
1616 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1617 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1618 // CHECK-64: omp.inner.for.body:
1619 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP262]]
1620 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1621 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1622 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP262]]
1623 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1624 // CHECK-64: omp.body.continue:
1625 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1626 // CHECK-64: omp.inner.for.inc:
1627 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP262]]
1628 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
1629 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP262]]
1630 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP263:![0-9]+]]
1631 // CHECK-64: omp.inner.for.end:
1632 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1633 // CHECK-64: omp.dispatch.inc:
1634 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
1635 // CHECK-64: omp.dispatch.end:
1636 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
1637 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1638 // CHECK-64-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
1639 // CHECK-64-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1640 // CHECK-64: .omp.final.then:
1641 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
1642 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
1643 // CHECK-64: .omp.final.done:
1644 // CHECK-64-NEXT: ret void
1647 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33
1648 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
1649 // CHECK-64-NEXT: entry:
1650 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
1651 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
1652 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1653 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
1654 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33_kernel_environment, ptr [[DYN_PTR]])
1655 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
1656 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
1657 // CHECK-64: user_code.entry:
1658 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
1659 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
1660 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
1661 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
1662 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
1663 // CHECK-64-NEXT: ret void
1664 // CHECK-64: worker.exit:
1665 // CHECK-64-NEXT: ret void
1668 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33_omp_outlined
1669 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1670 // CHECK-64-NEXT: entry:
1671 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1672 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1673 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1674 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
1675 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1676 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1677 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1678 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1679 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
1680 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
1681 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1682 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1683 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1684 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
1685 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1686 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1687 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
1688 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1689 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1690 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
1691 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1692 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
1693 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1694 // CHECK-64: cond.true:
1695 // CHECK-64-NEXT: br label [[COND_END:%.*]]
1696 // CHECK-64: cond.false:
1697 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1698 // CHECK-64-NEXT: br label [[COND_END]]
1699 // CHECK-64: cond.end:
1700 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1701 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1702 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1703 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1704 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1705 // CHECK-64: omp.inner.for.cond:
1706 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP265:![0-9]+]]
1707 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
1708 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1709 // CHECK-64: omp.inner.for.body:
1710 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP265]]
1711 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
1712 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP265]]
1713 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1714 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
1715 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
1716 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8, !llvm.access.group [[ACC_GRP265]]
1717 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
1718 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
1719 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8, !llvm.access.group [[ACC_GRP265]]
1720 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2), !llvm.access.group [[ACC_GRP265]]
1721 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1722 // CHECK-64: omp.inner.for.inc:
1723 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP265]]
1724 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP265]]
1725 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
1726 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP265]]
1727 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP265]]
1728 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP265]]
1729 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
1730 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP265]]
1731 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP265]]
1732 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP265]]
1733 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1734 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP265]]
1735 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP265]]
1736 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
1737 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
1738 // CHECK-64: cond.true5:
1739 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
1740 // CHECK-64: cond.false6:
1741 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP265]]
1742 // CHECK-64-NEXT: br label [[COND_END7]]
1743 // CHECK-64: cond.end7:
1744 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
1745 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP265]]
1746 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP265]]
1747 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP265]]
1748 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP266:![0-9]+]]
1749 // CHECK-64: omp.inner.for.end:
1750 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1751 // CHECK-64: omp.loop.exit:
1752 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
1753 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1754 // CHECK-64-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1755 // CHECK-64-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1756 // CHECK-64: .omp.final.then:
1757 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
1758 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
1759 // CHECK-64: .omp.final.done:
1760 // CHECK-64-NEXT: ret void
1763 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33_omp_outlined_omp_outlined
1764 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1765 // CHECK-64-NEXT: entry:
1766 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1767 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1768 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1769 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1770 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1771 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
1772 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1773 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1774 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1775 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1776 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
1777 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1778 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1779 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1780 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1781 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1782 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
1783 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1784 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1785 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1786 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1787 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1788 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1789 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1790 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1791 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1792 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1793 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1794 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
1795 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
1796 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1797 // CHECK-64: omp.dispatch.cond:
1798 // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
1799 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
1800 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1801 // CHECK-64: omp.dispatch.body:
1802 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1803 // CHECK-64-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
1804 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1805 // CHECK-64: omp.inner.for.cond:
1806 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP268:![0-9]+]]
1807 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP268]]
1808 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1809 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1810 // CHECK-64: omp.inner.for.body:
1811 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP268]]
1812 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1813 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1814 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP268]]
1815 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1816 // CHECK-64: omp.body.continue:
1817 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1818 // CHECK-64: omp.inner.for.inc:
1819 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP268]]
1820 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
1821 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP268]]
1822 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP269:![0-9]+]]
1823 // CHECK-64: omp.inner.for.end:
1824 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1825 // CHECK-64: omp.dispatch.inc:
1826 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
1827 // CHECK-64: omp.dispatch.end:
1828 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
1829 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1830 // CHECK-64-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
1831 // CHECK-64-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1832 // CHECK-64: .omp.final.then:
1833 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
1834 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
1835 // CHECK-64: .omp.final.done:
1836 // CHECK-64-NEXT: ret void
1839 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37
1840 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[A:%.*]]) #[[ATTR0]] {
1841 // CHECK-64-NEXT: entry:
1842 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
1843 // CHECK-64-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
1844 // CHECK-64-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
1845 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
1846 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1847 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
1848 // CHECK-64-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8
1849 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37_kernel_environment, ptr [[DYN_PTR]])
1850 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
1851 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
1852 // CHECK-64: user_code.entry:
1853 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
1854 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[A_ADDR]], align 4
1855 // CHECK-64-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
1856 // CHECK-64-NEXT: [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
1857 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
1858 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
1859 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i64 [[TMP3]]) #[[ATTR2]]
1860 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
1861 // CHECK-64-NEXT: ret void
1862 // CHECK-64: worker.exit:
1863 // CHECK-64-NEXT: ret void
1866 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37_omp_outlined
1867 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] {
1868 // CHECK-64-NEXT: entry:
1869 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1870 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1871 // CHECK-64-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
1872 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1873 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
1874 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1875 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1876 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1877 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1878 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
1879 // CHECK-64-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
1880 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x ptr], align 8
1881 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1882 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1883 // CHECK-64-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8
1884 // CHECK-64-NEXT: [[A1:%.*]] = call align 8 ptr @__kmpc_alloc_shared(i64 4)
1885 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1886 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
1887 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1888 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1889 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
1890 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1891 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1892 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
1893 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1894 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
1895 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1896 // CHECK-64: cond.true:
1897 // CHECK-64-NEXT: br label [[COND_END:%.*]]
1898 // CHECK-64: cond.false:
1899 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1900 // CHECK-64-NEXT: br label [[COND_END]]
1901 // CHECK-64: cond.end:
1902 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1903 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1904 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1905 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1906 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1907 // CHECK-64: omp.inner.for.cond:
1908 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1909 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP5]], 10
1910 // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1911 // CHECK-64: omp.inner.for.body:
1912 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1913 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
1914 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1915 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1916 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[A1]], align 4
1917 // CHECK-64-NEXT: store i32 [[TMP10]], ptr [[A_CASTED]], align 4
1918 // CHECK-64-NEXT: [[TMP11:%.*]] = load i64, ptr [[A_CASTED]], align 8
1919 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
1920 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP7]] to ptr
1921 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
1922 // CHECK-64-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
1923 // CHECK-64-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP9]] to ptr
1924 // CHECK-64-NEXT: store ptr [[TMP15]], ptr [[TMP14]], align 8
1925 // CHECK-64-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
1926 // CHECK-64-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP11]] to ptr
1927 // CHECK-64-NEXT: store ptr [[TMP17]], ptr [[TMP16]], align 8
1928 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 3)
1929 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1930 // CHECK-64: omp.inner.for.inc:
1931 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1932 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1933 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1934 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1935 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1936 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1937 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1938 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_LB]], align 4
1939 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1940 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1941 // CHECK-64-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
1942 // CHECK-64-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_COMB_UB]], align 4
1943 // CHECK-64-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1944 // CHECK-64-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP24]], 9
1945 // CHECK-64-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
1946 // CHECK-64: cond.true6:
1947 // CHECK-64-NEXT: br label [[COND_END8:%.*]]
1948 // CHECK-64: cond.false7:
1949 // CHECK-64-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1950 // CHECK-64-NEXT: br label [[COND_END8]]
1951 // CHECK-64: cond.end8:
1952 // CHECK-64-NEXT: [[COND9:%.*]] = phi i32 [ 9, [[COND_TRUE6]] ], [ [[TMP25]], [[COND_FALSE7]] ]
1953 // CHECK-64-NEXT: store i32 [[COND9]], ptr [[DOTOMP_COMB_UB]], align 4
1954 // CHECK-64-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1955 // CHECK-64-NEXT: store i32 [[TMP26]], ptr [[DOTOMP_IV]], align 4
1956 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
1957 // CHECK-64: omp.inner.for.end:
1958 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1959 // CHECK-64: omp.loop.exit:
1960 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
1961 // CHECK-64-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1962 // CHECK-64-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
1963 // CHECK-64-NEXT: br i1 [[TMP28]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1964 // CHECK-64: .omp.lastprivate.then:
1965 // CHECK-64-NEXT: [[TMP29:%.*]] = load i32, ptr [[A1]], align 4
1966 // CHECK-64-NEXT: store i32 [[TMP29]], ptr [[A_ADDR]], align 4
1967 // CHECK-64-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1968 // CHECK-64: .omp.lastprivate.done:
1969 // CHECK-64-NEXT: call void @__kmpc_free_shared(ptr [[A1]], i64 4)
1970 // CHECK-64-NEXT: ret void
1973 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37_omp_outlined_omp_outlined
1974 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] {
1975 // CHECK-64-NEXT: entry:
1976 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1977 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1978 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1979 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1980 // CHECK-64-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
1981 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1982 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
1983 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1984 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1985 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1986 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1987 // CHECK-64-NEXT: [[A2:%.*]] = alloca i32, align 4
1988 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
1989 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1990 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1991 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1992 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1993 // CHECK-64-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8
1994 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1995 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
1996 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1997 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1998 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1999 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2000 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2001 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2002 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2003 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2004 // CHECK-64-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2005 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
2006 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2007 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2008 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2009 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2010 // CHECK-64: omp.inner.for.cond:
2011 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2012 // CHECK-64-NEXT: [[CONV3:%.*]] = sext i32 [[TMP5]] to i64
2013 // CHECK-64-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2014 // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV3]], [[TMP6]]
2015 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2016 // CHECK-64: omp.inner.for.body:
2017 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2018 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
2019 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2020 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4
2021 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[I]], align 4
2022 // CHECK-64-NEXT: store i32 [[TMP8]], ptr [[A2]], align 4
2023 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2024 // CHECK-64: omp.body.continue:
2025 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2026 // CHECK-64: omp.inner.for.inc:
2027 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2028 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2029 // CHECK-64-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
2030 // CHECK-64-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4
2031 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
2032 // CHECK-64: omp.inner.for.end:
2033 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2034 // CHECK-64: omp.loop.exit:
2035 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
2036 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2037 // CHECK-64-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2038 // CHECK-64-NEXT: br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2039 // CHECK-64: .omp.lastprivate.then:
2040 // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, ptr [[A2]], align 4
2041 // CHECK-64-NEXT: store i32 [[TMP13]], ptr [[A_ADDR]], align 4
2042 // CHECK-64-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
2043 // CHECK-64: .omp.lastprivate.done:
2044 // CHECK-64-NEXT: ret void
2047 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40
2048 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
2049 // CHECK-64-NEXT: entry:
2050 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
2051 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
2052 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2053 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
2054 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40_kernel_environment, ptr [[DYN_PTR]])
2055 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
2056 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
2057 // CHECK-64: user_code.entry:
2058 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
2059 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
2060 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
2061 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
2062 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
2063 // CHECK-64-NEXT: ret void
2064 // CHECK-64: worker.exit:
2065 // CHECK-64-NEXT: ret void
2068 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40_omp_outlined
2069 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2070 // CHECK-64-NEXT: entry:
2071 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2072 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2073 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2074 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
2075 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2076 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2077 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2078 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2079 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
2080 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
2081 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2082 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2083 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2084 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
2085 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2086 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2087 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
2088 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2089 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2090 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
2091 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2092 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
2093 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2094 // CHECK-64: cond.true:
2095 // CHECK-64-NEXT: br label [[COND_END:%.*]]
2096 // CHECK-64: cond.false:
2097 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2098 // CHECK-64-NEXT: br label [[COND_END]]
2099 // CHECK-64: cond.end:
2100 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2101 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2102 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2103 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2104 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2105 // CHECK-64: omp.inner.for.cond:
2106 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2107 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
2108 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2109 // CHECK-64: omp.inner.for.body:
2110 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2111 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
2112 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2113 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2114 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
2115 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
2116 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8
2117 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
2118 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
2119 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
2120 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
2121 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2122 // CHECK-64: omp.inner.for.inc:
2123 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2124 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2125 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
2126 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2127 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2128 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2129 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
2130 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
2131 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2132 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2133 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
2134 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
2135 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2136 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
2137 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
2138 // CHECK-64: cond.true5:
2139 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
2140 // CHECK-64: cond.false6:
2141 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2142 // CHECK-64-NEXT: br label [[COND_END7]]
2143 // CHECK-64: cond.end7:
2144 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
2145 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
2146 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2147 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
2148 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
2149 // CHECK-64: omp.inner.for.end:
2150 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2151 // CHECK-64: omp.loop.exit:
2152 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
2153 // CHECK-64-NEXT: ret void
2156 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40_omp_outlined_omp_outlined
2157 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2158 // CHECK-64-NEXT: entry:
2159 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2160 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2161 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2162 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2163 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2164 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
2165 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2166 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2167 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2168 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2169 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
2170 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2171 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2172 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2173 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2174 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2175 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
2176 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2177 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2178 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2179 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2180 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2181 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2182 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2183 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2184 // CHECK-64-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2185 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
2186 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2187 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2188 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9
2189 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2190 // CHECK-64: cond.true:
2191 // CHECK-64-NEXT: br label [[COND_END:%.*]]
2192 // CHECK-64: cond.false:
2193 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2194 // CHECK-64-NEXT: br label [[COND_END]]
2195 // CHECK-64: cond.end:
2196 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2197 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2198 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2199 // CHECK-64-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
2200 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2201 // CHECK-64: omp.inner.for.cond:
2202 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2203 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2204 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2205 // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2206 // CHECK-64: omp.inner.for.body:
2207 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2208 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2209 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2210 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4
2211 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2212 // CHECK-64: omp.body.continue:
2213 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2214 // CHECK-64: omp.inner.for.inc:
2215 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2216 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2217 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2218 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
2219 // CHECK-64: omp.inner.for.end:
2220 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2221 // CHECK-64: omp.loop.exit:
2222 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
2223 // CHECK-64-NEXT: ret void
2226 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43
2227 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
2228 // CHECK-64-NEXT: entry:
2229 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
2230 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
2231 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2232 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
2233 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43_kernel_environment, ptr [[DYN_PTR]])
2234 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
2235 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
2236 // CHECK-64: user_code.entry:
2237 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
2238 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
2239 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
2240 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
2241 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
2242 // CHECK-64-NEXT: ret void
2243 // CHECK-64: worker.exit:
2244 // CHECK-64-NEXT: ret void
2247 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43_omp_outlined
2248 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2249 // CHECK-64-NEXT: entry:
2250 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2251 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2252 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2253 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
2254 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2255 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2256 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2257 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2258 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
2259 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
2260 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2261 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2262 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2263 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
2264 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2265 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2266 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
2267 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2268 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2269 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
2270 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2271 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
2272 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2273 // CHECK-64: cond.true:
2274 // CHECK-64-NEXT: br label [[COND_END:%.*]]
2275 // CHECK-64: cond.false:
2276 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2277 // CHECK-64-NEXT: br label [[COND_END]]
2278 // CHECK-64: cond.end:
2279 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2280 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2281 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2282 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2283 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2284 // CHECK-64: omp.inner.for.cond:
2285 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2286 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
2287 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2288 // CHECK-64: omp.inner.for.body:
2289 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2290 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
2291 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2292 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2293 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
2294 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
2295 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8
2296 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
2297 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
2298 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
2299 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
2300 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2301 // CHECK-64: omp.inner.for.inc:
2302 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2303 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2304 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
2305 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2306 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2307 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2308 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
2309 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
2310 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2311 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2312 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
2313 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
2314 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2315 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
2316 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
2317 // CHECK-64: cond.true5:
2318 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
2319 // CHECK-64: cond.false6:
2320 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2321 // CHECK-64-NEXT: br label [[COND_END7]]
2322 // CHECK-64: cond.end7:
2323 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
2324 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
2325 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2326 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
2327 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
2328 // CHECK-64: omp.inner.for.end:
2329 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2330 // CHECK-64: omp.loop.exit:
2331 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
2332 // CHECK-64-NEXT: ret void
2335 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43_omp_outlined_omp_outlined
2336 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2337 // CHECK-64-NEXT: entry:
2338 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2339 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2340 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2341 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2342 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2343 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
2344 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2345 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2346 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2347 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2348 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
2349 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2350 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2351 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2352 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2353 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2354 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
2355 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2356 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2357 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2358 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2359 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2360 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2361 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2362 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2363 // CHECK-64-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2364 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
2365 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2366 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2367 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2368 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2369 // CHECK-64: omp.inner.for.cond:
2370 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2371 // CHECK-64-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64
2372 // CHECK-64-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2373 // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP6]]
2374 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2375 // CHECK-64: omp.inner.for.body:
2376 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2377 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
2378 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2379 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4
2380 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2381 // CHECK-64: omp.body.continue:
2382 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2383 // CHECK-64: omp.inner.for.inc:
2384 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2385 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2386 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
2387 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2388 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
2389 // CHECK-64: omp.inner.for.end:
2390 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2391 // CHECK-64: omp.loop.exit:
2392 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
2393 // CHECK-64-NEXT: ret void
2396 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46
2397 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
2398 // CHECK-64-NEXT: entry:
2399 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
2400 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
2401 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2402 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
2403 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46_kernel_environment, ptr [[DYN_PTR]])
2404 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
2405 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
2406 // CHECK-64: user_code.entry:
2407 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
2408 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
2409 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
2410 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
2411 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
2412 // CHECK-64-NEXT: ret void
2413 // CHECK-64: worker.exit:
2414 // CHECK-64-NEXT: ret void
2417 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46_omp_outlined
2418 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2419 // CHECK-64-NEXT: entry:
2420 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2421 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2422 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2423 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
2424 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2425 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2426 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2427 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2428 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
2429 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
2430 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2431 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2432 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2433 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
2434 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2435 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2436 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
2437 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2438 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2439 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
2440 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2441 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
2442 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2443 // CHECK-64: cond.true:
2444 // CHECK-64-NEXT: br label [[COND_END:%.*]]
2445 // CHECK-64: cond.false:
2446 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2447 // CHECK-64-NEXT: br label [[COND_END]]
2448 // CHECK-64: cond.end:
2449 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2450 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2451 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2452 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2453 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2454 // CHECK-64: omp.inner.for.cond:
2455 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2456 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
2457 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2458 // CHECK-64: omp.inner.for.body:
2459 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2460 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
2461 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2462 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2463 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
2464 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
2465 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8
2466 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
2467 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
2468 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
2469 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
2470 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2471 // CHECK-64: omp.inner.for.inc:
2472 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2473 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2474 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
2475 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2476 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2477 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2478 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
2479 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
2480 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2481 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2482 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
2483 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
2484 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2485 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
2486 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
2487 // CHECK-64: cond.true5:
2488 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
2489 // CHECK-64: cond.false6:
2490 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2491 // CHECK-64-NEXT: br label [[COND_END7]]
2492 // CHECK-64: cond.end7:
2493 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
2494 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
2495 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2496 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
2497 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
2498 // CHECK-64: omp.inner.for.end:
2499 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2500 // CHECK-64: omp.loop.exit:
2501 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
2502 // CHECK-64-NEXT: ret void
2505 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46_omp_outlined_omp_outlined
2506 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2507 // CHECK-64-NEXT: entry:
2508 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2509 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2510 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2511 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2512 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2513 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
2514 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2515 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2516 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2517 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2518 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
2519 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2520 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2521 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2522 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2523 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2524 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
2525 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2526 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2527 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2528 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2529 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2530 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2531 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2532 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2533 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2534 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2535 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2536 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
2537 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
2538 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2539 // CHECK-64: omp.dispatch.cond:
2540 // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
2541 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
2542 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2543 // CHECK-64: omp.dispatch.body:
2544 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2545 // CHECK-64-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
2546 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2547 // CHECK-64: omp.inner.for.cond:
2548 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP271:![0-9]+]]
2549 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP271]]
2550 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2551 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2552 // CHECK-64: omp.inner.for.body:
2553 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP271]]
2554 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2555 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2556 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP271]]
2557 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2558 // CHECK-64: omp.body.continue:
2559 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2560 // CHECK-64: omp.inner.for.inc:
2561 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP271]]
2562 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
2563 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP271]]
2564 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP272:![0-9]+]]
2565 // CHECK-64: omp.inner.for.end:
2566 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2567 // CHECK-64: omp.dispatch.inc:
2568 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
2569 // CHECK-64: omp.dispatch.end:
2570 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
2571 // CHECK-64-NEXT: ret void
2574 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49
2575 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
2576 // CHECK-64-NEXT: entry:
2577 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
2578 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
2579 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2580 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
2581 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49_kernel_environment, ptr [[DYN_PTR]])
2582 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
2583 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
2584 // CHECK-64: user_code.entry:
2585 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
2586 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
2587 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
2588 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
2589 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
2590 // CHECK-64-NEXT: ret void
2591 // CHECK-64: worker.exit:
2592 // CHECK-64-NEXT: ret void
2595 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49_omp_outlined
2596 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2597 // CHECK-64-NEXT: entry:
2598 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2599 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2600 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2601 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
2602 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2603 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2604 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2605 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2606 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
2607 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
2608 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2609 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2610 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2611 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
2612 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2613 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2614 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
2615 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2616 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2617 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
2618 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2619 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
2620 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2621 // CHECK-64: cond.true:
2622 // CHECK-64-NEXT: br label [[COND_END:%.*]]
2623 // CHECK-64: cond.false:
2624 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2625 // CHECK-64-NEXT: br label [[COND_END]]
2626 // CHECK-64: cond.end:
2627 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2628 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2629 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2630 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2631 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2632 // CHECK-64: omp.inner.for.cond:
2633 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2634 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
2635 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2636 // CHECK-64: omp.inner.for.body:
2637 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2638 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
2639 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2640 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2641 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
2642 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
2643 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8
2644 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
2645 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
2646 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
2647 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
2648 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2649 // CHECK-64: omp.inner.for.inc:
2650 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2651 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2652 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
2653 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2654 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2655 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2656 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
2657 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
2658 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2659 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2660 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
2661 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
2662 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2663 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
2664 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
2665 // CHECK-64: cond.true5:
2666 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
2667 // CHECK-64: cond.false6:
2668 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2669 // CHECK-64-NEXT: br label [[COND_END7]]
2670 // CHECK-64: cond.end7:
2671 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
2672 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
2673 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2674 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
2675 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
2676 // CHECK-64: omp.inner.for.end:
2677 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2678 // CHECK-64: omp.loop.exit:
2679 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
2680 // CHECK-64-NEXT: ret void
2683 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49_omp_outlined_omp_outlined
2684 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2685 // CHECK-64-NEXT: entry:
2686 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2687 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2688 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2689 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2690 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2691 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
2692 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2693 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2694 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2695 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2696 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
2697 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2698 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2699 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2700 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2701 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2702 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
2703 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2704 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2705 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2706 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2707 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2708 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2709 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2710 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2711 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2712 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2713 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2714 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
2715 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
2716 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2717 // CHECK-64: omp.dispatch.cond:
2718 // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
2719 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
2720 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2721 // CHECK-64: omp.dispatch.body:
2722 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2723 // CHECK-64-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
2724 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2725 // CHECK-64: omp.inner.for.cond:
2726 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP274:![0-9]+]]
2727 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP274]]
2728 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2729 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2730 // CHECK-64: omp.inner.for.body:
2731 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP274]]
2732 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2733 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2734 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP274]]
2735 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2736 // CHECK-64: omp.body.continue:
2737 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2738 // CHECK-64: omp.inner.for.inc:
2739 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP274]]
2740 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
2741 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP274]]
2742 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP275:![0-9]+]]
2743 // CHECK-64: omp.inner.for.end:
2744 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2745 // CHECK-64: omp.dispatch.inc:
2746 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
2747 // CHECK-64: omp.dispatch.end:
2748 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
2749 // CHECK-64-NEXT: ret void
2752 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52
2753 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
2754 // CHECK-64-NEXT: entry:
2755 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
2756 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
2757 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2758 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
2759 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52_kernel_environment, ptr [[DYN_PTR]])
2760 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
2761 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
2762 // CHECK-64: user_code.entry:
2763 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
2764 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
2765 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
2766 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
2767 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
2768 // CHECK-64-NEXT: ret void
2769 // CHECK-64: worker.exit:
2770 // CHECK-64-NEXT: ret void
2773 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52_omp_outlined
2774 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2775 // CHECK-64-NEXT: entry:
2776 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2777 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2778 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2779 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
2780 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2781 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2782 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2783 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2784 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
2785 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
2786 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2787 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2788 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2789 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
2790 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2791 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2792 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
2793 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2794 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2795 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
2796 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2797 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
2798 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2799 // CHECK-64: cond.true:
2800 // CHECK-64-NEXT: br label [[COND_END:%.*]]
2801 // CHECK-64: cond.false:
2802 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2803 // CHECK-64-NEXT: br label [[COND_END]]
2804 // CHECK-64: cond.end:
2805 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2806 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2807 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2808 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2809 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2810 // CHECK-64: omp.inner.for.cond:
2811 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2812 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
2813 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2814 // CHECK-64: omp.inner.for.body:
2815 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2816 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
2817 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2818 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2819 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
2820 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
2821 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8
2822 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
2823 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
2824 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
2825 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
2826 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2827 // CHECK-64: omp.inner.for.inc:
2828 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2829 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2830 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
2831 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2832 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2833 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2834 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
2835 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
2836 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2837 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2838 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
2839 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
2840 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2841 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
2842 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
2843 // CHECK-64: cond.true5:
2844 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
2845 // CHECK-64: cond.false6:
2846 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2847 // CHECK-64-NEXT: br label [[COND_END7]]
2848 // CHECK-64: cond.end7:
2849 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
2850 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
2851 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2852 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
2853 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
2854 // CHECK-64: omp.inner.for.end:
2855 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2856 // CHECK-64: omp.loop.exit:
2857 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
2858 // CHECK-64-NEXT: ret void
2861 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52_omp_outlined_omp_outlined
2862 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2863 // CHECK-64-NEXT: entry:
2864 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2865 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2866 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2867 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2868 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2869 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
2870 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2871 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2872 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2873 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2874 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
2875 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2876 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2877 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2878 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2879 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2880 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
2881 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2882 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2883 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2884 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2885 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2886 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2887 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2888 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2889 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2890 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2891 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2892 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
2893 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
2894 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2895 // CHECK-64: omp.dispatch.cond:
2896 // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
2897 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
2898 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2899 // CHECK-64: omp.dispatch.body:
2900 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2901 // CHECK-64-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
2902 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2903 // CHECK-64: omp.inner.for.cond:
2904 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP277:![0-9]+]]
2905 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP277]]
2906 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2907 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2908 // CHECK-64: omp.inner.for.body:
2909 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP277]]
2910 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2911 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2912 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP277]]
2913 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2914 // CHECK-64: omp.body.continue:
2915 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2916 // CHECK-64: omp.inner.for.inc:
2917 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP277]]
2918 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
2919 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP277]]
2920 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP278:![0-9]+]]
2921 // CHECK-64: omp.inner.for.end:
2922 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2923 // CHECK-64: omp.dispatch.inc:
2924 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
2925 // CHECK-64: omp.dispatch.end:
2926 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
2927 // CHECK-64-NEXT: ret void
2930 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55
2931 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
2932 // CHECK-64-NEXT: entry:
2933 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
2934 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
2935 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2936 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
2937 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55_kernel_environment, ptr [[DYN_PTR]])
2938 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
2939 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
2940 // CHECK-64: user_code.entry:
2941 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
2942 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
2943 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
2944 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
2945 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
2946 // CHECK-64-NEXT: ret void
2947 // CHECK-64: worker.exit:
2948 // CHECK-64-NEXT: ret void
2951 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55_omp_outlined
2952 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2953 // CHECK-64-NEXT: entry:
2954 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2955 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2956 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2957 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
2958 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2959 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2960 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2961 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2962 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
2963 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
2964 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2965 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2966 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2967 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
2968 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2969 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2970 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
2971 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2972 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2973 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
2974 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2975 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
2976 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2977 // CHECK-64: cond.true:
2978 // CHECK-64-NEXT: br label [[COND_END:%.*]]
2979 // CHECK-64: cond.false:
2980 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2981 // CHECK-64-NEXT: br label [[COND_END]]
2982 // CHECK-64: cond.end:
2983 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2984 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2985 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2986 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2987 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2988 // CHECK-64: omp.inner.for.cond:
2989 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2990 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
2991 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2992 // CHECK-64: omp.inner.for.body:
2993 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2994 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
2995 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2996 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2997 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
2998 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
2999 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8
3000 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
3001 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
3002 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
3003 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
3004 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3005 // CHECK-64: omp.inner.for.inc:
3006 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3007 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3008 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
3009 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
3010 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3011 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3012 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
3013 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
3014 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3015 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3016 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
3017 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
3018 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3019 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
3020 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
3021 // CHECK-64: cond.true5:
3022 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
3023 // CHECK-64: cond.false6:
3024 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3025 // CHECK-64-NEXT: br label [[COND_END7]]
3026 // CHECK-64: cond.end7:
3027 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
3028 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
3029 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3030 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
3031 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
3032 // CHECK-64: omp.inner.for.end:
3033 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3034 // CHECK-64: omp.loop.exit:
3035 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
3036 // CHECK-64-NEXT: ret void
3039 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55_omp_outlined_omp_outlined
3040 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3041 // CHECK-64-NEXT: entry:
3042 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3043 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3044 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3045 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3046 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3047 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
3048 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3049 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3050 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3051 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3052 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
3053 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3054 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3055 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3056 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3057 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
3058 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
3059 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3060 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3061 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3062 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3063 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
3064 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
3065 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3066 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3067 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3068 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3069 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3070 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
3071 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
3072 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3073 // CHECK-64: omp.dispatch.cond:
3074 // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
3075 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
3076 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3077 // CHECK-64: omp.dispatch.body:
3078 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3079 // CHECK-64-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
3080 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3081 // CHECK-64: omp.inner.for.cond:
3082 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP280:![0-9]+]]
3083 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP280]]
3084 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3085 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3086 // CHECK-64: omp.inner.for.body:
3087 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP280]]
3088 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3089 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3090 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP280]]
3091 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3092 // CHECK-64: omp.body.continue:
3093 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3094 // CHECK-64: omp.inner.for.inc:
3095 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP280]]
3096 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
3097 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP280]]
3098 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP281:![0-9]+]]
3099 // CHECK-64: omp.inner.for.end:
3100 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3101 // CHECK-64: omp.dispatch.inc:
3102 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
3103 // CHECK-64: omp.dispatch.end:
3104 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
3105 // CHECK-64-NEXT: ret void
3108 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58
3109 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
3110 // CHECK-64-NEXT: entry:
3111 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
3112 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
3113 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3114 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
3115 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58_kernel_environment, ptr [[DYN_PTR]])
3116 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
3117 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
3118 // CHECK-64: user_code.entry:
3119 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
3120 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
3121 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
3122 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
3123 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
3124 // CHECK-64-NEXT: ret void
3125 // CHECK-64: worker.exit:
3126 // CHECK-64-NEXT: ret void
3129 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58_omp_outlined
3130 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3131 // CHECK-64-NEXT: entry:
3132 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3133 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3134 // CHECK-64-NEXT: [[B:%.*]] = alloca i32, align 4
3135 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3136 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
3137 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3138 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3139 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3140 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3141 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
3142 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
3143 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3144 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3145 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3146 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
3147 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3148 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3149 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
3150 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3151 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3152 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
3153 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3154 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
3155 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3156 // CHECK-64: cond.true:
3157 // CHECK-64-NEXT: br label [[COND_END:%.*]]
3158 // CHECK-64: cond.false:
3159 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3160 // CHECK-64-NEXT: br label [[COND_END]]
3161 // CHECK-64: cond.end:
3162 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3163 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3164 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3165 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3166 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3167 // CHECK-64: omp.inner.for.cond:
3168 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP283:![0-9]+]]
3169 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
3170 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3171 // CHECK-64: omp.inner.for.body:
3172 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP283]]
3173 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
3174 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP283]]
3175 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3176 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
3177 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
3178 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8, !llvm.access.group [[ACC_GRP283]]
3179 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
3180 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
3181 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8, !llvm.access.group [[ACC_GRP283]]
3182 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2), !llvm.access.group [[ACC_GRP283]]
3183 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3184 // CHECK-64: omp.inner.for.inc:
3185 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP283]]
3186 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP283]]
3187 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
3188 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP283]]
3189 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP283]]
3190 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP283]]
3191 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
3192 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP283]]
3193 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP283]]
3194 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP283]]
3195 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
3196 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP283]]
3197 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP283]]
3198 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
3199 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
3200 // CHECK-64: cond.true5:
3201 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
3202 // CHECK-64: cond.false6:
3203 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP283]]
3204 // CHECK-64-NEXT: br label [[COND_END7]]
3205 // CHECK-64: cond.end7:
3206 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
3207 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP283]]
3208 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP283]]
3209 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP283]]
3210 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP284:![0-9]+]]
3211 // CHECK-64: omp.inner.for.end:
3212 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3213 // CHECK-64: omp.loop.exit:
3214 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
3215 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3216 // CHECK-64-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
3217 // CHECK-64-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3218 // CHECK-64: .omp.final.then:
3219 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
3220 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
3221 // CHECK-64: .omp.final.done:
3222 // CHECK-64-NEXT: ret void
3225 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58_omp_outlined_omp_outlined
3226 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3227 // CHECK-64-NEXT: entry:
3228 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3229 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3230 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3231 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3232 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3233 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
3234 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3235 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3236 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3237 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3238 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
3239 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3240 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3241 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3242 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3243 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
3244 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
3245 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3246 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3247 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3248 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3249 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
3250 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
3251 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3252 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3253 // CHECK-64-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3254 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
3255 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3256 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3257 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3258 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3259 // CHECK-64: omp.inner.for.cond:
3260 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP286:![0-9]+]]
3261 // CHECK-64-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64
3262 // CHECK-64-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8, !llvm.access.group [[ACC_GRP286]]
3263 // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP6]]
3264 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3265 // CHECK-64: omp.inner.for.body:
3266 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP286]]
3267 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
3268 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3269 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP286]]
3270 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3271 // CHECK-64: omp.body.continue:
3272 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3273 // CHECK-64: omp.inner.for.inc:
3274 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP286]]
3275 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP286]]
3276 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
3277 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP286]]
3278 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP287:![0-9]+]]
3279 // CHECK-64: omp.inner.for.end:
3280 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3281 // CHECK-64: omp.loop.exit:
3282 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
3283 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3284 // CHECK-64-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
3285 // CHECK-64-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3286 // CHECK-64: .omp.final.then:
3287 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
3288 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
3289 // CHECK-64: .omp.final.done:
3290 // CHECK-64-NEXT: ret void
3293 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66
3294 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
3295 // CHECK-64-NEXT: entry:
3296 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
3297 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
3298 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3299 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
3300 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66_kernel_environment, ptr [[DYN_PTR]])
3301 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
3302 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
3303 // CHECK-64: user_code.entry:
3304 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
3305 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
3306 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
3307 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
3308 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
3309 // CHECK-64-NEXT: ret void
3310 // CHECK-64: worker.exit:
3311 // CHECK-64-NEXT: ret void
3314 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66_omp_outlined
3315 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3316 // CHECK-64-NEXT: entry:
3317 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3318 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3319 // CHECK-64-NEXT: [[B:%.*]] = alloca [3 x i32], align 4
3320 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3321 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
3322 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3323 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3324 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3325 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3326 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
3327 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
3328 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3329 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3330 // CHECK-64-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[B]], ptr align 4 @"__const.<captured>.b", i64 12, i1 false)
3331 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3332 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
3333 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3334 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3335 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
3336 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3337 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3338 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
3339 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3340 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
3341 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3342 // CHECK-64: cond.true:
3343 // CHECK-64-NEXT: br label [[COND_END:%.*]]
3344 // CHECK-64: cond.false:
3345 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3346 // CHECK-64-NEXT: br label [[COND_END]]
3347 // CHECK-64: cond.end:
3348 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3349 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3350 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3351 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3352 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3353 // CHECK-64: omp.inner.for.cond:
3354 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP289:![0-9]+]]
3355 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
3356 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3357 // CHECK-64: omp.inner.for.body:
3358 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP289]]
3359 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
3360 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP289]]
3361 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3362 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
3363 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
3364 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8, !llvm.access.group [[ACC_GRP289]]
3365 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
3366 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
3367 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8, !llvm.access.group [[ACC_GRP289]]
3368 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2), !llvm.access.group [[ACC_GRP289]]
3369 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3370 // CHECK-64: omp.inner.for.inc:
3371 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP289]]
3372 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP289]]
3373 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
3374 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP289]]
3375 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP289]]
3376 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP289]]
3377 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
3378 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP289]]
3379 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP289]]
3380 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP289]]
3381 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
3382 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP289]]
3383 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP289]]
3384 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
3385 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
3386 // CHECK-64: cond.true5:
3387 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
3388 // CHECK-64: cond.false6:
3389 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP289]]
3390 // CHECK-64-NEXT: br label [[COND_END7]]
3391 // CHECK-64: cond.end7:
3392 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
3393 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP289]]
3394 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP289]]
3395 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP289]]
3396 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP290:![0-9]+]]
3397 // CHECK-64: omp.inner.for.end:
3398 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3399 // CHECK-64: omp.loop.exit:
3400 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
3401 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3402 // CHECK-64-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
3403 // CHECK-64-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3404 // CHECK-64: .omp.final.then:
3405 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
3406 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
3407 // CHECK-64: .omp.final.done:
3408 // CHECK-64-NEXT: ret void
3411 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66_omp_outlined_omp_outlined
3412 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3413 // CHECK-64-NEXT: entry:
3414 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3415 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3416 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3417 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3418 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3419 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
3420 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3421 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3422 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3423 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3424 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
3425 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3426 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3427 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3428 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3429 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
3430 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
3431 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3432 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3433 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3434 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3435 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
3436 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
3437 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3438 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3439 // CHECK-64-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3440 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
3441 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3442 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3443 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9
3444 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3445 // CHECK-64: cond.true:
3446 // CHECK-64-NEXT: br label [[COND_END:%.*]]
3447 // CHECK-64: cond.false:
3448 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3449 // CHECK-64-NEXT: br label [[COND_END]]
3450 // CHECK-64: cond.end:
3451 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3452 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3453 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3454 // CHECK-64-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
3455 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3456 // CHECK-64: omp.inner.for.cond:
3457 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP292:![0-9]+]]
3458 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP292]]
3459 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3460 // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3461 // CHECK-64: omp.inner.for.body:
3462 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP292]]
3463 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3464 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3465 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP292]]
3466 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3467 // CHECK-64: omp.body.continue:
3468 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3469 // CHECK-64: omp.inner.for.inc:
3470 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP292]]
3471 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3472 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP292]]
3473 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP293:![0-9]+]]
3474 // CHECK-64: omp.inner.for.end:
3475 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3476 // CHECK-64: omp.loop.exit:
3477 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
3478 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3479 // CHECK-64-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3480 // CHECK-64-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3481 // CHECK-64: .omp.final.then:
3482 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
3483 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
3484 // CHECK-64: .omp.final.done:
3485 // CHECK-64-NEXT: ret void
3488 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73
3489 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
3490 // CHECK-64-NEXT: entry:
3491 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
3492 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
3493 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3494 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
3495 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_kernel_environment, ptr [[DYN_PTR]])
3496 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
3497 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
3498 // CHECK-64: user_code.entry:
3499 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
3500 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
3501 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
3502 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
3503 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
3504 // CHECK-64-NEXT: ret void
3505 // CHECK-64: worker.exit:
3506 // CHECK-64-NEXT: ret void
3509 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined
3510 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3511 // CHECK-64-NEXT: entry:
3512 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3513 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3514 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3515 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
3516 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3517 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3518 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3519 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3520 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
3521 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
3522 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3523 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3524 // CHECK-64-NEXT: [[C:%.*]] = call align 8 ptr @__kmpc_alloc_shared(i64 8)
3525 // CHECK-64-NEXT: [[B:%.*]] = call align 8 ptr @__kmpc_alloc_shared(i64 4)
3526 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3527 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
3528 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3529 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3530 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3531 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3532 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3533 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3534 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
3535 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3536 // CHECK-64: cond.true:
3537 // CHECK-64-NEXT: br label [[COND_END:%.*]]
3538 // CHECK-64: cond.false:
3539 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3540 // CHECK-64-NEXT: br label [[COND_END]]
3541 // CHECK-64: cond.end:
3542 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3543 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3544 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3545 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3546 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3547 // CHECK-64: omp.inner.for.cond:
3548 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP295:![0-9]+]]
3549 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP295]]
3550 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3551 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3552 // CHECK-64: omp.inner.for.body:
3553 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP295]]
3554 // CHECK-64-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3555 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP295]]
3556 // CHECK-64-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3557 // CHECK-64-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
3558 // CHECK-64-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP8]] to ptr
3559 // CHECK-64-NEXT: store ptr [[TMP12]], ptr [[TMP11]], align 8, !llvm.access.group [[ACC_GRP295]]
3560 // CHECK-64-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
3561 // CHECK-64-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP10]] to ptr
3562 // CHECK-64-NEXT: store ptr [[TMP14]], ptr [[TMP13]], align 8, !llvm.access.group [[ACC_GRP295]]
3563 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined_omp_outlined, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined_omp_outlined_wrapper, ptr [[CAPTURED_VARS_ADDRS]], i64 2), !llvm.access.group [[ACC_GRP295]]
3564 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3565 // CHECK-64: omp.inner.for.inc:
3566 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP295]]
3567 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP295]]
3568 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
3569 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP295]]
3570 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP296:![0-9]+]]
3571 // CHECK-64: omp.inner.for.end:
3572 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3573 // CHECK-64: omp.loop.exit:
3574 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
3575 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3576 // CHECK-64-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
3577 // CHECK-64-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3578 // CHECK-64: .omp.final.then:
3579 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
3580 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
3581 // CHECK-64: .omp.final.done:
3582 // CHECK-64-NEXT: store ptr [[B]], ptr [[C]], align 8
3583 // CHECK-64-NEXT: call void @__kmpc_free_shared(ptr [[B]], i64 4)
3584 // CHECK-64-NEXT: call void @__kmpc_free_shared(ptr [[C]], i64 8)
3585 // CHECK-64-NEXT: ret void
3588 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined_omp_outlined
3589 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3590 // CHECK-64-NEXT: entry:
3591 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3592 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3593 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3594 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3595 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3596 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
3597 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3598 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3599 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3600 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3601 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
3602 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3603 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3604 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3605 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3606 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
3607 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
3608 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3609 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3610 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3611 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3612 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
3613 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
3614 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3615 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3616 // CHECK-64-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3617 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
3618 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3619 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3620 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3621 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3622 // CHECK-64: omp.inner.for.cond:
3623 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP298:![0-9]+]]
3624 // CHECK-64-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64
3625 // CHECK-64-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8, !llvm.access.group [[ACC_GRP298]]
3626 // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP6]]
3627 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3628 // CHECK-64: omp.inner.for.body:
3629 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP298]]
3630 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
3631 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3632 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP298]]
3633 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3634 // CHECK-64: omp.body.continue:
3635 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3636 // CHECK-64: omp.inner.for.inc:
3637 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP298]]
3638 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP298]]
3639 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
3640 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP298]]
3641 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP299:![0-9]+]]
3642 // CHECK-64: omp.inner.for.end:
3643 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3644 // CHECK-64: omp.loop.exit:
3645 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
3646 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3647 // CHECK-64-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
3648 // CHECK-64-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3649 // CHECK-64: .omp.final.then:
3650 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
3651 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
3652 // CHECK-64: .omp.final.done:
3653 // CHECK-64-NEXT: ret void
3656 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined_omp_outlined_wrapper
3657 // CHECK-64-SAME: (i16 noundef zeroext [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] {
3658 // CHECK-64-NEXT: entry:
3659 // CHECK-64-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2
3660 // CHECK-64-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
3661 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
3662 // CHECK-64-NEXT: [[GLOBAL_ARGS:%.*]] = alloca ptr, align 8
3663 // CHECK-64-NEXT: store i16 [[TMP0]], ptr [[DOTADDR]], align 2
3664 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
3665 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
3666 // CHECK-64-NEXT: call void @__kmpc_get_shared_variables(ptr [[GLOBAL_ARGS]])
3667 // CHECK-64-NEXT: [[TMP2:%.*]] = load ptr, ptr [[GLOBAL_ARGS]], align 8
3668 // CHECK-64-NEXT: [[TMP3:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 0
3669 // CHECK-64-NEXT: [[TMP4:%.*]] = load i64, ptr [[TMP3]], align 8
3670 // CHECK-64-NEXT: [[TMP5:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 1
3671 // CHECK-64-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP5]], align 8
3672 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined_omp_outlined(ptr [[DOTADDR1]], ptr [[DOTZERO_ADDR]], i64 [[TMP4]], i64 [[TMP6]]) #[[ATTR2]]
3673 // CHECK-64-NEXT: ret void
3676 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81
3677 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
3678 // CHECK-64-NEXT: entry:
3679 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
3680 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
3681 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3682 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
3683 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81_kernel_environment, ptr [[DYN_PTR]])
3684 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
3685 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
3686 // CHECK-64: user_code.entry:
3687 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
3688 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
3689 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
3690 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
3691 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
3692 // CHECK-64-NEXT: ret void
3693 // CHECK-64: worker.exit:
3694 // CHECK-64-NEXT: ret void
3697 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81_omp_outlined
3698 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3699 // CHECK-64-NEXT: entry:
3700 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3701 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3702 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3703 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
3704 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3705 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3706 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3707 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3708 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
3709 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
3710 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3711 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3712 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3713 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
3714 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3715 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3716 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
3717 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3718 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3719 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
3720 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3721 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
3722 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3723 // CHECK-64: cond.true:
3724 // CHECK-64-NEXT: br label [[COND_END:%.*]]
3725 // CHECK-64: cond.false:
3726 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3727 // CHECK-64-NEXT: br label [[COND_END]]
3728 // CHECK-64: cond.end:
3729 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3730 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3731 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3732 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3733 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3734 // CHECK-64: omp.inner.for.cond:
3735 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP301:![0-9]+]]
3736 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
3737 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3738 // CHECK-64: omp.inner.for.body:
3739 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP301]]
3740 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
3741 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP301]]
3742 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3743 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
3744 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
3745 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8, !llvm.access.group [[ACC_GRP301]]
3746 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
3747 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
3748 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8, !llvm.access.group [[ACC_GRP301]]
3749 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2), !llvm.access.group [[ACC_GRP301]]
3750 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3751 // CHECK-64: omp.inner.for.inc:
3752 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP301]]
3753 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP301]]
3754 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
3755 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP301]]
3756 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP301]]
3757 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP301]]
3758 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
3759 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP301]]
3760 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP301]]
3761 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP301]]
3762 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
3763 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP301]]
3764 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP301]]
3765 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
3766 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
3767 // CHECK-64: cond.true5:
3768 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
3769 // CHECK-64: cond.false6:
3770 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP301]]
3771 // CHECK-64-NEXT: br label [[COND_END7]]
3772 // CHECK-64: cond.end7:
3773 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
3774 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP301]]
3775 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP301]]
3776 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP301]]
3777 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP302:![0-9]+]]
3778 // CHECK-64: omp.inner.for.end:
3779 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3780 // CHECK-64: omp.loop.exit:
3781 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
3782 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3783 // CHECK-64-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
3784 // CHECK-64-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3785 // CHECK-64: .omp.final.then:
3786 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
3787 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
3788 // CHECK-64: .omp.final.done:
3789 // CHECK-64-NEXT: ret void
3792 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81_omp_outlined_omp_outlined
3793 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3794 // CHECK-64-NEXT: entry:
3795 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3796 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3797 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3798 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3799 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3800 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
3801 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3802 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3803 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3804 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3805 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
3806 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3807 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3808 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3809 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3810 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
3811 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
3812 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3813 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3814 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3815 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3816 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
3817 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
3818 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3819 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3820 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3821 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3822 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3823 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
3824 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
3825 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3826 // CHECK-64: omp.dispatch.cond:
3827 // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
3828 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
3829 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3830 // CHECK-64: omp.dispatch.body:
3831 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3832 // CHECK-64-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
3833 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3834 // CHECK-64: omp.inner.for.cond:
3835 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP304:![0-9]+]]
3836 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP304]]
3837 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3838 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3839 // CHECK-64: omp.inner.for.body:
3840 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP304]]
3841 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3842 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3843 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP304]]
3844 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3845 // CHECK-64: omp.body.continue:
3846 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3847 // CHECK-64: omp.inner.for.inc:
3848 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP304]]
3849 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
3850 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP304]]
3851 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP305:![0-9]+]]
3852 // CHECK-64: omp.inner.for.end:
3853 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3854 // CHECK-64: omp.dispatch.inc:
3855 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
3856 // CHECK-64: omp.dispatch.end:
3857 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
3858 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3859 // CHECK-64-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
3860 // CHECK-64-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3861 // CHECK-64: .omp.final.then:
3862 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
3863 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
3864 // CHECK-64: .omp.final.done:
3865 // CHECK-64-NEXT: ret void
3868 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85
3869 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
3870 // CHECK-64-NEXT: entry:
3871 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
3872 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
3873 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3874 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
3875 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85_kernel_environment, ptr [[DYN_PTR]])
3876 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
3877 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
3878 // CHECK-64: user_code.entry:
3879 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
3880 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
3881 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
3882 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
3883 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
3884 // CHECK-64-NEXT: ret void
3885 // CHECK-64: worker.exit:
3886 // CHECK-64-NEXT: ret void
3889 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85_omp_outlined
3890 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3891 // CHECK-64-NEXT: entry:
3892 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3893 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3894 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3895 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
3896 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3897 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3898 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3899 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3900 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
3901 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
3902 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3903 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3904 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3905 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
3906 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3907 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3908 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
3909 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3910 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3911 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
3912 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3913 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
3914 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3915 // CHECK-64: cond.true:
3916 // CHECK-64-NEXT: br label [[COND_END:%.*]]
3917 // CHECK-64: cond.false:
3918 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3919 // CHECK-64-NEXT: br label [[COND_END]]
3920 // CHECK-64: cond.end:
3921 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3922 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3923 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3924 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3925 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3926 // CHECK-64: omp.inner.for.cond:
3927 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP307:![0-9]+]]
3928 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
3929 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3930 // CHECK-64: omp.inner.for.body:
3931 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP307]]
3932 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
3933 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP307]]
3934 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3935 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
3936 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
3937 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8, !llvm.access.group [[ACC_GRP307]]
3938 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
3939 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
3940 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8, !llvm.access.group [[ACC_GRP307]]
3941 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2), !llvm.access.group [[ACC_GRP307]]
3942 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3943 // CHECK-64: omp.inner.for.inc:
3944 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP307]]
3945 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP307]]
3946 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
3947 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP307]]
3948 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP307]]
3949 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP307]]
3950 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
3951 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP307]]
3952 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP307]]
3953 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP307]]
3954 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
3955 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP307]]
3956 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP307]]
3957 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
3958 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
3959 // CHECK-64: cond.true5:
3960 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
3961 // CHECK-64: cond.false6:
3962 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP307]]
3963 // CHECK-64-NEXT: br label [[COND_END7]]
3964 // CHECK-64: cond.end7:
3965 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
3966 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP307]]
3967 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP307]]
3968 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP307]]
3969 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP308:![0-9]+]]
3970 // CHECK-64: omp.inner.for.end:
3971 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3972 // CHECK-64: omp.loop.exit:
3973 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
3974 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3975 // CHECK-64-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
3976 // CHECK-64-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3977 // CHECK-64: .omp.final.then:
3978 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
3979 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
3980 // CHECK-64: .omp.final.done:
3981 // CHECK-64-NEXT: ret void
3984 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85_omp_outlined_omp_outlined
3985 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3986 // CHECK-64-NEXT: entry:
3987 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3988 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3989 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3990 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3991 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3992 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
3993 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3994 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3995 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3996 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3997 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
3998 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3999 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4000 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4001 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4002 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
4003 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
4004 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4005 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4006 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4007 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4008 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4009 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
4010 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4011 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4012 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4013 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4014 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4015 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
4016 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
4017 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
4018 // CHECK-64: omp.dispatch.cond:
4019 // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
4020 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
4021 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4022 // CHECK-64: omp.dispatch.body:
4023 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4024 // CHECK-64-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
4025 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4026 // CHECK-64: omp.inner.for.cond:
4027 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP310:![0-9]+]]
4028 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP310]]
4029 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4030 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4031 // CHECK-64: omp.inner.for.body:
4032 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP310]]
4033 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4034 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4035 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP310]]
4036 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4037 // CHECK-64: omp.body.continue:
4038 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4039 // CHECK-64: omp.inner.for.inc:
4040 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP310]]
4041 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
4042 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP310]]
4043 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP311:![0-9]+]]
4044 // CHECK-64: omp.inner.for.end:
4045 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
4046 // CHECK-64: omp.dispatch.inc:
4047 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
4048 // CHECK-64: omp.dispatch.end:
4049 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
4050 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
4051 // CHECK-64-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
4052 // CHECK-64-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4053 // CHECK-64: .omp.final.then:
4054 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
4055 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
4056 // CHECK-64: .omp.final.done:
4057 // CHECK-64-NEXT: ret void
4060 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89
4061 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
4062 // CHECK-64-NEXT: entry:
4063 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
4064 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
4065 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
4066 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
4067 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89_kernel_environment, ptr [[DYN_PTR]])
4068 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
4069 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
4070 // CHECK-64: user_code.entry:
4071 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
4072 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
4073 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
4074 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
4075 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
4076 // CHECK-64-NEXT: ret void
4077 // CHECK-64: worker.exit:
4078 // CHECK-64-NEXT: ret void
4081 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89_omp_outlined
4082 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4083 // CHECK-64-NEXT: entry:
4084 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4085 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4086 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4087 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
4088 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4089 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4090 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4091 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4092 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
4093 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
4094 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4095 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4096 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4097 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
4098 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4099 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4100 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
4101 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4102 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4103 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
4104 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4105 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
4106 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4107 // CHECK-64: cond.true:
4108 // CHECK-64-NEXT: br label [[COND_END:%.*]]
4109 // CHECK-64: cond.false:
4110 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4111 // CHECK-64-NEXT: br label [[COND_END]]
4112 // CHECK-64: cond.end:
4113 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4114 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4115 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4116 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4117 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4118 // CHECK-64: omp.inner.for.cond:
4119 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP313:![0-9]+]]
4120 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
4121 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4122 // CHECK-64: omp.inner.for.body:
4123 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP313]]
4124 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
4125 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP313]]
4126 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4127 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
4128 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
4129 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8, !llvm.access.group [[ACC_GRP313]]
4130 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
4131 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
4132 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8, !llvm.access.group [[ACC_GRP313]]
4133 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2), !llvm.access.group [[ACC_GRP313]]
4134 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4135 // CHECK-64: omp.inner.for.inc:
4136 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP313]]
4137 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP313]]
4138 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
4139 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP313]]
4140 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP313]]
4141 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP313]]
4142 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
4143 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP313]]
4144 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP313]]
4145 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP313]]
4146 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
4147 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP313]]
4148 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP313]]
4149 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
4150 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
4151 // CHECK-64: cond.true5:
4152 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
4153 // CHECK-64: cond.false6:
4154 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP313]]
4155 // CHECK-64-NEXT: br label [[COND_END7]]
4156 // CHECK-64: cond.end7:
4157 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
4158 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP313]]
4159 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP313]]
4160 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP313]]
4161 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP314:![0-9]+]]
4162 // CHECK-64: omp.inner.for.end:
4163 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4164 // CHECK-64: omp.loop.exit:
4165 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
4166 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
4167 // CHECK-64-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
4168 // CHECK-64-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4169 // CHECK-64: .omp.final.then:
4170 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
4171 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
4172 // CHECK-64: .omp.final.done:
4173 // CHECK-64-NEXT: ret void
4176 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89_omp_outlined_omp_outlined
4177 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4178 // CHECK-64-NEXT: entry:
4179 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4180 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4181 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4182 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4183 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4184 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
4185 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4186 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4187 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4188 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4189 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
4190 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4191 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4192 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4193 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4194 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
4195 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
4196 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4197 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4198 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4199 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4200 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4201 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
4202 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4203 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4204 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4205 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4206 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4207 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
4208 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
4209 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
4210 // CHECK-64: omp.dispatch.cond:
4211 // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
4212 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
4213 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4214 // CHECK-64: omp.dispatch.body:
4215 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4216 // CHECK-64-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
4217 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4218 // CHECK-64: omp.inner.for.cond:
4219 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP316:![0-9]+]]
4220 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP316]]
4221 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4222 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4223 // CHECK-64: omp.inner.for.body:
4224 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP316]]
4225 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4226 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4227 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP316]]
4228 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4229 // CHECK-64: omp.body.continue:
4230 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4231 // CHECK-64: omp.inner.for.inc:
4232 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP316]]
4233 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
4234 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP316]]
4235 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP317:![0-9]+]]
4236 // CHECK-64: omp.inner.for.end:
4237 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
4238 // CHECK-64: omp.dispatch.inc:
4239 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
4240 // CHECK-64: omp.dispatch.end:
4241 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
4242 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
4243 // CHECK-64-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
4244 // CHECK-64-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4245 // CHECK-64: .omp.final.then:
4246 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
4247 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
4248 // CHECK-64: .omp.final.done:
4249 // CHECK-64-NEXT: ret void
4252 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93
4253 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
4254 // CHECK-64-NEXT: entry:
4255 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
4256 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
4257 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
4258 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
4259 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93_kernel_environment, ptr [[DYN_PTR]])
4260 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
4261 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
4262 // CHECK-64: user_code.entry:
4263 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
4264 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
4265 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
4266 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
4267 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
4268 // CHECK-64-NEXT: ret void
4269 // CHECK-64: worker.exit:
4270 // CHECK-64-NEXT: ret void
4273 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93_omp_outlined
4274 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4275 // CHECK-64-NEXT: entry:
4276 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4277 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4278 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4279 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
4280 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4281 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4282 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4283 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4284 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
4285 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
4286 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4287 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4288 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4289 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
4290 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4291 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4292 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
4293 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4294 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4295 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
4296 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4297 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
4298 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4299 // CHECK-64: cond.true:
4300 // CHECK-64-NEXT: br label [[COND_END:%.*]]
4301 // CHECK-64: cond.false:
4302 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4303 // CHECK-64-NEXT: br label [[COND_END]]
4304 // CHECK-64: cond.end:
4305 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4306 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4307 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4308 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4309 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4310 // CHECK-64: omp.inner.for.cond:
4311 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP319:![0-9]+]]
4312 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
4313 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4314 // CHECK-64: omp.inner.for.body:
4315 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP319]]
4316 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
4317 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP319]]
4318 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4319 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
4320 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
4321 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8, !llvm.access.group [[ACC_GRP319]]
4322 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
4323 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
4324 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8, !llvm.access.group [[ACC_GRP319]]
4325 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2), !llvm.access.group [[ACC_GRP319]]
4326 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4327 // CHECK-64: omp.inner.for.inc:
4328 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP319]]
4329 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP319]]
4330 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
4331 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP319]]
4332 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP319]]
4333 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP319]]
4334 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
4335 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP319]]
4336 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP319]]
4337 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP319]]
4338 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
4339 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP319]]
4340 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP319]]
4341 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
4342 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
4343 // CHECK-64: cond.true5:
4344 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
4345 // CHECK-64: cond.false6:
4346 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP319]]
4347 // CHECK-64-NEXT: br label [[COND_END7]]
4348 // CHECK-64: cond.end7:
4349 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
4350 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP319]]
4351 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP319]]
4352 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP319]]
4353 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP320:![0-9]+]]
4354 // CHECK-64: omp.inner.for.end:
4355 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4356 // CHECK-64: omp.loop.exit:
4357 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
4358 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
4359 // CHECK-64-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
4360 // CHECK-64-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4361 // CHECK-64: .omp.final.then:
4362 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
4363 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
4364 // CHECK-64: .omp.final.done:
4365 // CHECK-64-NEXT: ret void
4368 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93_omp_outlined_omp_outlined
4369 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4370 // CHECK-64-NEXT: entry:
4371 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4372 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4373 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4374 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4375 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4376 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
4377 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4378 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4379 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4380 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4381 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
4382 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4383 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4384 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4385 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4386 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
4387 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
4388 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4389 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4390 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4391 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4392 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4393 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
4394 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4395 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4396 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4397 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4398 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4399 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
4400 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
4401 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
4402 // CHECK-64: omp.dispatch.cond:
4403 // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
4404 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
4405 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4406 // CHECK-64: omp.dispatch.body:
4407 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4408 // CHECK-64-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
4409 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4410 // CHECK-64: omp.inner.for.cond:
4411 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP322:![0-9]+]]
4412 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP322]]
4413 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4414 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4415 // CHECK-64: omp.inner.for.body:
4416 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP322]]
4417 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4418 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4419 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP322]]
4420 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4421 // CHECK-64: omp.body.continue:
4422 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4423 // CHECK-64: omp.inner.for.inc:
4424 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP322]]
4425 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
4426 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP322]]
4427 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP323:![0-9]+]]
4428 // CHECK-64: omp.inner.for.end:
4429 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
4430 // CHECK-64: omp.dispatch.inc:
4431 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
4432 // CHECK-64: omp.dispatch.end:
4433 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
4434 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
4435 // CHECK-64-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
4436 // CHECK-64-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4437 // CHECK-64: .omp.final.then:
4438 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
4439 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
4440 // CHECK-64: .omp.final.done:
4441 // CHECK-64-NEXT: ret void
4444 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97
4445 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
4446 // CHECK-64-NEXT: entry:
4447 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
4448 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
4449 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
4450 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
4451 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97_kernel_environment, ptr [[DYN_PTR]])
4452 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
4453 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
4454 // CHECK-64: user_code.entry:
4455 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
4456 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
4457 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
4458 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
4459 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
4460 // CHECK-64-NEXT: ret void
4461 // CHECK-64: worker.exit:
4462 // CHECK-64-NEXT: ret void
4465 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97_omp_outlined
4466 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4467 // CHECK-64-NEXT: entry:
4468 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4469 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4470 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4471 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
4472 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4473 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4474 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4475 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4476 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
4477 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
4478 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4479 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4480 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4481 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
4482 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4483 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4484 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
4485 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4486 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4487 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
4488 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4489 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
4490 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4491 // CHECK-64: cond.true:
4492 // CHECK-64-NEXT: br label [[COND_END:%.*]]
4493 // CHECK-64: cond.false:
4494 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4495 // CHECK-64-NEXT: br label [[COND_END]]
4496 // CHECK-64: cond.end:
4497 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4498 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4499 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4500 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4501 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4502 // CHECK-64: omp.inner.for.cond:
4503 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4504 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
4505 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4506 // CHECK-64: omp.inner.for.body:
4507 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4508 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
4509 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4510 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4511 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
4512 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
4513 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8
4514 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
4515 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
4516 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
4517 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
4518 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4519 // CHECK-64: omp.inner.for.inc:
4520 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4521 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4522 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
4523 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
4524 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4525 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4526 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
4527 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
4528 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4529 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4530 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
4531 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
4532 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4533 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
4534 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
4535 // CHECK-64: cond.true5:
4536 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
4537 // CHECK-64: cond.false6:
4538 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4539 // CHECK-64-NEXT: br label [[COND_END7]]
4540 // CHECK-64: cond.end7:
4541 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
4542 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
4543 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4544 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
4545 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
4546 // CHECK-64: omp.inner.for.end:
4547 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4548 // CHECK-64: omp.loop.exit:
4549 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
4550 // CHECK-64-NEXT: ret void
4553 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97_omp_outlined_omp_outlined
4554 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4555 // CHECK-64-NEXT: entry:
4556 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4557 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4558 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4559 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4560 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4561 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
4562 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4563 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4564 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4565 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4566 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
4567 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4568 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4569 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4570 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4571 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
4572 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
4573 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4574 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4575 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4576 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4577 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4578 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
4579 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4580 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4581 // CHECK-64-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4582 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
4583 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4584 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4585 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4586 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4587 // CHECK-64: omp.inner.for.cond:
4588 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4589 // CHECK-64-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64
4590 // CHECK-64-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4591 // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP6]]
4592 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4593 // CHECK-64: omp.inner.for.body:
4594 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4595 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
4596 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4597 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4
4598 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4599 // CHECK-64: omp.body.continue:
4600 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4601 // CHECK-64: omp.inner.for.inc:
4602 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4603 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4604 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
4605 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
4606 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
4607 // CHECK-64: omp.inner.for.end:
4608 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4609 // CHECK-64: omp.loop.exit:
4610 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
4611 // CHECK-64-NEXT: ret void
4614 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101
4615 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
4616 // CHECK-64-NEXT: entry:
4617 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
4618 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
4619 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
4620 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
4621 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101_kernel_environment, ptr [[DYN_PTR]])
4622 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
4623 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
4624 // CHECK-64: user_code.entry:
4625 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
4626 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
4627 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
4628 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
4629 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
4630 // CHECK-64-NEXT: ret void
4631 // CHECK-64: worker.exit:
4632 // CHECK-64-NEXT: ret void
4635 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101_omp_outlined
4636 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4637 // CHECK-64-NEXT: entry:
4638 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4639 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4640 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4641 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
4642 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4643 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4644 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4645 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4646 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
4647 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
4648 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4649 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4650 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4651 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
4652 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4653 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4654 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
4655 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4656 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4657 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
4658 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4659 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
4660 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4661 // CHECK-64: cond.true:
4662 // CHECK-64-NEXT: br label [[COND_END:%.*]]
4663 // CHECK-64: cond.false:
4664 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4665 // CHECK-64-NEXT: br label [[COND_END]]
4666 // CHECK-64: cond.end:
4667 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4668 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4669 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4670 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4671 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4672 // CHECK-64: omp.inner.for.cond:
4673 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4674 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
4675 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4676 // CHECK-64: omp.inner.for.body:
4677 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4678 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
4679 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4680 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4681 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
4682 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
4683 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8
4684 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
4685 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
4686 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
4687 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
4688 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4689 // CHECK-64: omp.inner.for.inc:
4690 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4691 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4692 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
4693 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
4694 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4695 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4696 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
4697 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
4698 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4699 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4700 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
4701 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
4702 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4703 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
4704 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
4705 // CHECK-64: cond.true5:
4706 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
4707 // CHECK-64: cond.false6:
4708 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4709 // CHECK-64-NEXT: br label [[COND_END7]]
4710 // CHECK-64: cond.end7:
4711 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
4712 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
4713 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4714 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
4715 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
4716 // CHECK-64: omp.inner.for.end:
4717 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4718 // CHECK-64: omp.loop.exit:
4719 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
4720 // CHECK-64-NEXT: ret void
4723 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101_omp_outlined_omp_outlined
4724 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4725 // CHECK-64-NEXT: entry:
4726 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4727 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4728 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4729 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4730 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4731 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
4732 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4733 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4734 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4735 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4736 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
4737 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4738 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4739 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4740 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4741 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
4742 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
4743 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4744 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4745 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4746 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4747 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4748 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
4749 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4750 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4751 // CHECK-64-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4752 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
4753 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4754 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4755 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9
4756 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4757 // CHECK-64: cond.true:
4758 // CHECK-64-NEXT: br label [[COND_END:%.*]]
4759 // CHECK-64: cond.false:
4760 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4761 // CHECK-64-NEXT: br label [[COND_END]]
4762 // CHECK-64: cond.end:
4763 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4764 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
4765 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4766 // CHECK-64-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
4767 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4768 // CHECK-64: omp.inner.for.cond:
4769 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4770 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4771 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4772 // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4773 // CHECK-64: omp.inner.for.body:
4774 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4775 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4776 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4777 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4
4778 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4779 // CHECK-64: omp.body.continue:
4780 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4781 // CHECK-64: omp.inner.for.inc:
4782 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4783 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4784 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
4785 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
4786 // CHECK-64: omp.inner.for.end:
4787 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4788 // CHECK-64: omp.loop.exit:
4789 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
4790 // CHECK-64-NEXT: ret void
4793 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105
4794 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
4795 // CHECK-64-NEXT: entry:
4796 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
4797 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
4798 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
4799 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
4800 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105_kernel_environment, ptr [[DYN_PTR]])
4801 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
4802 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
4803 // CHECK-64: user_code.entry:
4804 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
4805 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
4806 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
4807 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
4808 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
4809 // CHECK-64-NEXT: ret void
4810 // CHECK-64: worker.exit:
4811 // CHECK-64-NEXT: ret void
4814 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105_omp_outlined
4815 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4816 // CHECK-64-NEXT: entry:
4817 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4818 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4819 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4820 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
4821 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4822 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4823 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4824 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4825 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
4826 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
4827 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4828 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4829 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4830 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
4831 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4832 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4833 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
4834 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4835 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4836 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
4837 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4838 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
4839 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4840 // CHECK-64: cond.true:
4841 // CHECK-64-NEXT: br label [[COND_END:%.*]]
4842 // CHECK-64: cond.false:
4843 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4844 // CHECK-64-NEXT: br label [[COND_END]]
4845 // CHECK-64: cond.end:
4846 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4847 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4848 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4849 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4850 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4851 // CHECK-64: omp.inner.for.cond:
4852 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4853 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
4854 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4855 // CHECK-64: omp.inner.for.body:
4856 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4857 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
4858 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4859 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4860 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
4861 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
4862 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8
4863 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
4864 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
4865 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
4866 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
4867 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4868 // CHECK-64: omp.inner.for.inc:
4869 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4870 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4871 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
4872 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
4873 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4874 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4875 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
4876 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
4877 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4878 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4879 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
4880 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
4881 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4882 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
4883 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
4884 // CHECK-64: cond.true5:
4885 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
4886 // CHECK-64: cond.false6:
4887 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4888 // CHECK-64-NEXT: br label [[COND_END7]]
4889 // CHECK-64: cond.end7:
4890 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
4891 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
4892 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4893 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
4894 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
4895 // CHECK-64: omp.inner.for.end:
4896 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4897 // CHECK-64: omp.loop.exit:
4898 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
4899 // CHECK-64-NEXT: ret void
4902 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105_omp_outlined_omp_outlined
4903 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4904 // CHECK-64-NEXT: entry:
4905 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4906 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4907 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4908 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4909 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4910 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
4911 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4912 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4913 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4914 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4915 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
4916 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4917 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4918 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4919 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4920 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
4921 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
4922 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4923 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4924 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4925 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4926 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4927 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
4928 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4929 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4930 // CHECK-64-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4931 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
4932 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4933 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4934 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4935 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4936 // CHECK-64: omp.inner.for.cond:
4937 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4938 // CHECK-64-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64
4939 // CHECK-64-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4940 // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP6]]
4941 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4942 // CHECK-64: omp.inner.for.body:
4943 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4944 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
4945 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4946 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4
4947 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4948 // CHECK-64: omp.body.continue:
4949 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4950 // CHECK-64: omp.inner.for.inc:
4951 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4952 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4953 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
4954 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
4955 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
4956 // CHECK-64: omp.inner.for.end:
4957 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4958 // CHECK-64: omp.loop.exit:
4959 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
4960 // CHECK-64-NEXT: ret void
4963 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109
4964 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
4965 // CHECK-64-NEXT: entry:
4966 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
4967 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
4968 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
4969 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
4970 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109_kernel_environment, ptr [[DYN_PTR]])
4971 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
4972 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
4973 // CHECK-64: user_code.entry:
4974 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
4975 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
4976 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
4977 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
4978 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
4979 // CHECK-64-NEXT: ret void
4980 // CHECK-64: worker.exit:
4981 // CHECK-64-NEXT: ret void
4984 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109_omp_outlined
4985 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4986 // CHECK-64-NEXT: entry:
4987 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4988 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4989 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4990 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
4991 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4992 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4993 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4994 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4995 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
4996 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
4997 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4998 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4999 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5000 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
5001 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5002 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5003 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
5004 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5005 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5006 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
5007 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5008 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
5009 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5010 // CHECK-64: cond.true:
5011 // CHECK-64-NEXT: br label [[COND_END:%.*]]
5012 // CHECK-64: cond.false:
5013 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5014 // CHECK-64-NEXT: br label [[COND_END]]
5015 // CHECK-64: cond.end:
5016 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5017 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5018 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5019 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
5020 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5021 // CHECK-64: omp.inner.for.cond:
5022 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5023 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
5024 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5025 // CHECK-64: omp.inner.for.body:
5026 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5027 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
5028 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5029 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5030 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
5031 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
5032 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8
5033 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
5034 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
5035 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
5036 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
5037 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5038 // CHECK-64: omp.inner.for.inc:
5039 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5040 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5041 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
5042 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
5043 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5044 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5045 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
5046 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
5047 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5048 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5049 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
5050 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
5051 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5052 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
5053 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
5054 // CHECK-64: cond.true5:
5055 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
5056 // CHECK-64: cond.false6:
5057 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5058 // CHECK-64-NEXT: br label [[COND_END7]]
5059 // CHECK-64: cond.end7:
5060 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
5061 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
5062 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5063 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
5064 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
5065 // CHECK-64: omp.inner.for.end:
5066 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5067 // CHECK-64: omp.loop.exit:
5068 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
5069 // CHECK-64-NEXT: ret void
5072 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109_omp_outlined_omp_outlined
5073 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5074 // CHECK-64-NEXT: entry:
5075 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5076 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5077 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5078 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5079 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5080 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
5081 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5082 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5083 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5084 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5085 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
5086 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5087 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5088 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5089 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5090 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
5091 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
5092 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5093 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5094 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5095 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5096 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5097 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
5098 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5099 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5100 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5101 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5102 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5103 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
5104 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
5105 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
5106 // CHECK-64: omp.dispatch.cond:
5107 // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
5108 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
5109 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5110 // CHECK-64: omp.dispatch.body:
5111 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5112 // CHECK-64-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
5113 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5114 // CHECK-64: omp.inner.for.cond:
5115 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP325:![0-9]+]]
5116 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP325]]
5117 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
5118 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5119 // CHECK-64: omp.inner.for.body:
5120 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP325]]
5121 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
5122 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5123 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP325]]
5124 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5125 // CHECK-64: omp.body.continue:
5126 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5127 // CHECK-64: omp.inner.for.inc:
5128 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP325]]
5129 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
5130 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP325]]
5131 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP326:![0-9]+]]
5132 // CHECK-64: omp.inner.for.end:
5133 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
5134 // CHECK-64: omp.dispatch.inc:
5135 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
5136 // CHECK-64: omp.dispatch.end:
5137 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
5138 // CHECK-64-NEXT: ret void
5141 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113
5142 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
5143 // CHECK-64-NEXT: entry:
5144 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
5145 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
5146 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5147 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
5148 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113_kernel_environment, ptr [[DYN_PTR]])
5149 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
5150 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
5151 // CHECK-64: user_code.entry:
5152 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
5153 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
5154 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
5155 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
5156 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
5157 // CHECK-64-NEXT: ret void
5158 // CHECK-64: worker.exit:
5159 // CHECK-64-NEXT: ret void
5162 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113_omp_outlined
5163 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5164 // CHECK-64-NEXT: entry:
5165 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5166 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5167 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5168 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
5169 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5170 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5171 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5172 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5173 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
5174 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
5175 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5176 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5177 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5178 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
5179 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5180 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5181 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
5182 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5183 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5184 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
5185 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5186 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
5187 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5188 // CHECK-64: cond.true:
5189 // CHECK-64-NEXT: br label [[COND_END:%.*]]
5190 // CHECK-64: cond.false:
5191 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5192 // CHECK-64-NEXT: br label [[COND_END]]
5193 // CHECK-64: cond.end:
5194 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5195 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5196 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5197 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
5198 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5199 // CHECK-64: omp.inner.for.cond:
5200 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5201 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
5202 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5203 // CHECK-64: omp.inner.for.body:
5204 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5205 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
5206 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5207 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5208 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
5209 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
5210 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8
5211 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
5212 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
5213 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
5214 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
5215 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5216 // CHECK-64: omp.inner.for.inc:
5217 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5218 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5219 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
5220 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
5221 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5222 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5223 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
5224 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
5225 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5226 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5227 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
5228 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
5229 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5230 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
5231 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
5232 // CHECK-64: cond.true5:
5233 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
5234 // CHECK-64: cond.false6:
5235 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5236 // CHECK-64-NEXT: br label [[COND_END7]]
5237 // CHECK-64: cond.end7:
5238 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
5239 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
5240 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5241 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
5242 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
5243 // CHECK-64: omp.inner.for.end:
5244 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5245 // CHECK-64: omp.loop.exit:
5246 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
5247 // CHECK-64-NEXT: ret void
5250 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113_omp_outlined_omp_outlined
5251 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5252 // CHECK-64-NEXT: entry:
5253 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5254 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5255 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5256 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5257 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5258 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
5259 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5260 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5261 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5262 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5263 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
5264 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5265 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5266 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5267 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5268 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
5269 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
5270 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5271 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5272 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5273 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5274 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5275 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
5276 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5277 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5278 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5279 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5280 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5281 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
5282 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
5283 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
5284 // CHECK-64: omp.dispatch.cond:
5285 // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
5286 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
5287 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5288 // CHECK-64: omp.dispatch.body:
5289 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5290 // CHECK-64-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
5291 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5292 // CHECK-64: omp.inner.for.cond:
5293 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP328:![0-9]+]]
5294 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP328]]
5295 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
5296 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5297 // CHECK-64: omp.inner.for.body:
5298 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP328]]
5299 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
5300 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5301 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP328]]
5302 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5303 // CHECK-64: omp.body.continue:
5304 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5305 // CHECK-64: omp.inner.for.inc:
5306 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP328]]
5307 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
5308 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP328]]
5309 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP329:![0-9]+]]
5310 // CHECK-64: omp.inner.for.end:
5311 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
5312 // CHECK-64: omp.dispatch.inc:
5313 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
5314 // CHECK-64: omp.dispatch.end:
5315 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
5316 // CHECK-64-NEXT: ret void
5319 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117
5320 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
5321 // CHECK-64-NEXT: entry:
5322 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
5323 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
5324 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5325 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
5326 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117_kernel_environment, ptr [[DYN_PTR]])
5327 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
5328 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
5329 // CHECK-64: user_code.entry:
5330 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
5331 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
5332 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
5333 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
5334 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
5335 // CHECK-64-NEXT: ret void
5336 // CHECK-64: worker.exit:
5337 // CHECK-64-NEXT: ret void
5340 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117_omp_outlined
5341 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5342 // CHECK-64-NEXT: entry:
5343 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5344 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5345 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5346 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
5347 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5348 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5349 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5350 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5351 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
5352 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
5353 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5354 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5355 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5356 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
5357 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5358 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5359 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
5360 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5361 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5362 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
5363 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5364 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
5365 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5366 // CHECK-64: cond.true:
5367 // CHECK-64-NEXT: br label [[COND_END:%.*]]
5368 // CHECK-64: cond.false:
5369 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5370 // CHECK-64-NEXT: br label [[COND_END]]
5371 // CHECK-64: cond.end:
5372 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5373 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5374 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5375 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
5376 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5377 // CHECK-64: omp.inner.for.cond:
5378 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5379 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
5380 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5381 // CHECK-64: omp.inner.for.body:
5382 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5383 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
5384 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5385 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5386 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
5387 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
5388 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8
5389 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
5390 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
5391 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
5392 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
5393 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5394 // CHECK-64: omp.inner.for.inc:
5395 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5396 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5397 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
5398 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
5399 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5400 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5401 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
5402 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
5403 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5404 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5405 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
5406 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
5407 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5408 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
5409 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
5410 // CHECK-64: cond.true5:
5411 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
5412 // CHECK-64: cond.false6:
5413 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5414 // CHECK-64-NEXT: br label [[COND_END7]]
5415 // CHECK-64: cond.end7:
5416 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
5417 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
5418 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5419 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
5420 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
5421 // CHECK-64: omp.inner.for.end:
5422 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5423 // CHECK-64: omp.loop.exit:
5424 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
5425 // CHECK-64-NEXT: ret void
5428 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117_omp_outlined_omp_outlined
5429 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5430 // CHECK-64-NEXT: entry:
5431 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5432 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5433 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5434 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5435 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5436 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
5437 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5438 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5439 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5440 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5441 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
5442 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5443 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5444 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5445 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5446 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
5447 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
5448 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5449 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5450 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5451 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5452 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5453 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
5454 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5455 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5456 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5457 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5458 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5459 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
5460 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
5461 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
5462 // CHECK-64: omp.dispatch.cond:
5463 // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
5464 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
5465 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5466 // CHECK-64: omp.dispatch.body:
5467 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5468 // CHECK-64-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
5469 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5470 // CHECK-64: omp.inner.for.cond:
5471 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP331:![0-9]+]]
5472 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP331]]
5473 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
5474 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5475 // CHECK-64: omp.inner.for.body:
5476 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP331]]
5477 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
5478 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5479 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP331]]
5480 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5481 // CHECK-64: omp.body.continue:
5482 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5483 // CHECK-64: omp.inner.for.inc:
5484 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP331]]
5485 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
5486 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP331]]
5487 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP332:![0-9]+]]
5488 // CHECK-64: omp.inner.for.end:
5489 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
5490 // CHECK-64: omp.dispatch.inc:
5491 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
5492 // CHECK-64: omp.dispatch.end:
5493 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
5494 // CHECK-64-NEXT: ret void
5497 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121
5498 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
5499 // CHECK-64-NEXT: entry:
5500 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
5501 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
5502 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5503 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
5504 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121_kernel_environment, ptr [[DYN_PTR]])
5505 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
5506 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
5507 // CHECK-64: user_code.entry:
5508 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
5509 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
5510 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
5511 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
5512 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
5513 // CHECK-64-NEXT: ret void
5514 // CHECK-64: worker.exit:
5515 // CHECK-64-NEXT: ret void
5518 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121_omp_outlined
5519 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5520 // CHECK-64-NEXT: entry:
5521 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5522 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5523 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5524 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
5525 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5526 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5527 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5528 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5529 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
5530 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
5531 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5532 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5533 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5534 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
5535 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5536 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5537 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
5538 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5539 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5540 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
5541 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5542 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
5543 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5544 // CHECK-64: cond.true:
5545 // CHECK-64-NEXT: br label [[COND_END:%.*]]
5546 // CHECK-64: cond.false:
5547 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5548 // CHECK-64-NEXT: br label [[COND_END]]
5549 // CHECK-64: cond.end:
5550 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5551 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5552 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5553 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
5554 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5555 // CHECK-64: omp.inner.for.cond:
5556 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5557 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
5558 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5559 // CHECK-64: omp.inner.for.body:
5560 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5561 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
5562 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5563 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5564 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
5565 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
5566 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8
5567 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
5568 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
5569 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
5570 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
5571 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5572 // CHECK-64: omp.inner.for.inc:
5573 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5574 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5575 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
5576 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
5577 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5578 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5579 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
5580 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
5581 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5582 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5583 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
5584 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
5585 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5586 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
5587 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
5588 // CHECK-64: cond.true5:
5589 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
5590 // CHECK-64: cond.false6:
5591 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5592 // CHECK-64-NEXT: br label [[COND_END7]]
5593 // CHECK-64: cond.end7:
5594 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
5595 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
5596 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5597 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
5598 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
5599 // CHECK-64: omp.inner.for.end:
5600 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5601 // CHECK-64: omp.loop.exit:
5602 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
5603 // CHECK-64-NEXT: ret void
5606 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121_omp_outlined_omp_outlined
5607 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5608 // CHECK-64-NEXT: entry:
5609 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5610 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5611 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5612 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5613 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5614 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
5615 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5616 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5617 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5618 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5619 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
5620 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5621 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5622 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5623 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5624 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
5625 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
5626 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5627 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5628 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5629 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5630 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5631 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
5632 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5633 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5634 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5635 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5636 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5637 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
5638 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
5639 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
5640 // CHECK-64: omp.dispatch.cond:
5641 // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
5642 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
5643 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5644 // CHECK-64: omp.dispatch.body:
5645 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5646 // CHECK-64-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
5647 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5648 // CHECK-64: omp.inner.for.cond:
5649 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP334:![0-9]+]]
5650 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP334]]
5651 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
5652 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5653 // CHECK-64: omp.inner.for.body:
5654 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP334]]
5655 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
5656 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5657 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP334]]
5658 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5659 // CHECK-64: omp.body.continue:
5660 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5661 // CHECK-64: omp.inner.for.inc:
5662 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP334]]
5663 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
5664 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP334]]
5665 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP335:![0-9]+]]
5666 // CHECK-64: omp.inner.for.end:
5667 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
5668 // CHECK-64: omp.dispatch.inc:
5669 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
5670 // CHECK-64: omp.dispatch.end:
5671 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
5672 // CHECK-64-NEXT: ret void
5675 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125
5676 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
5677 // CHECK-64-NEXT: entry:
5678 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
5679 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
5680 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5681 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
5682 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125_kernel_environment, ptr [[DYN_PTR]])
5683 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
5684 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
5685 // CHECK-64: user_code.entry:
5686 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
5687 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
5688 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
5689 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
5690 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
5691 // CHECK-64-NEXT: ret void
5692 // CHECK-64: worker.exit:
5693 // CHECK-64-NEXT: ret void
5696 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125_omp_outlined
5697 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5698 // CHECK-64-NEXT: entry:
5699 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5700 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5701 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5702 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
5703 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5704 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5705 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5706 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5707 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
5708 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
5709 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5710 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5711 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5712 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
5713 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5714 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5715 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
5716 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5717 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5718 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
5719 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5720 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
5721 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5722 // CHECK-64: cond.true:
5723 // CHECK-64-NEXT: br label [[COND_END:%.*]]
5724 // CHECK-64: cond.false:
5725 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5726 // CHECK-64-NEXT: br label [[COND_END]]
5727 // CHECK-64: cond.end:
5728 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5729 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5730 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5731 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
5732 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5733 // CHECK-64: omp.inner.for.cond:
5734 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5735 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
5736 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5737 // CHECK-64: omp.inner.for.body:
5738 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5739 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
5740 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5741 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5742 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
5743 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
5744 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8
5745 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
5746 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
5747 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
5748 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
5749 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5750 // CHECK-64: omp.inner.for.inc:
5751 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5752 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5753 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
5754 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
5755 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5756 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5757 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
5758 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
5759 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5760 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5761 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
5762 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
5763 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5764 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
5765 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
5766 // CHECK-64: cond.true5:
5767 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
5768 // CHECK-64: cond.false6:
5769 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5770 // CHECK-64-NEXT: br label [[COND_END7]]
5771 // CHECK-64: cond.end7:
5772 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
5773 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
5774 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5775 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
5776 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
5777 // CHECK-64: omp.inner.for.end:
5778 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5779 // CHECK-64: omp.loop.exit:
5780 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
5781 // CHECK-64-NEXT: ret void
5784 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125_omp_outlined_omp_outlined
5785 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5786 // CHECK-64-NEXT: entry:
5787 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5788 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5789 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5790 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5791 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5792 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
5793 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5794 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5795 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5796 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5797 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
5798 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5799 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5800 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5801 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5802 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
5803 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
5804 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5805 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5806 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5807 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5808 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5809 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
5810 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5811 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5812 // CHECK-64-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5813 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
5814 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5815 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5816 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
5817 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5818 // CHECK-64: omp.inner.for.cond:
5819 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5820 // CHECK-64-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64
5821 // CHECK-64-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5822 // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP6]]
5823 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5824 // CHECK-64: omp.inner.for.body:
5825 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5826 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
5827 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5828 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4
5829 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5830 // CHECK-64: omp.body.continue:
5831 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5832 // CHECK-64: omp.inner.for.inc:
5833 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5834 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5835 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
5836 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
5837 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
5838 // CHECK-64: omp.inner.for.end:
5839 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5840 // CHECK-64: omp.loop.exit:
5841 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
5842 // CHECK-64-NEXT: ret void
5845 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130
5846 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
5847 // CHECK-64-NEXT: entry:
5848 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
5849 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
5850 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5851 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
5852 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130_kernel_environment, ptr [[DYN_PTR]])
5853 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
5854 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
5855 // CHECK-64: user_code.entry:
5856 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
5857 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
5858 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
5859 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
5860 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
5861 // CHECK-64-NEXT: ret void
5862 // CHECK-64: worker.exit:
5863 // CHECK-64-NEXT: ret void
5866 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130_omp_outlined
5867 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5868 // CHECK-64-NEXT: entry:
5869 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5870 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5871 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5872 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
5873 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5874 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5875 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5876 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5877 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
5878 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
5879 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5880 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5881 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5882 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
5883 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5884 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5885 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
5886 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5887 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5888 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
5889 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5890 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
5891 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5892 // CHECK-64: cond.true:
5893 // CHECK-64-NEXT: br label [[COND_END:%.*]]
5894 // CHECK-64: cond.false:
5895 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5896 // CHECK-64-NEXT: br label [[COND_END]]
5897 // CHECK-64: cond.end:
5898 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5899 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5900 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5901 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
5902 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5903 // CHECK-64: omp.inner.for.cond:
5904 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5905 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
5906 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5907 // CHECK-64: omp.inner.for.body:
5908 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5909 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
5910 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5911 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5912 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
5913 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
5914 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8
5915 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
5916 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
5917 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
5918 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
5919 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5920 // CHECK-64: omp.inner.for.inc:
5921 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5922 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5923 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
5924 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
5925 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5926 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5927 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
5928 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
5929 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5930 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5931 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
5932 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
5933 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5934 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
5935 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
5936 // CHECK-64: cond.true5:
5937 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
5938 // CHECK-64: cond.false6:
5939 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5940 // CHECK-64-NEXT: br label [[COND_END7]]
5941 // CHECK-64: cond.end7:
5942 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
5943 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
5944 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5945 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
5946 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
5947 // CHECK-64: omp.inner.for.end:
5948 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5949 // CHECK-64: omp.loop.exit:
5950 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
5951 // CHECK-64-NEXT: ret void
5954 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130_omp_outlined_omp_outlined
5955 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5956 // CHECK-64-NEXT: entry:
5957 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5958 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5959 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5960 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5961 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5962 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
5963 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5964 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5965 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5966 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5967 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
5968 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5969 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5970 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5971 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5972 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
5973 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
5974 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5975 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5976 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5977 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5978 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5979 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
5980 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5981 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5982 // CHECK-64-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5983 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
5984 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5985 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5986 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9
5987 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5988 // CHECK-64: cond.true:
5989 // CHECK-64-NEXT: br label [[COND_END:%.*]]
5990 // CHECK-64: cond.false:
5991 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5992 // CHECK-64-NEXT: br label [[COND_END]]
5993 // CHECK-64: cond.end:
5994 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5995 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5996 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5997 // CHECK-64-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
5998 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5999 // CHECK-64: omp.inner.for.cond:
6000 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6001 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6002 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6003 // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6004 // CHECK-64: omp.inner.for.body:
6005 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6006 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6007 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6008 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4
6009 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6010 // CHECK-64: omp.body.continue:
6011 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6012 // CHECK-64: omp.inner.for.inc:
6013 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6014 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6015 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
6016 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
6017 // CHECK-64: omp.inner.for.end:
6018 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6019 // CHECK-64: omp.loop.exit:
6020 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
6021 // CHECK-64-NEXT: ret void
6024 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135
6025 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
6026 // CHECK-64-NEXT: entry:
6027 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
6028 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
6029 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
6030 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
6031 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135_kernel_environment, ptr [[DYN_PTR]])
6032 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
6033 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
6034 // CHECK-64: user_code.entry:
6035 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
6036 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
6037 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
6038 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
6039 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
6040 // CHECK-64-NEXT: ret void
6041 // CHECK-64: worker.exit:
6042 // CHECK-64-NEXT: ret void
6045 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135_omp_outlined
6046 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6047 // CHECK-64-NEXT: entry:
6048 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6049 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6050 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6051 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
6052 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6053 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6054 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6055 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6056 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
6057 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
6058 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6059 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6060 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6061 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
6062 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6063 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6064 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
6065 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6066 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6067 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
6068 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6069 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
6070 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6071 // CHECK-64: cond.true:
6072 // CHECK-64-NEXT: br label [[COND_END:%.*]]
6073 // CHECK-64: cond.false:
6074 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6075 // CHECK-64-NEXT: br label [[COND_END]]
6076 // CHECK-64: cond.end:
6077 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6078 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6079 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6080 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
6081 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6082 // CHECK-64: omp.inner.for.cond:
6083 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6084 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
6085 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6086 // CHECK-64: omp.inner.for.body:
6087 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6088 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
6089 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6090 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6091 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
6092 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
6093 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8
6094 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
6095 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
6096 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
6097 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
6098 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6099 // CHECK-64: omp.inner.for.inc:
6100 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6101 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6102 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
6103 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
6104 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6105 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6106 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
6107 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
6108 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6109 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6110 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
6111 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
6112 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6113 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
6114 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
6115 // CHECK-64: cond.true5:
6116 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
6117 // CHECK-64: cond.false6:
6118 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6119 // CHECK-64-NEXT: br label [[COND_END7]]
6120 // CHECK-64: cond.end7:
6121 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
6122 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
6123 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6124 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
6125 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
6126 // CHECK-64: omp.inner.for.end:
6127 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6128 // CHECK-64: omp.loop.exit:
6129 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
6130 // CHECK-64-NEXT: ret void
6133 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135_omp_outlined_omp_outlined
6134 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6135 // CHECK-64-NEXT: entry:
6136 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6137 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6138 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6139 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6140 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6141 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
6142 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6143 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6144 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6145 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6146 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
6147 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6148 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6149 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6150 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6151 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
6152 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
6153 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6154 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6155 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6156 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6157 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6158 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6159 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6160 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6161 // CHECK-64-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6162 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
6163 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6164 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6165 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
6166 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6167 // CHECK-64: omp.inner.for.cond:
6168 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6169 // CHECK-64-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64
6170 // CHECK-64-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6171 // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP6]]
6172 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6173 // CHECK-64: omp.inner.for.body:
6174 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6175 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
6176 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6177 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4
6178 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6179 // CHECK-64: omp.body.continue:
6180 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6181 // CHECK-64: omp.inner.for.inc:
6182 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6183 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6184 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
6185 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
6186 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
6187 // CHECK-64: omp.inner.for.end:
6188 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6189 // CHECK-64: omp.loop.exit:
6190 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
6191 // CHECK-64-NEXT: ret void
6194 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140
6195 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
6196 // CHECK-64-NEXT: entry:
6197 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
6198 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
6199 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
6200 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
6201 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140_kernel_environment, ptr [[DYN_PTR]])
6202 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
6203 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
6204 // CHECK-64: user_code.entry:
6205 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
6206 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
6207 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
6208 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
6209 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
6210 // CHECK-64-NEXT: ret void
6211 // CHECK-64: worker.exit:
6212 // CHECK-64-NEXT: ret void
6215 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140_omp_outlined
6216 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6217 // CHECK-64-NEXT: entry:
6218 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6219 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6220 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6221 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
6222 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6223 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6224 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6225 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6226 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
6227 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
6228 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6229 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6230 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6231 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
6232 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6233 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6234 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
6235 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6236 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6237 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
6238 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6239 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
6240 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6241 // CHECK-64: cond.true:
6242 // CHECK-64-NEXT: br label [[COND_END:%.*]]
6243 // CHECK-64: cond.false:
6244 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6245 // CHECK-64-NEXT: br label [[COND_END]]
6246 // CHECK-64: cond.end:
6247 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6248 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6249 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6250 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
6251 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6252 // CHECK-64: omp.inner.for.cond:
6253 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6254 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
6255 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6256 // CHECK-64: omp.inner.for.body:
6257 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6258 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
6259 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6260 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6261 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
6262 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
6263 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8
6264 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
6265 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
6266 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
6267 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
6268 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6269 // CHECK-64: omp.inner.for.inc:
6270 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6271 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6272 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
6273 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
6274 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6275 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6276 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
6277 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
6278 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6279 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6280 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
6281 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
6282 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6283 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
6284 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
6285 // CHECK-64: cond.true5:
6286 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
6287 // CHECK-64: cond.false6:
6288 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6289 // CHECK-64-NEXT: br label [[COND_END7]]
6290 // CHECK-64: cond.end7:
6291 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
6292 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
6293 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6294 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
6295 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
6296 // CHECK-64: omp.inner.for.end:
6297 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6298 // CHECK-64: omp.loop.exit:
6299 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
6300 // CHECK-64-NEXT: ret void
6303 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140_omp_outlined_omp_outlined
6304 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6305 // CHECK-64-NEXT: entry:
6306 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6307 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6308 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6309 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6310 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6311 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
6312 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6313 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6314 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6315 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6316 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
6317 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6318 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6319 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6320 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6321 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
6322 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
6323 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6324 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6325 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6326 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6327 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6328 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6329 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6330 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6331 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6332 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6333 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6334 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
6335 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
6336 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
6337 // CHECK-64: omp.dispatch.cond:
6338 // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
6339 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
6340 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6341 // CHECK-64: omp.dispatch.body:
6342 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6343 // CHECK-64-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
6344 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6345 // CHECK-64: omp.inner.for.cond:
6346 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP337:![0-9]+]]
6347 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP337]]
6348 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6349 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6350 // CHECK-64: omp.inner.for.body:
6351 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP337]]
6352 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6353 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6354 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP337]]
6355 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6356 // CHECK-64: omp.body.continue:
6357 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6358 // CHECK-64: omp.inner.for.inc:
6359 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP337]]
6360 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
6361 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP337]]
6362 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP338:![0-9]+]]
6363 // CHECK-64: omp.inner.for.end:
6364 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
6365 // CHECK-64: omp.dispatch.inc:
6366 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
6367 // CHECK-64: omp.dispatch.end:
6368 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
6369 // CHECK-64-NEXT: ret void
6372 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145
6373 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
6374 // CHECK-64-NEXT: entry:
6375 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
6376 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
6377 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
6378 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
6379 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145_kernel_environment, ptr [[DYN_PTR]])
6380 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
6381 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
6382 // CHECK-64: user_code.entry:
6383 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
6384 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
6385 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
6386 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
6387 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
6388 // CHECK-64-NEXT: ret void
6389 // CHECK-64: worker.exit:
6390 // CHECK-64-NEXT: ret void
6393 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145_omp_outlined
6394 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6395 // CHECK-64-NEXT: entry:
6396 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6397 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6398 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6399 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
6400 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6401 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6402 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6403 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6404 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
6405 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
6406 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6407 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6408 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6409 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
6410 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6411 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6412 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
6413 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6414 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6415 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
6416 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6417 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
6418 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6419 // CHECK-64: cond.true:
6420 // CHECK-64-NEXT: br label [[COND_END:%.*]]
6421 // CHECK-64: cond.false:
6422 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6423 // CHECK-64-NEXT: br label [[COND_END]]
6424 // CHECK-64: cond.end:
6425 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6426 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6427 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6428 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
6429 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6430 // CHECK-64: omp.inner.for.cond:
6431 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6432 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
6433 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6434 // CHECK-64: omp.inner.for.body:
6435 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6436 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
6437 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6438 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6439 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
6440 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
6441 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8
6442 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
6443 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
6444 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
6445 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
6446 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6447 // CHECK-64: omp.inner.for.inc:
6448 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6449 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6450 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
6451 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
6452 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6453 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6454 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
6455 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
6456 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6457 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6458 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
6459 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
6460 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6461 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
6462 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
6463 // CHECK-64: cond.true5:
6464 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
6465 // CHECK-64: cond.false6:
6466 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6467 // CHECK-64-NEXT: br label [[COND_END7]]
6468 // CHECK-64: cond.end7:
6469 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
6470 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
6471 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6472 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
6473 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
6474 // CHECK-64: omp.inner.for.end:
6475 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6476 // CHECK-64: omp.loop.exit:
6477 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
6478 // CHECK-64-NEXT: ret void
6481 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145_omp_outlined_omp_outlined
6482 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6483 // CHECK-64-NEXT: entry:
6484 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6485 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6486 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6487 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6488 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6489 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
6490 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6491 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6492 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6493 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6494 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
6495 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6496 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6497 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6498 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6499 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
6500 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
6501 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6502 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6503 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6504 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6505 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6506 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6507 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6508 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6509 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6510 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6511 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6512 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
6513 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
6514 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
6515 // CHECK-64: omp.dispatch.cond:
6516 // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
6517 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
6518 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6519 // CHECK-64: omp.dispatch.body:
6520 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6521 // CHECK-64-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
6522 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6523 // CHECK-64: omp.inner.for.cond:
6524 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP340:![0-9]+]]
6525 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP340]]
6526 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6527 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6528 // CHECK-64: omp.inner.for.body:
6529 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP340]]
6530 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6531 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6532 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP340]]
6533 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6534 // CHECK-64: omp.body.continue:
6535 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6536 // CHECK-64: omp.inner.for.inc:
6537 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP340]]
6538 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
6539 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP340]]
6540 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP341:![0-9]+]]
6541 // CHECK-64: omp.inner.for.end:
6542 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
6543 // CHECK-64: omp.dispatch.inc:
6544 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
6545 // CHECK-64: omp.dispatch.end:
6546 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
6547 // CHECK-64-NEXT: ret void
6550 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150
6551 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
6552 // CHECK-64-NEXT: entry:
6553 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
6554 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
6555 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
6556 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
6557 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150_kernel_environment, ptr [[DYN_PTR]])
6558 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
6559 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
6560 // CHECK-64: user_code.entry:
6561 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
6562 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
6563 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
6564 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
6565 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
6566 // CHECK-64-NEXT: ret void
6567 // CHECK-64: worker.exit:
6568 // CHECK-64-NEXT: ret void
6571 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150_omp_outlined
6572 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6573 // CHECK-64-NEXT: entry:
6574 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6575 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6576 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6577 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
6578 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6579 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6580 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6581 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6582 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
6583 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
6584 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6585 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6586 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6587 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
6588 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6589 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6590 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
6591 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6592 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6593 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
6594 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6595 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
6596 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6597 // CHECK-64: cond.true:
6598 // CHECK-64-NEXT: br label [[COND_END:%.*]]
6599 // CHECK-64: cond.false:
6600 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6601 // CHECK-64-NEXT: br label [[COND_END]]
6602 // CHECK-64: cond.end:
6603 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6604 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6605 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6606 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
6607 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6608 // CHECK-64: omp.inner.for.cond:
6609 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6610 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
6611 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6612 // CHECK-64: omp.inner.for.body:
6613 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6614 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
6615 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6616 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6617 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
6618 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
6619 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8
6620 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
6621 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
6622 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
6623 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
6624 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6625 // CHECK-64: omp.inner.for.inc:
6626 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6627 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6628 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
6629 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
6630 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6631 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6632 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
6633 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
6634 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6635 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6636 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
6637 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
6638 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6639 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
6640 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
6641 // CHECK-64: cond.true5:
6642 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
6643 // CHECK-64: cond.false6:
6644 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6645 // CHECK-64-NEXT: br label [[COND_END7]]
6646 // CHECK-64: cond.end7:
6647 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
6648 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
6649 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6650 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
6651 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
6652 // CHECK-64: omp.inner.for.end:
6653 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6654 // CHECK-64: omp.loop.exit:
6655 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
6656 // CHECK-64-NEXT: ret void
6659 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150_omp_outlined_omp_outlined
6660 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6661 // CHECK-64-NEXT: entry:
6662 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6663 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6664 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6665 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6666 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6667 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
6668 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6669 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6670 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6671 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6672 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
6673 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6674 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6675 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6676 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6677 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
6678 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
6679 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6680 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6681 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6682 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6683 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6684 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6685 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6686 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6687 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6688 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6689 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6690 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
6691 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
6692 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
6693 // CHECK-64: omp.dispatch.cond:
6694 // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
6695 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
6696 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6697 // CHECK-64: omp.dispatch.body:
6698 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6699 // CHECK-64-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
6700 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6701 // CHECK-64: omp.inner.for.cond:
6702 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP343:![0-9]+]]
6703 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP343]]
6704 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6705 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6706 // CHECK-64: omp.inner.for.body:
6707 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP343]]
6708 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6709 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6710 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP343]]
6711 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6712 // CHECK-64: omp.body.continue:
6713 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6714 // CHECK-64: omp.inner.for.inc:
6715 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP343]]
6716 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
6717 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP343]]
6718 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP344:![0-9]+]]
6719 // CHECK-64: omp.inner.for.end:
6720 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
6721 // CHECK-64: omp.dispatch.inc:
6722 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
6723 // CHECK-64: omp.dispatch.end:
6724 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
6725 // CHECK-64-NEXT: ret void
6728 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155
6729 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
6730 // CHECK-64-NEXT: entry:
6731 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
6732 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
6733 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
6734 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
6735 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155_kernel_environment, ptr [[DYN_PTR]])
6736 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
6737 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
6738 // CHECK-64: user_code.entry:
6739 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
6740 // CHECK-64-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
6741 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
6742 // CHECK-64-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
6743 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
6744 // CHECK-64-NEXT: ret void
6745 // CHECK-64: worker.exit:
6746 // CHECK-64-NEXT: ret void
6749 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155_omp_outlined
6750 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6751 // CHECK-64-NEXT: entry:
6752 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6753 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6754 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6755 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
6756 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6757 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6758 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6759 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6760 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
6761 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
6762 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6763 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6764 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6765 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
6766 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6767 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6768 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
6769 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6770 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6771 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
6772 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6773 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
6774 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6775 // CHECK-64: cond.true:
6776 // CHECK-64-NEXT: br label [[COND_END:%.*]]
6777 // CHECK-64: cond.false:
6778 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6779 // CHECK-64-NEXT: br label [[COND_END]]
6780 // CHECK-64: cond.end:
6781 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6782 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6783 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6784 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
6785 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6786 // CHECK-64: omp.inner.for.cond:
6787 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6788 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
6789 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6790 // CHECK-64: omp.inner.for.body:
6791 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6792 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
6793 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6794 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6795 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
6796 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to ptr
6797 // CHECK-64-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8
6798 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
6799 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to ptr
6800 // CHECK-64-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8
6801 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
6802 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6803 // CHECK-64: omp.inner.for.inc:
6804 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6805 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6806 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
6807 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
6808 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6809 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6810 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
6811 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
6812 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6813 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6814 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
6815 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
6816 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6817 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
6818 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
6819 // CHECK-64: cond.true5:
6820 // CHECK-64-NEXT: br label [[COND_END7:%.*]]
6821 // CHECK-64: cond.false6:
6822 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6823 // CHECK-64-NEXT: br label [[COND_END7]]
6824 // CHECK-64: cond.end7:
6825 // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
6826 // CHECK-64-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
6827 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6828 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
6829 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
6830 // CHECK-64: omp.inner.for.end:
6831 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6832 // CHECK-64: omp.loop.exit:
6833 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
6834 // CHECK-64-NEXT: ret void
6837 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155_omp_outlined_omp_outlined
6838 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6839 // CHECK-64-NEXT: entry:
6840 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6841 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6842 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6843 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6844 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6845 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
6846 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6847 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6848 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6849 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6850 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
6851 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6852 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6853 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6854 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6855 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
6856 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
6857 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6858 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6859 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6860 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6861 // CHECK-64-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6862 // CHECK-64-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6863 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6864 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6865 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6866 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6867 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6868 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
6869 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
6870 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
6871 // CHECK-64: omp.dispatch.cond:
6872 // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
6873 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
6874 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6875 // CHECK-64: omp.dispatch.body:
6876 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6877 // CHECK-64-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
6878 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6879 // CHECK-64: omp.inner.for.cond:
6880 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP346:![0-9]+]]
6881 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP346]]
6882 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6883 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6884 // CHECK-64: omp.inner.for.body:
6885 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP346]]
6886 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6887 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6888 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP346]]
6889 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6890 // CHECK-64: omp.body.continue:
6891 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6892 // CHECK-64: omp.inner.for.inc:
6893 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP346]]
6894 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
6895 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP346]]
6896 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP347:![0-9]+]]
6897 // CHECK-64: omp.inner.for.end:
6898 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
6899 // CHECK-64: omp.dispatch.inc:
6900 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
6901 // CHECK-64: omp.dispatch.end:
6902 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
6903 // CHECK-64-NEXT: ret void
6906 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l160
6907 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR8:[0-9]+]] {
6908 // CHECK-64-NEXT: entry:
6909 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
6910 // CHECK-64-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6911 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
6912 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
6913 // CHECK-64-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
6914 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l160_kernel_environment, ptr [[DYN_PTR]])
6915 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
6916 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
6917 // CHECK-64: user_code.entry:
6918 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
6919 // CHECK-64-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
6920 // CHECK-64-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
6921 // CHECK-64-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i32
6922 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP3]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l160_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
6923 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
6924 // CHECK-64-NEXT: ret void
6925 // CHECK-64: worker.exit:
6926 // CHECK-64-NEXT: ret void
6929 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l160_omp_outlined
6930 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6931 // CHECK-64-NEXT: entry:
6932 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6933 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6934 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6935 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
6936 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6937 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6938 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6939 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6940 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
6941 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6942 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6943 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
6944 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
6945 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6946 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6947 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6948 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6949 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6950 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
6951 // CHECK-64: omp.dispatch.cond:
6952 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6953 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
6954 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6955 // CHECK-64: cond.true:
6956 // CHECK-64-NEXT: br label [[COND_END:%.*]]
6957 // CHECK-64: cond.false:
6958 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6959 // CHECK-64-NEXT: br label [[COND_END]]
6960 // CHECK-64: cond.end:
6961 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6962 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6963 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6964 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
6965 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6966 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6967 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6968 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6969 // CHECK-64: omp.dispatch.body:
6970 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6971 // CHECK-64: omp.inner.for.cond:
6972 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6973 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6974 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6975 // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6976 // CHECK-64: omp.inner.for.body:
6977 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6978 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6979 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6980 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4
6981 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6982 // CHECK-64: omp.body.continue:
6983 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6984 // CHECK-64: omp.inner.for.inc:
6985 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6986 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6987 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
6988 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
6989 // CHECK-64: omp.inner.for.end:
6990 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
6991 // CHECK-64: omp.dispatch.inc:
6992 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6993 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6994 // CHECK-64-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
6995 // CHECK-64-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
6996 // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6997 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6998 // CHECK-64-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
6999 // CHECK-64-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
7000 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
7001 // CHECK-64: omp.dispatch.end:
7002 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
7003 // CHECK-64-NEXT: ret void
7006 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l163
7007 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
7008 // CHECK-64-NEXT: entry:
7009 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
7010 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
7011 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
7012 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l163_kernel_environment, ptr [[DYN_PTR]])
7013 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
7014 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
7015 // CHECK-64: user_code.entry:
7016 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
7017 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l163_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
7018 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
7019 // CHECK-64-NEXT: ret void
7020 // CHECK-64: worker.exit:
7021 // CHECK-64-NEXT: ret void
7024 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l163_omp_outlined
7025 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7026 // CHECK-64-NEXT: entry:
7027 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7028 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7029 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7030 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
7031 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7032 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7033 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7034 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7035 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
7036 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7037 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7038 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
7039 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
7040 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7041 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7042 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7043 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7044 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7045 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7046 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
7047 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7048 // CHECK-64: cond.true:
7049 // CHECK-64-NEXT: br label [[COND_END:%.*]]
7050 // CHECK-64: cond.false:
7051 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7052 // CHECK-64-NEXT: br label [[COND_END]]
7053 // CHECK-64: cond.end:
7054 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7055 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7056 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7057 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
7058 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7059 // CHECK-64: omp.inner.for.cond:
7060 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7061 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7062 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7063 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7064 // CHECK-64: omp.inner.for.body:
7065 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7066 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
7067 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7068 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4
7069 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7070 // CHECK-64: omp.body.continue:
7071 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7072 // CHECK-64: omp.inner.for.inc:
7073 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7074 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
7075 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
7076 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
7077 // CHECK-64: omp.inner.for.end:
7078 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7079 // CHECK-64: omp.loop.exit:
7080 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
7081 // CHECK-64-NEXT: ret void
7084 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l166
7085 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
7086 // CHECK-64-NEXT: entry:
7087 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
7088 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
7089 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
7090 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l166_kernel_environment, ptr [[DYN_PTR]])
7091 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
7092 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
7093 // CHECK-64: user_code.entry:
7094 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
7095 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l166_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
7096 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
7097 // CHECK-64-NEXT: ret void
7098 // CHECK-64: worker.exit:
7099 // CHECK-64-NEXT: ret void
7102 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l166_omp_outlined
7103 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7104 // CHECK-64-NEXT: entry:
7105 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7106 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7107 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7108 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
7109 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7110 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7111 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7112 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7113 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
7114 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7115 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7116 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
7117 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
7118 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7119 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7120 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7121 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7122 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7123 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
7124 // CHECK-64: omp.dispatch.cond:
7125 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7126 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
7127 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7128 // CHECK-64: cond.true:
7129 // CHECK-64-NEXT: br label [[COND_END:%.*]]
7130 // CHECK-64: cond.false:
7131 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7132 // CHECK-64-NEXT: br label [[COND_END]]
7133 // CHECK-64: cond.end:
7134 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7135 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7136 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7137 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
7138 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7139 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7140 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7141 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7142 // CHECK-64: omp.dispatch.body:
7143 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7144 // CHECK-64: omp.inner.for.cond:
7145 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7146 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7147 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7148 // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7149 // CHECK-64: omp.inner.for.body:
7150 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7151 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7152 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7153 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4
7154 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7155 // CHECK-64: omp.body.continue:
7156 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7157 // CHECK-64: omp.inner.for.inc:
7158 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7159 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7160 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
7161 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
7162 // CHECK-64: omp.inner.for.end:
7163 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
7164 // CHECK-64: omp.dispatch.inc:
7165 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7166 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
7167 // CHECK-64-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
7168 // CHECK-64-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
7169 // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7170 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
7171 // CHECK-64-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
7172 // CHECK-64-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
7173 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
7174 // CHECK-64: omp.dispatch.end:
7175 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
7176 // CHECK-64-NEXT: ret void
7179 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l169
7180 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
7181 // CHECK-64-NEXT: entry:
7182 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
7183 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
7184 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
7185 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l169_kernel_environment, ptr [[DYN_PTR]])
7186 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
7187 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
7188 // CHECK-64: user_code.entry:
7189 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
7190 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l169_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
7191 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
7192 // CHECK-64-NEXT: ret void
7193 // CHECK-64: worker.exit:
7194 // CHECK-64-NEXT: ret void
7197 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l169_omp_outlined
7198 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7199 // CHECK-64-NEXT: entry:
7200 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7201 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7202 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7203 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
7204 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7205 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7206 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7207 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7208 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
7209 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7210 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7211 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
7212 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
7213 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7214 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7215 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7216 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7217 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1)
7218 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
7219 // CHECK-64: omp.dispatch.cond:
7220 // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
7221 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
7222 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7223 // CHECK-64: omp.dispatch.body:
7224 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7225 // CHECK-64-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
7226 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7227 // CHECK-64: omp.inner.for.cond:
7228 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP349:![0-9]+]]
7229 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP349]]
7230 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
7231 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7232 // CHECK-64: omp.inner.for.body:
7233 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP349]]
7234 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
7235 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7236 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP349]]
7237 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7238 // CHECK-64: omp.body.continue:
7239 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7240 // CHECK-64: omp.inner.for.inc:
7241 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP349]]
7242 // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
7243 // CHECK-64-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP349]]
7244 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP350:![0-9]+]]
7245 // CHECK-64: omp.inner.for.end:
7246 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
7247 // CHECK-64: omp.dispatch.inc:
7248 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
7249 // CHECK-64: omp.dispatch.end:
7250 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
7251 // CHECK-64-NEXT: ret void
7254 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l172
7255 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
7256 // CHECK-64-NEXT: entry:
7257 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
7258 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
7259 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
7260 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l172_kernel_environment, ptr [[DYN_PTR]])
7261 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
7262 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
7263 // CHECK-64: user_code.entry:
7264 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
7265 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l172_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
7266 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
7267 // CHECK-64-NEXT: ret void
7268 // CHECK-64: worker.exit:
7269 // CHECK-64-NEXT: ret void
7272 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l172_omp_outlined
7273 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7274 // CHECK-64-NEXT: entry:
7275 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7276 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7277 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7278 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
7279 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7280 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7281 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7282 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7283 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
7284 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7285 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7286 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
7287 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
7288 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7289 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7290 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7291 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7292 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1)
7293 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
7294 // CHECK-64: omp.dispatch.cond:
7295 // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
7296 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
7297 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7298 // CHECK-64: omp.dispatch.body:
7299 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7300 // CHECK-64-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
7301 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7302 // CHECK-64: omp.inner.for.cond:
7303 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP352:![0-9]+]]
7304 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP352]]
7305 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
7306 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7307 // CHECK-64: omp.inner.for.body:
7308 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP352]]
7309 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
7310 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7311 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP352]]
7312 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7313 // CHECK-64: omp.body.continue:
7314 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7315 // CHECK-64: omp.inner.for.inc:
7316 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP352]]
7317 // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
7318 // CHECK-64-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP352]]
7319 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP353:![0-9]+]]
7320 // CHECK-64: omp.inner.for.end:
7321 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
7322 // CHECK-64: omp.dispatch.inc:
7323 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
7324 // CHECK-64: omp.dispatch.end:
7325 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
7326 // CHECK-64-NEXT: ret void
7329 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l175
7330 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
7331 // CHECK-64-NEXT: entry:
7332 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
7333 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
7334 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
7335 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l175_kernel_environment, ptr [[DYN_PTR]])
7336 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
7337 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
7338 // CHECK-64: user_code.entry:
7339 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
7340 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l175_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
7341 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
7342 // CHECK-64-NEXT: ret void
7343 // CHECK-64: worker.exit:
7344 // CHECK-64-NEXT: ret void
7347 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l175_omp_outlined
7348 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7349 // CHECK-64-NEXT: entry:
7350 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7351 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7352 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7353 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
7354 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7355 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7356 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7357 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7358 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
7359 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7360 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7361 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
7362 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
7363 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7364 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7365 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7366 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7367 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1)
7368 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
7369 // CHECK-64: omp.dispatch.cond:
7370 // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
7371 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
7372 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7373 // CHECK-64: omp.dispatch.body:
7374 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7375 // CHECK-64-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
7376 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7377 // CHECK-64: omp.inner.for.cond:
7378 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP355:![0-9]+]]
7379 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP355]]
7380 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
7381 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7382 // CHECK-64: omp.inner.for.body:
7383 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP355]]
7384 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
7385 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7386 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP355]]
7387 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7388 // CHECK-64: omp.body.continue:
7389 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7390 // CHECK-64: omp.inner.for.inc:
7391 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP355]]
7392 // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
7393 // CHECK-64-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP355]]
7394 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP356:![0-9]+]]
7395 // CHECK-64: omp.inner.for.end:
7396 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
7397 // CHECK-64: omp.dispatch.inc:
7398 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
7399 // CHECK-64: omp.dispatch.end:
7400 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
7401 // CHECK-64-NEXT: ret void
7404 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l178
7405 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
7406 // CHECK-64-NEXT: entry:
7407 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
7408 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
7409 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
7410 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l178_kernel_environment, ptr [[DYN_PTR]])
7411 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
7412 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
7413 // CHECK-64: user_code.entry:
7414 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
7415 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l178_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
7416 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
7417 // CHECK-64-NEXT: ret void
7418 // CHECK-64: worker.exit:
7419 // CHECK-64-NEXT: ret void
7422 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l178_omp_outlined
7423 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7424 // CHECK-64-NEXT: entry:
7425 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7426 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7427 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7428 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
7429 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7430 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7431 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7432 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7433 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
7434 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7435 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7436 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
7437 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
7438 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7439 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7440 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7441 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7442 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1)
7443 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
7444 // CHECK-64: omp.dispatch.cond:
7445 // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
7446 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
7447 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7448 // CHECK-64: omp.dispatch.body:
7449 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7450 // CHECK-64-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
7451 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7452 // CHECK-64: omp.inner.for.cond:
7453 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP358:![0-9]+]]
7454 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP358]]
7455 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
7456 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7457 // CHECK-64: omp.inner.for.body:
7458 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP358]]
7459 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
7460 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7461 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP358]]
7462 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7463 // CHECK-64: omp.body.continue:
7464 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7465 // CHECK-64: omp.inner.for.inc:
7466 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP358]]
7467 // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
7468 // CHECK-64-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP358]]
7469 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP359:![0-9]+]]
7470 // CHECK-64: omp.inner.for.end:
7471 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
7472 // CHECK-64: omp.dispatch.inc:
7473 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
7474 // CHECK-64: omp.dispatch.end:
7475 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
7476 // CHECK-64-NEXT: ret void
7479 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l181
7480 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR8]] {
7481 // CHECK-64-NEXT: entry:
7482 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
7483 // CHECK-64-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
7484 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
7485 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
7486 // CHECK-64-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
7487 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l181_kernel_environment, ptr [[DYN_PTR]])
7488 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
7489 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
7490 // CHECK-64: user_code.entry:
7491 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
7492 // CHECK-64-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
7493 // CHECK-64-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
7494 // CHECK-64-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i32
7495 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP3]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l181_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
7496 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
7497 // CHECK-64-NEXT: ret void
7498 // CHECK-64: worker.exit:
7499 // CHECK-64-NEXT: ret void
7502 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l181_omp_outlined
7503 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7504 // CHECK-64-NEXT: entry:
7505 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7506 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7507 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7508 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
7509 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7510 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7511 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7512 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7513 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
7514 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7515 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7516 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
7517 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
7518 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7519 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7520 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7521 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7522 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7523 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
7524 // CHECK-64: omp.dispatch.cond:
7525 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7526 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
7527 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7528 // CHECK-64: cond.true:
7529 // CHECK-64-NEXT: br label [[COND_END:%.*]]
7530 // CHECK-64: cond.false:
7531 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7532 // CHECK-64-NEXT: br label [[COND_END]]
7533 // CHECK-64: cond.end:
7534 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7535 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7536 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7537 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
7538 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7539 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7540 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7541 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7542 // CHECK-64: omp.dispatch.body:
7543 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7544 // CHECK-64: omp.inner.for.cond:
7545 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP361:![0-9]+]]
7546 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP361]]
7547 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7548 // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7549 // CHECK-64: omp.inner.for.body:
7550 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP361]]
7551 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7552 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7553 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP361]]
7554 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7555 // CHECK-64: omp.body.continue:
7556 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7557 // CHECK-64: omp.inner.for.inc:
7558 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP361]]
7559 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7560 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP361]]
7561 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP362:![0-9]+]]
7562 // CHECK-64: omp.inner.for.end:
7563 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
7564 // CHECK-64: omp.dispatch.inc:
7565 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7566 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
7567 // CHECK-64-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
7568 // CHECK-64-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
7569 // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7570 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
7571 // CHECK-64-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
7572 // CHECK-64-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
7573 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
7574 // CHECK-64: omp.dispatch.end:
7575 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
7576 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
7577 // CHECK-64-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
7578 // CHECK-64-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7579 // CHECK-64: .omp.final.then:
7580 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
7581 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
7582 // CHECK-64: .omp.final.done:
7583 // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4:[0-9]+]], i32 [[TMP1]])
7584 // CHECK-64-NEXT: ret void
7587 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l185
7588 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
7589 // CHECK-64-NEXT: entry:
7590 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
7591 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
7592 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
7593 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l185_kernel_environment, ptr [[DYN_PTR]])
7594 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
7595 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
7596 // CHECK-64: user_code.entry:
7597 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
7598 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l185_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
7599 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
7600 // CHECK-64-NEXT: ret void
7601 // CHECK-64: worker.exit:
7602 // CHECK-64-NEXT: ret void
7605 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l185_omp_outlined
7606 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7607 // CHECK-64-NEXT: entry:
7608 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7609 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7610 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7611 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
7612 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7613 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7614 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7615 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7616 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
7617 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7618 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7619 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
7620 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
7621 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7622 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7623 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7624 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7625 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7626 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7627 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
7628 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7629 // CHECK-64: cond.true:
7630 // CHECK-64-NEXT: br label [[COND_END:%.*]]
7631 // CHECK-64: cond.false:
7632 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7633 // CHECK-64-NEXT: br label [[COND_END]]
7634 // CHECK-64: cond.end:
7635 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7636 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7637 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7638 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
7639 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7640 // CHECK-64: omp.inner.for.cond:
7641 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP364:![0-9]+]]
7642 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP364]]
7643 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7644 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7645 // CHECK-64: omp.inner.for.body:
7646 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP364]]
7647 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
7648 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7649 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP364]]
7650 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7651 // CHECK-64: omp.body.continue:
7652 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7653 // CHECK-64: omp.inner.for.inc:
7654 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP364]]
7655 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
7656 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP364]]
7657 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP365:![0-9]+]]
7658 // CHECK-64: omp.inner.for.end:
7659 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7660 // CHECK-64: omp.loop.exit:
7661 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
7662 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
7663 // CHECK-64-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
7664 // CHECK-64-NEXT: br i1 [[TMP10]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7665 // CHECK-64: .omp.final.then:
7666 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
7667 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
7668 // CHECK-64: .omp.final.done:
7669 // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
7670 // CHECK-64-NEXT: ret void
7673 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l189
7674 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
7675 // CHECK-64-NEXT: entry:
7676 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
7677 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
7678 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
7679 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l189_kernel_environment, ptr [[DYN_PTR]])
7680 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
7681 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
7682 // CHECK-64: user_code.entry:
7683 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
7684 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l189_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
7685 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
7686 // CHECK-64-NEXT: ret void
7687 // CHECK-64: worker.exit:
7688 // CHECK-64-NEXT: ret void
7691 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l189_omp_outlined
7692 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7693 // CHECK-64-NEXT: entry:
7694 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7695 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7696 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7697 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
7698 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7699 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7700 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7701 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7702 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
7703 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7704 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7705 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
7706 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
7707 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7708 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7709 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7710 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7711 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7712 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
7713 // CHECK-64: omp.dispatch.cond:
7714 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7715 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
7716 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7717 // CHECK-64: cond.true:
7718 // CHECK-64-NEXT: br label [[COND_END:%.*]]
7719 // CHECK-64: cond.false:
7720 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7721 // CHECK-64-NEXT: br label [[COND_END]]
7722 // CHECK-64: cond.end:
7723 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7724 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7725 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7726 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
7727 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7728 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7729 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7730 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7731 // CHECK-64: omp.dispatch.body:
7732 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7733 // CHECK-64: omp.inner.for.cond:
7734 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP367:![0-9]+]]
7735 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP367]]
7736 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7737 // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7738 // CHECK-64: omp.inner.for.body:
7739 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP367]]
7740 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7741 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7742 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP367]]
7743 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7744 // CHECK-64: omp.body.continue:
7745 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7746 // CHECK-64: omp.inner.for.inc:
7747 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP367]]
7748 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7749 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP367]]
7750 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP368:![0-9]+]]
7751 // CHECK-64: omp.inner.for.end:
7752 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
7753 // CHECK-64: omp.dispatch.inc:
7754 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7755 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
7756 // CHECK-64-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
7757 // CHECK-64-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
7758 // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7759 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
7760 // CHECK-64-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
7761 // CHECK-64-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
7762 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
7763 // CHECK-64: omp.dispatch.end:
7764 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
7765 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
7766 // CHECK-64-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
7767 // CHECK-64-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7768 // CHECK-64: .omp.final.then:
7769 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
7770 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
7771 // CHECK-64: .omp.final.done:
7772 // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
7773 // CHECK-64-NEXT: ret void
7776 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l193
7777 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
7778 // CHECK-64-NEXT: entry:
7779 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
7780 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
7781 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
7782 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l193_kernel_environment, ptr [[DYN_PTR]])
7783 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
7784 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
7785 // CHECK-64: user_code.entry:
7786 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
7787 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l193_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
7788 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
7789 // CHECK-64-NEXT: ret void
7790 // CHECK-64: worker.exit:
7791 // CHECK-64-NEXT: ret void
7794 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l193_omp_outlined
7795 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7796 // CHECK-64-NEXT: entry:
7797 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7798 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7799 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7800 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
7801 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7802 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7803 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7804 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7805 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
7806 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7807 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7808 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
7809 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
7810 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7811 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7812 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7813 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7814 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1)
7815 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
7816 // CHECK-64: omp.dispatch.cond:
7817 // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
7818 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
7819 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7820 // CHECK-64: omp.dispatch.body:
7821 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7822 // CHECK-64-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
7823 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7824 // CHECK-64: omp.inner.for.cond:
7825 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP370:![0-9]+]]
7826 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP370]]
7827 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
7828 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7829 // CHECK-64: omp.inner.for.body:
7830 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP370]]
7831 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
7832 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7833 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP370]]
7834 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7835 // CHECK-64: omp.body.continue:
7836 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7837 // CHECK-64: omp.inner.for.inc:
7838 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP370]]
7839 // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
7840 // CHECK-64-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP370]]
7841 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP371:![0-9]+]]
7842 // CHECK-64: omp.inner.for.end:
7843 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
7844 // CHECK-64: omp.dispatch.inc:
7845 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
7846 // CHECK-64: omp.dispatch.end:
7847 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
7848 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
7849 // CHECK-64-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
7850 // CHECK-64-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7851 // CHECK-64: .omp.final.then:
7852 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
7853 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
7854 // CHECK-64: .omp.final.done:
7855 // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
7856 // CHECK-64-NEXT: ret void
7859 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l197
7860 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
7861 // CHECK-64-NEXT: entry:
7862 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
7863 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
7864 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
7865 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l197_kernel_environment, ptr [[DYN_PTR]])
7866 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
7867 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
7868 // CHECK-64: user_code.entry:
7869 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
7870 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l197_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
7871 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
7872 // CHECK-64-NEXT: ret void
7873 // CHECK-64: worker.exit:
7874 // CHECK-64-NEXT: ret void
7877 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l197_omp_outlined
7878 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7879 // CHECK-64-NEXT: entry:
7880 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7881 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7882 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7883 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
7884 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7885 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7886 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7887 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7888 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
7889 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7890 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7891 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
7892 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
7893 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7894 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7895 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7896 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7897 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1)
7898 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
7899 // CHECK-64: omp.dispatch.cond:
7900 // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
7901 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
7902 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7903 // CHECK-64: omp.dispatch.body:
7904 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7905 // CHECK-64-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
7906 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7907 // CHECK-64: omp.inner.for.cond:
7908 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP373:![0-9]+]]
7909 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP373]]
7910 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
7911 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7912 // CHECK-64: omp.inner.for.body:
7913 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP373]]
7914 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
7915 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7916 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP373]]
7917 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7918 // CHECK-64: omp.body.continue:
7919 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7920 // CHECK-64: omp.inner.for.inc:
7921 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP373]]
7922 // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
7923 // CHECK-64-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP373]]
7924 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP374:![0-9]+]]
7925 // CHECK-64: omp.inner.for.end:
7926 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
7927 // CHECK-64: omp.dispatch.inc:
7928 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
7929 // CHECK-64: omp.dispatch.end:
7930 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
7931 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
7932 // CHECK-64-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
7933 // CHECK-64-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7934 // CHECK-64: .omp.final.then:
7935 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
7936 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
7937 // CHECK-64: .omp.final.done:
7938 // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
7939 // CHECK-64-NEXT: ret void
7942 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l201
7943 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
7944 // CHECK-64-NEXT: entry:
7945 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
7946 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
7947 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
7948 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l201_kernel_environment, ptr [[DYN_PTR]])
7949 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
7950 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
7951 // CHECK-64: user_code.entry:
7952 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
7953 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l201_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
7954 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
7955 // CHECK-64-NEXT: ret void
7956 // CHECK-64: worker.exit:
7957 // CHECK-64-NEXT: ret void
7960 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l201_omp_outlined
7961 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7962 // CHECK-64-NEXT: entry:
7963 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7964 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7965 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7966 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
7967 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7968 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7969 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7970 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7971 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
7972 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7973 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7974 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
7975 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
7976 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7977 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7978 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7979 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7980 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1)
7981 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
7982 // CHECK-64: omp.dispatch.cond:
7983 // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
7984 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
7985 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7986 // CHECK-64: omp.dispatch.body:
7987 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7988 // CHECK-64-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
7989 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7990 // CHECK-64: omp.inner.for.cond:
7991 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP376:![0-9]+]]
7992 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP376]]
7993 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
7994 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7995 // CHECK-64: omp.inner.for.body:
7996 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP376]]
7997 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
7998 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7999 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP376]]
8000 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8001 // CHECK-64: omp.body.continue:
8002 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8003 // CHECK-64: omp.inner.for.inc:
8004 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP376]]
8005 // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
8006 // CHECK-64-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP376]]
8007 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP377:![0-9]+]]
8008 // CHECK-64: omp.inner.for.end:
8009 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
8010 // CHECK-64: omp.dispatch.inc:
8011 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
8012 // CHECK-64: omp.dispatch.end:
8013 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
8014 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
8015 // CHECK-64-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
8016 // CHECK-64-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8017 // CHECK-64: .omp.final.then:
8018 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
8019 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
8020 // CHECK-64: .omp.final.done:
8021 // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
8022 // CHECK-64-NEXT: ret void
8025 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l205
8026 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
8027 // CHECK-64-NEXT: entry:
8028 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
8029 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
8030 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
8031 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l205_kernel_environment, ptr [[DYN_PTR]])
8032 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
8033 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
8034 // CHECK-64: user_code.entry:
8035 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
8036 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l205_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
8037 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
8038 // CHECK-64-NEXT: ret void
8039 // CHECK-64: worker.exit:
8040 // CHECK-64-NEXT: ret void
8043 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l205_omp_outlined
8044 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8045 // CHECK-64-NEXT: entry:
8046 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
8047 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
8048 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8049 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
8050 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8051 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8052 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8053 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8054 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
8055 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
8056 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
8057 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
8058 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
8059 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8060 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8061 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
8062 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
8063 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1)
8064 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
8065 // CHECK-64: omp.dispatch.cond:
8066 // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
8067 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
8068 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8069 // CHECK-64: omp.dispatch.body:
8070 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8071 // CHECK-64-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
8072 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8073 // CHECK-64: omp.inner.for.cond:
8074 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP379:![0-9]+]]
8075 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP379]]
8076 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
8077 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8078 // CHECK-64: omp.inner.for.body:
8079 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP379]]
8080 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
8081 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8082 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP379]]
8083 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8084 // CHECK-64: omp.body.continue:
8085 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8086 // CHECK-64: omp.inner.for.inc:
8087 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP379]]
8088 // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
8089 // CHECK-64-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP379]]
8090 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP380:![0-9]+]]
8091 // CHECK-64: omp.inner.for.end:
8092 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
8093 // CHECK-64: omp.dispatch.inc:
8094 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
8095 // CHECK-64: omp.dispatch.end:
8096 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
8097 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
8098 // CHECK-64-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
8099 // CHECK-64-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8100 // CHECK-64: .omp.final.then:
8101 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
8102 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
8103 // CHECK-64: .omp.final.done:
8104 // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
8105 // CHECK-64-NEXT: ret void
8108 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l209
8109 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10:[0-9]+]] {
8110 // CHECK-64-NEXT: entry:
8111 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
8112 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
8113 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
8114 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l209_kernel_environment, ptr [[DYN_PTR]])
8115 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
8116 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
8117 // CHECK-64: user_code.entry:
8118 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
8119 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l209_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
8120 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
8121 // CHECK-64-NEXT: ret void
8122 // CHECK-64: worker.exit:
8123 // CHECK-64-NEXT: ret void
8126 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l209_omp_outlined
8127 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8128 // CHECK-64-NEXT: entry:
8129 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
8130 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
8131 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8132 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
8133 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8134 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8135 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8136 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8137 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
8138 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
8139 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
8140 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
8141 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
8142 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8143 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8144 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
8145 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
8146 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 65, i32 0, i32 9, i32 1, i32 1)
8147 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
8148 // CHECK-64: omp.dispatch.cond:
8149 // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
8150 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
8151 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8152 // CHECK-64: omp.dispatch.body:
8153 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8154 // CHECK-64-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
8155 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8156 // CHECK-64: omp.inner.for.cond:
8157 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP382:![0-9]+]]
8158 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP382]]
8159 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
8160 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8161 // CHECK-64: omp.inner.for.body:
8162 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP382]]
8163 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
8164 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8165 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP382]]
8166 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8167 // CHECK-64: omp.body.continue:
8168 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8169 // CHECK-64: omp.inner.for.inc:
8170 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP382]]
8171 // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
8172 // CHECK-64-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP382]]
8173 // CHECK-64-NEXT: call void @__kmpc_dispatch_fini_4(ptr @[[GLOB1]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP382]]
8174 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP383:![0-9]+]]
8175 // CHECK-64: omp.inner.for.end:
8176 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
8177 // CHECK-64: omp.dispatch.inc:
8178 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
8179 // CHECK-64: omp.dispatch.end:
8180 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
8181 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
8182 // CHECK-64-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
8183 // CHECK-64-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8184 // CHECK-64: .omp.final.then:
8185 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
8186 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
8187 // CHECK-64: .omp.final.done:
8188 // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
8189 // CHECK-64-NEXT: ret void
8192 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l214
8193 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10]] {
8194 // CHECK-64-NEXT: entry:
8195 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
8196 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
8197 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
8198 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l214_kernel_environment, ptr [[DYN_PTR]])
8199 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
8200 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
8201 // CHECK-64: user_code.entry:
8202 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
8203 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l214_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
8204 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
8205 // CHECK-64-NEXT: ret void
8206 // CHECK-64: worker.exit:
8207 // CHECK-64-NEXT: ret void
8210 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l214_omp_outlined
8211 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8212 // CHECK-64-NEXT: entry:
8213 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
8214 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
8215 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8216 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
8217 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8218 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8219 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8220 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8221 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
8222 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
8223 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
8224 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
8225 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
8226 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8227 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8228 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
8229 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
8230 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8231 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8232 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
8233 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8234 // CHECK-64: cond.true:
8235 // CHECK-64-NEXT: br label [[COND_END:%.*]]
8236 // CHECK-64: cond.false:
8237 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8238 // CHECK-64-NEXT: br label [[COND_END]]
8239 // CHECK-64: cond.end:
8240 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8241 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
8242 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8243 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
8244 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8245 // CHECK-64: omp.inner.for.cond:
8246 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP385:![0-9]+]]
8247 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP385]]
8248 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8249 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8250 // CHECK-64: omp.inner.for.body:
8251 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP385]]
8252 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
8253 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8254 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP385]]
8255 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8256 // CHECK-64: omp.body.continue:
8257 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8258 // CHECK-64: omp.inner.for.inc:
8259 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP385]]
8260 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
8261 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP385]]
8262 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP386:![0-9]+]]
8263 // CHECK-64: omp.inner.for.end:
8264 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8265 // CHECK-64: omp.loop.exit:
8266 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
8267 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
8268 // CHECK-64-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
8269 // CHECK-64-NEXT: br i1 [[TMP10]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8270 // CHECK-64: .omp.final.then:
8271 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
8272 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
8273 // CHECK-64: .omp.final.done:
8274 // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
8275 // CHECK-64-NEXT: ret void
8278 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l219
8279 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10]] {
8280 // CHECK-64-NEXT: entry:
8281 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
8282 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
8283 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
8284 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l219_kernel_environment, ptr [[DYN_PTR]])
8285 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
8286 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
8287 // CHECK-64: user_code.entry:
8288 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
8289 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l219_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
8290 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
8291 // CHECK-64-NEXT: ret void
8292 // CHECK-64: worker.exit:
8293 // CHECK-64-NEXT: ret void
8296 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l219_omp_outlined
8297 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8298 // CHECK-64-NEXT: entry:
8299 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
8300 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
8301 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8302 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
8303 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8304 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8305 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8306 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8307 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
8308 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
8309 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
8310 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
8311 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
8312 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8313 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8314 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
8315 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
8316 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8317 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
8318 // CHECK-64: omp.dispatch.cond:
8319 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8320 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
8321 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8322 // CHECK-64: cond.true:
8323 // CHECK-64-NEXT: br label [[COND_END:%.*]]
8324 // CHECK-64: cond.false:
8325 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8326 // CHECK-64-NEXT: br label [[COND_END]]
8327 // CHECK-64: cond.end:
8328 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8329 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
8330 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8331 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
8332 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8333 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8334 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8335 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8336 // CHECK-64: omp.dispatch.body:
8337 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8338 // CHECK-64: omp.inner.for.cond:
8339 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP388:![0-9]+]]
8340 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP388]]
8341 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8342 // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8343 // CHECK-64: omp.inner.for.body:
8344 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP388]]
8345 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8346 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8347 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP388]]
8348 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8349 // CHECK-64: omp.body.continue:
8350 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8351 // CHECK-64: omp.inner.for.inc:
8352 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP388]]
8353 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8354 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP388]]
8355 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP389:![0-9]+]]
8356 // CHECK-64: omp.inner.for.end:
8357 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
8358 // CHECK-64: omp.dispatch.inc:
8359 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8360 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
8361 // CHECK-64-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
8362 // CHECK-64-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
8363 // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8364 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
8365 // CHECK-64-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
8366 // CHECK-64-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
8367 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
8368 // CHECK-64: omp.dispatch.end:
8369 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
8370 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
8371 // CHECK-64-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
8372 // CHECK-64-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8373 // CHECK-64: .omp.final.then:
8374 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
8375 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
8376 // CHECK-64: .omp.final.done:
8377 // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
8378 // CHECK-64-NEXT: ret void
8381 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l224
8382 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10]] {
8383 // CHECK-64-NEXT: entry:
8384 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
8385 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
8386 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
8387 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l224_kernel_environment, ptr [[DYN_PTR]])
8388 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
8389 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
8390 // CHECK-64: user_code.entry:
8391 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
8392 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l224_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
8393 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
8394 // CHECK-64-NEXT: ret void
8395 // CHECK-64: worker.exit:
8396 // CHECK-64-NEXT: ret void
8399 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l224_omp_outlined
8400 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8401 // CHECK-64-NEXT: entry:
8402 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
8403 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
8404 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8405 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
8406 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8407 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8408 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8409 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8410 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
8411 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
8412 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
8413 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
8414 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
8415 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8416 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8417 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
8418 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
8419 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1)
8420 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
8421 // CHECK-64: omp.dispatch.cond:
8422 // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
8423 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
8424 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8425 // CHECK-64: omp.dispatch.body:
8426 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8427 // CHECK-64-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
8428 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8429 // CHECK-64: omp.inner.for.cond:
8430 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP391:![0-9]+]]
8431 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP391]]
8432 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
8433 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8434 // CHECK-64: omp.inner.for.body:
8435 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP391]]
8436 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
8437 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8438 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP391]]
8439 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8440 // CHECK-64: omp.body.continue:
8441 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8442 // CHECK-64: omp.inner.for.inc:
8443 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP391]]
8444 // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
8445 // CHECK-64-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP391]]
8446 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP392:![0-9]+]]
8447 // CHECK-64: omp.inner.for.end:
8448 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
8449 // CHECK-64: omp.dispatch.inc:
8450 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
8451 // CHECK-64: omp.dispatch.end:
8452 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
8453 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
8454 // CHECK-64-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
8455 // CHECK-64-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8456 // CHECK-64: .omp.final.then:
8457 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
8458 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
8459 // CHECK-64: .omp.final.done:
8460 // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
8461 // CHECK-64-NEXT: ret void
8464 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l229
8465 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10]] {
8466 // CHECK-64-NEXT: entry:
8467 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
8468 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
8469 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
8470 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l229_kernel_environment, ptr [[DYN_PTR]])
8471 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
8472 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
8473 // CHECK-64: user_code.entry:
8474 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
8475 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l229_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
8476 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
8477 // CHECK-64-NEXT: ret void
8478 // CHECK-64: worker.exit:
8479 // CHECK-64-NEXT: ret void
8482 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l229_omp_outlined
8483 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8484 // CHECK-64-NEXT: entry:
8485 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
8486 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
8487 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8488 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
8489 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8490 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8491 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8492 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8493 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
8494 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
8495 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
8496 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
8497 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
8498 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8499 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8500 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
8501 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
8502 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1)
8503 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
8504 // CHECK-64: omp.dispatch.cond:
8505 // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
8506 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
8507 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8508 // CHECK-64: omp.dispatch.body:
8509 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8510 // CHECK-64-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
8511 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8512 // CHECK-64: omp.inner.for.cond:
8513 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP394:![0-9]+]]
8514 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP394]]
8515 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
8516 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8517 // CHECK-64: omp.inner.for.body:
8518 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP394]]
8519 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
8520 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8521 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP394]]
8522 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8523 // CHECK-64: omp.body.continue:
8524 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8525 // CHECK-64: omp.inner.for.inc:
8526 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP394]]
8527 // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
8528 // CHECK-64-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP394]]
8529 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP395:![0-9]+]]
8530 // CHECK-64: omp.inner.for.end:
8531 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
8532 // CHECK-64: omp.dispatch.inc:
8533 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
8534 // CHECK-64: omp.dispatch.end:
8535 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
8536 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
8537 // CHECK-64-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
8538 // CHECK-64-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8539 // CHECK-64: .omp.final.then:
8540 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
8541 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
8542 // CHECK-64: .omp.final.done:
8543 // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
8544 // CHECK-64-NEXT: ret void
8547 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l234
8548 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10]] {
8549 // CHECK-64-NEXT: entry:
8550 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
8551 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
8552 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
8553 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l234_kernel_environment, ptr [[DYN_PTR]])
8554 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
8555 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
8556 // CHECK-64: user_code.entry:
8557 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
8558 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l234_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
8559 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
8560 // CHECK-64-NEXT: ret void
8561 // CHECK-64: worker.exit:
8562 // CHECK-64-NEXT: ret void
8565 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l234_omp_outlined
8566 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8567 // CHECK-64-NEXT: entry:
8568 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
8569 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
8570 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8571 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
8572 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8573 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8574 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8575 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8576 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
8577 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
8578 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
8579 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
8580 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
8581 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8582 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8583 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
8584 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
8585 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1)
8586 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
8587 // CHECK-64: omp.dispatch.cond:
8588 // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
8589 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
8590 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8591 // CHECK-64: omp.dispatch.body:
8592 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8593 // CHECK-64-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
8594 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8595 // CHECK-64: omp.inner.for.cond:
8596 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP397:![0-9]+]]
8597 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP397]]
8598 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
8599 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8600 // CHECK-64: omp.inner.for.body:
8601 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP397]]
8602 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
8603 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8604 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP397]]
8605 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8606 // CHECK-64: omp.body.continue:
8607 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8608 // CHECK-64: omp.inner.for.inc:
8609 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP397]]
8610 // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
8611 // CHECK-64-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP397]]
8612 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP398:![0-9]+]]
8613 // CHECK-64: omp.inner.for.end:
8614 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
8615 // CHECK-64: omp.dispatch.inc:
8616 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
8617 // CHECK-64: omp.dispatch.end:
8618 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
8619 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
8620 // CHECK-64-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
8621 // CHECK-64-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8622 // CHECK-64: .omp.final.then:
8623 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
8624 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
8625 // CHECK-64: .omp.final.done:
8626 // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
8627 // CHECK-64-NEXT: ret void
8630 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l239
8631 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10]] {
8632 // CHECK-64-NEXT: entry:
8633 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
8634 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
8635 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
8636 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l239_kernel_environment, ptr [[DYN_PTR]])
8637 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
8638 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
8639 // CHECK-64: user_code.entry:
8640 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
8641 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l239_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
8642 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
8643 // CHECK-64-NEXT: ret void
8644 // CHECK-64: worker.exit:
8645 // CHECK-64-NEXT: ret void
8648 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l239_omp_outlined
8649 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8650 // CHECK-64-NEXT: entry:
8651 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
8652 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
8653 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8654 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
8655 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8656 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8657 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8658 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8659 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
8660 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
8661 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
8662 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
8663 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
8664 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8665 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8666 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
8667 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
8668 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1)
8669 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
8670 // CHECK-64: omp.dispatch.cond:
8671 // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
8672 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
8673 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8674 // CHECK-64: omp.dispatch.body:
8675 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8676 // CHECK-64-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
8677 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8678 // CHECK-64: omp.inner.for.cond:
8679 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP400:![0-9]+]]
8680 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP400]]
8681 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
8682 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8683 // CHECK-64: omp.inner.for.body:
8684 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP400]]
8685 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
8686 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8687 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP400]]
8688 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8689 // CHECK-64: omp.body.continue:
8690 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8691 // CHECK-64: omp.inner.for.inc:
8692 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP400]]
8693 // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
8694 // CHECK-64-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP400]]
8695 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP401:![0-9]+]]
8696 // CHECK-64: omp.inner.for.end:
8697 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
8698 // CHECK-64: omp.dispatch.inc:
8699 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
8700 // CHECK-64: omp.dispatch.end:
8701 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
8702 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
8703 // CHECK-64-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
8704 // CHECK-64-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8705 // CHECK-64: .omp.final.then:
8706 // CHECK-64-NEXT: store i32 10, ptr [[I]], align 4
8707 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]]
8708 // CHECK-64: .omp.final.done:
8709 // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
8710 // CHECK-64-NEXT: ret void
8713 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l244
8714 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
8715 // CHECK-64-NEXT: entry:
8716 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
8717 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
8718 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
8719 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l244_kernel_environment, ptr [[DYN_PTR]])
8720 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
8721 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
8722 // CHECK-64: user_code.entry:
8723 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
8724 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l244_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
8725 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
8726 // CHECK-64-NEXT: ret void
8727 // CHECK-64: worker.exit:
8728 // CHECK-64-NEXT: ret void
8731 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l244_omp_outlined
8732 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8733 // CHECK-64-NEXT: entry:
8734 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
8735 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
8736 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8737 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
8738 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8739 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8740 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8741 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8742 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
8743 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
8744 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
8745 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
8746 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
8747 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8748 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8749 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
8750 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
8751 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8752 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
8753 // CHECK-64: omp.dispatch.cond:
8754 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8755 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
8756 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8757 // CHECK-64: cond.true:
8758 // CHECK-64-NEXT: br label [[COND_END:%.*]]
8759 // CHECK-64: cond.false:
8760 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8761 // CHECK-64-NEXT: br label [[COND_END]]
8762 // CHECK-64: cond.end:
8763 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8764 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
8765 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8766 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
8767 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8768 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8769 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8770 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8771 // CHECK-64: omp.dispatch.body:
8772 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8773 // CHECK-64: omp.inner.for.cond:
8774 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8775 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8776 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8777 // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8778 // CHECK-64: omp.inner.for.body:
8779 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8780 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8781 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8782 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4
8783 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8784 // CHECK-64: omp.body.continue:
8785 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8786 // CHECK-64: omp.inner.for.inc:
8787 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8788 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8789 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
8790 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
8791 // CHECK-64: omp.inner.for.end:
8792 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
8793 // CHECK-64: omp.dispatch.inc:
8794 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8795 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
8796 // CHECK-64-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
8797 // CHECK-64-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
8798 // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8799 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
8800 // CHECK-64-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
8801 // CHECK-64-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
8802 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
8803 // CHECK-64: omp.dispatch.end:
8804 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
8805 // CHECK-64-NEXT: ret void
8808 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l248
8809 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
8810 // CHECK-64-NEXT: entry:
8811 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
8812 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
8813 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
8814 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l248_kernel_environment, ptr [[DYN_PTR]])
8815 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
8816 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
8817 // CHECK-64: user_code.entry:
8818 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
8819 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l248_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
8820 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
8821 // CHECK-64-NEXT: ret void
8822 // CHECK-64: worker.exit:
8823 // CHECK-64-NEXT: ret void
8826 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l248_omp_outlined
8827 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8828 // CHECK-64-NEXT: entry:
8829 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
8830 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
8831 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8832 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
8833 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8834 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8835 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8836 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8837 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
8838 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
8839 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
8840 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
8841 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
8842 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8843 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8844 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
8845 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
8846 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8847 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8848 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
8849 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8850 // CHECK-64: cond.true:
8851 // CHECK-64-NEXT: br label [[COND_END:%.*]]
8852 // CHECK-64: cond.false:
8853 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8854 // CHECK-64-NEXT: br label [[COND_END]]
8855 // CHECK-64: cond.end:
8856 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8857 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
8858 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8859 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
8860 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8861 // CHECK-64: omp.inner.for.cond:
8862 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8863 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8864 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8865 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8866 // CHECK-64: omp.inner.for.body:
8867 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8868 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
8869 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8870 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4
8871 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8872 // CHECK-64: omp.body.continue:
8873 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8874 // CHECK-64: omp.inner.for.inc:
8875 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8876 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
8877 // CHECK-64-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
8878 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
8879 // CHECK-64: omp.inner.for.end:
8880 // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8881 // CHECK-64: omp.loop.exit:
8882 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
8883 // CHECK-64-NEXT: ret void
8886 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l252
8887 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
8888 // CHECK-64-NEXT: entry:
8889 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
8890 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
8891 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
8892 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l252_kernel_environment, ptr [[DYN_PTR]])
8893 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
8894 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
8895 // CHECK-64: user_code.entry:
8896 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
8897 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l252_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
8898 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
8899 // CHECK-64-NEXT: ret void
8900 // CHECK-64: worker.exit:
8901 // CHECK-64-NEXT: ret void
8904 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l252_omp_outlined
8905 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8906 // CHECK-64-NEXT: entry:
8907 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
8908 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
8909 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8910 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
8911 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8912 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8913 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8914 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8915 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
8916 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
8917 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
8918 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
8919 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
8920 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8921 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8922 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
8923 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
8924 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8925 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
8926 // CHECK-64: omp.dispatch.cond:
8927 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8928 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
8929 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8930 // CHECK-64: cond.true:
8931 // CHECK-64-NEXT: br label [[COND_END:%.*]]
8932 // CHECK-64: cond.false:
8933 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8934 // CHECK-64-NEXT: br label [[COND_END]]
8935 // CHECK-64: cond.end:
8936 // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8937 // CHECK-64-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
8938 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8939 // CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
8940 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8941 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8942 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8943 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8944 // CHECK-64: omp.dispatch.body:
8945 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8946 // CHECK-64: omp.inner.for.cond:
8947 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8948 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8949 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8950 // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8951 // CHECK-64: omp.inner.for.body:
8952 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8953 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8954 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8955 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4
8956 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8957 // CHECK-64: omp.body.continue:
8958 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8959 // CHECK-64: omp.inner.for.inc:
8960 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8961 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8962 // CHECK-64-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
8963 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]]
8964 // CHECK-64: omp.inner.for.end:
8965 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
8966 // CHECK-64: omp.dispatch.inc:
8967 // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8968 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
8969 // CHECK-64-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
8970 // CHECK-64-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
8971 // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8972 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
8973 // CHECK-64-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
8974 // CHECK-64-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
8975 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
8976 // CHECK-64: omp.dispatch.end:
8977 // CHECK-64-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
8978 // CHECK-64-NEXT: ret void
8981 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l256
8982 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
8983 // CHECK-64-NEXT: entry:
8984 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
8985 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
8986 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
8987 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l256_kernel_environment, ptr [[DYN_PTR]])
8988 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
8989 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
8990 // CHECK-64: user_code.entry:
8991 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
8992 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l256_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
8993 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
8994 // CHECK-64-NEXT: ret void
8995 // CHECK-64: worker.exit:
8996 // CHECK-64-NEXT: ret void
8999 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l256_omp_outlined
9000 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
9001 // CHECK-64-NEXT: entry:
9002 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
9003 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
9004 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9005 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
9006 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9007 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9008 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9009 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9010 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
9011 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
9012 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
9013 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
9014 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
9015 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9016 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9017 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
9018 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
9019 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1)
9020 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
9021 // CHECK-64: omp.dispatch.cond:
9022 // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
9023 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
9024 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9025 // CHECK-64: omp.dispatch.body:
9026 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9027 // CHECK-64-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
9028 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9029 // CHECK-64: omp.inner.for.cond:
9030 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP403:![0-9]+]]
9031 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP403]]
9032 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
9033 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9034 // CHECK-64: omp.inner.for.body:
9035 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP403]]
9036 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
9037 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9038 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP403]]
9039 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9040 // CHECK-64: omp.body.continue:
9041 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9042 // CHECK-64: omp.inner.for.inc:
9043 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP403]]
9044 // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
9045 // CHECK-64-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP403]]
9046 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP404:![0-9]+]]
9047 // CHECK-64: omp.inner.for.end:
9048 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
9049 // CHECK-64: omp.dispatch.inc:
9050 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
9051 // CHECK-64: omp.dispatch.end:
9052 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
9053 // CHECK-64-NEXT: ret void
9056 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l260
9057 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
9058 // CHECK-64-NEXT: entry:
9059 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
9060 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
9061 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
9062 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l260_kernel_environment, ptr [[DYN_PTR]])
9063 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
9064 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
9065 // CHECK-64: user_code.entry:
9066 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
9067 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l260_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
9068 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
9069 // CHECK-64-NEXT: ret void
9070 // CHECK-64: worker.exit:
9071 // CHECK-64-NEXT: ret void
9074 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l260_omp_outlined
9075 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
9076 // CHECK-64-NEXT: entry:
9077 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
9078 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
9079 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9080 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
9081 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9082 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9083 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9084 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9085 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
9086 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
9087 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
9088 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
9089 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
9090 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9091 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9092 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
9093 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
9094 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1)
9095 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
9096 // CHECK-64: omp.dispatch.cond:
9097 // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
9098 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
9099 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9100 // CHECK-64: omp.dispatch.body:
9101 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9102 // CHECK-64-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
9103 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9104 // CHECK-64: omp.inner.for.cond:
9105 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP406:![0-9]+]]
9106 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP406]]
9107 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
9108 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9109 // CHECK-64: omp.inner.for.body:
9110 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP406]]
9111 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
9112 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9113 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP406]]
9114 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9115 // CHECK-64: omp.body.continue:
9116 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9117 // CHECK-64: omp.inner.for.inc:
9118 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP406]]
9119 // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
9120 // CHECK-64-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP406]]
9121 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP407:![0-9]+]]
9122 // CHECK-64: omp.inner.for.end:
9123 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
9124 // CHECK-64: omp.dispatch.inc:
9125 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
9126 // CHECK-64: omp.dispatch.end:
9127 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
9128 // CHECK-64-NEXT: ret void
9131 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l264
9132 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
9133 // CHECK-64-NEXT: entry:
9134 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
9135 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
9136 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
9137 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l264_kernel_environment, ptr [[DYN_PTR]])
9138 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
9139 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
9140 // CHECK-64: user_code.entry:
9141 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
9142 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l264_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
9143 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
9144 // CHECK-64-NEXT: ret void
9145 // CHECK-64: worker.exit:
9146 // CHECK-64-NEXT: ret void
9149 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l264_omp_outlined
9150 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
9151 // CHECK-64-NEXT: entry:
9152 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
9153 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
9154 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9155 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
9156 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9157 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9158 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9159 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9160 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
9161 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
9162 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
9163 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
9164 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
9165 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9166 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9167 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
9168 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
9169 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1)
9170 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
9171 // CHECK-64: omp.dispatch.cond:
9172 // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
9173 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
9174 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9175 // CHECK-64: omp.dispatch.body:
9176 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9177 // CHECK-64-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
9178 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9179 // CHECK-64: omp.inner.for.cond:
9180 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP409:![0-9]+]]
9181 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP409]]
9182 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
9183 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9184 // CHECK-64: omp.inner.for.body:
9185 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP409]]
9186 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
9187 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9188 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP409]]
9189 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9190 // CHECK-64: omp.body.continue:
9191 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9192 // CHECK-64: omp.inner.for.inc:
9193 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP409]]
9194 // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
9195 // CHECK-64-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP409]]
9196 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP410:![0-9]+]]
9197 // CHECK-64: omp.inner.for.end:
9198 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
9199 // CHECK-64: omp.dispatch.inc:
9200 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
9201 // CHECK-64: omp.dispatch.end:
9202 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
9203 // CHECK-64-NEXT: ret void
9206 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l268
9207 // CHECK-64-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
9208 // CHECK-64-NEXT: entry:
9209 // CHECK-64-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
9210 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
9211 // CHECK-64-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
9212 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l268_kernel_environment, ptr [[DYN_PTR]])
9213 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
9214 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
9215 // CHECK-64: user_code.entry:
9216 // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
9217 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l268_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
9218 // CHECK-64-NEXT: call void @__kmpc_target_deinit()
9219 // CHECK-64-NEXT: ret void
9220 // CHECK-64: worker.exit:
9221 // CHECK-64-NEXT: ret void
9224 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l268_omp_outlined
9225 // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
9226 // CHECK-64-NEXT: entry:
9227 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
9228 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
9229 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9230 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4
9231 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9232 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9233 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9234 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9235 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4
9236 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
9237 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
9238 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
9239 // CHECK-64-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
9240 // CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9241 // CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9242 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
9243 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
9244 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1)
9245 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
9246 // CHECK-64: omp.dispatch.cond:
9247 // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
9248 // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
9249 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9250 // CHECK-64: omp.dispatch.body:
9251 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9252 // CHECK-64-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
9253 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9254 // CHECK-64: omp.inner.for.cond:
9255 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP412:![0-9]+]]
9256 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP412]]
9257 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
9258 // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9259 // CHECK-64: omp.inner.for.body:
9260 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP412]]
9261 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
9262 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9263 // CHECK-64-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP412]]
9264 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9265 // CHECK-64: omp.body.continue:
9266 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9267 // CHECK-64: omp.inner.for.inc:
9268 // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP412]]
9269 // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
9270 // CHECK-64-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP412]]
9271 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP413:![0-9]+]]
9272 // CHECK-64: omp.inner.for.end:
9273 // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
9274 // CHECK-64: omp.dispatch.inc:
9275 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]]
9276 // CHECK-64: omp.dispatch.end:
9277 // CHECK-64-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
9278 // CHECK-64-NEXT: ret void
9281 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15
9282 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] {
9283 // CHECK-32-NEXT: entry:
9284 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
9285 // CHECK-32-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9286 // CHECK-32-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9287 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
9288 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
9289 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
9290 // CHECK-32-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9291 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_kernel_environment, ptr [[DYN_PTR]])
9292 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
9293 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
9294 // CHECK-32: user_code.entry:
9295 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
9296 // CHECK-32-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
9297 // CHECK-32-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
9298 // CHECK-32-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
9299 // CHECK-32-NEXT: store i8 [[FROMBOOL]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
9300 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
9301 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
9302 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
9303 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i32 [[TMP3]]) #[[ATTR2:[0-9]+]]
9304 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
9305 // CHECK-32-NEXT: ret void
9306 // CHECK-32: worker.exit:
9307 // CHECK-32-NEXT: ret void
9310 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined
9311 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] {
9312 // CHECK-32-NEXT: entry:
9313 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
9314 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
9315 // CHECK-32-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9316 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9317 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
9318 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9319 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9320 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9321 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9322 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
9323 // CHECK-32-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9324 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x ptr], align 4
9325 // CHECK-32-NEXT: [[DOTCAPTURE_EXPR__CASTED15:%.*]] = alloca i32, align 4
9326 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS17:%.*]] = alloca [3 x ptr], align 4
9327 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
9328 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
9329 // CHECK-32-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9330 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
9331 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
9332 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9333 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9334 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
9335 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9336 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
9337 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
9338 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9339 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
9340 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9341 // CHECK-32: cond.true:
9342 // CHECK-32-NEXT: br label [[COND_END:%.*]]
9343 // CHECK-32: cond.false:
9344 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9345 // CHECK-32-NEXT: br label [[COND_END]]
9346 // CHECK-32: cond.end:
9347 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9348 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
9349 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
9350 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
9351 // CHECK-32-NEXT: [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
9352 // CHECK-32-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP5]] to i1
9353 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
9354 // CHECK-32: omp_if.then:
9355 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9356 // CHECK-32: omp.inner.for.cond:
9357 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP221:![0-9]+]]
9358 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
9359 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9360 // CHECK-32: omp.inner.for.body:
9361 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP221]]
9362 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP221]]
9363 // CHECK-32-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP221]]
9364 // CHECK-32-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP9]] to i1
9365 // CHECK-32-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL2]] to i8
9366 // CHECK-32-NEXT: store i8 [[FROMBOOL]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1, !llvm.access.group [[ACC_GRP221]]
9367 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP221]]
9368 // CHECK-32-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
9369 // CHECK-32-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to ptr
9370 // CHECK-32-NEXT: store ptr [[TMP12]], ptr [[TMP11]], align 4, !llvm.access.group [[ACC_GRP221]]
9371 // CHECK-32-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
9372 // CHECK-32-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to ptr
9373 // CHECK-32-NEXT: store ptr [[TMP14]], ptr [[TMP13]], align 4, !llvm.access.group [[ACC_GRP221]]
9374 // CHECK-32-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
9375 // CHECK-32-NEXT: [[TMP16:%.*]] = inttoptr i32 [[TMP10]] to ptr
9376 // CHECK-32-NEXT: store ptr [[TMP16]], ptr [[TMP15]], align 4, !llvm.access.group [[ACC_GRP221]]
9377 // CHECK-32-NEXT: [[TMP17:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP221]]
9378 // CHECK-32-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP17]] to i1
9379 // CHECK-32-NEXT: [[TMP18:%.*]] = zext i1 [[TOBOOL3]] to i32
9380 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP18]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 3), !llvm.access.group [[ACC_GRP221]]
9381 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9382 // CHECK-32: omp.inner.for.inc:
9383 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP221]]
9384 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP221]]
9385 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
9386 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP221]]
9387 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP221]]
9388 // CHECK-32-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP221]]
9389 // CHECK-32-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
9390 // CHECK-32-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP221]]
9391 // CHECK-32-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP221]]
9392 // CHECK-32-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP221]]
9393 // CHECK-32-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
9394 // CHECK-32-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP221]]
9395 // CHECK-32-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP221]]
9396 // CHECK-32-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP25]], 9
9397 // CHECK-32-NEXT: br i1 [[CMP6]], label [[COND_TRUE7:%.*]], label [[COND_FALSE8:%.*]]
9398 // CHECK-32: cond.true7:
9399 // CHECK-32-NEXT: br label [[COND_END9:%.*]]
9400 // CHECK-32: cond.false8:
9401 // CHECK-32-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP221]]
9402 // CHECK-32-NEXT: br label [[COND_END9]]
9403 // CHECK-32: cond.end9:
9404 // CHECK-32-NEXT: [[COND10:%.*]] = phi i32 [ 9, [[COND_TRUE7]] ], [ [[TMP26]], [[COND_FALSE8]] ]
9405 // CHECK-32-NEXT: store i32 [[COND10]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP221]]
9406 // CHECK-32-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP221]]
9407 // CHECK-32-NEXT: store i32 [[TMP27]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP221]]
9408 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP222:![0-9]+]]
9409 // CHECK-32: omp.inner.for.end:
9410 // CHECK-32-NEXT: br label [[OMP_IF_END:%.*]]
9411 // CHECK-32: omp_if.else:
9412 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND11:%.*]]
9413 // CHECK-32: omp.inner.for.cond11:
9414 // CHECK-32-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9415 // CHECK-32-NEXT: [[CMP12:%.*]] = icmp slt i32 [[TMP28]], 10
9416 // CHECK-32-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY13:%.*]], label [[OMP_INNER_FOR_END28:%.*]]
9417 // CHECK-32: omp.inner.for.body13:
9418 // CHECK-32-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
9419 // CHECK-32-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9420 // CHECK-32-NEXT: [[TMP31:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
9421 // CHECK-32-NEXT: [[TOBOOL14:%.*]] = trunc i8 [[TMP31]] to i1
9422 // CHECK-32-NEXT: [[FROMBOOL16:%.*]] = zext i1 [[TOBOOL14]] to i8
9423 // CHECK-32-NEXT: store i8 [[FROMBOOL16]], ptr [[DOTCAPTURE_EXPR__CASTED15]], align 1
9424 // CHECK-32-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED15]], align 4
9425 // CHECK-32-NEXT: [[TMP33:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS17]], i32 0, i32 0
9426 // CHECK-32-NEXT: [[TMP34:%.*]] = inttoptr i32 [[TMP29]] to ptr
9427 // CHECK-32-NEXT: store ptr [[TMP34]], ptr [[TMP33]], align 4
9428 // CHECK-32-NEXT: [[TMP35:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS17]], i32 0, i32 1
9429 // CHECK-32-NEXT: [[TMP36:%.*]] = inttoptr i32 [[TMP30]] to ptr
9430 // CHECK-32-NEXT: store ptr [[TMP36]], ptr [[TMP35]], align 4
9431 // CHECK-32-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS17]], i32 0, i32 2
9432 // CHECK-32-NEXT: [[TMP38:%.*]] = inttoptr i32 [[TMP32]] to ptr
9433 // CHECK-32-NEXT: store ptr [[TMP38]], ptr [[TMP37]], align 4
9434 // CHECK-32-NEXT: [[TMP39:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
9435 // CHECK-32-NEXT: [[TOBOOL18:%.*]] = trunc i8 [[TMP39]] to i1
9436 // CHECK-32-NEXT: [[TMP40:%.*]] = zext i1 [[TOBOOL18]] to i32
9437 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP40]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined_omp_outlined1, ptr null, ptr [[CAPTURED_VARS_ADDRS17]], i32 3)
9438 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]
9439 // CHECK-32: omp.inner.for.inc19:
9440 // CHECK-32-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9441 // CHECK-32-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
9442 // CHECK-32-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP41]], [[TMP42]]
9443 // CHECK-32-NEXT: store i32 [[ADD20]], ptr [[DOTOMP_IV]], align 4
9444 // CHECK-32-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
9445 // CHECK-32-NEXT: [[TMP44:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
9446 // CHECK-32-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP43]], [[TMP44]]
9447 // CHECK-32-NEXT: store i32 [[ADD21]], ptr [[DOTOMP_COMB_LB]], align 4
9448 // CHECK-32-NEXT: [[TMP45:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9449 // CHECK-32-NEXT: [[TMP46:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
9450 // CHECK-32-NEXT: [[ADD22:%.*]] = add nsw i32 [[TMP45]], [[TMP46]]
9451 // CHECK-32-NEXT: store i32 [[ADD22]], ptr [[DOTOMP_COMB_UB]], align 4
9452 // CHECK-32-NEXT: [[TMP47:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9453 // CHECK-32-NEXT: [[CMP23:%.*]] = icmp sgt i32 [[TMP47]], 9
9454 // CHECK-32-NEXT: br i1 [[CMP23]], label [[COND_TRUE24:%.*]], label [[COND_FALSE25:%.*]]
9455 // CHECK-32: cond.true24:
9456 // CHECK-32-NEXT: br label [[COND_END26:%.*]]
9457 // CHECK-32: cond.false25:
9458 // CHECK-32-NEXT: [[TMP48:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9459 // CHECK-32-NEXT: br label [[COND_END26]]
9460 // CHECK-32: cond.end26:
9461 // CHECK-32-NEXT: [[COND27:%.*]] = phi i32 [ 9, [[COND_TRUE24]] ], [ [[TMP48]], [[COND_FALSE25]] ]
9462 // CHECK-32-NEXT: store i32 [[COND27]], ptr [[DOTOMP_COMB_UB]], align 4
9463 // CHECK-32-NEXT: [[TMP49:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
9464 // CHECK-32-NEXT: store i32 [[TMP49]], ptr [[DOTOMP_IV]], align 4
9465 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND11]], !llvm.loop [[LOOP225:![0-9]+]]
9466 // CHECK-32: omp.inner.for.end28:
9467 // CHECK-32-NEXT: br label [[OMP_IF_END]]
9468 // CHECK-32: omp_if.end:
9469 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9470 // CHECK-32: omp.loop.exit:
9471 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
9472 // CHECK-32-NEXT: [[TMP50:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
9473 // CHECK-32-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0
9474 // CHECK-32-NEXT: br i1 [[TMP51]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9475 // CHECK-32: .omp.final.then:
9476 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
9477 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
9478 // CHECK-32: .omp.final.done:
9479 // CHECK-32-NEXT: ret void
9482 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined_omp_outlined
9483 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
9484 // CHECK-32-NEXT: entry:
9485 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
9486 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
9487 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9488 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9489 // CHECK-32-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9490 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9491 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
9492 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9493 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9494 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9495 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9496 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
9497 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
9498 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
9499 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
9500 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9501 // CHECK-32-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9502 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
9503 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
9504 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
9505 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9506 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
9507 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
9508 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9509 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9510 // CHECK-32-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
9511 // CHECK-32-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
9512 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
9513 // CHECK-32: omp_if.then:
9514 // CHECK-32-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9515 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
9516 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
9517 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9518 // CHECK-32-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
9519 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9520 // CHECK-32: omp.inner.for.cond:
9521 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP227:![0-9]+]]
9522 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group [[ACC_GRP227]]
9523 // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
9524 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9525 // CHECK-32: omp.inner.for.body:
9526 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP227]]
9527 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
9528 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9529 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP227]]
9530 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9531 // CHECK-32: omp.body.continue:
9532 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9533 // CHECK-32: omp.inner.for.inc:
9534 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP227]]
9535 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP227]]
9536 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
9537 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP227]]
9538 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP228:![0-9]+]]
9539 // CHECK-32: omp.inner.for.end:
9540 // CHECK-32-NEXT: br label [[OMP_IF_END:%.*]]
9541 // CHECK-32: omp_if.else:
9542 // CHECK-32-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9543 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
9544 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
9545 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9546 // CHECK-32-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
9547 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND2:%.*]]
9548 // CHECK-32: omp.inner.for.cond2:
9549 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9550 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9551 // CHECK-32-NEXT: [[CMP3:%.*]] = icmp ule i32 [[TMP14]], [[TMP15]]
9552 // CHECK-32-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY4:%.*]], label [[OMP_INNER_FOR_END10:%.*]]
9553 // CHECK-32: omp.inner.for.body4:
9554 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9555 // CHECK-32-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP16]], 1
9556 // CHECK-32-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
9557 // CHECK-32-NEXT: store i32 [[ADD6]], ptr [[I]], align 4
9558 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE7:%.*]]
9559 // CHECK-32: omp.body.continue7:
9560 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC8:%.*]]
9561 // CHECK-32: omp.inner.for.inc8:
9562 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9563 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
9564 // CHECK-32-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
9565 // CHECK-32-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4
9566 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND2]], !llvm.loop [[LOOP230:![0-9]+]]
9567 // CHECK-32: omp.inner.for.end10:
9568 // CHECK-32-NEXT: br label [[OMP_IF_END]]
9569 // CHECK-32: omp_if.end:
9570 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9571 // CHECK-32: omp.loop.exit:
9572 // CHECK-32-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9573 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
9574 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP20]])
9575 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
9576 // CHECK-32-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
9577 // CHECK-32-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9578 // CHECK-32: .omp.final.then:
9579 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
9580 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
9581 // CHECK-32: .omp.final.done:
9582 // CHECK-32-NEXT: ret void
9585 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined_omp_outlined1
9586 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
9587 // CHECK-32-NEXT: entry:
9588 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
9589 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
9590 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9591 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9592 // CHECK-32-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9593 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9594 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
9595 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9596 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9597 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9598 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9599 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
9600 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
9601 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
9602 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
9603 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9604 // CHECK-32-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9605 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
9606 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
9607 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
9608 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9609 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
9610 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
9611 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9612 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9613 // CHECK-32-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
9614 // CHECK-32-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
9615 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
9616 // CHECK-32: omp_if.then:
9617 // CHECK-32-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9618 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
9619 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
9620 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9621 // CHECK-32-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
9622 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9623 // CHECK-32: omp.inner.for.cond:
9624 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231:![0-9]+]]
9625 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group [[ACC_GRP231]]
9626 // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
9627 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9628 // CHECK-32: omp.inner.for.body:
9629 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231]]
9630 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
9631 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9632 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP231]]
9633 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9634 // CHECK-32: omp.body.continue:
9635 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9636 // CHECK-32: omp.inner.for.inc:
9637 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231]]
9638 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP231]]
9639 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
9640 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231]]
9641 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP232:![0-9]+]]
9642 // CHECK-32: omp.inner.for.end:
9643 // CHECK-32-NEXT: br label [[OMP_IF_END:%.*]]
9644 // CHECK-32: omp_if.else:
9645 // CHECK-32-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9646 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
9647 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
9648 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9649 // CHECK-32-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
9650 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND2:%.*]]
9651 // CHECK-32: omp.inner.for.cond2:
9652 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9653 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9654 // CHECK-32-NEXT: [[CMP3:%.*]] = icmp ule i32 [[TMP14]], [[TMP15]]
9655 // CHECK-32-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY4:%.*]], label [[OMP_INNER_FOR_END10:%.*]]
9656 // CHECK-32: omp.inner.for.body4:
9657 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9658 // CHECK-32-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP16]], 1
9659 // CHECK-32-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
9660 // CHECK-32-NEXT: store i32 [[ADD6]], ptr [[I]], align 4
9661 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE7:%.*]]
9662 // CHECK-32: omp.body.continue7:
9663 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC8:%.*]]
9664 // CHECK-32: omp.inner.for.inc8:
9665 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9666 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
9667 // CHECK-32-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
9668 // CHECK-32-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4
9669 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND2]], !llvm.loop [[LOOP234:![0-9]+]]
9670 // CHECK-32: omp.inner.for.end10:
9671 // CHECK-32-NEXT: br label [[OMP_IF_END]]
9672 // CHECK-32: omp_if.end:
9673 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9674 // CHECK-32: omp.loop.exit:
9675 // CHECK-32-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9676 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
9677 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP20]])
9678 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
9679 // CHECK-32-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
9680 // CHECK-32-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9681 // CHECK-32: .omp.final.then:
9682 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
9683 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
9684 // CHECK-32: .omp.final.done:
9685 // CHECK-32-NEXT: ret void
9688 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18
9689 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
9690 // CHECK-32-NEXT: entry:
9691 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
9692 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
9693 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
9694 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
9695 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18_kernel_environment, ptr [[DYN_PTR]])
9696 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
9697 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
9698 // CHECK-32: user_code.entry:
9699 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
9700 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
9701 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
9702 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
9703 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
9704 // CHECK-32-NEXT: ret void
9705 // CHECK-32: worker.exit:
9706 // CHECK-32-NEXT: ret void
9709 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18_omp_outlined
9710 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
9711 // CHECK-32-NEXT: entry:
9712 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
9713 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
9714 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9715 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
9716 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9717 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9718 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9719 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9720 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
9721 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
9722 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
9723 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
9724 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
9725 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
9726 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9727 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9728 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
9729 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9730 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
9731 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
9732 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9733 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
9734 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9735 // CHECK-32: cond.true:
9736 // CHECK-32-NEXT: br label [[COND_END:%.*]]
9737 // CHECK-32: cond.false:
9738 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9739 // CHECK-32-NEXT: br label [[COND_END]]
9740 // CHECK-32: cond.end:
9741 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9742 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
9743 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
9744 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
9745 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9746 // CHECK-32: omp.inner.for.cond:
9747 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP235:![0-9]+]]
9748 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
9749 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9750 // CHECK-32: omp.inner.for.body:
9751 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP235]]
9752 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP235]]
9753 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
9754 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
9755 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP235]]
9756 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
9757 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
9758 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP235]]
9759 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP235]]
9760 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9761 // CHECK-32: omp.inner.for.inc:
9762 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP235]]
9763 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP235]]
9764 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9765 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP235]]
9766 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP235]]
9767 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP235]]
9768 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
9769 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP235]]
9770 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP235]]
9771 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP235]]
9772 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
9773 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP235]]
9774 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP235]]
9775 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
9776 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
9777 // CHECK-32: cond.true5:
9778 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
9779 // CHECK-32: cond.false6:
9780 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP235]]
9781 // CHECK-32-NEXT: br label [[COND_END7]]
9782 // CHECK-32: cond.end7:
9783 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
9784 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP235]]
9785 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP235]]
9786 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP235]]
9787 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP236:![0-9]+]]
9788 // CHECK-32: omp.inner.for.end:
9789 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9790 // CHECK-32: omp.loop.exit:
9791 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
9792 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
9793 // CHECK-32-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
9794 // CHECK-32-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9795 // CHECK-32: .omp.final.then:
9796 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
9797 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
9798 // CHECK-32: .omp.final.done:
9799 // CHECK-32-NEXT: ret void
9802 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18_omp_outlined_omp_outlined
9803 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
9804 // CHECK-32-NEXT: entry:
9805 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
9806 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
9807 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9808 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9809 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9810 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
9811 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9812 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9813 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9814 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9815 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
9816 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
9817 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
9818 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
9819 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9820 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
9821 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
9822 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
9823 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9824 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
9825 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
9826 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9827 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9828 // CHECK-32-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9829 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
9830 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
9831 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
9832 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9
9833 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9834 // CHECK-32: cond.true:
9835 // CHECK-32-NEXT: br label [[COND_END:%.*]]
9836 // CHECK-32: cond.false:
9837 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
9838 // CHECK-32-NEXT: br label [[COND_END]]
9839 // CHECK-32: cond.end:
9840 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
9841 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
9842 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9843 // CHECK-32-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
9844 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9845 // CHECK-32: omp.inner.for.cond:
9846 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP238:![0-9]+]]
9847 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP238]]
9848 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9849 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9850 // CHECK-32: omp.inner.for.body:
9851 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP238]]
9852 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9853 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9854 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP238]]
9855 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9856 // CHECK-32: omp.body.continue:
9857 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9858 // CHECK-32: omp.inner.for.inc:
9859 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP238]]
9860 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
9861 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP238]]
9862 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP239:![0-9]+]]
9863 // CHECK-32: omp.inner.for.end:
9864 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9865 // CHECK-32: omp.loop.exit:
9866 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
9867 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
9868 // CHECK-32-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
9869 // CHECK-32-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9870 // CHECK-32: .omp.final.then:
9871 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
9872 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
9873 // CHECK-32: .omp.final.done:
9874 // CHECK-32-NEXT: ret void
9877 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21
9878 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
9879 // CHECK-32-NEXT: entry:
9880 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
9881 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
9882 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
9883 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
9884 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21_kernel_environment, ptr [[DYN_PTR]])
9885 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
9886 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
9887 // CHECK-32: user_code.entry:
9888 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
9889 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
9890 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
9891 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
9892 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
9893 // CHECK-32-NEXT: ret void
9894 // CHECK-32: worker.exit:
9895 // CHECK-32-NEXT: ret void
9898 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21_omp_outlined
9899 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
9900 // CHECK-32-NEXT: entry:
9901 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
9902 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
9903 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9904 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
9905 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9906 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9907 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9908 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9909 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
9910 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
9911 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
9912 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
9913 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
9914 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
9915 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9916 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9917 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
9918 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9919 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
9920 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
9921 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9922 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
9923 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9924 // CHECK-32: cond.true:
9925 // CHECK-32-NEXT: br label [[COND_END:%.*]]
9926 // CHECK-32: cond.false:
9927 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9928 // CHECK-32-NEXT: br label [[COND_END]]
9929 // CHECK-32: cond.end:
9930 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9931 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
9932 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
9933 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
9934 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9935 // CHECK-32: omp.inner.for.cond:
9936 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP241:![0-9]+]]
9937 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
9938 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9939 // CHECK-32: omp.inner.for.body:
9940 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP241]]
9941 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP241]]
9942 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
9943 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
9944 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP241]]
9945 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
9946 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
9947 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP241]]
9948 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP241]]
9949 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9950 // CHECK-32: omp.inner.for.inc:
9951 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP241]]
9952 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP241]]
9953 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9954 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP241]]
9955 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP241]]
9956 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP241]]
9957 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
9958 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP241]]
9959 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP241]]
9960 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP241]]
9961 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
9962 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP241]]
9963 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP241]]
9964 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
9965 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
9966 // CHECK-32: cond.true5:
9967 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
9968 // CHECK-32: cond.false6:
9969 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP241]]
9970 // CHECK-32-NEXT: br label [[COND_END7]]
9971 // CHECK-32: cond.end7:
9972 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
9973 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP241]]
9974 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP241]]
9975 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP241]]
9976 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP242:![0-9]+]]
9977 // CHECK-32: omp.inner.for.end:
9978 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9979 // CHECK-32: omp.loop.exit:
9980 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
9981 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
9982 // CHECK-32-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
9983 // CHECK-32-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9984 // CHECK-32: .omp.final.then:
9985 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
9986 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
9987 // CHECK-32: .omp.final.done:
9988 // CHECK-32-NEXT: ret void
9991 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21_omp_outlined_omp_outlined
9992 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
9993 // CHECK-32-NEXT: entry:
9994 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
9995 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
9996 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9997 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9998 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9999 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
10000 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10001 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10002 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10003 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10004 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
10005 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
10006 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
10007 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
10008 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
10009 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
10010 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
10011 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
10012 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
10013 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
10014 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
10015 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10016 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10017 // CHECK-32-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
10018 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
10019 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
10020 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
10021 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
10022 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10023 // CHECK-32: omp.inner.for.cond:
10024 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP244:![0-9]+]]
10025 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group [[ACC_GRP244]]
10026 // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]]
10027 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10028 // CHECK-32: omp.inner.for.body:
10029 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP244]]
10030 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
10031 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10032 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP244]]
10033 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10034 // CHECK-32: omp.body.continue:
10035 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10036 // CHECK-32: omp.inner.for.inc:
10037 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP244]]
10038 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP244]]
10039 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
10040 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP244]]
10041 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP245:![0-9]+]]
10042 // CHECK-32: omp.inner.for.end:
10043 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10044 // CHECK-32: omp.loop.exit:
10045 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
10046 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
10047 // CHECK-32-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
10048 // CHECK-32-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10049 // CHECK-32: .omp.final.then:
10050 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
10051 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
10052 // CHECK-32: .omp.final.done:
10053 // CHECK-32-NEXT: ret void
10056 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24
10057 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
10058 // CHECK-32-NEXT: entry:
10059 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
10060 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
10061 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
10062 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
10063 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24_kernel_environment, ptr [[DYN_PTR]])
10064 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
10065 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
10066 // CHECK-32: user_code.entry:
10067 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
10068 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
10069 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
10070 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
10071 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
10072 // CHECK-32-NEXT: ret void
10073 // CHECK-32: worker.exit:
10074 // CHECK-32-NEXT: ret void
10077 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24_omp_outlined
10078 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
10079 // CHECK-32-NEXT: entry:
10080 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
10081 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
10082 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10083 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
10084 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10085 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10086 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10087 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10088 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
10089 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
10090 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
10091 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
10092 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
10093 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
10094 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10095 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10096 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
10097 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
10098 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
10099 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
10100 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10101 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
10102 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10103 // CHECK-32: cond.true:
10104 // CHECK-32-NEXT: br label [[COND_END:%.*]]
10105 // CHECK-32: cond.false:
10106 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10107 // CHECK-32-NEXT: br label [[COND_END]]
10108 // CHECK-32: cond.end:
10109 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10110 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
10111 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10112 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
10113 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10114 // CHECK-32: omp.inner.for.cond:
10115 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP247:![0-9]+]]
10116 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
10117 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10118 // CHECK-32: omp.inner.for.body:
10119 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP247]]
10120 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP247]]
10121 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
10122 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
10123 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP247]]
10124 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
10125 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
10126 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP247]]
10127 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP247]]
10128 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10129 // CHECK-32: omp.inner.for.inc:
10130 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP247]]
10131 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP247]]
10132 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
10133 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP247]]
10134 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP247]]
10135 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP247]]
10136 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
10137 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP247]]
10138 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP247]]
10139 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP247]]
10140 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
10141 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP247]]
10142 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP247]]
10143 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
10144 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
10145 // CHECK-32: cond.true5:
10146 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
10147 // CHECK-32: cond.false6:
10148 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP247]]
10149 // CHECK-32-NEXT: br label [[COND_END7]]
10150 // CHECK-32: cond.end7:
10151 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
10152 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP247]]
10153 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP247]]
10154 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP247]]
10155 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP248:![0-9]+]]
10156 // CHECK-32: omp.inner.for.end:
10157 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10158 // CHECK-32: omp.loop.exit:
10159 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
10160 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
10161 // CHECK-32-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
10162 // CHECK-32-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10163 // CHECK-32: .omp.final.then:
10164 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
10165 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
10166 // CHECK-32: .omp.final.done:
10167 // CHECK-32-NEXT: ret void
10170 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24_omp_outlined_omp_outlined
10171 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
10172 // CHECK-32-NEXT: entry:
10173 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
10174 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
10175 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
10176 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
10177 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10178 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
10179 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10180 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10181 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10182 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10183 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
10184 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
10185 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
10186 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
10187 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
10188 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
10189 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
10190 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
10191 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
10192 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
10193 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
10194 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10195 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10196 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
10197 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10198 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
10199 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
10200 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
10201 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
10202 // CHECK-32: omp.dispatch.cond:
10203 // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
10204 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
10205 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
10206 // CHECK-32: omp.dispatch.body:
10207 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
10208 // CHECK-32-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
10209 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10210 // CHECK-32: omp.inner.for.cond:
10211 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP250:![0-9]+]]
10212 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP250]]
10213 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
10214 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10215 // CHECK-32: omp.inner.for.body:
10216 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP250]]
10217 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
10218 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10219 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP250]]
10220 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10221 // CHECK-32: omp.body.continue:
10222 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10223 // CHECK-32: omp.inner.for.inc:
10224 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP250]]
10225 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
10226 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP250]]
10227 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP251:![0-9]+]]
10228 // CHECK-32: omp.inner.for.end:
10229 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
10230 // CHECK-32: omp.dispatch.inc:
10231 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
10232 // CHECK-32: omp.dispatch.end:
10233 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
10234 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
10235 // CHECK-32-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
10236 // CHECK-32-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10237 // CHECK-32: .omp.final.then:
10238 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
10239 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
10240 // CHECK-32: .omp.final.done:
10241 // CHECK-32-NEXT: ret void
10244 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27
10245 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
10246 // CHECK-32-NEXT: entry:
10247 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
10248 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
10249 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
10250 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
10251 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27_kernel_environment, ptr [[DYN_PTR]])
10252 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
10253 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
10254 // CHECK-32: user_code.entry:
10255 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
10256 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
10257 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
10258 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
10259 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
10260 // CHECK-32-NEXT: ret void
10261 // CHECK-32: worker.exit:
10262 // CHECK-32-NEXT: ret void
10265 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27_omp_outlined
10266 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
10267 // CHECK-32-NEXT: entry:
10268 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
10269 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
10270 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10271 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
10272 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10273 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10274 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10275 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10276 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
10277 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
10278 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
10279 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
10280 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
10281 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
10282 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10283 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10284 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
10285 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
10286 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
10287 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
10288 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10289 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
10290 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10291 // CHECK-32: cond.true:
10292 // CHECK-32-NEXT: br label [[COND_END:%.*]]
10293 // CHECK-32: cond.false:
10294 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10295 // CHECK-32-NEXT: br label [[COND_END]]
10296 // CHECK-32: cond.end:
10297 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10298 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
10299 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10300 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
10301 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10302 // CHECK-32: omp.inner.for.cond:
10303 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP253:![0-9]+]]
10304 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
10305 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10306 // CHECK-32: omp.inner.for.body:
10307 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP253]]
10308 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP253]]
10309 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
10310 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
10311 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP253]]
10312 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
10313 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
10314 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP253]]
10315 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP253]]
10316 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10317 // CHECK-32: omp.inner.for.inc:
10318 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP253]]
10319 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP253]]
10320 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
10321 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP253]]
10322 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP253]]
10323 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP253]]
10324 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
10325 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP253]]
10326 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP253]]
10327 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP253]]
10328 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
10329 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP253]]
10330 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP253]]
10331 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
10332 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
10333 // CHECK-32: cond.true5:
10334 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
10335 // CHECK-32: cond.false6:
10336 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP253]]
10337 // CHECK-32-NEXT: br label [[COND_END7]]
10338 // CHECK-32: cond.end7:
10339 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
10340 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP253]]
10341 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP253]]
10342 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP253]]
10343 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP254:![0-9]+]]
10344 // CHECK-32: omp.inner.for.end:
10345 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10346 // CHECK-32: omp.loop.exit:
10347 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
10348 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
10349 // CHECK-32-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
10350 // CHECK-32-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10351 // CHECK-32: .omp.final.then:
10352 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
10353 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
10354 // CHECK-32: .omp.final.done:
10355 // CHECK-32-NEXT: ret void
10358 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27_omp_outlined_omp_outlined
10359 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
10360 // CHECK-32-NEXT: entry:
10361 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
10362 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
10363 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
10364 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
10365 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10366 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
10367 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10368 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10369 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10370 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10371 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
10372 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
10373 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
10374 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
10375 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
10376 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
10377 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
10378 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
10379 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
10380 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
10381 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
10382 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10383 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10384 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
10385 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10386 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
10387 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
10388 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
10389 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
10390 // CHECK-32: omp.dispatch.cond:
10391 // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
10392 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
10393 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
10394 // CHECK-32: omp.dispatch.body:
10395 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
10396 // CHECK-32-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
10397 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10398 // CHECK-32: omp.inner.for.cond:
10399 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP256:![0-9]+]]
10400 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP256]]
10401 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
10402 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10403 // CHECK-32: omp.inner.for.body:
10404 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP256]]
10405 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
10406 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10407 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP256]]
10408 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10409 // CHECK-32: omp.body.continue:
10410 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10411 // CHECK-32: omp.inner.for.inc:
10412 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP256]]
10413 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
10414 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP256]]
10415 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP257:![0-9]+]]
10416 // CHECK-32: omp.inner.for.end:
10417 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
10418 // CHECK-32: omp.dispatch.inc:
10419 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
10420 // CHECK-32: omp.dispatch.end:
10421 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
10422 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
10423 // CHECK-32-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
10424 // CHECK-32-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10425 // CHECK-32: .omp.final.then:
10426 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
10427 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
10428 // CHECK-32: .omp.final.done:
10429 // CHECK-32-NEXT: ret void
10432 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30
10433 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
10434 // CHECK-32-NEXT: entry:
10435 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
10436 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
10437 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
10438 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
10439 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30_kernel_environment, ptr [[DYN_PTR]])
10440 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
10441 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
10442 // CHECK-32: user_code.entry:
10443 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
10444 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
10445 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
10446 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
10447 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
10448 // CHECK-32-NEXT: ret void
10449 // CHECK-32: worker.exit:
10450 // CHECK-32-NEXT: ret void
10453 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30_omp_outlined
10454 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
10455 // CHECK-32-NEXT: entry:
10456 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
10457 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
10458 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10459 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
10460 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10461 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10462 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10463 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10464 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
10465 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
10466 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
10467 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
10468 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
10469 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
10470 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10471 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10472 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
10473 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
10474 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
10475 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
10476 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10477 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
10478 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10479 // CHECK-32: cond.true:
10480 // CHECK-32-NEXT: br label [[COND_END:%.*]]
10481 // CHECK-32: cond.false:
10482 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10483 // CHECK-32-NEXT: br label [[COND_END]]
10484 // CHECK-32: cond.end:
10485 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10486 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
10487 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10488 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
10489 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10490 // CHECK-32: omp.inner.for.cond:
10491 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP259:![0-9]+]]
10492 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
10493 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10494 // CHECK-32: omp.inner.for.body:
10495 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP259]]
10496 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP259]]
10497 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
10498 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
10499 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP259]]
10500 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
10501 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
10502 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP259]]
10503 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP259]]
10504 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10505 // CHECK-32: omp.inner.for.inc:
10506 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP259]]
10507 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP259]]
10508 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
10509 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP259]]
10510 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP259]]
10511 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP259]]
10512 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
10513 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP259]]
10514 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP259]]
10515 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP259]]
10516 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
10517 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP259]]
10518 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP259]]
10519 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
10520 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
10521 // CHECK-32: cond.true5:
10522 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
10523 // CHECK-32: cond.false6:
10524 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP259]]
10525 // CHECK-32-NEXT: br label [[COND_END7]]
10526 // CHECK-32: cond.end7:
10527 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
10528 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP259]]
10529 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP259]]
10530 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP259]]
10531 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP260:![0-9]+]]
10532 // CHECK-32: omp.inner.for.end:
10533 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10534 // CHECK-32: omp.loop.exit:
10535 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
10536 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
10537 // CHECK-32-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
10538 // CHECK-32-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10539 // CHECK-32: .omp.final.then:
10540 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
10541 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
10542 // CHECK-32: .omp.final.done:
10543 // CHECK-32-NEXT: ret void
10546 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30_omp_outlined_omp_outlined
10547 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
10548 // CHECK-32-NEXT: entry:
10549 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
10550 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
10551 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
10552 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
10553 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10554 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
10555 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10556 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10557 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10558 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10559 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
10560 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
10561 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
10562 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
10563 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
10564 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
10565 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
10566 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
10567 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
10568 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
10569 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
10570 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10571 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10572 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
10573 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10574 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
10575 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
10576 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
10577 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
10578 // CHECK-32: omp.dispatch.cond:
10579 // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
10580 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
10581 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
10582 // CHECK-32: omp.dispatch.body:
10583 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
10584 // CHECK-32-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
10585 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10586 // CHECK-32: omp.inner.for.cond:
10587 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP262:![0-9]+]]
10588 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP262]]
10589 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
10590 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10591 // CHECK-32: omp.inner.for.body:
10592 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP262]]
10593 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
10594 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10595 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP262]]
10596 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10597 // CHECK-32: omp.body.continue:
10598 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10599 // CHECK-32: omp.inner.for.inc:
10600 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP262]]
10601 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
10602 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP262]]
10603 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP263:![0-9]+]]
10604 // CHECK-32: omp.inner.for.end:
10605 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
10606 // CHECK-32: omp.dispatch.inc:
10607 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
10608 // CHECK-32: omp.dispatch.end:
10609 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
10610 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
10611 // CHECK-32-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
10612 // CHECK-32-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10613 // CHECK-32: .omp.final.then:
10614 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
10615 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
10616 // CHECK-32: .omp.final.done:
10617 // CHECK-32-NEXT: ret void
10620 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33
10621 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
10622 // CHECK-32-NEXT: entry:
10623 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
10624 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
10625 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
10626 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
10627 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33_kernel_environment, ptr [[DYN_PTR]])
10628 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
10629 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
10630 // CHECK-32: user_code.entry:
10631 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
10632 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
10633 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
10634 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
10635 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
10636 // CHECK-32-NEXT: ret void
10637 // CHECK-32: worker.exit:
10638 // CHECK-32-NEXT: ret void
10641 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33_omp_outlined
10642 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
10643 // CHECK-32-NEXT: entry:
10644 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
10645 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
10646 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10647 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
10648 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10649 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10650 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10651 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10652 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
10653 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
10654 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
10655 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
10656 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
10657 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
10658 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10659 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10660 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
10661 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
10662 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
10663 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
10664 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10665 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
10666 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10667 // CHECK-32: cond.true:
10668 // CHECK-32-NEXT: br label [[COND_END:%.*]]
10669 // CHECK-32: cond.false:
10670 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10671 // CHECK-32-NEXT: br label [[COND_END]]
10672 // CHECK-32: cond.end:
10673 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10674 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
10675 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10676 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
10677 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10678 // CHECK-32: omp.inner.for.cond:
10679 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP265:![0-9]+]]
10680 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
10681 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10682 // CHECK-32: omp.inner.for.body:
10683 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP265]]
10684 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP265]]
10685 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
10686 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
10687 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP265]]
10688 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
10689 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
10690 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP265]]
10691 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP265]]
10692 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10693 // CHECK-32: omp.inner.for.inc:
10694 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP265]]
10695 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP265]]
10696 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
10697 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP265]]
10698 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP265]]
10699 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP265]]
10700 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
10701 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP265]]
10702 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP265]]
10703 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP265]]
10704 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
10705 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP265]]
10706 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP265]]
10707 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
10708 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
10709 // CHECK-32: cond.true5:
10710 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
10711 // CHECK-32: cond.false6:
10712 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP265]]
10713 // CHECK-32-NEXT: br label [[COND_END7]]
10714 // CHECK-32: cond.end7:
10715 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
10716 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP265]]
10717 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP265]]
10718 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP265]]
10719 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP266:![0-9]+]]
10720 // CHECK-32: omp.inner.for.end:
10721 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10722 // CHECK-32: omp.loop.exit:
10723 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
10724 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
10725 // CHECK-32-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
10726 // CHECK-32-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10727 // CHECK-32: .omp.final.then:
10728 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
10729 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
10730 // CHECK-32: .omp.final.done:
10731 // CHECK-32-NEXT: ret void
10734 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33_omp_outlined_omp_outlined
10735 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
10736 // CHECK-32-NEXT: entry:
10737 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
10738 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
10739 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
10740 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
10741 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10742 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
10743 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10744 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10745 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10746 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10747 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
10748 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
10749 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
10750 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
10751 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
10752 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
10753 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
10754 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
10755 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
10756 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
10757 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
10758 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10759 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10760 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
10761 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10762 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
10763 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
10764 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
10765 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
10766 // CHECK-32: omp.dispatch.cond:
10767 // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
10768 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
10769 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
10770 // CHECK-32: omp.dispatch.body:
10771 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
10772 // CHECK-32-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
10773 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10774 // CHECK-32: omp.inner.for.cond:
10775 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP268:![0-9]+]]
10776 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP268]]
10777 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
10778 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10779 // CHECK-32: omp.inner.for.body:
10780 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP268]]
10781 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
10782 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10783 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP268]]
10784 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10785 // CHECK-32: omp.body.continue:
10786 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10787 // CHECK-32: omp.inner.for.inc:
10788 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP268]]
10789 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
10790 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP268]]
10791 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP269:![0-9]+]]
10792 // CHECK-32: omp.inner.for.end:
10793 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
10794 // CHECK-32: omp.dispatch.inc:
10795 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
10796 // CHECK-32: omp.dispatch.end:
10797 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
10798 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
10799 // CHECK-32-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
10800 // CHECK-32-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10801 // CHECK-32: .omp.final.then:
10802 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
10803 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
10804 // CHECK-32: .omp.final.done:
10805 // CHECK-32-NEXT: ret void
10808 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37
10809 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[A:%.*]]) #[[ATTR0]] {
10810 // CHECK-32-NEXT: entry:
10811 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
10812 // CHECK-32-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
10813 // CHECK-32-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
10814 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
10815 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
10816 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
10817 // CHECK-32-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
10818 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37_kernel_environment, ptr [[DYN_PTR]])
10819 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
10820 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
10821 // CHECK-32: user_code.entry:
10822 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
10823 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[A_ADDR]], align 4
10824 // CHECK-32-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
10825 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
10826 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
10827 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
10828 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i32 [[TMP3]]) #[[ATTR2]]
10829 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
10830 // CHECK-32-NEXT: ret void
10831 // CHECK-32: worker.exit:
10832 // CHECK-32-NEXT: ret void
10835 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37_omp_outlined
10836 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR1]] {
10837 // CHECK-32-NEXT: entry:
10838 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
10839 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
10840 // CHECK-32-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
10841 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10842 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
10843 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10844 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10845 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10846 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10847 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
10848 // CHECK-32-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
10849 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x ptr], align 4
10850 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
10851 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
10852 // CHECK-32-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
10853 // CHECK-32-NEXT: [[A1:%.*]] = call align 8 ptr @__kmpc_alloc_shared(i32 4)
10854 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
10855 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
10856 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10857 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10858 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
10859 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
10860 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
10861 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
10862 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10863 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
10864 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10865 // CHECK-32: cond.true:
10866 // CHECK-32-NEXT: br label [[COND_END:%.*]]
10867 // CHECK-32: cond.false:
10868 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10869 // CHECK-32-NEXT: br label [[COND_END]]
10870 // CHECK-32: cond.end:
10871 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10872 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
10873 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10874 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
10875 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10876 // CHECK-32: omp.inner.for.cond:
10877 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10878 // CHECK-32-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP5]], 10
10879 // CHECK-32-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10880 // CHECK-32: omp.inner.for.body:
10881 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10882 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10883 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[A1]], align 4
10884 // CHECK-32-NEXT: store i32 [[TMP8]], ptr [[A_CASTED]], align 4
10885 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[A_CASTED]], align 4
10886 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
10887 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP6]] to ptr
10888 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
10889 // CHECK-32-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
10890 // CHECK-32-NEXT: [[TMP13:%.*]] = inttoptr i32 [[TMP7]] to ptr
10891 // CHECK-32-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 4
10892 // CHECK-32-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
10893 // CHECK-32-NEXT: [[TMP15:%.*]] = inttoptr i32 [[TMP9]] to ptr
10894 // CHECK-32-NEXT: store ptr [[TMP15]], ptr [[TMP14]], align 4
10895 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 3)
10896 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10897 // CHECK-32: omp.inner.for.inc:
10898 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10899 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
10900 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
10901 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
10902 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10903 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
10904 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
10905 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_LB]], align 4
10906 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10907 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
10908 // CHECK-32-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
10909 // CHECK-32-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_COMB_UB]], align 4
10910 // CHECK-32-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10911 // CHECK-32-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP22]], 9
10912 // CHECK-32-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
10913 // CHECK-32: cond.true6:
10914 // CHECK-32-NEXT: br label [[COND_END8:%.*]]
10915 // CHECK-32: cond.false7:
10916 // CHECK-32-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10917 // CHECK-32-NEXT: br label [[COND_END8]]
10918 // CHECK-32: cond.end8:
10919 // CHECK-32-NEXT: [[COND9:%.*]] = phi i32 [ 9, [[COND_TRUE6]] ], [ [[TMP23]], [[COND_FALSE7]] ]
10920 // CHECK-32-NEXT: store i32 [[COND9]], ptr [[DOTOMP_COMB_UB]], align 4
10921 // CHECK-32-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10922 // CHECK-32-NEXT: store i32 [[TMP24]], ptr [[DOTOMP_IV]], align 4
10923 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
10924 // CHECK-32: omp.inner.for.end:
10925 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10926 // CHECK-32: omp.loop.exit:
10927 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
10928 // CHECK-32-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
10929 // CHECK-32-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
10930 // CHECK-32-NEXT: br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
10931 // CHECK-32: .omp.lastprivate.then:
10932 // CHECK-32-NEXT: [[TMP27:%.*]] = load i32, ptr [[A1]], align 4
10933 // CHECK-32-NEXT: store i32 [[TMP27]], ptr [[A_ADDR]], align 4
10934 // CHECK-32-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
10935 // CHECK-32: .omp.lastprivate.done:
10936 // CHECK-32-NEXT: call void @__kmpc_free_shared(ptr [[A1]], i32 4)
10937 // CHECK-32-NEXT: ret void
10940 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37_omp_outlined_omp_outlined
10941 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR1]] {
10942 // CHECK-32-NEXT: entry:
10943 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
10944 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
10945 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
10946 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
10947 // CHECK-32-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
10948 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10949 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
10950 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10951 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10952 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10953 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10954 // CHECK-32-NEXT: [[A1:%.*]] = alloca i32, align 4
10955 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
10956 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
10957 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
10958 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
10959 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
10960 // CHECK-32-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
10961 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
10962 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
10963 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
10964 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
10965 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
10966 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
10967 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10968 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10969 // CHECK-32-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
10970 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
10971 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
10972 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
10973 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
10974 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10975 // CHECK-32: omp.inner.for.cond:
10976 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10977 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
10978 // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]]
10979 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10980 // CHECK-32: omp.inner.for.body:
10981 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10982 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
10983 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10984 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4
10985 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[I]], align 4
10986 // CHECK-32-NEXT: store i32 [[TMP8]], ptr [[A1]], align 4
10987 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10988 // CHECK-32: omp.body.continue:
10989 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10990 // CHECK-32: omp.inner.for.inc:
10991 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10992 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
10993 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
10994 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
10995 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
10996 // CHECK-32: omp.inner.for.end:
10997 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10998 // CHECK-32: omp.loop.exit:
10999 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
11000 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
11001 // CHECK-32-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
11002 // CHECK-32-NEXT: br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
11003 // CHECK-32: .omp.lastprivate.then:
11004 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[A1]], align 4
11005 // CHECK-32-NEXT: store i32 [[TMP13]], ptr [[A_ADDR]], align 4
11006 // CHECK-32-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
11007 // CHECK-32: .omp.lastprivate.done:
11008 // CHECK-32-NEXT: ret void
11011 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40
11012 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
11013 // CHECK-32-NEXT: entry:
11014 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
11015 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
11016 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
11017 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
11018 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40_kernel_environment, ptr [[DYN_PTR]])
11019 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
11020 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
11021 // CHECK-32: user_code.entry:
11022 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
11023 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
11024 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
11025 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
11026 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
11027 // CHECK-32-NEXT: ret void
11028 // CHECK-32: worker.exit:
11029 // CHECK-32-NEXT: ret void
11032 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40_omp_outlined
11033 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
11034 // CHECK-32-NEXT: entry:
11035 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
11036 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
11037 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11038 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
11039 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11040 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11041 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11042 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11043 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
11044 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
11045 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
11046 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
11047 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
11048 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
11049 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11050 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11051 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
11052 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
11053 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
11054 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
11055 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11056 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
11057 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11058 // CHECK-32: cond.true:
11059 // CHECK-32-NEXT: br label [[COND_END:%.*]]
11060 // CHECK-32: cond.false:
11061 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11062 // CHECK-32-NEXT: br label [[COND_END]]
11063 // CHECK-32: cond.end:
11064 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11065 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
11066 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11067 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
11068 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11069 // CHECK-32: omp.inner.for.cond:
11070 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11071 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
11072 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11073 // CHECK-32: omp.inner.for.body:
11074 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11075 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11076 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
11077 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
11078 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
11079 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
11080 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
11081 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
11082 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
11083 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11084 // CHECK-32: omp.inner.for.inc:
11085 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11086 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11087 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11088 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
11089 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11090 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11091 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
11092 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
11093 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11094 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11095 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
11096 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
11097 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11098 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
11099 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
11100 // CHECK-32: cond.true5:
11101 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
11102 // CHECK-32: cond.false6:
11103 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11104 // CHECK-32-NEXT: br label [[COND_END7]]
11105 // CHECK-32: cond.end7:
11106 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
11107 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
11108 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11109 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
11110 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
11111 // CHECK-32: omp.inner.for.end:
11112 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11113 // CHECK-32: omp.loop.exit:
11114 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
11115 // CHECK-32-NEXT: ret void
11118 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40_omp_outlined_omp_outlined
11119 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
11120 // CHECK-32-NEXT: entry:
11121 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
11122 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
11123 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
11124 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
11125 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11126 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
11127 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11128 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11129 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11130 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11131 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
11132 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
11133 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
11134 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
11135 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
11136 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
11137 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
11138 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
11139 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
11140 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
11141 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
11142 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11143 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11144 // CHECK-32-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
11145 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
11146 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
11147 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11148 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9
11149 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11150 // CHECK-32: cond.true:
11151 // CHECK-32-NEXT: br label [[COND_END:%.*]]
11152 // CHECK-32: cond.false:
11153 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11154 // CHECK-32-NEXT: br label [[COND_END]]
11155 // CHECK-32: cond.end:
11156 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
11157 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
11158 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11159 // CHECK-32-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
11160 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11161 // CHECK-32: omp.inner.for.cond:
11162 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11163 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11164 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
11165 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11166 // CHECK-32: omp.inner.for.body:
11167 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11168 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
11169 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11170 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4
11171 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11172 // CHECK-32: omp.body.continue:
11173 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11174 // CHECK-32: omp.inner.for.inc:
11175 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11176 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
11177 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
11178 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
11179 // CHECK-32: omp.inner.for.end:
11180 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11181 // CHECK-32: omp.loop.exit:
11182 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
11183 // CHECK-32-NEXT: ret void
11186 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43
11187 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
11188 // CHECK-32-NEXT: entry:
11189 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
11190 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
11191 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
11192 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
11193 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43_kernel_environment, ptr [[DYN_PTR]])
11194 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
11195 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
11196 // CHECK-32: user_code.entry:
11197 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
11198 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
11199 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
11200 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
11201 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
11202 // CHECK-32-NEXT: ret void
11203 // CHECK-32: worker.exit:
11204 // CHECK-32-NEXT: ret void
11207 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43_omp_outlined
11208 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
11209 // CHECK-32-NEXT: entry:
11210 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
11211 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
11212 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11213 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
11214 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11215 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11216 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11217 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11218 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
11219 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
11220 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
11221 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
11222 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
11223 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
11224 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11225 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11226 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
11227 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
11228 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
11229 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
11230 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11231 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
11232 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11233 // CHECK-32: cond.true:
11234 // CHECK-32-NEXT: br label [[COND_END:%.*]]
11235 // CHECK-32: cond.false:
11236 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11237 // CHECK-32-NEXT: br label [[COND_END]]
11238 // CHECK-32: cond.end:
11239 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11240 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
11241 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11242 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
11243 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11244 // CHECK-32: omp.inner.for.cond:
11245 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11246 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
11247 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11248 // CHECK-32: omp.inner.for.body:
11249 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11250 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11251 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
11252 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
11253 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
11254 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
11255 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
11256 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
11257 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
11258 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11259 // CHECK-32: omp.inner.for.inc:
11260 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11261 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11262 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11263 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
11264 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11265 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11266 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
11267 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
11268 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11269 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11270 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
11271 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
11272 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11273 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
11274 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
11275 // CHECK-32: cond.true5:
11276 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
11277 // CHECK-32: cond.false6:
11278 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11279 // CHECK-32-NEXT: br label [[COND_END7]]
11280 // CHECK-32: cond.end7:
11281 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
11282 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
11283 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11284 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
11285 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
11286 // CHECK-32: omp.inner.for.end:
11287 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11288 // CHECK-32: omp.loop.exit:
11289 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
11290 // CHECK-32-NEXT: ret void
11293 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43_omp_outlined_omp_outlined
11294 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
11295 // CHECK-32-NEXT: entry:
11296 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
11297 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
11298 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
11299 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
11300 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11301 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
11302 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11303 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11304 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11305 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11306 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
11307 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
11308 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
11309 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
11310 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
11311 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
11312 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
11313 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
11314 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
11315 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
11316 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
11317 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11318 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11319 // CHECK-32-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
11320 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
11321 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
11322 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11323 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
11324 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11325 // CHECK-32: omp.inner.for.cond:
11326 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11327 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
11328 // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]]
11329 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11330 // CHECK-32: omp.inner.for.body:
11331 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11332 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
11333 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11334 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4
11335 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11336 // CHECK-32: omp.body.continue:
11337 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11338 // CHECK-32: omp.inner.for.inc:
11339 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11340 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11341 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
11342 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4
11343 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
11344 // CHECK-32: omp.inner.for.end:
11345 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11346 // CHECK-32: omp.loop.exit:
11347 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
11348 // CHECK-32-NEXT: ret void
11351 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46
11352 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
11353 // CHECK-32-NEXT: entry:
11354 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
11355 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
11356 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
11357 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
11358 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46_kernel_environment, ptr [[DYN_PTR]])
11359 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
11360 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
11361 // CHECK-32: user_code.entry:
11362 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
11363 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
11364 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
11365 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
11366 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
11367 // CHECK-32-NEXT: ret void
11368 // CHECK-32: worker.exit:
11369 // CHECK-32-NEXT: ret void
11372 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46_omp_outlined
11373 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
11374 // CHECK-32-NEXT: entry:
11375 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
11376 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
11377 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11378 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
11379 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11380 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11381 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11382 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11383 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
11384 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
11385 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
11386 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
11387 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
11388 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
11389 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11390 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11391 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
11392 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
11393 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
11394 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
11395 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11396 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
11397 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11398 // CHECK-32: cond.true:
11399 // CHECK-32-NEXT: br label [[COND_END:%.*]]
11400 // CHECK-32: cond.false:
11401 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11402 // CHECK-32-NEXT: br label [[COND_END]]
11403 // CHECK-32: cond.end:
11404 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11405 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
11406 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11407 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
11408 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11409 // CHECK-32: omp.inner.for.cond:
11410 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11411 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
11412 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11413 // CHECK-32: omp.inner.for.body:
11414 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11415 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11416 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
11417 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
11418 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
11419 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
11420 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
11421 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
11422 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
11423 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11424 // CHECK-32: omp.inner.for.inc:
11425 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11426 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11427 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11428 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
11429 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11430 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11431 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
11432 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
11433 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11434 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11435 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
11436 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
11437 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11438 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
11439 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
11440 // CHECK-32: cond.true5:
11441 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
11442 // CHECK-32: cond.false6:
11443 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11444 // CHECK-32-NEXT: br label [[COND_END7]]
11445 // CHECK-32: cond.end7:
11446 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
11447 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
11448 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11449 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
11450 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
11451 // CHECK-32: omp.inner.for.end:
11452 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11453 // CHECK-32: omp.loop.exit:
11454 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
11455 // CHECK-32-NEXT: ret void
11458 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46_omp_outlined_omp_outlined
11459 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
11460 // CHECK-32-NEXT: entry:
11461 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
11462 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
11463 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
11464 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
11465 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11466 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
11467 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11468 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11469 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11470 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11471 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
11472 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
11473 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
11474 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
11475 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
11476 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
11477 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
11478 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
11479 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
11480 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
11481 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
11482 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11483 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11484 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11485 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11486 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
11487 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
11488 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
11489 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
11490 // CHECK-32: omp.dispatch.cond:
11491 // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
11492 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
11493 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11494 // CHECK-32: omp.dispatch.body:
11495 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11496 // CHECK-32-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
11497 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11498 // CHECK-32: omp.inner.for.cond:
11499 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP271:![0-9]+]]
11500 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP271]]
11501 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
11502 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11503 // CHECK-32: omp.inner.for.body:
11504 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP271]]
11505 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
11506 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11507 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP271]]
11508 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11509 // CHECK-32: omp.body.continue:
11510 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11511 // CHECK-32: omp.inner.for.inc:
11512 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP271]]
11513 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
11514 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP271]]
11515 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP272:![0-9]+]]
11516 // CHECK-32: omp.inner.for.end:
11517 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
11518 // CHECK-32: omp.dispatch.inc:
11519 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
11520 // CHECK-32: omp.dispatch.end:
11521 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
11522 // CHECK-32-NEXT: ret void
11525 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49
11526 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
11527 // CHECK-32-NEXT: entry:
11528 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
11529 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
11530 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
11531 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
11532 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49_kernel_environment, ptr [[DYN_PTR]])
11533 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
11534 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
11535 // CHECK-32: user_code.entry:
11536 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
11537 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
11538 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
11539 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
11540 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
11541 // CHECK-32-NEXT: ret void
11542 // CHECK-32: worker.exit:
11543 // CHECK-32-NEXT: ret void
11546 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49_omp_outlined
11547 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
11548 // CHECK-32-NEXT: entry:
11549 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
11550 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
11551 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11552 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
11553 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11554 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11555 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11556 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11557 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
11558 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
11559 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
11560 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
11561 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
11562 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
11563 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11564 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11565 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
11566 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
11567 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
11568 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
11569 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11570 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
11571 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11572 // CHECK-32: cond.true:
11573 // CHECK-32-NEXT: br label [[COND_END:%.*]]
11574 // CHECK-32: cond.false:
11575 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11576 // CHECK-32-NEXT: br label [[COND_END]]
11577 // CHECK-32: cond.end:
11578 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11579 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
11580 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11581 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
11582 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11583 // CHECK-32: omp.inner.for.cond:
11584 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11585 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
11586 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11587 // CHECK-32: omp.inner.for.body:
11588 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11589 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11590 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
11591 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
11592 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
11593 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
11594 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
11595 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
11596 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
11597 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11598 // CHECK-32: omp.inner.for.inc:
11599 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11600 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11601 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11602 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
11603 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11604 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11605 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
11606 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
11607 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11608 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11609 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
11610 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
11611 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11612 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
11613 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
11614 // CHECK-32: cond.true5:
11615 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
11616 // CHECK-32: cond.false6:
11617 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11618 // CHECK-32-NEXT: br label [[COND_END7]]
11619 // CHECK-32: cond.end7:
11620 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
11621 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
11622 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11623 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
11624 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
11625 // CHECK-32: omp.inner.for.end:
11626 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11627 // CHECK-32: omp.loop.exit:
11628 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
11629 // CHECK-32-NEXT: ret void
11632 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49_omp_outlined_omp_outlined
11633 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
11634 // CHECK-32-NEXT: entry:
11635 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
11636 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
11637 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
11638 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
11639 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11640 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
11641 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11642 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11643 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11644 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11645 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
11646 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
11647 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
11648 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
11649 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
11650 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
11651 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
11652 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
11653 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
11654 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
11655 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
11656 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11657 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11658 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11659 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11660 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
11661 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
11662 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
11663 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
11664 // CHECK-32: omp.dispatch.cond:
11665 // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
11666 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
11667 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11668 // CHECK-32: omp.dispatch.body:
11669 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11670 // CHECK-32-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
11671 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11672 // CHECK-32: omp.inner.for.cond:
11673 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP274:![0-9]+]]
11674 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP274]]
11675 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
11676 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11677 // CHECK-32: omp.inner.for.body:
11678 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP274]]
11679 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
11680 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11681 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP274]]
11682 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11683 // CHECK-32: omp.body.continue:
11684 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11685 // CHECK-32: omp.inner.for.inc:
11686 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP274]]
11687 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
11688 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP274]]
11689 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP275:![0-9]+]]
11690 // CHECK-32: omp.inner.for.end:
11691 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
11692 // CHECK-32: omp.dispatch.inc:
11693 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
11694 // CHECK-32: omp.dispatch.end:
11695 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
11696 // CHECK-32-NEXT: ret void
11699 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52
11700 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
11701 // CHECK-32-NEXT: entry:
11702 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
11703 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
11704 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
11705 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
11706 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52_kernel_environment, ptr [[DYN_PTR]])
11707 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
11708 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
11709 // CHECK-32: user_code.entry:
11710 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
11711 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
11712 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
11713 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
11714 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
11715 // CHECK-32-NEXT: ret void
11716 // CHECK-32: worker.exit:
11717 // CHECK-32-NEXT: ret void
11720 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52_omp_outlined
11721 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
11722 // CHECK-32-NEXT: entry:
11723 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
11724 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
11725 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11726 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
11727 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11728 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11729 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11730 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11731 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
11732 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
11733 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
11734 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
11735 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
11736 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
11737 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11738 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11739 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
11740 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
11741 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
11742 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
11743 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11744 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
11745 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11746 // CHECK-32: cond.true:
11747 // CHECK-32-NEXT: br label [[COND_END:%.*]]
11748 // CHECK-32: cond.false:
11749 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11750 // CHECK-32-NEXT: br label [[COND_END]]
11751 // CHECK-32: cond.end:
11752 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11753 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
11754 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11755 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
11756 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11757 // CHECK-32: omp.inner.for.cond:
11758 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11759 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
11760 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11761 // CHECK-32: omp.inner.for.body:
11762 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11763 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11764 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
11765 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
11766 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
11767 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
11768 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
11769 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
11770 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
11771 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11772 // CHECK-32: omp.inner.for.inc:
11773 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11774 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11775 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11776 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
11777 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11778 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11779 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
11780 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
11781 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11782 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11783 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
11784 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
11785 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11786 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
11787 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
11788 // CHECK-32: cond.true5:
11789 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
11790 // CHECK-32: cond.false6:
11791 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11792 // CHECK-32-NEXT: br label [[COND_END7]]
11793 // CHECK-32: cond.end7:
11794 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
11795 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
11796 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11797 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
11798 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
11799 // CHECK-32: omp.inner.for.end:
11800 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11801 // CHECK-32: omp.loop.exit:
11802 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
11803 // CHECK-32-NEXT: ret void
11806 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52_omp_outlined_omp_outlined
11807 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
11808 // CHECK-32-NEXT: entry:
11809 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
11810 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
11811 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
11812 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
11813 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11814 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
11815 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11816 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11817 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11818 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11819 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
11820 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
11821 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
11822 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
11823 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
11824 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
11825 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
11826 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
11827 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
11828 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
11829 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
11830 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11831 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11832 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11833 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11834 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
11835 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
11836 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
11837 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
11838 // CHECK-32: omp.dispatch.cond:
11839 // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
11840 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
11841 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11842 // CHECK-32: omp.dispatch.body:
11843 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11844 // CHECK-32-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
11845 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11846 // CHECK-32: omp.inner.for.cond:
11847 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP277:![0-9]+]]
11848 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP277]]
11849 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
11850 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11851 // CHECK-32: omp.inner.for.body:
11852 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP277]]
11853 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
11854 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11855 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP277]]
11856 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11857 // CHECK-32: omp.body.continue:
11858 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11859 // CHECK-32: omp.inner.for.inc:
11860 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP277]]
11861 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
11862 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP277]]
11863 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP278:![0-9]+]]
11864 // CHECK-32: omp.inner.for.end:
11865 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
11866 // CHECK-32: omp.dispatch.inc:
11867 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
11868 // CHECK-32: omp.dispatch.end:
11869 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
11870 // CHECK-32-NEXT: ret void
11873 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55
11874 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
11875 // CHECK-32-NEXT: entry:
11876 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
11877 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
11878 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
11879 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
11880 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55_kernel_environment, ptr [[DYN_PTR]])
11881 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
11882 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
11883 // CHECK-32: user_code.entry:
11884 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
11885 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
11886 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
11887 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
11888 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
11889 // CHECK-32-NEXT: ret void
11890 // CHECK-32: worker.exit:
11891 // CHECK-32-NEXT: ret void
11894 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55_omp_outlined
11895 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
11896 // CHECK-32-NEXT: entry:
11897 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
11898 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
11899 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11900 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
11901 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11902 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11903 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11904 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11905 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
11906 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
11907 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
11908 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
11909 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
11910 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
11911 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11912 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11913 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
11914 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
11915 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
11916 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
11917 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11918 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
11919 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11920 // CHECK-32: cond.true:
11921 // CHECK-32-NEXT: br label [[COND_END:%.*]]
11922 // CHECK-32: cond.false:
11923 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11924 // CHECK-32-NEXT: br label [[COND_END]]
11925 // CHECK-32: cond.end:
11926 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11927 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
11928 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11929 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
11930 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11931 // CHECK-32: omp.inner.for.cond:
11932 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11933 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
11934 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11935 // CHECK-32: omp.inner.for.body:
11936 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11937 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11938 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
11939 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
11940 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
11941 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
11942 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
11943 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
11944 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
11945 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11946 // CHECK-32: omp.inner.for.inc:
11947 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11948 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11949 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11950 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
11951 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11952 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11953 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
11954 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
11955 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11956 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11957 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
11958 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
11959 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11960 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
11961 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
11962 // CHECK-32: cond.true5:
11963 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
11964 // CHECK-32: cond.false6:
11965 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11966 // CHECK-32-NEXT: br label [[COND_END7]]
11967 // CHECK-32: cond.end7:
11968 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
11969 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
11970 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11971 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
11972 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
11973 // CHECK-32: omp.inner.for.end:
11974 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11975 // CHECK-32: omp.loop.exit:
11976 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
11977 // CHECK-32-NEXT: ret void
11980 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55_omp_outlined_omp_outlined
11981 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
11982 // CHECK-32-NEXT: entry:
11983 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
11984 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
11985 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
11986 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
11987 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11988 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
11989 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11990 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11991 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11992 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11993 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
11994 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
11995 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
11996 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
11997 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
11998 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
11999 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
12000 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
12001 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
12002 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
12003 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
12004 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12005 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12006 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
12007 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
12008 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12009 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
12010 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
12011 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
12012 // CHECK-32: omp.dispatch.cond:
12013 // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
12014 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
12015 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
12016 // CHECK-32: omp.dispatch.body:
12017 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
12018 // CHECK-32-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
12019 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12020 // CHECK-32: omp.inner.for.cond:
12021 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP280:![0-9]+]]
12022 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP280]]
12023 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
12024 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12025 // CHECK-32: omp.inner.for.body:
12026 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP280]]
12027 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
12028 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12029 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP280]]
12030 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12031 // CHECK-32: omp.body.continue:
12032 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12033 // CHECK-32: omp.inner.for.inc:
12034 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP280]]
12035 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
12036 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP280]]
12037 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP281:![0-9]+]]
12038 // CHECK-32: omp.inner.for.end:
12039 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
12040 // CHECK-32: omp.dispatch.inc:
12041 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
12042 // CHECK-32: omp.dispatch.end:
12043 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
12044 // CHECK-32-NEXT: ret void
12047 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58
12048 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
12049 // CHECK-32-NEXT: entry:
12050 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
12051 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
12052 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
12053 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
12054 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58_kernel_environment, ptr [[DYN_PTR]])
12055 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
12056 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
12057 // CHECK-32: user_code.entry:
12058 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
12059 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
12060 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
12061 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
12062 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
12063 // CHECK-32-NEXT: ret void
12064 // CHECK-32: worker.exit:
12065 // CHECK-32-NEXT: ret void
12068 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58_omp_outlined
12069 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
12070 // CHECK-32-NEXT: entry:
12071 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
12072 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
12073 // CHECK-32-NEXT: [[B:%.*]] = alloca i32, align 4
12074 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12075 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
12076 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12077 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12078 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12079 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12080 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
12081 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
12082 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
12083 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
12084 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
12085 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
12086 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12087 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12088 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
12089 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12090 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
12091 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
12092 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12093 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
12094 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12095 // CHECK-32: cond.true:
12096 // CHECK-32-NEXT: br label [[COND_END:%.*]]
12097 // CHECK-32: cond.false:
12098 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12099 // CHECK-32-NEXT: br label [[COND_END]]
12100 // CHECK-32: cond.end:
12101 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
12102 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
12103 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
12104 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
12105 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12106 // CHECK-32: omp.inner.for.cond:
12107 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP283:![0-9]+]]
12108 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
12109 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12110 // CHECK-32: omp.inner.for.body:
12111 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP283]]
12112 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP283]]
12113 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
12114 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
12115 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP283]]
12116 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
12117 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
12118 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP283]]
12119 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP283]]
12120 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12121 // CHECK-32: omp.inner.for.inc:
12122 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP283]]
12123 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP283]]
12124 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
12125 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP283]]
12126 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP283]]
12127 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP283]]
12128 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
12129 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP283]]
12130 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP283]]
12131 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP283]]
12132 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
12133 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP283]]
12134 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP283]]
12135 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
12136 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
12137 // CHECK-32: cond.true5:
12138 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
12139 // CHECK-32: cond.false6:
12140 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP283]]
12141 // CHECK-32-NEXT: br label [[COND_END7]]
12142 // CHECK-32: cond.end7:
12143 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
12144 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP283]]
12145 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP283]]
12146 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP283]]
12147 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP284:![0-9]+]]
12148 // CHECK-32: omp.inner.for.end:
12149 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12150 // CHECK-32: omp.loop.exit:
12151 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
12152 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
12153 // CHECK-32-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
12154 // CHECK-32-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12155 // CHECK-32: .omp.final.then:
12156 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
12157 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
12158 // CHECK-32: .omp.final.done:
12159 // CHECK-32-NEXT: ret void
12162 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58_omp_outlined_omp_outlined
12163 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
12164 // CHECK-32-NEXT: entry:
12165 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
12166 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
12167 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
12168 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
12169 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12170 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
12171 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12172 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12173 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12174 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12175 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
12176 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
12177 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
12178 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
12179 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
12180 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
12181 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
12182 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
12183 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
12184 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
12185 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
12186 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12187 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12188 // CHECK-32-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12189 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
12190 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
12191 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
12192 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
12193 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12194 // CHECK-32: omp.inner.for.cond:
12195 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP286:![0-9]+]]
12196 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group [[ACC_GRP286]]
12197 // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]]
12198 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12199 // CHECK-32: omp.inner.for.body:
12200 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP286]]
12201 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
12202 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12203 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP286]]
12204 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12205 // CHECK-32: omp.body.continue:
12206 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12207 // CHECK-32: omp.inner.for.inc:
12208 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP286]]
12209 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP286]]
12210 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
12211 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP286]]
12212 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP287:![0-9]+]]
12213 // CHECK-32: omp.inner.for.end:
12214 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12215 // CHECK-32: omp.loop.exit:
12216 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
12217 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
12218 // CHECK-32-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
12219 // CHECK-32-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12220 // CHECK-32: .omp.final.then:
12221 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
12222 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
12223 // CHECK-32: .omp.final.done:
12224 // CHECK-32-NEXT: ret void
12227 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66
12228 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
12229 // CHECK-32-NEXT: entry:
12230 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
12231 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
12232 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
12233 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
12234 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66_kernel_environment, ptr [[DYN_PTR]])
12235 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
12236 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
12237 // CHECK-32: user_code.entry:
12238 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
12239 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
12240 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
12241 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
12242 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
12243 // CHECK-32-NEXT: ret void
12244 // CHECK-32: worker.exit:
12245 // CHECK-32-NEXT: ret void
12248 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66_omp_outlined
12249 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
12250 // CHECK-32-NEXT: entry:
12251 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
12252 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
12253 // CHECK-32-NEXT: [[B:%.*]] = alloca [3 x i32], align 4
12254 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12255 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
12256 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12257 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12258 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12259 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12260 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
12261 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
12262 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
12263 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
12264 // CHECK-32-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[B]], ptr align 4 @"__const.<captured>.b", i32 12, i1 false)
12265 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
12266 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
12267 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12268 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12269 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
12270 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12271 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
12272 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
12273 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12274 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
12275 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12276 // CHECK-32: cond.true:
12277 // CHECK-32-NEXT: br label [[COND_END:%.*]]
12278 // CHECK-32: cond.false:
12279 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12280 // CHECK-32-NEXT: br label [[COND_END]]
12281 // CHECK-32: cond.end:
12282 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
12283 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
12284 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
12285 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
12286 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12287 // CHECK-32: omp.inner.for.cond:
12288 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP289:![0-9]+]]
12289 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
12290 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12291 // CHECK-32: omp.inner.for.body:
12292 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP289]]
12293 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP289]]
12294 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
12295 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
12296 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP289]]
12297 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
12298 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
12299 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP289]]
12300 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP289]]
12301 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12302 // CHECK-32: omp.inner.for.inc:
12303 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP289]]
12304 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP289]]
12305 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
12306 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP289]]
12307 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP289]]
12308 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP289]]
12309 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
12310 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP289]]
12311 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP289]]
12312 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP289]]
12313 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
12314 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP289]]
12315 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP289]]
12316 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
12317 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
12318 // CHECK-32: cond.true5:
12319 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
12320 // CHECK-32: cond.false6:
12321 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP289]]
12322 // CHECK-32-NEXT: br label [[COND_END7]]
12323 // CHECK-32: cond.end7:
12324 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
12325 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP289]]
12326 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP289]]
12327 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP289]]
12328 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP290:![0-9]+]]
12329 // CHECK-32: omp.inner.for.end:
12330 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12331 // CHECK-32: omp.loop.exit:
12332 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
12333 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
12334 // CHECK-32-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
12335 // CHECK-32-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12336 // CHECK-32: .omp.final.then:
12337 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
12338 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
12339 // CHECK-32: .omp.final.done:
12340 // CHECK-32-NEXT: ret void
12343 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66_omp_outlined_omp_outlined
12344 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
12345 // CHECK-32-NEXT: entry:
12346 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
12347 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
12348 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
12349 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
12350 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12351 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
12352 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12353 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12354 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12355 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12356 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
12357 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
12358 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
12359 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
12360 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
12361 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
12362 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
12363 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
12364 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
12365 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
12366 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
12367 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12368 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12369 // CHECK-32-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12370 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
12371 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
12372 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
12373 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9
12374 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12375 // CHECK-32: cond.true:
12376 // CHECK-32-NEXT: br label [[COND_END:%.*]]
12377 // CHECK-32: cond.false:
12378 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
12379 // CHECK-32-NEXT: br label [[COND_END]]
12380 // CHECK-32: cond.end:
12381 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
12382 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
12383 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
12384 // CHECK-32-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
12385 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12386 // CHECK-32: omp.inner.for.cond:
12387 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP292:![0-9]+]]
12388 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP292]]
12389 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
12390 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12391 // CHECK-32: omp.inner.for.body:
12392 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP292]]
12393 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
12394 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12395 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP292]]
12396 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12397 // CHECK-32: omp.body.continue:
12398 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12399 // CHECK-32: omp.inner.for.inc:
12400 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP292]]
12401 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
12402 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP292]]
12403 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP293:![0-9]+]]
12404 // CHECK-32: omp.inner.for.end:
12405 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12406 // CHECK-32: omp.loop.exit:
12407 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
12408 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
12409 // CHECK-32-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
12410 // CHECK-32-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12411 // CHECK-32: .omp.final.then:
12412 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
12413 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
12414 // CHECK-32: .omp.final.done:
12415 // CHECK-32-NEXT: ret void
12418 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73
12419 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
12420 // CHECK-32-NEXT: entry:
12421 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
12422 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
12423 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
12424 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
12425 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_kernel_environment, ptr [[DYN_PTR]])
12426 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
12427 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
12428 // CHECK-32: user_code.entry:
12429 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
12430 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
12431 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
12432 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
12433 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
12434 // CHECK-32-NEXT: ret void
12435 // CHECK-32: worker.exit:
12436 // CHECK-32-NEXT: ret void
12439 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined
12440 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
12441 // CHECK-32-NEXT: entry:
12442 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
12443 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
12444 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12445 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
12446 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12447 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12448 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12449 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12450 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
12451 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
12452 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
12453 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
12454 // CHECK-32-NEXT: [[C:%.*]] = call align 8 ptr @__kmpc_alloc_shared(i32 4)
12455 // CHECK-32-NEXT: [[B:%.*]] = call align 8 ptr @__kmpc_alloc_shared(i32 4)
12456 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
12457 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
12458 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12459 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12460 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12461 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
12462 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
12463 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12464 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
12465 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12466 // CHECK-32: cond.true:
12467 // CHECK-32-NEXT: br label [[COND_END:%.*]]
12468 // CHECK-32: cond.false:
12469 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12470 // CHECK-32-NEXT: br label [[COND_END]]
12471 // CHECK-32: cond.end:
12472 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
12473 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
12474 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
12475 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
12476 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12477 // CHECK-32: omp.inner.for.cond:
12478 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP295:![0-9]+]]
12479 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP295]]
12480 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
12481 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12482 // CHECK-32: omp.inner.for.body:
12483 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP295]]
12484 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP295]]
12485 // CHECK-32-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
12486 // CHECK-32-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to ptr
12487 // CHECK-32-NEXT: store ptr [[TMP10]], ptr [[TMP9]], align 4, !llvm.access.group [[ACC_GRP295]]
12488 // CHECK-32-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
12489 // CHECK-32-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to ptr
12490 // CHECK-32-NEXT: store ptr [[TMP12]], ptr [[TMP11]], align 4, !llvm.access.group [[ACC_GRP295]]
12491 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined_omp_outlined, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined_omp_outlined_wrapper, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP295]]
12492 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12493 // CHECK-32: omp.inner.for.inc:
12494 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP295]]
12495 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP295]]
12496 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
12497 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP295]]
12498 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP296:![0-9]+]]
12499 // CHECK-32: omp.inner.for.end:
12500 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12501 // CHECK-32: omp.loop.exit:
12502 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
12503 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
12504 // CHECK-32-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
12505 // CHECK-32-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12506 // CHECK-32: .omp.final.then:
12507 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
12508 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
12509 // CHECK-32: .omp.final.done:
12510 // CHECK-32-NEXT: store ptr [[B]], ptr [[C]], align 4
12511 // CHECK-32-NEXT: call void @__kmpc_free_shared(ptr [[B]], i32 4)
12512 // CHECK-32-NEXT: call void @__kmpc_free_shared(ptr [[C]], i32 4)
12513 // CHECK-32-NEXT: ret void
12516 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined_omp_outlined
12517 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
12518 // CHECK-32-NEXT: entry:
12519 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
12520 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
12521 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
12522 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
12523 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12524 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
12525 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12526 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12527 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12528 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12529 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
12530 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
12531 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
12532 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
12533 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
12534 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
12535 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
12536 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
12537 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
12538 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
12539 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
12540 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12541 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12542 // CHECK-32-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12543 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
12544 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
12545 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
12546 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
12547 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12548 // CHECK-32: omp.inner.for.cond:
12549 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP298:![0-9]+]]
12550 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group [[ACC_GRP298]]
12551 // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]]
12552 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12553 // CHECK-32: omp.inner.for.body:
12554 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP298]]
12555 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
12556 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12557 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP298]]
12558 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12559 // CHECK-32: omp.body.continue:
12560 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12561 // CHECK-32: omp.inner.for.inc:
12562 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP298]]
12563 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP298]]
12564 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
12565 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP298]]
12566 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP299:![0-9]+]]
12567 // CHECK-32: omp.inner.for.end:
12568 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12569 // CHECK-32: omp.loop.exit:
12570 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
12571 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
12572 // CHECK-32-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
12573 // CHECK-32-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12574 // CHECK-32: .omp.final.then:
12575 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
12576 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
12577 // CHECK-32: .omp.final.done:
12578 // CHECK-32-NEXT: ret void
12581 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined_omp_outlined_wrapper
12582 // CHECK-32-SAME: (i16 noundef zeroext [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] {
12583 // CHECK-32-NEXT: entry:
12584 // CHECK-32-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2
12585 // CHECK-32-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
12586 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
12587 // CHECK-32-NEXT: [[GLOBAL_ARGS:%.*]] = alloca ptr, align 4
12588 // CHECK-32-NEXT: store i16 [[TMP0]], ptr [[DOTADDR]], align 2
12589 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
12590 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
12591 // CHECK-32-NEXT: call void @__kmpc_get_shared_variables(ptr [[GLOBAL_ARGS]])
12592 // CHECK-32-NEXT: [[TMP2:%.*]] = load ptr, ptr [[GLOBAL_ARGS]], align 4
12593 // CHECK-32-NEXT: [[TMP3:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i32 0
12594 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
12595 // CHECK-32-NEXT: [[TMP5:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i32 1
12596 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
12597 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined_omp_outlined(ptr [[DOTADDR1]], ptr [[DOTZERO_ADDR]], i32 [[TMP4]], i32 [[TMP6]]) #[[ATTR2]]
12598 // CHECK-32-NEXT: ret void
12601 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81
12602 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
12603 // CHECK-32-NEXT: entry:
12604 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
12605 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
12606 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
12607 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
12608 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81_kernel_environment, ptr [[DYN_PTR]])
12609 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
12610 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
12611 // CHECK-32: user_code.entry:
12612 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
12613 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
12614 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
12615 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
12616 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
12617 // CHECK-32-NEXT: ret void
12618 // CHECK-32: worker.exit:
12619 // CHECK-32-NEXT: ret void
12622 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81_omp_outlined
12623 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
12624 // CHECK-32-NEXT: entry:
12625 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
12626 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
12627 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12628 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
12629 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12630 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12631 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12632 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12633 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
12634 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
12635 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
12636 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
12637 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
12638 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
12639 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12640 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12641 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
12642 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12643 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
12644 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
12645 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12646 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
12647 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12648 // CHECK-32: cond.true:
12649 // CHECK-32-NEXT: br label [[COND_END:%.*]]
12650 // CHECK-32: cond.false:
12651 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12652 // CHECK-32-NEXT: br label [[COND_END]]
12653 // CHECK-32: cond.end:
12654 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
12655 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
12656 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
12657 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
12658 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12659 // CHECK-32: omp.inner.for.cond:
12660 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP301:![0-9]+]]
12661 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
12662 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12663 // CHECK-32: omp.inner.for.body:
12664 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP301]]
12665 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP301]]
12666 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
12667 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
12668 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP301]]
12669 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
12670 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
12671 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP301]]
12672 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP301]]
12673 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12674 // CHECK-32: omp.inner.for.inc:
12675 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP301]]
12676 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP301]]
12677 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
12678 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP301]]
12679 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP301]]
12680 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP301]]
12681 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
12682 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP301]]
12683 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP301]]
12684 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP301]]
12685 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
12686 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP301]]
12687 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP301]]
12688 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
12689 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
12690 // CHECK-32: cond.true5:
12691 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
12692 // CHECK-32: cond.false6:
12693 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP301]]
12694 // CHECK-32-NEXT: br label [[COND_END7]]
12695 // CHECK-32: cond.end7:
12696 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
12697 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP301]]
12698 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP301]]
12699 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP301]]
12700 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP302:![0-9]+]]
12701 // CHECK-32: omp.inner.for.end:
12702 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12703 // CHECK-32: omp.loop.exit:
12704 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
12705 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
12706 // CHECK-32-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
12707 // CHECK-32-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12708 // CHECK-32: .omp.final.then:
12709 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
12710 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
12711 // CHECK-32: .omp.final.done:
12712 // CHECK-32-NEXT: ret void
12715 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81_omp_outlined_omp_outlined
12716 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
12717 // CHECK-32-NEXT: entry:
12718 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
12719 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
12720 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
12721 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
12722 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12723 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
12724 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12725 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12726 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12727 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12728 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
12729 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
12730 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
12731 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
12732 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
12733 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
12734 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
12735 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
12736 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
12737 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
12738 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
12739 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12740 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12741 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
12742 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
12743 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12744 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
12745 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
12746 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
12747 // CHECK-32: omp.dispatch.cond:
12748 // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
12749 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
12750 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
12751 // CHECK-32: omp.dispatch.body:
12752 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
12753 // CHECK-32-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
12754 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12755 // CHECK-32: omp.inner.for.cond:
12756 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP304:![0-9]+]]
12757 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP304]]
12758 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
12759 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12760 // CHECK-32: omp.inner.for.body:
12761 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP304]]
12762 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
12763 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12764 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP304]]
12765 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12766 // CHECK-32: omp.body.continue:
12767 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12768 // CHECK-32: omp.inner.for.inc:
12769 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP304]]
12770 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
12771 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP304]]
12772 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP305:![0-9]+]]
12773 // CHECK-32: omp.inner.for.end:
12774 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
12775 // CHECK-32: omp.dispatch.inc:
12776 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
12777 // CHECK-32: omp.dispatch.end:
12778 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
12779 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
12780 // CHECK-32-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
12781 // CHECK-32-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12782 // CHECK-32: .omp.final.then:
12783 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
12784 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
12785 // CHECK-32: .omp.final.done:
12786 // CHECK-32-NEXT: ret void
12789 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85
12790 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
12791 // CHECK-32-NEXT: entry:
12792 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
12793 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
12794 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
12795 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
12796 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85_kernel_environment, ptr [[DYN_PTR]])
12797 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
12798 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
12799 // CHECK-32: user_code.entry:
12800 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
12801 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
12802 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
12803 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
12804 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
12805 // CHECK-32-NEXT: ret void
12806 // CHECK-32: worker.exit:
12807 // CHECK-32-NEXT: ret void
12810 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85_omp_outlined
12811 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
12812 // CHECK-32-NEXT: entry:
12813 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
12814 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
12815 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12816 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
12817 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12818 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12819 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12820 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12821 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
12822 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
12823 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
12824 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
12825 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
12826 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
12827 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12828 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12829 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
12830 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12831 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
12832 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
12833 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12834 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
12835 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12836 // CHECK-32: cond.true:
12837 // CHECK-32-NEXT: br label [[COND_END:%.*]]
12838 // CHECK-32: cond.false:
12839 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12840 // CHECK-32-NEXT: br label [[COND_END]]
12841 // CHECK-32: cond.end:
12842 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
12843 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
12844 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
12845 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
12846 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12847 // CHECK-32: omp.inner.for.cond:
12848 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP307:![0-9]+]]
12849 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
12850 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12851 // CHECK-32: omp.inner.for.body:
12852 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP307]]
12853 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP307]]
12854 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
12855 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
12856 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP307]]
12857 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
12858 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
12859 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP307]]
12860 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP307]]
12861 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12862 // CHECK-32: omp.inner.for.inc:
12863 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP307]]
12864 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP307]]
12865 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
12866 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP307]]
12867 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP307]]
12868 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP307]]
12869 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
12870 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP307]]
12871 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP307]]
12872 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP307]]
12873 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
12874 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP307]]
12875 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP307]]
12876 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
12877 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
12878 // CHECK-32: cond.true5:
12879 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
12880 // CHECK-32: cond.false6:
12881 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP307]]
12882 // CHECK-32-NEXT: br label [[COND_END7]]
12883 // CHECK-32: cond.end7:
12884 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
12885 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP307]]
12886 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP307]]
12887 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP307]]
12888 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP308:![0-9]+]]
12889 // CHECK-32: omp.inner.for.end:
12890 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12891 // CHECK-32: omp.loop.exit:
12892 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
12893 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
12894 // CHECK-32-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
12895 // CHECK-32-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12896 // CHECK-32: .omp.final.then:
12897 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
12898 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
12899 // CHECK-32: .omp.final.done:
12900 // CHECK-32-NEXT: ret void
12903 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85_omp_outlined_omp_outlined
12904 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
12905 // CHECK-32-NEXT: entry:
12906 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
12907 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
12908 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
12909 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
12910 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12911 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
12912 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12913 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12914 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12915 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12916 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
12917 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
12918 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
12919 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
12920 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
12921 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
12922 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
12923 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
12924 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
12925 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
12926 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
12927 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12928 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12929 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
12930 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
12931 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12932 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
12933 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
12934 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
12935 // CHECK-32: omp.dispatch.cond:
12936 // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
12937 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
12938 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
12939 // CHECK-32: omp.dispatch.body:
12940 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
12941 // CHECK-32-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
12942 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12943 // CHECK-32: omp.inner.for.cond:
12944 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP310:![0-9]+]]
12945 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP310]]
12946 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
12947 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12948 // CHECK-32: omp.inner.for.body:
12949 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP310]]
12950 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
12951 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12952 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP310]]
12953 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12954 // CHECK-32: omp.body.continue:
12955 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12956 // CHECK-32: omp.inner.for.inc:
12957 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP310]]
12958 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
12959 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP310]]
12960 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP311:![0-9]+]]
12961 // CHECK-32: omp.inner.for.end:
12962 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
12963 // CHECK-32: omp.dispatch.inc:
12964 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
12965 // CHECK-32: omp.dispatch.end:
12966 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
12967 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
12968 // CHECK-32-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
12969 // CHECK-32-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12970 // CHECK-32: .omp.final.then:
12971 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
12972 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
12973 // CHECK-32: .omp.final.done:
12974 // CHECK-32-NEXT: ret void
12977 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89
12978 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
12979 // CHECK-32-NEXT: entry:
12980 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
12981 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
12982 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
12983 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
12984 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89_kernel_environment, ptr [[DYN_PTR]])
12985 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
12986 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
12987 // CHECK-32: user_code.entry:
12988 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
12989 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
12990 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
12991 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
12992 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
12993 // CHECK-32-NEXT: ret void
12994 // CHECK-32: worker.exit:
12995 // CHECK-32-NEXT: ret void
12998 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89_omp_outlined
12999 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
13000 // CHECK-32-NEXT: entry:
13001 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13002 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13003 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13004 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
13005 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13006 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13007 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13008 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13009 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
13010 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
13011 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13012 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13013 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
13014 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
13015 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13016 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13017 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
13018 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13019 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
13020 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
13021 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13022 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
13023 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13024 // CHECK-32: cond.true:
13025 // CHECK-32-NEXT: br label [[COND_END:%.*]]
13026 // CHECK-32: cond.false:
13027 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13028 // CHECK-32-NEXT: br label [[COND_END]]
13029 // CHECK-32: cond.end:
13030 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
13031 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
13032 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13033 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
13034 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13035 // CHECK-32: omp.inner.for.cond:
13036 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP313:![0-9]+]]
13037 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
13038 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13039 // CHECK-32: omp.inner.for.body:
13040 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP313]]
13041 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP313]]
13042 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
13043 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
13044 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP313]]
13045 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
13046 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
13047 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP313]]
13048 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP313]]
13049 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13050 // CHECK-32: omp.inner.for.inc:
13051 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP313]]
13052 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP313]]
13053 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
13054 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP313]]
13055 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP313]]
13056 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP313]]
13057 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
13058 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP313]]
13059 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP313]]
13060 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP313]]
13061 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
13062 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP313]]
13063 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP313]]
13064 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
13065 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
13066 // CHECK-32: cond.true5:
13067 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
13068 // CHECK-32: cond.false6:
13069 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP313]]
13070 // CHECK-32-NEXT: br label [[COND_END7]]
13071 // CHECK-32: cond.end7:
13072 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
13073 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP313]]
13074 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP313]]
13075 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP313]]
13076 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP314:![0-9]+]]
13077 // CHECK-32: omp.inner.for.end:
13078 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13079 // CHECK-32: omp.loop.exit:
13080 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
13081 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
13082 // CHECK-32-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
13083 // CHECK-32-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13084 // CHECK-32: .omp.final.then:
13085 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
13086 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
13087 // CHECK-32: .omp.final.done:
13088 // CHECK-32-NEXT: ret void
13091 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89_omp_outlined_omp_outlined
13092 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
13093 // CHECK-32-NEXT: entry:
13094 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13095 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13096 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13097 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13098 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13099 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
13100 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13101 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13102 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13103 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13104 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
13105 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13106 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13107 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13108 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13109 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
13110 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
13111 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13112 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13113 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
13114 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
13115 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13116 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13117 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
13118 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
13119 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13120 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
13121 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
13122 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
13123 // CHECK-32: omp.dispatch.cond:
13124 // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
13125 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
13126 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
13127 // CHECK-32: omp.dispatch.body:
13128 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
13129 // CHECK-32-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
13130 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13131 // CHECK-32: omp.inner.for.cond:
13132 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP316:![0-9]+]]
13133 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP316]]
13134 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
13135 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13136 // CHECK-32: omp.inner.for.body:
13137 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP316]]
13138 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
13139 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13140 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP316]]
13141 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13142 // CHECK-32: omp.body.continue:
13143 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13144 // CHECK-32: omp.inner.for.inc:
13145 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP316]]
13146 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
13147 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP316]]
13148 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP317:![0-9]+]]
13149 // CHECK-32: omp.inner.for.end:
13150 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
13151 // CHECK-32: omp.dispatch.inc:
13152 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
13153 // CHECK-32: omp.dispatch.end:
13154 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
13155 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
13156 // CHECK-32-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
13157 // CHECK-32-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13158 // CHECK-32: .omp.final.then:
13159 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
13160 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
13161 // CHECK-32: .omp.final.done:
13162 // CHECK-32-NEXT: ret void
13165 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93
13166 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
13167 // CHECK-32-NEXT: entry:
13168 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
13169 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
13170 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
13171 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
13172 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93_kernel_environment, ptr [[DYN_PTR]])
13173 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
13174 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
13175 // CHECK-32: user_code.entry:
13176 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
13177 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
13178 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
13179 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
13180 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
13181 // CHECK-32-NEXT: ret void
13182 // CHECK-32: worker.exit:
13183 // CHECK-32-NEXT: ret void
13186 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93_omp_outlined
13187 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
13188 // CHECK-32-NEXT: entry:
13189 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13190 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13191 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13192 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
13193 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13194 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13195 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13196 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13197 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
13198 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
13199 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13200 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13201 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
13202 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
13203 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13204 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13205 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
13206 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13207 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
13208 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
13209 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13210 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
13211 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13212 // CHECK-32: cond.true:
13213 // CHECK-32-NEXT: br label [[COND_END:%.*]]
13214 // CHECK-32: cond.false:
13215 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13216 // CHECK-32-NEXT: br label [[COND_END]]
13217 // CHECK-32: cond.end:
13218 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
13219 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
13220 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13221 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
13222 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13223 // CHECK-32: omp.inner.for.cond:
13224 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP319:![0-9]+]]
13225 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
13226 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13227 // CHECK-32: omp.inner.for.body:
13228 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP319]]
13229 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP319]]
13230 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
13231 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
13232 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP319]]
13233 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
13234 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
13235 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP319]]
13236 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP319]]
13237 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13238 // CHECK-32: omp.inner.for.inc:
13239 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP319]]
13240 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP319]]
13241 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
13242 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP319]]
13243 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP319]]
13244 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP319]]
13245 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
13246 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP319]]
13247 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP319]]
13248 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP319]]
13249 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
13250 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP319]]
13251 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP319]]
13252 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
13253 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
13254 // CHECK-32: cond.true5:
13255 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
13256 // CHECK-32: cond.false6:
13257 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP319]]
13258 // CHECK-32-NEXT: br label [[COND_END7]]
13259 // CHECK-32: cond.end7:
13260 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
13261 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP319]]
13262 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP319]]
13263 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP319]]
13264 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP320:![0-9]+]]
13265 // CHECK-32: omp.inner.for.end:
13266 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13267 // CHECK-32: omp.loop.exit:
13268 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
13269 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
13270 // CHECK-32-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
13271 // CHECK-32-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13272 // CHECK-32: .omp.final.then:
13273 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
13274 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
13275 // CHECK-32: .omp.final.done:
13276 // CHECK-32-NEXT: ret void
13279 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93_omp_outlined_omp_outlined
13280 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
13281 // CHECK-32-NEXT: entry:
13282 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13283 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13284 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13285 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13286 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13287 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
13288 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13289 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13290 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13291 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13292 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
13293 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13294 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13295 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13296 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13297 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
13298 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
13299 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13300 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13301 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
13302 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
13303 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13304 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13305 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
13306 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
13307 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13308 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
13309 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
13310 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
13311 // CHECK-32: omp.dispatch.cond:
13312 // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
13313 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
13314 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
13315 // CHECK-32: omp.dispatch.body:
13316 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
13317 // CHECK-32-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
13318 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13319 // CHECK-32: omp.inner.for.cond:
13320 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP322:![0-9]+]]
13321 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP322]]
13322 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
13323 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13324 // CHECK-32: omp.inner.for.body:
13325 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP322]]
13326 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
13327 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13328 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP322]]
13329 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13330 // CHECK-32: omp.body.continue:
13331 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13332 // CHECK-32: omp.inner.for.inc:
13333 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP322]]
13334 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
13335 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP322]]
13336 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP323:![0-9]+]]
13337 // CHECK-32: omp.inner.for.end:
13338 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
13339 // CHECK-32: omp.dispatch.inc:
13340 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
13341 // CHECK-32: omp.dispatch.end:
13342 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
13343 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
13344 // CHECK-32-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
13345 // CHECK-32-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13346 // CHECK-32: .omp.final.then:
13347 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
13348 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
13349 // CHECK-32: .omp.final.done:
13350 // CHECK-32-NEXT: ret void
13353 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97
13354 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
13355 // CHECK-32-NEXT: entry:
13356 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
13357 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
13358 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
13359 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
13360 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97_kernel_environment, ptr [[DYN_PTR]])
13361 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
13362 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
13363 // CHECK-32: user_code.entry:
13364 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
13365 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
13366 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
13367 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
13368 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
13369 // CHECK-32-NEXT: ret void
13370 // CHECK-32: worker.exit:
13371 // CHECK-32-NEXT: ret void
13374 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97_omp_outlined
13375 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
13376 // CHECK-32-NEXT: entry:
13377 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13378 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13379 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13380 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
13381 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13382 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13383 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13384 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13385 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
13386 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
13387 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13388 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13389 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
13390 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
13391 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13392 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13393 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
13394 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13395 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
13396 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
13397 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13398 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
13399 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13400 // CHECK-32: cond.true:
13401 // CHECK-32-NEXT: br label [[COND_END:%.*]]
13402 // CHECK-32: cond.false:
13403 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13404 // CHECK-32-NEXT: br label [[COND_END]]
13405 // CHECK-32: cond.end:
13406 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
13407 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
13408 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13409 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
13410 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13411 // CHECK-32: omp.inner.for.cond:
13412 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13413 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
13414 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13415 // CHECK-32: omp.inner.for.body:
13416 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13417 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13418 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
13419 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
13420 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
13421 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
13422 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
13423 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
13424 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
13425 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13426 // CHECK-32: omp.inner.for.inc:
13427 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13428 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13429 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
13430 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
13431 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13432 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13433 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
13434 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
13435 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13436 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13437 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
13438 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
13439 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13440 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
13441 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
13442 // CHECK-32: cond.true5:
13443 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
13444 // CHECK-32: cond.false6:
13445 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13446 // CHECK-32-NEXT: br label [[COND_END7]]
13447 // CHECK-32: cond.end7:
13448 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
13449 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
13450 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13451 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
13452 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
13453 // CHECK-32: omp.inner.for.end:
13454 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13455 // CHECK-32: omp.loop.exit:
13456 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
13457 // CHECK-32-NEXT: ret void
13460 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97_omp_outlined_omp_outlined
13461 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
13462 // CHECK-32-NEXT: entry:
13463 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13464 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13465 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13466 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13467 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13468 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
13469 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13470 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13471 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13472 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13473 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
13474 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13475 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13476 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13477 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13478 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
13479 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
13480 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13481 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13482 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
13483 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
13484 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13485 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13486 // CHECK-32-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13487 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
13488 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
13489 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
13490 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
13491 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13492 // CHECK-32: omp.inner.for.cond:
13493 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13494 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13495 // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]]
13496 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13497 // CHECK-32: omp.inner.for.body:
13498 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13499 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
13500 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13501 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4
13502 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13503 // CHECK-32: omp.body.continue:
13504 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13505 // CHECK-32: omp.inner.for.inc:
13506 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13507 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13508 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
13509 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4
13510 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
13511 // CHECK-32: omp.inner.for.end:
13512 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13513 // CHECK-32: omp.loop.exit:
13514 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
13515 // CHECK-32-NEXT: ret void
13518 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101
13519 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
13520 // CHECK-32-NEXT: entry:
13521 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
13522 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
13523 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
13524 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
13525 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101_kernel_environment, ptr [[DYN_PTR]])
13526 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
13527 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
13528 // CHECK-32: user_code.entry:
13529 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
13530 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
13531 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
13532 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
13533 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
13534 // CHECK-32-NEXT: ret void
13535 // CHECK-32: worker.exit:
13536 // CHECK-32-NEXT: ret void
13539 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101_omp_outlined
13540 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
13541 // CHECK-32-NEXT: entry:
13542 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13543 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13544 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13545 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
13546 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13547 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13548 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13549 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13550 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
13551 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
13552 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13553 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13554 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
13555 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
13556 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13557 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13558 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
13559 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13560 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
13561 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
13562 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13563 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
13564 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13565 // CHECK-32: cond.true:
13566 // CHECK-32-NEXT: br label [[COND_END:%.*]]
13567 // CHECK-32: cond.false:
13568 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13569 // CHECK-32-NEXT: br label [[COND_END]]
13570 // CHECK-32: cond.end:
13571 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
13572 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
13573 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13574 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
13575 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13576 // CHECK-32: omp.inner.for.cond:
13577 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13578 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
13579 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13580 // CHECK-32: omp.inner.for.body:
13581 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13582 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13583 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
13584 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
13585 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
13586 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
13587 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
13588 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
13589 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
13590 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13591 // CHECK-32: omp.inner.for.inc:
13592 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13593 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13594 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
13595 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
13596 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13597 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13598 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
13599 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
13600 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13601 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13602 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
13603 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
13604 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13605 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
13606 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
13607 // CHECK-32: cond.true5:
13608 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
13609 // CHECK-32: cond.false6:
13610 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13611 // CHECK-32-NEXT: br label [[COND_END7]]
13612 // CHECK-32: cond.end7:
13613 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
13614 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
13615 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13616 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
13617 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
13618 // CHECK-32: omp.inner.for.end:
13619 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13620 // CHECK-32: omp.loop.exit:
13621 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
13622 // CHECK-32-NEXT: ret void
13625 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101_omp_outlined_omp_outlined
13626 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
13627 // CHECK-32-NEXT: entry:
13628 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13629 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13630 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13631 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13632 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13633 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
13634 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13635 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13636 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13637 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13638 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
13639 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13640 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13641 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13642 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13643 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
13644 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
13645 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13646 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13647 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
13648 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
13649 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13650 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13651 // CHECK-32-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13652 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
13653 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
13654 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
13655 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9
13656 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13657 // CHECK-32: cond.true:
13658 // CHECK-32-NEXT: br label [[COND_END:%.*]]
13659 // CHECK-32: cond.false:
13660 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
13661 // CHECK-32-NEXT: br label [[COND_END]]
13662 // CHECK-32: cond.end:
13663 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
13664 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
13665 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
13666 // CHECK-32-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
13667 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13668 // CHECK-32: omp.inner.for.cond:
13669 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13670 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
13671 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
13672 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13673 // CHECK-32: omp.inner.for.body:
13674 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13675 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
13676 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13677 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4
13678 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13679 // CHECK-32: omp.body.continue:
13680 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13681 // CHECK-32: omp.inner.for.inc:
13682 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13683 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
13684 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
13685 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
13686 // CHECK-32: omp.inner.for.end:
13687 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13688 // CHECK-32: omp.loop.exit:
13689 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
13690 // CHECK-32-NEXT: ret void
13693 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105
13694 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
13695 // CHECK-32-NEXT: entry:
13696 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
13697 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
13698 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
13699 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
13700 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105_kernel_environment, ptr [[DYN_PTR]])
13701 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
13702 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
13703 // CHECK-32: user_code.entry:
13704 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
13705 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
13706 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
13707 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
13708 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
13709 // CHECK-32-NEXT: ret void
13710 // CHECK-32: worker.exit:
13711 // CHECK-32-NEXT: ret void
13714 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105_omp_outlined
13715 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
13716 // CHECK-32-NEXT: entry:
13717 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13718 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13719 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13720 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
13721 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13722 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13723 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13724 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13725 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
13726 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
13727 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13728 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13729 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
13730 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
13731 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13732 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13733 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
13734 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13735 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
13736 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
13737 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13738 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
13739 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13740 // CHECK-32: cond.true:
13741 // CHECK-32-NEXT: br label [[COND_END:%.*]]
13742 // CHECK-32: cond.false:
13743 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13744 // CHECK-32-NEXT: br label [[COND_END]]
13745 // CHECK-32: cond.end:
13746 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
13747 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
13748 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13749 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
13750 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13751 // CHECK-32: omp.inner.for.cond:
13752 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13753 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
13754 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13755 // CHECK-32: omp.inner.for.body:
13756 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13757 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13758 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
13759 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
13760 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
13761 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
13762 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
13763 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
13764 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
13765 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13766 // CHECK-32: omp.inner.for.inc:
13767 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13768 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13769 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
13770 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
13771 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13772 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13773 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
13774 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
13775 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13776 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13777 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
13778 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
13779 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13780 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
13781 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
13782 // CHECK-32: cond.true5:
13783 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
13784 // CHECK-32: cond.false6:
13785 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13786 // CHECK-32-NEXT: br label [[COND_END7]]
13787 // CHECK-32: cond.end7:
13788 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
13789 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
13790 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13791 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
13792 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
13793 // CHECK-32: omp.inner.for.end:
13794 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13795 // CHECK-32: omp.loop.exit:
13796 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
13797 // CHECK-32-NEXT: ret void
13800 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105_omp_outlined_omp_outlined
13801 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
13802 // CHECK-32-NEXT: entry:
13803 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13804 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13805 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13806 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13807 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13808 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
13809 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13810 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13811 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13812 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13813 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
13814 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13815 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13816 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13817 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13818 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
13819 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
13820 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13821 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13822 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
13823 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
13824 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13825 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13826 // CHECK-32-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13827 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
13828 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
13829 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
13830 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
13831 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13832 // CHECK-32: omp.inner.for.cond:
13833 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13834 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13835 // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]]
13836 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13837 // CHECK-32: omp.inner.for.body:
13838 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13839 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
13840 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13841 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4
13842 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13843 // CHECK-32: omp.body.continue:
13844 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13845 // CHECK-32: omp.inner.for.inc:
13846 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13847 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13848 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
13849 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4
13850 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
13851 // CHECK-32: omp.inner.for.end:
13852 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13853 // CHECK-32: omp.loop.exit:
13854 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
13855 // CHECK-32-NEXT: ret void
13858 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109
13859 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
13860 // CHECK-32-NEXT: entry:
13861 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
13862 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
13863 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
13864 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
13865 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109_kernel_environment, ptr [[DYN_PTR]])
13866 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
13867 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
13868 // CHECK-32: user_code.entry:
13869 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
13870 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
13871 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
13872 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
13873 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
13874 // CHECK-32-NEXT: ret void
13875 // CHECK-32: worker.exit:
13876 // CHECK-32-NEXT: ret void
13879 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109_omp_outlined
13880 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
13881 // CHECK-32-NEXT: entry:
13882 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13883 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13884 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13885 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
13886 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13887 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13888 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13889 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13890 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
13891 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
13892 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13893 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13894 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
13895 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
13896 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13897 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13898 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
13899 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13900 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
13901 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
13902 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13903 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
13904 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13905 // CHECK-32: cond.true:
13906 // CHECK-32-NEXT: br label [[COND_END:%.*]]
13907 // CHECK-32: cond.false:
13908 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13909 // CHECK-32-NEXT: br label [[COND_END]]
13910 // CHECK-32: cond.end:
13911 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
13912 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
13913 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13914 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
13915 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13916 // CHECK-32: omp.inner.for.cond:
13917 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13918 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
13919 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13920 // CHECK-32: omp.inner.for.body:
13921 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13922 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13923 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
13924 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
13925 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
13926 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
13927 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
13928 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
13929 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
13930 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13931 // CHECK-32: omp.inner.for.inc:
13932 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13933 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13934 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
13935 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
13936 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13937 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13938 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
13939 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
13940 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13941 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13942 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
13943 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
13944 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13945 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
13946 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
13947 // CHECK-32: cond.true5:
13948 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
13949 // CHECK-32: cond.false6:
13950 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13951 // CHECK-32-NEXT: br label [[COND_END7]]
13952 // CHECK-32: cond.end7:
13953 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
13954 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
13955 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13956 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
13957 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
13958 // CHECK-32: omp.inner.for.end:
13959 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13960 // CHECK-32: omp.loop.exit:
13961 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
13962 // CHECK-32-NEXT: ret void
13965 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109_omp_outlined_omp_outlined
13966 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
13967 // CHECK-32-NEXT: entry:
13968 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13969 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13970 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13971 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13972 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13973 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
13974 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13975 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13976 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13977 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13978 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
13979 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13980 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13981 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13982 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13983 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
13984 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
13985 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13986 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13987 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
13988 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
13989 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13990 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13991 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
13992 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
13993 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13994 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
13995 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
13996 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
13997 // CHECK-32: omp.dispatch.cond:
13998 // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
13999 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
14000 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14001 // CHECK-32: omp.dispatch.body:
14002 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14003 // CHECK-32-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
14004 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14005 // CHECK-32: omp.inner.for.cond:
14006 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP325:![0-9]+]]
14007 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP325]]
14008 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
14009 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14010 // CHECK-32: omp.inner.for.body:
14011 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP325]]
14012 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
14013 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14014 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP325]]
14015 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14016 // CHECK-32: omp.body.continue:
14017 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14018 // CHECK-32: omp.inner.for.inc:
14019 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP325]]
14020 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
14021 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP325]]
14022 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP326:![0-9]+]]
14023 // CHECK-32: omp.inner.for.end:
14024 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
14025 // CHECK-32: omp.dispatch.inc:
14026 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
14027 // CHECK-32: omp.dispatch.end:
14028 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
14029 // CHECK-32-NEXT: ret void
14032 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113
14033 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
14034 // CHECK-32-NEXT: entry:
14035 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
14036 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
14037 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
14038 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
14039 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113_kernel_environment, ptr [[DYN_PTR]])
14040 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
14041 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
14042 // CHECK-32: user_code.entry:
14043 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
14044 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
14045 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
14046 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
14047 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
14048 // CHECK-32-NEXT: ret void
14049 // CHECK-32: worker.exit:
14050 // CHECK-32-NEXT: ret void
14053 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113_omp_outlined
14054 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
14055 // CHECK-32-NEXT: entry:
14056 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14057 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14058 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14059 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
14060 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14061 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14062 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14063 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14064 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
14065 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
14066 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14067 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14068 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
14069 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
14070 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14071 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14072 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
14073 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14074 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
14075 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
14076 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14077 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
14078 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14079 // CHECK-32: cond.true:
14080 // CHECK-32-NEXT: br label [[COND_END:%.*]]
14081 // CHECK-32: cond.false:
14082 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14083 // CHECK-32-NEXT: br label [[COND_END]]
14084 // CHECK-32: cond.end:
14085 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
14086 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
14087 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14088 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
14089 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14090 // CHECK-32: omp.inner.for.cond:
14091 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14092 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
14093 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14094 // CHECK-32: omp.inner.for.body:
14095 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14096 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14097 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
14098 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
14099 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
14100 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
14101 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
14102 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
14103 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
14104 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14105 // CHECK-32: omp.inner.for.inc:
14106 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14107 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14108 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
14109 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
14110 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14111 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14112 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
14113 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
14114 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14115 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14116 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
14117 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
14118 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14119 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
14120 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
14121 // CHECK-32: cond.true5:
14122 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
14123 // CHECK-32: cond.false6:
14124 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14125 // CHECK-32-NEXT: br label [[COND_END7]]
14126 // CHECK-32: cond.end7:
14127 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
14128 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
14129 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14130 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
14131 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
14132 // CHECK-32: omp.inner.for.end:
14133 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14134 // CHECK-32: omp.loop.exit:
14135 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
14136 // CHECK-32-NEXT: ret void
14139 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113_omp_outlined_omp_outlined
14140 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
14141 // CHECK-32-NEXT: entry:
14142 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14143 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14144 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14145 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14146 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14147 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
14148 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14149 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14150 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14151 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14152 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
14153 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14154 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14155 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14156 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14157 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
14158 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
14159 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14160 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14161 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
14162 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
14163 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14164 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14165 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14166 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14167 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14168 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
14169 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
14170 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
14171 // CHECK-32: omp.dispatch.cond:
14172 // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
14173 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
14174 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14175 // CHECK-32: omp.dispatch.body:
14176 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14177 // CHECK-32-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
14178 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14179 // CHECK-32: omp.inner.for.cond:
14180 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP328:![0-9]+]]
14181 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP328]]
14182 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
14183 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14184 // CHECK-32: omp.inner.for.body:
14185 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP328]]
14186 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
14187 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14188 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP328]]
14189 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14190 // CHECK-32: omp.body.continue:
14191 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14192 // CHECK-32: omp.inner.for.inc:
14193 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP328]]
14194 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
14195 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP328]]
14196 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP329:![0-9]+]]
14197 // CHECK-32: omp.inner.for.end:
14198 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
14199 // CHECK-32: omp.dispatch.inc:
14200 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
14201 // CHECK-32: omp.dispatch.end:
14202 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
14203 // CHECK-32-NEXT: ret void
14206 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117
14207 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
14208 // CHECK-32-NEXT: entry:
14209 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
14210 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
14211 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
14212 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
14213 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117_kernel_environment, ptr [[DYN_PTR]])
14214 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
14215 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
14216 // CHECK-32: user_code.entry:
14217 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
14218 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
14219 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
14220 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
14221 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
14222 // CHECK-32-NEXT: ret void
14223 // CHECK-32: worker.exit:
14224 // CHECK-32-NEXT: ret void
14227 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117_omp_outlined
14228 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
14229 // CHECK-32-NEXT: entry:
14230 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14231 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14232 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14233 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
14234 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14235 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14236 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14237 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14238 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
14239 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
14240 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14241 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14242 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
14243 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
14244 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14245 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14246 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
14247 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14248 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
14249 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
14250 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14251 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
14252 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14253 // CHECK-32: cond.true:
14254 // CHECK-32-NEXT: br label [[COND_END:%.*]]
14255 // CHECK-32: cond.false:
14256 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14257 // CHECK-32-NEXT: br label [[COND_END]]
14258 // CHECK-32: cond.end:
14259 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
14260 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
14261 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14262 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
14263 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14264 // CHECK-32: omp.inner.for.cond:
14265 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14266 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
14267 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14268 // CHECK-32: omp.inner.for.body:
14269 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14270 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14271 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
14272 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
14273 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
14274 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
14275 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
14276 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
14277 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
14278 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14279 // CHECK-32: omp.inner.for.inc:
14280 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14281 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14282 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
14283 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
14284 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14285 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14286 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
14287 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
14288 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14289 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14290 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
14291 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
14292 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14293 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
14294 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
14295 // CHECK-32: cond.true5:
14296 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
14297 // CHECK-32: cond.false6:
14298 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14299 // CHECK-32-NEXT: br label [[COND_END7]]
14300 // CHECK-32: cond.end7:
14301 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
14302 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
14303 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14304 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
14305 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
14306 // CHECK-32: omp.inner.for.end:
14307 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14308 // CHECK-32: omp.loop.exit:
14309 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
14310 // CHECK-32-NEXT: ret void
14313 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117_omp_outlined_omp_outlined
14314 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
14315 // CHECK-32-NEXT: entry:
14316 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14317 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14318 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14319 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14320 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14321 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
14322 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14323 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14324 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14325 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14326 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
14327 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14328 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14329 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14330 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14331 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
14332 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
14333 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14334 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14335 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
14336 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
14337 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14338 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14339 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14340 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14341 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14342 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
14343 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
14344 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
14345 // CHECK-32: omp.dispatch.cond:
14346 // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
14347 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
14348 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14349 // CHECK-32: omp.dispatch.body:
14350 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14351 // CHECK-32-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
14352 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14353 // CHECK-32: omp.inner.for.cond:
14354 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP331:![0-9]+]]
14355 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP331]]
14356 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
14357 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14358 // CHECK-32: omp.inner.for.body:
14359 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP331]]
14360 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
14361 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14362 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP331]]
14363 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14364 // CHECK-32: omp.body.continue:
14365 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14366 // CHECK-32: omp.inner.for.inc:
14367 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP331]]
14368 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
14369 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP331]]
14370 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP332:![0-9]+]]
14371 // CHECK-32: omp.inner.for.end:
14372 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
14373 // CHECK-32: omp.dispatch.inc:
14374 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
14375 // CHECK-32: omp.dispatch.end:
14376 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
14377 // CHECK-32-NEXT: ret void
14380 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121
14381 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
14382 // CHECK-32-NEXT: entry:
14383 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
14384 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
14385 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
14386 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
14387 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121_kernel_environment, ptr [[DYN_PTR]])
14388 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
14389 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
14390 // CHECK-32: user_code.entry:
14391 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
14392 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
14393 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
14394 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
14395 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
14396 // CHECK-32-NEXT: ret void
14397 // CHECK-32: worker.exit:
14398 // CHECK-32-NEXT: ret void
14401 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121_omp_outlined
14402 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
14403 // CHECK-32-NEXT: entry:
14404 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14405 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14406 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14407 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
14408 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14409 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14410 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14411 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14412 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
14413 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
14414 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14415 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14416 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
14417 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
14418 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14419 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14420 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
14421 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14422 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
14423 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
14424 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14425 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
14426 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14427 // CHECK-32: cond.true:
14428 // CHECK-32-NEXT: br label [[COND_END:%.*]]
14429 // CHECK-32: cond.false:
14430 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14431 // CHECK-32-NEXT: br label [[COND_END]]
14432 // CHECK-32: cond.end:
14433 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
14434 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
14435 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14436 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
14437 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14438 // CHECK-32: omp.inner.for.cond:
14439 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14440 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
14441 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14442 // CHECK-32: omp.inner.for.body:
14443 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14444 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14445 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
14446 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
14447 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
14448 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
14449 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
14450 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
14451 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
14452 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14453 // CHECK-32: omp.inner.for.inc:
14454 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14455 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14456 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
14457 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
14458 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14459 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14460 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
14461 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
14462 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14463 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14464 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
14465 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
14466 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14467 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
14468 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
14469 // CHECK-32: cond.true5:
14470 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
14471 // CHECK-32: cond.false6:
14472 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14473 // CHECK-32-NEXT: br label [[COND_END7]]
14474 // CHECK-32: cond.end7:
14475 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
14476 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
14477 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14478 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
14479 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
14480 // CHECK-32: omp.inner.for.end:
14481 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14482 // CHECK-32: omp.loop.exit:
14483 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
14484 // CHECK-32-NEXT: ret void
14487 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121_omp_outlined_omp_outlined
14488 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
14489 // CHECK-32-NEXT: entry:
14490 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14491 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14492 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14493 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14494 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14495 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
14496 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14497 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14498 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14499 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14500 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
14501 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14502 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14503 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14504 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14505 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
14506 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
14507 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14508 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14509 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
14510 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
14511 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14512 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14513 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14514 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14515 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14516 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
14517 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
14518 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
14519 // CHECK-32: omp.dispatch.cond:
14520 // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
14521 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
14522 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14523 // CHECK-32: omp.dispatch.body:
14524 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14525 // CHECK-32-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
14526 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14527 // CHECK-32: omp.inner.for.cond:
14528 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP334:![0-9]+]]
14529 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP334]]
14530 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
14531 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14532 // CHECK-32: omp.inner.for.body:
14533 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP334]]
14534 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
14535 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14536 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP334]]
14537 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14538 // CHECK-32: omp.body.continue:
14539 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14540 // CHECK-32: omp.inner.for.inc:
14541 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP334]]
14542 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
14543 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP334]]
14544 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP335:![0-9]+]]
14545 // CHECK-32: omp.inner.for.end:
14546 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
14547 // CHECK-32: omp.dispatch.inc:
14548 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
14549 // CHECK-32: omp.dispatch.end:
14550 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
14551 // CHECK-32-NEXT: ret void
14554 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125
14555 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
14556 // CHECK-32-NEXT: entry:
14557 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
14558 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
14559 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
14560 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
14561 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125_kernel_environment, ptr [[DYN_PTR]])
14562 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
14563 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
14564 // CHECK-32: user_code.entry:
14565 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
14566 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
14567 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
14568 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
14569 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
14570 // CHECK-32-NEXT: ret void
14571 // CHECK-32: worker.exit:
14572 // CHECK-32-NEXT: ret void
14575 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125_omp_outlined
14576 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
14577 // CHECK-32-NEXT: entry:
14578 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14579 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14580 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14581 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
14582 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14583 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14584 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14585 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14586 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
14587 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
14588 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14589 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14590 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
14591 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
14592 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14593 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14594 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
14595 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14596 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
14597 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
14598 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14599 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
14600 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14601 // CHECK-32: cond.true:
14602 // CHECK-32-NEXT: br label [[COND_END:%.*]]
14603 // CHECK-32: cond.false:
14604 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14605 // CHECK-32-NEXT: br label [[COND_END]]
14606 // CHECK-32: cond.end:
14607 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
14608 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
14609 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14610 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
14611 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14612 // CHECK-32: omp.inner.for.cond:
14613 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14614 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
14615 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14616 // CHECK-32: omp.inner.for.body:
14617 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14618 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14619 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
14620 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
14621 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
14622 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
14623 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
14624 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
14625 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
14626 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14627 // CHECK-32: omp.inner.for.inc:
14628 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14629 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14630 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
14631 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
14632 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14633 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14634 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
14635 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
14636 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14637 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14638 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
14639 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
14640 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14641 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
14642 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
14643 // CHECK-32: cond.true5:
14644 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
14645 // CHECK-32: cond.false6:
14646 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14647 // CHECK-32-NEXT: br label [[COND_END7]]
14648 // CHECK-32: cond.end7:
14649 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
14650 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
14651 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14652 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
14653 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
14654 // CHECK-32: omp.inner.for.end:
14655 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14656 // CHECK-32: omp.loop.exit:
14657 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
14658 // CHECK-32-NEXT: ret void
14661 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125_omp_outlined_omp_outlined
14662 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
14663 // CHECK-32-NEXT: entry:
14664 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14665 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14666 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14667 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14668 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14669 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
14670 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14671 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14672 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14673 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14674 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
14675 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14676 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14677 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14678 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14679 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
14680 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
14681 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14682 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14683 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
14684 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
14685 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14686 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14687 // CHECK-32-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14688 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
14689 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
14690 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14691 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
14692 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14693 // CHECK-32: omp.inner.for.cond:
14694 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14695 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14696 // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]]
14697 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14698 // CHECK-32: omp.inner.for.body:
14699 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14700 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
14701 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14702 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4
14703 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14704 // CHECK-32: omp.body.continue:
14705 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14706 // CHECK-32: omp.inner.for.inc:
14707 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14708 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14709 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
14710 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4
14711 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
14712 // CHECK-32: omp.inner.for.end:
14713 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14714 // CHECK-32: omp.loop.exit:
14715 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
14716 // CHECK-32-NEXT: ret void
14719 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130
14720 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
14721 // CHECK-32-NEXT: entry:
14722 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
14723 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
14724 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
14725 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
14726 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130_kernel_environment, ptr [[DYN_PTR]])
14727 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
14728 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
14729 // CHECK-32: user_code.entry:
14730 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
14731 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
14732 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
14733 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
14734 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
14735 // CHECK-32-NEXT: ret void
14736 // CHECK-32: worker.exit:
14737 // CHECK-32-NEXT: ret void
14740 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130_omp_outlined
14741 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
14742 // CHECK-32-NEXT: entry:
14743 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14744 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14745 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14746 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
14747 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14748 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14749 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14750 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14751 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
14752 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
14753 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14754 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14755 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
14756 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
14757 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14758 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14759 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
14760 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14761 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
14762 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
14763 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14764 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
14765 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14766 // CHECK-32: cond.true:
14767 // CHECK-32-NEXT: br label [[COND_END:%.*]]
14768 // CHECK-32: cond.false:
14769 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14770 // CHECK-32-NEXT: br label [[COND_END]]
14771 // CHECK-32: cond.end:
14772 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
14773 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
14774 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14775 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
14776 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14777 // CHECK-32: omp.inner.for.cond:
14778 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14779 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
14780 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14781 // CHECK-32: omp.inner.for.body:
14782 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14783 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14784 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
14785 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
14786 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
14787 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
14788 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
14789 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
14790 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
14791 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14792 // CHECK-32: omp.inner.for.inc:
14793 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14794 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14795 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
14796 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
14797 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14798 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14799 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
14800 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
14801 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14802 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14803 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
14804 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
14805 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14806 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
14807 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
14808 // CHECK-32: cond.true5:
14809 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
14810 // CHECK-32: cond.false6:
14811 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14812 // CHECK-32-NEXT: br label [[COND_END7]]
14813 // CHECK-32: cond.end7:
14814 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
14815 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
14816 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14817 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
14818 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
14819 // CHECK-32: omp.inner.for.end:
14820 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14821 // CHECK-32: omp.loop.exit:
14822 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
14823 // CHECK-32-NEXT: ret void
14826 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130_omp_outlined_omp_outlined
14827 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
14828 // CHECK-32-NEXT: entry:
14829 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14830 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14831 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14832 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14833 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14834 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
14835 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14836 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14837 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14838 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14839 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
14840 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14841 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14842 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14843 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14844 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
14845 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
14846 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14847 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14848 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
14849 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
14850 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14851 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14852 // CHECK-32-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14853 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
14854 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
14855 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14856 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9
14857 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14858 // CHECK-32: cond.true:
14859 // CHECK-32-NEXT: br label [[COND_END:%.*]]
14860 // CHECK-32: cond.false:
14861 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14862 // CHECK-32-NEXT: br label [[COND_END]]
14863 // CHECK-32: cond.end:
14864 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
14865 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
14866 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14867 // CHECK-32-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
14868 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14869 // CHECK-32: omp.inner.for.cond:
14870 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14871 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14872 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
14873 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14874 // CHECK-32: omp.inner.for.body:
14875 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14876 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
14877 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14878 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4
14879 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14880 // CHECK-32: omp.body.continue:
14881 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14882 // CHECK-32: omp.inner.for.inc:
14883 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14884 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
14885 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
14886 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
14887 // CHECK-32: omp.inner.for.end:
14888 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14889 // CHECK-32: omp.loop.exit:
14890 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
14891 // CHECK-32-NEXT: ret void
14894 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135
14895 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
14896 // CHECK-32-NEXT: entry:
14897 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
14898 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
14899 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
14900 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
14901 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135_kernel_environment, ptr [[DYN_PTR]])
14902 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
14903 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
14904 // CHECK-32: user_code.entry:
14905 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
14906 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
14907 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
14908 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
14909 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
14910 // CHECK-32-NEXT: ret void
14911 // CHECK-32: worker.exit:
14912 // CHECK-32-NEXT: ret void
14915 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135_omp_outlined
14916 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
14917 // CHECK-32-NEXT: entry:
14918 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14919 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14920 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14921 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
14922 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14923 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14924 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14925 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14926 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
14927 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
14928 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14929 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14930 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
14931 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
14932 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14933 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14934 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
14935 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14936 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
14937 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
14938 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14939 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
14940 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14941 // CHECK-32: cond.true:
14942 // CHECK-32-NEXT: br label [[COND_END:%.*]]
14943 // CHECK-32: cond.false:
14944 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14945 // CHECK-32-NEXT: br label [[COND_END]]
14946 // CHECK-32: cond.end:
14947 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
14948 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
14949 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14950 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
14951 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14952 // CHECK-32: omp.inner.for.cond:
14953 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14954 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
14955 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14956 // CHECK-32: omp.inner.for.body:
14957 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14958 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14959 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
14960 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
14961 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
14962 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
14963 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
14964 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
14965 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
14966 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14967 // CHECK-32: omp.inner.for.inc:
14968 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14969 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14970 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
14971 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
14972 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14973 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14974 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
14975 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
14976 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14977 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14978 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
14979 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
14980 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14981 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
14982 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
14983 // CHECK-32: cond.true5:
14984 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
14985 // CHECK-32: cond.false6:
14986 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14987 // CHECK-32-NEXT: br label [[COND_END7]]
14988 // CHECK-32: cond.end7:
14989 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
14990 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
14991 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14992 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
14993 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
14994 // CHECK-32: omp.inner.for.end:
14995 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14996 // CHECK-32: omp.loop.exit:
14997 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
14998 // CHECK-32-NEXT: ret void
15001 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135_omp_outlined_omp_outlined
15002 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
15003 // CHECK-32-NEXT: entry:
15004 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
15005 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
15006 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
15007 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
15008 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15009 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
15010 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15011 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15012 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15013 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15014 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
15015 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
15016 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
15017 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
15018 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
15019 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
15020 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
15021 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
15022 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
15023 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
15024 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
15025 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
15026 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
15027 // CHECK-32-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
15028 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
15029 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
15030 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
15031 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
15032 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15033 // CHECK-32: omp.inner.for.cond:
15034 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
15035 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
15036 // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]]
15037 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15038 // CHECK-32: omp.inner.for.body:
15039 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
15040 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
15041 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15042 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4
15043 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15044 // CHECK-32: omp.body.continue:
15045 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15046 // CHECK-32: omp.inner.for.inc:
15047 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
15048 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
15049 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
15050 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4
15051 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
15052 // CHECK-32: omp.inner.for.end:
15053 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15054 // CHECK-32: omp.loop.exit:
15055 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
15056 // CHECK-32-NEXT: ret void
15059 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140
15060 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
15061 // CHECK-32-NEXT: entry:
15062 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
15063 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
15064 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
15065 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
15066 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140_kernel_environment, ptr [[DYN_PTR]])
15067 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
15068 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
15069 // CHECK-32: user_code.entry:
15070 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
15071 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
15072 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
15073 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
15074 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
15075 // CHECK-32-NEXT: ret void
15076 // CHECK-32: worker.exit:
15077 // CHECK-32-NEXT: ret void
15080 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140_omp_outlined
15081 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
15082 // CHECK-32-NEXT: entry:
15083 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
15084 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
15085 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15086 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
15087 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15088 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15089 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15090 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15091 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
15092 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
15093 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
15094 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
15095 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
15096 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
15097 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
15098 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
15099 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
15100 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
15101 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
15102 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
15103 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15104 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
15105 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15106 // CHECK-32: cond.true:
15107 // CHECK-32-NEXT: br label [[COND_END:%.*]]
15108 // CHECK-32: cond.false:
15109 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15110 // CHECK-32-NEXT: br label [[COND_END]]
15111 // CHECK-32: cond.end:
15112 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
15113 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
15114 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
15115 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
15116 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15117 // CHECK-32: omp.inner.for.cond:
15118 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
15119 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
15120 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15121 // CHECK-32: omp.inner.for.body:
15122 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
15123 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15124 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
15125 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
15126 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
15127 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
15128 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
15129 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
15130 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
15131 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15132 // CHECK-32: omp.inner.for.inc:
15133 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
15134 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
15135 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
15136 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
15137 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
15138 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
15139 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
15140 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
15141 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15142 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
15143 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
15144 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
15145 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15146 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
15147 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
15148 // CHECK-32: cond.true5:
15149 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
15150 // CHECK-32: cond.false6:
15151 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15152 // CHECK-32-NEXT: br label [[COND_END7]]
15153 // CHECK-32: cond.end7:
15154 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
15155 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
15156 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
15157 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
15158 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
15159 // CHECK-32: omp.inner.for.end:
15160 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15161 // CHECK-32: omp.loop.exit:
15162 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
15163 // CHECK-32-NEXT: ret void
15166 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140_omp_outlined_omp_outlined
15167 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
15168 // CHECK-32-NEXT: entry:
15169 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
15170 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
15171 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
15172 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
15173 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15174 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
15175 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15176 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15177 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15178 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15179 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
15180 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
15181 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
15182 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
15183 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
15184 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
15185 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
15186 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
15187 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
15188 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
15189 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
15190 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
15191 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
15192 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
15193 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
15194 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
15195 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
15196 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
15197 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
15198 // CHECK-32: omp.dispatch.cond:
15199 // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
15200 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
15201 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
15202 // CHECK-32: omp.dispatch.body:
15203 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
15204 // CHECK-32-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
15205 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15206 // CHECK-32: omp.inner.for.cond:
15207 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP337:![0-9]+]]
15208 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP337]]
15209 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
15210 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15211 // CHECK-32: omp.inner.for.body:
15212 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP337]]
15213 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
15214 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15215 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP337]]
15216 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15217 // CHECK-32: omp.body.continue:
15218 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15219 // CHECK-32: omp.inner.for.inc:
15220 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP337]]
15221 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
15222 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP337]]
15223 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP338:![0-9]+]]
15224 // CHECK-32: omp.inner.for.end:
15225 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
15226 // CHECK-32: omp.dispatch.inc:
15227 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
15228 // CHECK-32: omp.dispatch.end:
15229 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
15230 // CHECK-32-NEXT: ret void
15233 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145
15234 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
15235 // CHECK-32-NEXT: entry:
15236 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
15237 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
15238 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
15239 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
15240 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145_kernel_environment, ptr [[DYN_PTR]])
15241 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
15242 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
15243 // CHECK-32: user_code.entry:
15244 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
15245 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
15246 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
15247 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
15248 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
15249 // CHECK-32-NEXT: ret void
15250 // CHECK-32: worker.exit:
15251 // CHECK-32-NEXT: ret void
15254 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145_omp_outlined
15255 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
15256 // CHECK-32-NEXT: entry:
15257 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
15258 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
15259 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15260 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
15261 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15262 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15263 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15264 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15265 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
15266 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
15267 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
15268 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
15269 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
15270 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
15271 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
15272 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
15273 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
15274 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
15275 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
15276 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
15277 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15278 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
15279 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15280 // CHECK-32: cond.true:
15281 // CHECK-32-NEXT: br label [[COND_END:%.*]]
15282 // CHECK-32: cond.false:
15283 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15284 // CHECK-32-NEXT: br label [[COND_END]]
15285 // CHECK-32: cond.end:
15286 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
15287 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
15288 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
15289 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
15290 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15291 // CHECK-32: omp.inner.for.cond:
15292 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
15293 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
15294 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15295 // CHECK-32: omp.inner.for.body:
15296 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
15297 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15298 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
15299 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
15300 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
15301 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
15302 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
15303 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
15304 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
15305 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15306 // CHECK-32: omp.inner.for.inc:
15307 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
15308 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
15309 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
15310 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
15311 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
15312 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
15313 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
15314 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
15315 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15316 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
15317 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
15318 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
15319 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15320 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
15321 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
15322 // CHECK-32: cond.true5:
15323 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
15324 // CHECK-32: cond.false6:
15325 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15326 // CHECK-32-NEXT: br label [[COND_END7]]
15327 // CHECK-32: cond.end7:
15328 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
15329 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
15330 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
15331 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
15332 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
15333 // CHECK-32: omp.inner.for.end:
15334 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15335 // CHECK-32: omp.loop.exit:
15336 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
15337 // CHECK-32-NEXT: ret void
15340 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145_omp_outlined_omp_outlined
15341 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
15342 // CHECK-32-NEXT: entry:
15343 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
15344 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
15345 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
15346 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
15347 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15348 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
15349 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15350 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15351 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15352 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15353 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
15354 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
15355 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
15356 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
15357 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
15358 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
15359 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
15360 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
15361 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
15362 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
15363 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
15364 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
15365 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
15366 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
15367 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
15368 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
15369 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
15370 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
15371 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
15372 // CHECK-32: omp.dispatch.cond:
15373 // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
15374 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
15375 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
15376 // CHECK-32: omp.dispatch.body:
15377 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
15378 // CHECK-32-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
15379 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15380 // CHECK-32: omp.inner.for.cond:
15381 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP340:![0-9]+]]
15382 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP340]]
15383 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
15384 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15385 // CHECK-32: omp.inner.for.body:
15386 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP340]]
15387 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
15388 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15389 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP340]]
15390 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15391 // CHECK-32: omp.body.continue:
15392 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15393 // CHECK-32: omp.inner.for.inc:
15394 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP340]]
15395 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
15396 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP340]]
15397 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP341:![0-9]+]]
15398 // CHECK-32: omp.inner.for.end:
15399 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
15400 // CHECK-32: omp.dispatch.inc:
15401 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
15402 // CHECK-32: omp.dispatch.end:
15403 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
15404 // CHECK-32-NEXT: ret void
15407 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150
15408 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
15409 // CHECK-32-NEXT: entry:
15410 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
15411 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
15412 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
15413 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
15414 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150_kernel_environment, ptr [[DYN_PTR]])
15415 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
15416 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
15417 // CHECK-32: user_code.entry:
15418 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
15419 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
15420 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
15421 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
15422 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
15423 // CHECK-32-NEXT: ret void
15424 // CHECK-32: worker.exit:
15425 // CHECK-32-NEXT: ret void
15428 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150_omp_outlined
15429 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
15430 // CHECK-32-NEXT: entry:
15431 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
15432 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
15433 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15434 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
15435 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15436 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15437 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15438 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15439 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
15440 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
15441 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
15442 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
15443 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
15444 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
15445 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
15446 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
15447 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
15448 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
15449 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
15450 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
15451 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15452 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
15453 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15454 // CHECK-32: cond.true:
15455 // CHECK-32-NEXT: br label [[COND_END:%.*]]
15456 // CHECK-32: cond.false:
15457 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15458 // CHECK-32-NEXT: br label [[COND_END]]
15459 // CHECK-32: cond.end:
15460 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
15461 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
15462 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
15463 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
15464 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15465 // CHECK-32: omp.inner.for.cond:
15466 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
15467 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
15468 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15469 // CHECK-32: omp.inner.for.body:
15470 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
15471 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15472 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
15473 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
15474 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
15475 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
15476 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
15477 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
15478 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
15479 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15480 // CHECK-32: omp.inner.for.inc:
15481 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
15482 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
15483 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
15484 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
15485 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
15486 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
15487 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
15488 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
15489 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15490 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
15491 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
15492 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
15493 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15494 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
15495 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
15496 // CHECK-32: cond.true5:
15497 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
15498 // CHECK-32: cond.false6:
15499 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15500 // CHECK-32-NEXT: br label [[COND_END7]]
15501 // CHECK-32: cond.end7:
15502 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
15503 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
15504 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
15505 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
15506 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
15507 // CHECK-32: omp.inner.for.end:
15508 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15509 // CHECK-32: omp.loop.exit:
15510 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
15511 // CHECK-32-NEXT: ret void
15514 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150_omp_outlined_omp_outlined
15515 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
15516 // CHECK-32-NEXT: entry:
15517 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
15518 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
15519 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
15520 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
15521 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15522 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
15523 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15524 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15525 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15526 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15527 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
15528 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
15529 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
15530 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
15531 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
15532 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
15533 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
15534 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
15535 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
15536 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
15537 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
15538 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
15539 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
15540 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
15541 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
15542 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
15543 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
15544 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
15545 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
15546 // CHECK-32: omp.dispatch.cond:
15547 // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
15548 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
15549 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
15550 // CHECK-32: omp.dispatch.body:
15551 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
15552 // CHECK-32-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
15553 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15554 // CHECK-32: omp.inner.for.cond:
15555 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP343:![0-9]+]]
15556 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP343]]
15557 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
15558 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15559 // CHECK-32: omp.inner.for.body:
15560 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP343]]
15561 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
15562 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15563 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP343]]
15564 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15565 // CHECK-32: omp.body.continue:
15566 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15567 // CHECK-32: omp.inner.for.inc:
15568 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP343]]
15569 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
15570 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP343]]
15571 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP344:![0-9]+]]
15572 // CHECK-32: omp.inner.for.end:
15573 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
15574 // CHECK-32: omp.dispatch.inc:
15575 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
15576 // CHECK-32: omp.dispatch.end:
15577 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
15578 // CHECK-32-NEXT: ret void
15581 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155
15582 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
15583 // CHECK-32-NEXT: entry:
15584 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
15585 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
15586 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
15587 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
15588 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155_kernel_environment, ptr [[DYN_PTR]])
15589 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
15590 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
15591 // CHECK-32: user_code.entry:
15592 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
15593 // CHECK-32-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
15594 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
15595 // CHECK-32-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
15596 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
15597 // CHECK-32-NEXT: ret void
15598 // CHECK-32: worker.exit:
15599 // CHECK-32-NEXT: ret void
15602 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155_omp_outlined
15603 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
15604 // CHECK-32-NEXT: entry:
15605 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
15606 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
15607 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15608 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
15609 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15610 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15611 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15612 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15613 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
15614 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
15615 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
15616 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
15617 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
15618 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
15619 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
15620 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
15621 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
15622 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
15623 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
15624 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
15625 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15626 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
15627 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15628 // CHECK-32: cond.true:
15629 // CHECK-32-NEXT: br label [[COND_END:%.*]]
15630 // CHECK-32: cond.false:
15631 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15632 // CHECK-32-NEXT: br label [[COND_END]]
15633 // CHECK-32: cond.end:
15634 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
15635 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
15636 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
15637 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
15638 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15639 // CHECK-32: omp.inner.for.cond:
15640 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
15641 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
15642 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15643 // CHECK-32: omp.inner.for.body:
15644 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
15645 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15646 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
15647 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
15648 // CHECK-32-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
15649 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
15650 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
15651 // CHECK-32-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
15652 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
15653 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15654 // CHECK-32: omp.inner.for.inc:
15655 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
15656 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
15657 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
15658 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
15659 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
15660 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
15661 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
15662 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
15663 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15664 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
15665 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
15666 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
15667 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15668 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
15669 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
15670 // CHECK-32: cond.true5:
15671 // CHECK-32-NEXT: br label [[COND_END7:%.*]]
15672 // CHECK-32: cond.false6:
15673 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
15674 // CHECK-32-NEXT: br label [[COND_END7]]
15675 // CHECK-32: cond.end7:
15676 // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
15677 // CHECK-32-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
15678 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
15679 // CHECK-32-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
15680 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
15681 // CHECK-32: omp.inner.for.end:
15682 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15683 // CHECK-32: omp.loop.exit:
15684 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
15685 // CHECK-32-NEXT: ret void
15688 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155_omp_outlined_omp_outlined
15689 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
15690 // CHECK-32-NEXT: entry:
15691 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
15692 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
15693 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
15694 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
15695 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15696 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
15697 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15698 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15699 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15700 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15701 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
15702 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
15703 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
15704 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
15705 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
15706 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
15707 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
15708 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
15709 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
15710 // CHECK-32-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
15711 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
15712 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
15713 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
15714 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
15715 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
15716 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
15717 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
15718 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
15719 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
15720 // CHECK-32: omp.dispatch.cond:
15721 // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
15722 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
15723 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
15724 // CHECK-32: omp.dispatch.body:
15725 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
15726 // CHECK-32-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
15727 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15728 // CHECK-32: omp.inner.for.cond:
15729 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP346:![0-9]+]]
15730 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP346]]
15731 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
15732 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15733 // CHECK-32: omp.inner.for.body:
15734 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP346]]
15735 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
15736 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15737 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP346]]
15738 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15739 // CHECK-32: omp.body.continue:
15740 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15741 // CHECK-32: omp.inner.for.inc:
15742 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP346]]
15743 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
15744 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP346]]
15745 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP347:![0-9]+]]
15746 // CHECK-32: omp.inner.for.end:
15747 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
15748 // CHECK-32: omp.dispatch.inc:
15749 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
15750 // CHECK-32: omp.dispatch.end:
15751 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
15752 // CHECK-32-NEXT: ret void
15755 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l160
15756 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR8:[0-9]+]] {
15757 // CHECK-32-NEXT: entry:
15758 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
15759 // CHECK-32-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
15760 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
15761 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
15762 // CHECK-32-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
15763 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l160_kernel_environment, ptr [[DYN_PTR]])
15764 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
15765 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
15766 // CHECK-32: user_code.entry:
15767 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
15768 // CHECK-32-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
15769 // CHECK-32-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
15770 // CHECK-32-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i32
15771 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP3]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l160_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
15772 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
15773 // CHECK-32-NEXT: ret void
15774 // CHECK-32: worker.exit:
15775 // CHECK-32-NEXT: ret void
15778 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l160_omp_outlined
15779 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
15780 // CHECK-32-NEXT: entry:
15781 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
15782 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
15783 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15784 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
15785 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15786 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15787 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15788 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15789 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
15790 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
15791 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
15792 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
15793 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
15794 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
15795 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
15796 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
15797 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
15798 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
15799 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
15800 // CHECK-32: omp.dispatch.cond:
15801 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
15802 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
15803 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15804 // CHECK-32: cond.true:
15805 // CHECK-32-NEXT: br label [[COND_END:%.*]]
15806 // CHECK-32: cond.false:
15807 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
15808 // CHECK-32-NEXT: br label [[COND_END]]
15809 // CHECK-32: cond.end:
15810 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
15811 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
15812 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
15813 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
15814 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
15815 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
15816 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
15817 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
15818 // CHECK-32: omp.dispatch.body:
15819 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15820 // CHECK-32: omp.inner.for.cond:
15821 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
15822 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
15823 // CHECK-32-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
15824 // CHECK-32-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15825 // CHECK-32: omp.inner.for.body:
15826 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
15827 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
15828 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15829 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4
15830 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15831 // CHECK-32: omp.body.continue:
15832 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15833 // CHECK-32: omp.inner.for.inc:
15834 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
15835 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
15836 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
15837 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
15838 // CHECK-32: omp.inner.for.end:
15839 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
15840 // CHECK-32: omp.dispatch.inc:
15841 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
15842 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
15843 // CHECK-32-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
15844 // CHECK-32-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
15845 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
15846 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
15847 // CHECK-32-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
15848 // CHECK-32-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
15849 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
15850 // CHECK-32: omp.dispatch.end:
15851 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
15852 // CHECK-32-NEXT: ret void
15855 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l163
15856 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
15857 // CHECK-32-NEXT: entry:
15858 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
15859 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
15860 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
15861 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l163_kernel_environment, ptr [[DYN_PTR]])
15862 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
15863 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
15864 // CHECK-32: user_code.entry:
15865 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
15866 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l163_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
15867 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
15868 // CHECK-32-NEXT: ret void
15869 // CHECK-32: worker.exit:
15870 // CHECK-32-NEXT: ret void
15873 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l163_omp_outlined
15874 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
15875 // CHECK-32-NEXT: entry:
15876 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
15877 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
15878 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15879 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
15880 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15881 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15882 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15883 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15884 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
15885 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
15886 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
15887 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
15888 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
15889 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
15890 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
15891 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
15892 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
15893 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
15894 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
15895 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
15896 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15897 // CHECK-32: cond.true:
15898 // CHECK-32-NEXT: br label [[COND_END:%.*]]
15899 // CHECK-32: cond.false:
15900 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
15901 // CHECK-32-NEXT: br label [[COND_END]]
15902 // CHECK-32: cond.end:
15903 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
15904 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
15905 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
15906 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
15907 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15908 // CHECK-32: omp.inner.for.cond:
15909 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
15910 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
15911 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
15912 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15913 // CHECK-32: omp.inner.for.body:
15914 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
15915 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
15916 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15917 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4
15918 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15919 // CHECK-32: omp.body.continue:
15920 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15921 // CHECK-32: omp.inner.for.inc:
15922 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
15923 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
15924 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
15925 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
15926 // CHECK-32: omp.inner.for.end:
15927 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15928 // CHECK-32: omp.loop.exit:
15929 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
15930 // CHECK-32-NEXT: ret void
15933 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l166
15934 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
15935 // CHECK-32-NEXT: entry:
15936 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
15937 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
15938 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
15939 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l166_kernel_environment, ptr [[DYN_PTR]])
15940 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
15941 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
15942 // CHECK-32: user_code.entry:
15943 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
15944 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l166_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
15945 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
15946 // CHECK-32-NEXT: ret void
15947 // CHECK-32: worker.exit:
15948 // CHECK-32-NEXT: ret void
15951 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l166_omp_outlined
15952 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
15953 // CHECK-32-NEXT: entry:
15954 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
15955 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
15956 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15957 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
15958 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15959 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15960 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15961 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15962 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
15963 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
15964 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
15965 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
15966 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
15967 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
15968 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
15969 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
15970 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
15971 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
15972 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
15973 // CHECK-32: omp.dispatch.cond:
15974 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
15975 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
15976 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15977 // CHECK-32: cond.true:
15978 // CHECK-32-NEXT: br label [[COND_END:%.*]]
15979 // CHECK-32: cond.false:
15980 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
15981 // CHECK-32-NEXT: br label [[COND_END]]
15982 // CHECK-32: cond.end:
15983 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
15984 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
15985 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
15986 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
15987 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
15988 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
15989 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
15990 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
15991 // CHECK-32: omp.dispatch.body:
15992 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15993 // CHECK-32: omp.inner.for.cond:
15994 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
15995 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
15996 // CHECK-32-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
15997 // CHECK-32-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15998 // CHECK-32: omp.inner.for.body:
15999 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
16000 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
16001 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16002 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4
16003 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16004 // CHECK-32: omp.body.continue:
16005 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16006 // CHECK-32: omp.inner.for.inc:
16007 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
16008 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
16009 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
16010 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
16011 // CHECK-32: omp.inner.for.end:
16012 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
16013 // CHECK-32: omp.dispatch.inc:
16014 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
16015 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
16016 // CHECK-32-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
16017 // CHECK-32-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
16018 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
16019 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
16020 // CHECK-32-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
16021 // CHECK-32-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
16022 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
16023 // CHECK-32: omp.dispatch.end:
16024 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
16025 // CHECK-32-NEXT: ret void
16028 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l169
16029 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
16030 // CHECK-32-NEXT: entry:
16031 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
16032 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
16033 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
16034 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l169_kernel_environment, ptr [[DYN_PTR]])
16035 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
16036 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
16037 // CHECK-32: user_code.entry:
16038 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
16039 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l169_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
16040 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
16041 // CHECK-32-NEXT: ret void
16042 // CHECK-32: worker.exit:
16043 // CHECK-32-NEXT: ret void
16046 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l169_omp_outlined
16047 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
16048 // CHECK-32-NEXT: entry:
16049 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
16050 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
16051 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16052 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
16053 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16054 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16055 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16056 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16057 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
16058 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
16059 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
16060 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
16061 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
16062 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
16063 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
16064 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
16065 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
16066 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1)
16067 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
16068 // CHECK-32: omp.dispatch.cond:
16069 // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
16070 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
16071 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16072 // CHECK-32: omp.dispatch.body:
16073 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
16074 // CHECK-32-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
16075 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16076 // CHECK-32: omp.inner.for.cond:
16077 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP349:![0-9]+]]
16078 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP349]]
16079 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
16080 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16081 // CHECK-32: omp.inner.for.body:
16082 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP349]]
16083 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
16084 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16085 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP349]]
16086 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16087 // CHECK-32: omp.body.continue:
16088 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16089 // CHECK-32: omp.inner.for.inc:
16090 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP349]]
16091 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
16092 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP349]]
16093 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP350:![0-9]+]]
16094 // CHECK-32: omp.inner.for.end:
16095 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
16096 // CHECK-32: omp.dispatch.inc:
16097 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
16098 // CHECK-32: omp.dispatch.end:
16099 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
16100 // CHECK-32-NEXT: ret void
16103 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l172
16104 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
16105 // CHECK-32-NEXT: entry:
16106 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
16107 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
16108 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
16109 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l172_kernel_environment, ptr [[DYN_PTR]])
16110 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
16111 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
16112 // CHECK-32: user_code.entry:
16113 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
16114 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l172_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
16115 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
16116 // CHECK-32-NEXT: ret void
16117 // CHECK-32: worker.exit:
16118 // CHECK-32-NEXT: ret void
16121 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l172_omp_outlined
16122 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
16123 // CHECK-32-NEXT: entry:
16124 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
16125 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
16126 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16127 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
16128 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16129 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16130 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16131 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16132 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
16133 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
16134 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
16135 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
16136 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
16137 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
16138 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
16139 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
16140 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
16141 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1)
16142 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
16143 // CHECK-32: omp.dispatch.cond:
16144 // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
16145 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
16146 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16147 // CHECK-32: omp.dispatch.body:
16148 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
16149 // CHECK-32-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
16150 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16151 // CHECK-32: omp.inner.for.cond:
16152 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP352:![0-9]+]]
16153 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP352]]
16154 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
16155 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16156 // CHECK-32: omp.inner.for.body:
16157 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP352]]
16158 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
16159 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16160 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP352]]
16161 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16162 // CHECK-32: omp.body.continue:
16163 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16164 // CHECK-32: omp.inner.for.inc:
16165 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP352]]
16166 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
16167 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP352]]
16168 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP353:![0-9]+]]
16169 // CHECK-32: omp.inner.for.end:
16170 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
16171 // CHECK-32: omp.dispatch.inc:
16172 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
16173 // CHECK-32: omp.dispatch.end:
16174 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
16175 // CHECK-32-NEXT: ret void
16178 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l175
16179 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
16180 // CHECK-32-NEXT: entry:
16181 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
16182 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
16183 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
16184 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l175_kernel_environment, ptr [[DYN_PTR]])
16185 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
16186 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
16187 // CHECK-32: user_code.entry:
16188 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
16189 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l175_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
16190 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
16191 // CHECK-32-NEXT: ret void
16192 // CHECK-32: worker.exit:
16193 // CHECK-32-NEXT: ret void
16196 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l175_omp_outlined
16197 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
16198 // CHECK-32-NEXT: entry:
16199 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
16200 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
16201 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16202 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
16203 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16204 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16205 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16206 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16207 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
16208 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
16209 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
16210 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
16211 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
16212 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
16213 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
16214 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
16215 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
16216 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1)
16217 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
16218 // CHECK-32: omp.dispatch.cond:
16219 // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
16220 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
16221 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16222 // CHECK-32: omp.dispatch.body:
16223 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
16224 // CHECK-32-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
16225 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16226 // CHECK-32: omp.inner.for.cond:
16227 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP355:![0-9]+]]
16228 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP355]]
16229 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
16230 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16231 // CHECK-32: omp.inner.for.body:
16232 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP355]]
16233 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
16234 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16235 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP355]]
16236 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16237 // CHECK-32: omp.body.continue:
16238 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16239 // CHECK-32: omp.inner.for.inc:
16240 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP355]]
16241 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
16242 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP355]]
16243 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP356:![0-9]+]]
16244 // CHECK-32: omp.inner.for.end:
16245 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
16246 // CHECK-32: omp.dispatch.inc:
16247 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
16248 // CHECK-32: omp.dispatch.end:
16249 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
16250 // CHECK-32-NEXT: ret void
16253 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l178
16254 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
16255 // CHECK-32-NEXT: entry:
16256 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
16257 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
16258 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
16259 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l178_kernel_environment, ptr [[DYN_PTR]])
16260 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
16261 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
16262 // CHECK-32: user_code.entry:
16263 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
16264 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l178_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
16265 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
16266 // CHECK-32-NEXT: ret void
16267 // CHECK-32: worker.exit:
16268 // CHECK-32-NEXT: ret void
16271 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l178_omp_outlined
16272 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
16273 // CHECK-32-NEXT: entry:
16274 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
16275 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
16276 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16277 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
16278 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16279 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16280 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16281 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16282 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
16283 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
16284 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
16285 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
16286 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
16287 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
16288 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
16289 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
16290 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
16291 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1)
16292 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
16293 // CHECK-32: omp.dispatch.cond:
16294 // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
16295 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
16296 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16297 // CHECK-32: omp.dispatch.body:
16298 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
16299 // CHECK-32-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
16300 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16301 // CHECK-32: omp.inner.for.cond:
16302 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP358:![0-9]+]]
16303 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP358]]
16304 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
16305 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16306 // CHECK-32: omp.inner.for.body:
16307 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP358]]
16308 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
16309 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16310 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP358]]
16311 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16312 // CHECK-32: omp.body.continue:
16313 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16314 // CHECK-32: omp.inner.for.inc:
16315 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP358]]
16316 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
16317 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP358]]
16318 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP359:![0-9]+]]
16319 // CHECK-32: omp.inner.for.end:
16320 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
16321 // CHECK-32: omp.dispatch.inc:
16322 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
16323 // CHECK-32: omp.dispatch.end:
16324 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
16325 // CHECK-32-NEXT: ret void
16328 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l181
16329 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR8]] {
16330 // CHECK-32-NEXT: entry:
16331 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
16332 // CHECK-32-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
16333 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
16334 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
16335 // CHECK-32-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
16336 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l181_kernel_environment, ptr [[DYN_PTR]])
16337 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
16338 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
16339 // CHECK-32: user_code.entry:
16340 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
16341 // CHECK-32-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
16342 // CHECK-32-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
16343 // CHECK-32-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i32
16344 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP3]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l181_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
16345 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
16346 // CHECK-32-NEXT: ret void
16347 // CHECK-32: worker.exit:
16348 // CHECK-32-NEXT: ret void
16351 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l181_omp_outlined
16352 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
16353 // CHECK-32-NEXT: entry:
16354 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
16355 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
16356 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16357 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
16358 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16359 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16360 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16361 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16362 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
16363 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
16364 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
16365 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
16366 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
16367 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
16368 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
16369 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
16370 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
16371 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
16372 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
16373 // CHECK-32: omp.dispatch.cond:
16374 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
16375 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
16376 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16377 // CHECK-32: cond.true:
16378 // CHECK-32-NEXT: br label [[COND_END:%.*]]
16379 // CHECK-32: cond.false:
16380 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
16381 // CHECK-32-NEXT: br label [[COND_END]]
16382 // CHECK-32: cond.end:
16383 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
16384 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
16385 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
16386 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
16387 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
16388 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
16389 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
16390 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16391 // CHECK-32: omp.dispatch.body:
16392 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16393 // CHECK-32: omp.inner.for.cond:
16394 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP361:![0-9]+]]
16395 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP361]]
16396 // CHECK-32-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
16397 // CHECK-32-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16398 // CHECK-32: omp.inner.for.body:
16399 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP361]]
16400 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
16401 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16402 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP361]]
16403 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16404 // CHECK-32: omp.body.continue:
16405 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16406 // CHECK-32: omp.inner.for.inc:
16407 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP361]]
16408 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
16409 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP361]]
16410 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP362:![0-9]+]]
16411 // CHECK-32: omp.inner.for.end:
16412 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
16413 // CHECK-32: omp.dispatch.inc:
16414 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
16415 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
16416 // CHECK-32-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
16417 // CHECK-32-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
16418 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
16419 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
16420 // CHECK-32-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
16421 // CHECK-32-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
16422 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
16423 // CHECK-32: omp.dispatch.end:
16424 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
16425 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
16426 // CHECK-32-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
16427 // CHECK-32-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
16428 // CHECK-32: .omp.final.then:
16429 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
16430 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
16431 // CHECK-32: .omp.final.done:
16432 // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4:[0-9]+]], i32 [[TMP1]])
16433 // CHECK-32-NEXT: ret void
16436 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l185
16437 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
16438 // CHECK-32-NEXT: entry:
16439 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
16440 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
16441 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
16442 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l185_kernel_environment, ptr [[DYN_PTR]])
16443 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
16444 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
16445 // CHECK-32: user_code.entry:
16446 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
16447 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l185_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
16448 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
16449 // CHECK-32-NEXT: ret void
16450 // CHECK-32: worker.exit:
16451 // CHECK-32-NEXT: ret void
16454 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l185_omp_outlined
16455 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
16456 // CHECK-32-NEXT: entry:
16457 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
16458 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
16459 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16460 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
16461 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16462 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16463 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16464 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16465 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
16466 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
16467 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
16468 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
16469 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
16470 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
16471 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
16472 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
16473 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
16474 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
16475 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
16476 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
16477 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16478 // CHECK-32: cond.true:
16479 // CHECK-32-NEXT: br label [[COND_END:%.*]]
16480 // CHECK-32: cond.false:
16481 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
16482 // CHECK-32-NEXT: br label [[COND_END]]
16483 // CHECK-32: cond.end:
16484 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
16485 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
16486 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
16487 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
16488 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16489 // CHECK-32: omp.inner.for.cond:
16490 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP364:![0-9]+]]
16491 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP364]]
16492 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
16493 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16494 // CHECK-32: omp.inner.for.body:
16495 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP364]]
16496 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
16497 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16498 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP364]]
16499 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16500 // CHECK-32: omp.body.continue:
16501 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16502 // CHECK-32: omp.inner.for.inc:
16503 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP364]]
16504 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
16505 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP364]]
16506 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP365:![0-9]+]]
16507 // CHECK-32: omp.inner.for.end:
16508 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
16509 // CHECK-32: omp.loop.exit:
16510 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
16511 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
16512 // CHECK-32-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
16513 // CHECK-32-NEXT: br i1 [[TMP10]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
16514 // CHECK-32: .omp.final.then:
16515 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
16516 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
16517 // CHECK-32: .omp.final.done:
16518 // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
16519 // CHECK-32-NEXT: ret void
16522 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l189
16523 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
16524 // CHECK-32-NEXT: entry:
16525 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
16526 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
16527 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
16528 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l189_kernel_environment, ptr [[DYN_PTR]])
16529 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
16530 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
16531 // CHECK-32: user_code.entry:
16532 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
16533 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l189_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
16534 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
16535 // CHECK-32-NEXT: ret void
16536 // CHECK-32: worker.exit:
16537 // CHECK-32-NEXT: ret void
16540 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l189_omp_outlined
16541 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
16542 // CHECK-32-NEXT: entry:
16543 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
16544 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
16545 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16546 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
16547 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16548 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16549 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16550 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16551 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
16552 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
16553 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
16554 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
16555 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
16556 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
16557 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
16558 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
16559 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
16560 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
16561 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
16562 // CHECK-32: omp.dispatch.cond:
16563 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
16564 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
16565 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16566 // CHECK-32: cond.true:
16567 // CHECK-32-NEXT: br label [[COND_END:%.*]]
16568 // CHECK-32: cond.false:
16569 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
16570 // CHECK-32-NEXT: br label [[COND_END]]
16571 // CHECK-32: cond.end:
16572 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
16573 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
16574 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
16575 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
16576 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
16577 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
16578 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
16579 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16580 // CHECK-32: omp.dispatch.body:
16581 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16582 // CHECK-32: omp.inner.for.cond:
16583 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP367:![0-9]+]]
16584 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP367]]
16585 // CHECK-32-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
16586 // CHECK-32-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16587 // CHECK-32: omp.inner.for.body:
16588 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP367]]
16589 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
16590 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16591 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP367]]
16592 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16593 // CHECK-32: omp.body.continue:
16594 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16595 // CHECK-32: omp.inner.for.inc:
16596 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP367]]
16597 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
16598 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP367]]
16599 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP368:![0-9]+]]
16600 // CHECK-32: omp.inner.for.end:
16601 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
16602 // CHECK-32: omp.dispatch.inc:
16603 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
16604 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
16605 // CHECK-32-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
16606 // CHECK-32-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
16607 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
16608 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
16609 // CHECK-32-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
16610 // CHECK-32-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
16611 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
16612 // CHECK-32: omp.dispatch.end:
16613 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
16614 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
16615 // CHECK-32-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
16616 // CHECK-32-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
16617 // CHECK-32: .omp.final.then:
16618 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
16619 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
16620 // CHECK-32: .omp.final.done:
16621 // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
16622 // CHECK-32-NEXT: ret void
16625 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l193
16626 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
16627 // CHECK-32-NEXT: entry:
16628 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
16629 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
16630 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
16631 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l193_kernel_environment, ptr [[DYN_PTR]])
16632 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
16633 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
16634 // CHECK-32: user_code.entry:
16635 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
16636 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l193_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
16637 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
16638 // CHECK-32-NEXT: ret void
16639 // CHECK-32: worker.exit:
16640 // CHECK-32-NEXT: ret void
16643 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l193_omp_outlined
16644 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
16645 // CHECK-32-NEXT: entry:
16646 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
16647 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
16648 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16649 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
16650 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16651 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16652 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16653 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16654 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
16655 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
16656 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
16657 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
16658 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
16659 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
16660 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
16661 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
16662 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
16663 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1)
16664 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
16665 // CHECK-32: omp.dispatch.cond:
16666 // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
16667 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
16668 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16669 // CHECK-32: omp.dispatch.body:
16670 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
16671 // CHECK-32-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
16672 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16673 // CHECK-32: omp.inner.for.cond:
16674 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP370:![0-9]+]]
16675 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP370]]
16676 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
16677 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16678 // CHECK-32: omp.inner.for.body:
16679 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP370]]
16680 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
16681 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16682 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP370]]
16683 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16684 // CHECK-32: omp.body.continue:
16685 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16686 // CHECK-32: omp.inner.for.inc:
16687 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP370]]
16688 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
16689 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP370]]
16690 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP371:![0-9]+]]
16691 // CHECK-32: omp.inner.for.end:
16692 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
16693 // CHECK-32: omp.dispatch.inc:
16694 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
16695 // CHECK-32: omp.dispatch.end:
16696 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
16697 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
16698 // CHECK-32-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
16699 // CHECK-32-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
16700 // CHECK-32: .omp.final.then:
16701 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
16702 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
16703 // CHECK-32: .omp.final.done:
16704 // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
16705 // CHECK-32-NEXT: ret void
16708 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l197
16709 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
16710 // CHECK-32-NEXT: entry:
16711 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
16712 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
16713 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
16714 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l197_kernel_environment, ptr [[DYN_PTR]])
16715 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
16716 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
16717 // CHECK-32: user_code.entry:
16718 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
16719 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l197_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
16720 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
16721 // CHECK-32-NEXT: ret void
16722 // CHECK-32: worker.exit:
16723 // CHECK-32-NEXT: ret void
16726 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l197_omp_outlined
16727 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
16728 // CHECK-32-NEXT: entry:
16729 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
16730 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
16731 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16732 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
16733 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16734 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16735 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16736 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16737 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
16738 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
16739 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
16740 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
16741 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
16742 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
16743 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
16744 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
16745 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
16746 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1)
16747 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
16748 // CHECK-32: omp.dispatch.cond:
16749 // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
16750 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
16751 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16752 // CHECK-32: omp.dispatch.body:
16753 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
16754 // CHECK-32-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
16755 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16756 // CHECK-32: omp.inner.for.cond:
16757 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP373:![0-9]+]]
16758 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP373]]
16759 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
16760 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16761 // CHECK-32: omp.inner.for.body:
16762 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP373]]
16763 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
16764 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16765 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP373]]
16766 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16767 // CHECK-32: omp.body.continue:
16768 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16769 // CHECK-32: omp.inner.for.inc:
16770 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP373]]
16771 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
16772 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP373]]
16773 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP374:![0-9]+]]
16774 // CHECK-32: omp.inner.for.end:
16775 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
16776 // CHECK-32: omp.dispatch.inc:
16777 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
16778 // CHECK-32: omp.dispatch.end:
16779 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
16780 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
16781 // CHECK-32-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
16782 // CHECK-32-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
16783 // CHECK-32: .omp.final.then:
16784 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
16785 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
16786 // CHECK-32: .omp.final.done:
16787 // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
16788 // CHECK-32-NEXT: ret void
16791 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l201
16792 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
16793 // CHECK-32-NEXT: entry:
16794 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
16795 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
16796 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
16797 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l201_kernel_environment, ptr [[DYN_PTR]])
16798 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
16799 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
16800 // CHECK-32: user_code.entry:
16801 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
16802 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l201_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
16803 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
16804 // CHECK-32-NEXT: ret void
16805 // CHECK-32: worker.exit:
16806 // CHECK-32-NEXT: ret void
16809 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l201_omp_outlined
16810 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
16811 // CHECK-32-NEXT: entry:
16812 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
16813 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
16814 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16815 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
16816 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16817 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16818 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16819 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16820 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
16821 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
16822 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
16823 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
16824 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
16825 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
16826 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
16827 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
16828 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
16829 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1)
16830 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
16831 // CHECK-32: omp.dispatch.cond:
16832 // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
16833 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
16834 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16835 // CHECK-32: omp.dispatch.body:
16836 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
16837 // CHECK-32-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
16838 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16839 // CHECK-32: omp.inner.for.cond:
16840 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP376:![0-9]+]]
16841 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP376]]
16842 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
16843 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16844 // CHECK-32: omp.inner.for.body:
16845 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP376]]
16846 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
16847 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16848 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP376]]
16849 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16850 // CHECK-32: omp.body.continue:
16851 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16852 // CHECK-32: omp.inner.for.inc:
16853 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP376]]
16854 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
16855 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP376]]
16856 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP377:![0-9]+]]
16857 // CHECK-32: omp.inner.for.end:
16858 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
16859 // CHECK-32: omp.dispatch.inc:
16860 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
16861 // CHECK-32: omp.dispatch.end:
16862 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
16863 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
16864 // CHECK-32-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
16865 // CHECK-32-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
16866 // CHECK-32: .omp.final.then:
16867 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
16868 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
16869 // CHECK-32: .omp.final.done:
16870 // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
16871 // CHECK-32-NEXT: ret void
16874 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l205
16875 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
16876 // CHECK-32-NEXT: entry:
16877 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
16878 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
16879 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
16880 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l205_kernel_environment, ptr [[DYN_PTR]])
16881 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
16882 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
16883 // CHECK-32: user_code.entry:
16884 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
16885 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l205_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
16886 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
16887 // CHECK-32-NEXT: ret void
16888 // CHECK-32: worker.exit:
16889 // CHECK-32-NEXT: ret void
16892 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l205_omp_outlined
16893 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
16894 // CHECK-32-NEXT: entry:
16895 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
16896 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
16897 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16898 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
16899 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16900 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16901 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16902 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16903 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
16904 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
16905 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
16906 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
16907 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
16908 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
16909 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
16910 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
16911 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
16912 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1)
16913 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
16914 // CHECK-32: omp.dispatch.cond:
16915 // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
16916 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
16917 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16918 // CHECK-32: omp.dispatch.body:
16919 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
16920 // CHECK-32-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
16921 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16922 // CHECK-32: omp.inner.for.cond:
16923 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP379:![0-9]+]]
16924 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP379]]
16925 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
16926 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16927 // CHECK-32: omp.inner.for.body:
16928 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP379]]
16929 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
16930 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16931 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP379]]
16932 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16933 // CHECK-32: omp.body.continue:
16934 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16935 // CHECK-32: omp.inner.for.inc:
16936 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP379]]
16937 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
16938 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP379]]
16939 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP380:![0-9]+]]
16940 // CHECK-32: omp.inner.for.end:
16941 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
16942 // CHECK-32: omp.dispatch.inc:
16943 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
16944 // CHECK-32: omp.dispatch.end:
16945 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
16946 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
16947 // CHECK-32-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
16948 // CHECK-32-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
16949 // CHECK-32: .omp.final.then:
16950 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
16951 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
16952 // CHECK-32: .omp.final.done:
16953 // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
16954 // CHECK-32-NEXT: ret void
16957 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l209
16958 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10:[0-9]+]] {
16959 // CHECK-32-NEXT: entry:
16960 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
16961 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
16962 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
16963 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l209_kernel_environment, ptr [[DYN_PTR]])
16964 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
16965 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
16966 // CHECK-32: user_code.entry:
16967 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
16968 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l209_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
16969 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
16970 // CHECK-32-NEXT: ret void
16971 // CHECK-32: worker.exit:
16972 // CHECK-32-NEXT: ret void
16975 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l209_omp_outlined
16976 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
16977 // CHECK-32-NEXT: entry:
16978 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
16979 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
16980 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16981 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
16982 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16983 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16984 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16985 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16986 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
16987 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
16988 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
16989 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
16990 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
16991 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
16992 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
16993 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
16994 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
16995 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 65, i32 0, i32 9, i32 1, i32 1)
16996 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
16997 // CHECK-32: omp.dispatch.cond:
16998 // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
16999 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
17000 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
17001 // CHECK-32: omp.dispatch.body:
17002 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
17003 // CHECK-32-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
17004 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17005 // CHECK-32: omp.inner.for.cond:
17006 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP382:![0-9]+]]
17007 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP382]]
17008 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
17009 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17010 // CHECK-32: omp.inner.for.body:
17011 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP382]]
17012 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
17013 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17014 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP382]]
17015 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17016 // CHECK-32: omp.body.continue:
17017 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17018 // CHECK-32: omp.inner.for.inc:
17019 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP382]]
17020 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
17021 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP382]]
17022 // CHECK-32-NEXT: call void @__kmpc_dispatch_fini_4(ptr @[[GLOB1]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP382]]
17023 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP383:![0-9]+]]
17024 // CHECK-32: omp.inner.for.end:
17025 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
17026 // CHECK-32: omp.dispatch.inc:
17027 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
17028 // CHECK-32: omp.dispatch.end:
17029 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
17030 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
17031 // CHECK-32-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
17032 // CHECK-32-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
17033 // CHECK-32: .omp.final.then:
17034 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
17035 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
17036 // CHECK-32: .omp.final.done:
17037 // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
17038 // CHECK-32-NEXT: ret void
17041 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l214
17042 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10]] {
17043 // CHECK-32-NEXT: entry:
17044 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
17045 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
17046 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
17047 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l214_kernel_environment, ptr [[DYN_PTR]])
17048 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
17049 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
17050 // CHECK-32: user_code.entry:
17051 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
17052 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l214_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
17053 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
17054 // CHECK-32-NEXT: ret void
17055 // CHECK-32: worker.exit:
17056 // CHECK-32-NEXT: ret void
17059 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l214_omp_outlined
17060 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
17061 // CHECK-32-NEXT: entry:
17062 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
17063 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
17064 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17065 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
17066 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17067 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17068 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17069 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17070 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
17071 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
17072 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
17073 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
17074 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
17075 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
17076 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
17077 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
17078 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
17079 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
17080 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
17081 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
17082 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17083 // CHECK-32: cond.true:
17084 // CHECK-32-NEXT: br label [[COND_END:%.*]]
17085 // CHECK-32: cond.false:
17086 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
17087 // CHECK-32-NEXT: br label [[COND_END]]
17088 // CHECK-32: cond.end:
17089 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
17090 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
17091 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
17092 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
17093 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17094 // CHECK-32: omp.inner.for.cond:
17095 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP385:![0-9]+]]
17096 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP385]]
17097 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
17098 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17099 // CHECK-32: omp.inner.for.body:
17100 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP385]]
17101 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
17102 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17103 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP385]]
17104 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17105 // CHECK-32: omp.body.continue:
17106 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17107 // CHECK-32: omp.inner.for.inc:
17108 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP385]]
17109 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
17110 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP385]]
17111 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP386:![0-9]+]]
17112 // CHECK-32: omp.inner.for.end:
17113 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
17114 // CHECK-32: omp.loop.exit:
17115 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
17116 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
17117 // CHECK-32-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
17118 // CHECK-32-NEXT: br i1 [[TMP10]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
17119 // CHECK-32: .omp.final.then:
17120 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
17121 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
17122 // CHECK-32: .omp.final.done:
17123 // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
17124 // CHECK-32-NEXT: ret void
17127 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l219
17128 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10]] {
17129 // CHECK-32-NEXT: entry:
17130 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
17131 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
17132 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
17133 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l219_kernel_environment, ptr [[DYN_PTR]])
17134 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
17135 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
17136 // CHECK-32: user_code.entry:
17137 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
17138 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l219_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
17139 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
17140 // CHECK-32-NEXT: ret void
17141 // CHECK-32: worker.exit:
17142 // CHECK-32-NEXT: ret void
17145 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l219_omp_outlined
17146 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
17147 // CHECK-32-NEXT: entry:
17148 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
17149 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
17150 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17151 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
17152 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17153 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17154 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17155 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17156 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
17157 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
17158 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
17159 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
17160 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
17161 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
17162 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
17163 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
17164 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
17165 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
17166 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
17167 // CHECK-32: omp.dispatch.cond:
17168 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
17169 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
17170 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17171 // CHECK-32: cond.true:
17172 // CHECK-32-NEXT: br label [[COND_END:%.*]]
17173 // CHECK-32: cond.false:
17174 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
17175 // CHECK-32-NEXT: br label [[COND_END]]
17176 // CHECK-32: cond.end:
17177 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
17178 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
17179 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
17180 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
17181 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
17182 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
17183 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
17184 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
17185 // CHECK-32: omp.dispatch.body:
17186 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17187 // CHECK-32: omp.inner.for.cond:
17188 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP388:![0-9]+]]
17189 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP388]]
17190 // CHECK-32-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
17191 // CHECK-32-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17192 // CHECK-32: omp.inner.for.body:
17193 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP388]]
17194 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
17195 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17196 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP388]]
17197 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17198 // CHECK-32: omp.body.continue:
17199 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17200 // CHECK-32: omp.inner.for.inc:
17201 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP388]]
17202 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
17203 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP388]]
17204 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP389:![0-9]+]]
17205 // CHECK-32: omp.inner.for.end:
17206 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
17207 // CHECK-32: omp.dispatch.inc:
17208 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
17209 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
17210 // CHECK-32-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
17211 // CHECK-32-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
17212 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
17213 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
17214 // CHECK-32-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
17215 // CHECK-32-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
17216 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
17217 // CHECK-32: omp.dispatch.end:
17218 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
17219 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
17220 // CHECK-32-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
17221 // CHECK-32-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
17222 // CHECK-32: .omp.final.then:
17223 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
17224 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
17225 // CHECK-32: .omp.final.done:
17226 // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
17227 // CHECK-32-NEXT: ret void
17230 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l224
17231 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10]] {
17232 // CHECK-32-NEXT: entry:
17233 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
17234 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
17235 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
17236 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l224_kernel_environment, ptr [[DYN_PTR]])
17237 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
17238 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
17239 // CHECK-32: user_code.entry:
17240 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
17241 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l224_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
17242 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
17243 // CHECK-32-NEXT: ret void
17244 // CHECK-32: worker.exit:
17245 // CHECK-32-NEXT: ret void
17248 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l224_omp_outlined
17249 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
17250 // CHECK-32-NEXT: entry:
17251 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
17252 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
17253 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17254 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
17255 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17256 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17257 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17258 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17259 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
17260 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
17261 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
17262 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
17263 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
17264 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
17265 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
17266 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
17267 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
17268 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1)
17269 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
17270 // CHECK-32: omp.dispatch.cond:
17271 // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
17272 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
17273 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
17274 // CHECK-32: omp.dispatch.body:
17275 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
17276 // CHECK-32-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
17277 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17278 // CHECK-32: omp.inner.for.cond:
17279 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP391:![0-9]+]]
17280 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP391]]
17281 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
17282 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17283 // CHECK-32: omp.inner.for.body:
17284 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP391]]
17285 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
17286 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17287 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP391]]
17288 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17289 // CHECK-32: omp.body.continue:
17290 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17291 // CHECK-32: omp.inner.for.inc:
17292 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP391]]
17293 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
17294 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP391]]
17295 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP392:![0-9]+]]
17296 // CHECK-32: omp.inner.for.end:
17297 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
17298 // CHECK-32: omp.dispatch.inc:
17299 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
17300 // CHECK-32: omp.dispatch.end:
17301 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
17302 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
17303 // CHECK-32-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
17304 // CHECK-32-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
17305 // CHECK-32: .omp.final.then:
17306 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
17307 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
17308 // CHECK-32: .omp.final.done:
17309 // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
17310 // CHECK-32-NEXT: ret void
17313 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l229
17314 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10]] {
17315 // CHECK-32-NEXT: entry:
17316 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
17317 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
17318 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
17319 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l229_kernel_environment, ptr [[DYN_PTR]])
17320 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
17321 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
17322 // CHECK-32: user_code.entry:
17323 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
17324 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l229_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
17325 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
17326 // CHECK-32-NEXT: ret void
17327 // CHECK-32: worker.exit:
17328 // CHECK-32-NEXT: ret void
17331 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l229_omp_outlined
17332 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
17333 // CHECK-32-NEXT: entry:
17334 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
17335 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
17336 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17337 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
17338 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17339 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17340 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17341 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17342 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
17343 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
17344 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
17345 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
17346 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
17347 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
17348 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
17349 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
17350 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
17351 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1)
17352 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
17353 // CHECK-32: omp.dispatch.cond:
17354 // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
17355 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
17356 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
17357 // CHECK-32: omp.dispatch.body:
17358 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
17359 // CHECK-32-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
17360 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17361 // CHECK-32: omp.inner.for.cond:
17362 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP394:![0-9]+]]
17363 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP394]]
17364 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
17365 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17366 // CHECK-32: omp.inner.for.body:
17367 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP394]]
17368 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
17369 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17370 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP394]]
17371 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17372 // CHECK-32: omp.body.continue:
17373 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17374 // CHECK-32: omp.inner.for.inc:
17375 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP394]]
17376 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
17377 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP394]]
17378 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP395:![0-9]+]]
17379 // CHECK-32: omp.inner.for.end:
17380 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
17381 // CHECK-32: omp.dispatch.inc:
17382 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
17383 // CHECK-32: omp.dispatch.end:
17384 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
17385 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
17386 // CHECK-32-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
17387 // CHECK-32-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
17388 // CHECK-32: .omp.final.then:
17389 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
17390 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
17391 // CHECK-32: .omp.final.done:
17392 // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
17393 // CHECK-32-NEXT: ret void
17396 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l234
17397 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10]] {
17398 // CHECK-32-NEXT: entry:
17399 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
17400 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
17401 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
17402 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l234_kernel_environment, ptr [[DYN_PTR]])
17403 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
17404 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
17405 // CHECK-32: user_code.entry:
17406 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
17407 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l234_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
17408 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
17409 // CHECK-32-NEXT: ret void
17410 // CHECK-32: worker.exit:
17411 // CHECK-32-NEXT: ret void
17414 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l234_omp_outlined
17415 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
17416 // CHECK-32-NEXT: entry:
17417 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
17418 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
17419 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17420 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
17421 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17422 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17423 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17424 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17425 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
17426 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
17427 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
17428 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
17429 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
17430 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
17431 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
17432 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
17433 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
17434 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1)
17435 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
17436 // CHECK-32: omp.dispatch.cond:
17437 // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
17438 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
17439 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
17440 // CHECK-32: omp.dispatch.body:
17441 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
17442 // CHECK-32-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
17443 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17444 // CHECK-32: omp.inner.for.cond:
17445 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP397:![0-9]+]]
17446 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP397]]
17447 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
17448 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17449 // CHECK-32: omp.inner.for.body:
17450 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP397]]
17451 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
17452 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17453 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP397]]
17454 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17455 // CHECK-32: omp.body.continue:
17456 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17457 // CHECK-32: omp.inner.for.inc:
17458 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP397]]
17459 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
17460 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP397]]
17461 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP398:![0-9]+]]
17462 // CHECK-32: omp.inner.for.end:
17463 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
17464 // CHECK-32: omp.dispatch.inc:
17465 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
17466 // CHECK-32: omp.dispatch.end:
17467 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
17468 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
17469 // CHECK-32-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
17470 // CHECK-32-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
17471 // CHECK-32: .omp.final.then:
17472 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
17473 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
17474 // CHECK-32: .omp.final.done:
17475 // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
17476 // CHECK-32-NEXT: ret void
17479 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l239
17480 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10]] {
17481 // CHECK-32-NEXT: entry:
17482 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
17483 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
17484 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
17485 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l239_kernel_environment, ptr [[DYN_PTR]])
17486 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
17487 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
17488 // CHECK-32: user_code.entry:
17489 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
17490 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l239_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
17491 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
17492 // CHECK-32-NEXT: ret void
17493 // CHECK-32: worker.exit:
17494 // CHECK-32-NEXT: ret void
17497 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l239_omp_outlined
17498 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
17499 // CHECK-32-NEXT: entry:
17500 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
17501 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
17502 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17503 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
17504 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17505 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17506 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17507 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17508 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
17509 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
17510 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
17511 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
17512 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
17513 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
17514 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
17515 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
17516 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
17517 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1)
17518 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
17519 // CHECK-32: omp.dispatch.cond:
17520 // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
17521 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
17522 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
17523 // CHECK-32: omp.dispatch.body:
17524 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
17525 // CHECK-32-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
17526 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17527 // CHECK-32: omp.inner.for.cond:
17528 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP400:![0-9]+]]
17529 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP400]]
17530 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
17531 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17532 // CHECK-32: omp.inner.for.body:
17533 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP400]]
17534 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
17535 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17536 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP400]]
17537 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17538 // CHECK-32: omp.body.continue:
17539 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17540 // CHECK-32: omp.inner.for.inc:
17541 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP400]]
17542 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
17543 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP400]]
17544 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP401:![0-9]+]]
17545 // CHECK-32: omp.inner.for.end:
17546 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
17547 // CHECK-32: omp.dispatch.inc:
17548 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
17549 // CHECK-32: omp.dispatch.end:
17550 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
17551 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
17552 // CHECK-32-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
17553 // CHECK-32-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
17554 // CHECK-32: .omp.final.then:
17555 // CHECK-32-NEXT: store i32 10, ptr [[I]], align 4
17556 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]]
17557 // CHECK-32: .omp.final.done:
17558 // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
17559 // CHECK-32-NEXT: ret void
17562 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l244
17563 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
17564 // CHECK-32-NEXT: entry:
17565 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
17566 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
17567 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
17568 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l244_kernel_environment, ptr [[DYN_PTR]])
17569 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
17570 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
17571 // CHECK-32: user_code.entry:
17572 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
17573 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l244_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
17574 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
17575 // CHECK-32-NEXT: ret void
17576 // CHECK-32: worker.exit:
17577 // CHECK-32-NEXT: ret void
17580 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l244_omp_outlined
17581 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
17582 // CHECK-32-NEXT: entry:
17583 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
17584 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
17585 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17586 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
17587 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17588 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17589 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17590 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17591 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
17592 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
17593 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
17594 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
17595 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
17596 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
17597 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
17598 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
17599 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
17600 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
17601 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
17602 // CHECK-32: omp.dispatch.cond:
17603 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
17604 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
17605 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17606 // CHECK-32: cond.true:
17607 // CHECK-32-NEXT: br label [[COND_END:%.*]]
17608 // CHECK-32: cond.false:
17609 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
17610 // CHECK-32-NEXT: br label [[COND_END]]
17611 // CHECK-32: cond.end:
17612 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
17613 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
17614 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
17615 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
17616 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
17617 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
17618 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
17619 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
17620 // CHECK-32: omp.dispatch.body:
17621 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17622 // CHECK-32: omp.inner.for.cond:
17623 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
17624 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
17625 // CHECK-32-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
17626 // CHECK-32-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17627 // CHECK-32: omp.inner.for.body:
17628 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
17629 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
17630 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17631 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4
17632 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17633 // CHECK-32: omp.body.continue:
17634 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17635 // CHECK-32: omp.inner.for.inc:
17636 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
17637 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
17638 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
17639 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
17640 // CHECK-32: omp.inner.for.end:
17641 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
17642 // CHECK-32: omp.dispatch.inc:
17643 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
17644 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
17645 // CHECK-32-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
17646 // CHECK-32-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
17647 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
17648 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
17649 // CHECK-32-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
17650 // CHECK-32-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
17651 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
17652 // CHECK-32: omp.dispatch.end:
17653 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
17654 // CHECK-32-NEXT: ret void
17657 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l248
17658 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
17659 // CHECK-32-NEXT: entry:
17660 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
17661 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
17662 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
17663 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l248_kernel_environment, ptr [[DYN_PTR]])
17664 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
17665 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
17666 // CHECK-32: user_code.entry:
17667 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
17668 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l248_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
17669 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
17670 // CHECK-32-NEXT: ret void
17671 // CHECK-32: worker.exit:
17672 // CHECK-32-NEXT: ret void
17675 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l248_omp_outlined
17676 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
17677 // CHECK-32-NEXT: entry:
17678 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
17679 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
17680 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17681 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
17682 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17683 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17684 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17685 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17686 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
17687 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
17688 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
17689 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
17690 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
17691 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
17692 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
17693 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
17694 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
17695 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
17696 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
17697 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
17698 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17699 // CHECK-32: cond.true:
17700 // CHECK-32-NEXT: br label [[COND_END:%.*]]
17701 // CHECK-32: cond.false:
17702 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
17703 // CHECK-32-NEXT: br label [[COND_END]]
17704 // CHECK-32: cond.end:
17705 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
17706 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
17707 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
17708 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
17709 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17710 // CHECK-32: omp.inner.for.cond:
17711 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
17712 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
17713 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
17714 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17715 // CHECK-32: omp.inner.for.body:
17716 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
17717 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
17718 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17719 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4
17720 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17721 // CHECK-32: omp.body.continue:
17722 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17723 // CHECK-32: omp.inner.for.inc:
17724 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
17725 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
17726 // CHECK-32-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
17727 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
17728 // CHECK-32: omp.inner.for.end:
17729 // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
17730 // CHECK-32: omp.loop.exit:
17731 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
17732 // CHECK-32-NEXT: ret void
17735 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l252
17736 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
17737 // CHECK-32-NEXT: entry:
17738 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
17739 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
17740 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
17741 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l252_kernel_environment, ptr [[DYN_PTR]])
17742 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
17743 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
17744 // CHECK-32: user_code.entry:
17745 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
17746 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l252_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
17747 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
17748 // CHECK-32-NEXT: ret void
17749 // CHECK-32: worker.exit:
17750 // CHECK-32-NEXT: ret void
17753 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l252_omp_outlined
17754 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
17755 // CHECK-32-NEXT: entry:
17756 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
17757 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
17758 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17759 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
17760 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17761 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17762 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17763 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17764 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
17765 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
17766 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
17767 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
17768 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
17769 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
17770 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
17771 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
17772 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
17773 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
17774 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
17775 // CHECK-32: omp.dispatch.cond:
17776 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
17777 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
17778 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17779 // CHECK-32: cond.true:
17780 // CHECK-32-NEXT: br label [[COND_END:%.*]]
17781 // CHECK-32: cond.false:
17782 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
17783 // CHECK-32-NEXT: br label [[COND_END]]
17784 // CHECK-32: cond.end:
17785 // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
17786 // CHECK-32-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
17787 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
17788 // CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
17789 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
17790 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
17791 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
17792 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
17793 // CHECK-32: omp.dispatch.body:
17794 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17795 // CHECK-32: omp.inner.for.cond:
17796 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
17797 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
17798 // CHECK-32-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
17799 // CHECK-32-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17800 // CHECK-32: omp.inner.for.body:
17801 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
17802 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
17803 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17804 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4
17805 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17806 // CHECK-32: omp.body.continue:
17807 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17808 // CHECK-32: omp.inner.for.inc:
17809 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
17810 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
17811 // CHECK-32-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
17812 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]]
17813 // CHECK-32: omp.inner.for.end:
17814 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
17815 // CHECK-32: omp.dispatch.inc:
17816 // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
17817 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
17818 // CHECK-32-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
17819 // CHECK-32-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
17820 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
17821 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
17822 // CHECK-32-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
17823 // CHECK-32-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
17824 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
17825 // CHECK-32: omp.dispatch.end:
17826 // CHECK-32-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
17827 // CHECK-32-NEXT: ret void
17830 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l256
17831 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
17832 // CHECK-32-NEXT: entry:
17833 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
17834 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
17835 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
17836 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l256_kernel_environment, ptr [[DYN_PTR]])
17837 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
17838 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
17839 // CHECK-32: user_code.entry:
17840 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
17841 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l256_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
17842 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
17843 // CHECK-32-NEXT: ret void
17844 // CHECK-32: worker.exit:
17845 // CHECK-32-NEXT: ret void
17848 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l256_omp_outlined
17849 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
17850 // CHECK-32-NEXT: entry:
17851 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
17852 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
17853 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17854 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
17855 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17856 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17857 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17858 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17859 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
17860 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
17861 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
17862 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
17863 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
17864 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
17865 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
17866 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
17867 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
17868 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1)
17869 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
17870 // CHECK-32: omp.dispatch.cond:
17871 // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
17872 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
17873 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
17874 // CHECK-32: omp.dispatch.body:
17875 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
17876 // CHECK-32-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
17877 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17878 // CHECK-32: omp.inner.for.cond:
17879 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP403:![0-9]+]]
17880 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP403]]
17881 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
17882 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17883 // CHECK-32: omp.inner.for.body:
17884 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP403]]
17885 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
17886 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17887 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP403]]
17888 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17889 // CHECK-32: omp.body.continue:
17890 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17891 // CHECK-32: omp.inner.for.inc:
17892 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP403]]
17893 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
17894 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP403]]
17895 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP404:![0-9]+]]
17896 // CHECK-32: omp.inner.for.end:
17897 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
17898 // CHECK-32: omp.dispatch.inc:
17899 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
17900 // CHECK-32: omp.dispatch.end:
17901 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
17902 // CHECK-32-NEXT: ret void
17905 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l260
17906 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
17907 // CHECK-32-NEXT: entry:
17908 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
17909 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
17910 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
17911 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l260_kernel_environment, ptr [[DYN_PTR]])
17912 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
17913 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
17914 // CHECK-32: user_code.entry:
17915 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
17916 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l260_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
17917 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
17918 // CHECK-32-NEXT: ret void
17919 // CHECK-32: worker.exit:
17920 // CHECK-32-NEXT: ret void
17923 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l260_omp_outlined
17924 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
17925 // CHECK-32-NEXT: entry:
17926 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
17927 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
17928 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17929 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
17930 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17931 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17932 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17933 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17934 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
17935 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
17936 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
17937 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
17938 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
17939 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
17940 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
17941 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
17942 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
17943 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1)
17944 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
17945 // CHECK-32: omp.dispatch.cond:
17946 // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
17947 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
17948 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
17949 // CHECK-32: omp.dispatch.body:
17950 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
17951 // CHECK-32-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
17952 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17953 // CHECK-32: omp.inner.for.cond:
17954 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP406:![0-9]+]]
17955 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP406]]
17956 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
17957 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17958 // CHECK-32: omp.inner.for.body:
17959 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP406]]
17960 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
17961 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17962 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP406]]
17963 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17964 // CHECK-32: omp.body.continue:
17965 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17966 // CHECK-32: omp.inner.for.inc:
17967 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP406]]
17968 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
17969 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP406]]
17970 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP407:![0-9]+]]
17971 // CHECK-32: omp.inner.for.end:
17972 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
17973 // CHECK-32: omp.dispatch.inc:
17974 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
17975 // CHECK-32: omp.dispatch.end:
17976 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
17977 // CHECK-32-NEXT: ret void
17980 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l264
17981 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
17982 // CHECK-32-NEXT: entry:
17983 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
17984 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
17985 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
17986 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l264_kernel_environment, ptr [[DYN_PTR]])
17987 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
17988 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
17989 // CHECK-32: user_code.entry:
17990 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
17991 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l264_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
17992 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
17993 // CHECK-32-NEXT: ret void
17994 // CHECK-32: worker.exit:
17995 // CHECK-32-NEXT: ret void
17998 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l264_omp_outlined
17999 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
18000 // CHECK-32-NEXT: entry:
18001 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
18002 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
18003 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18004 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
18005 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
18006 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
18007 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18008 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18009 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
18010 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
18011 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
18012 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
18013 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
18014 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
18015 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
18016 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
18017 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
18018 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1)
18019 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
18020 // CHECK-32: omp.dispatch.cond:
18021 // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
18022 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
18023 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
18024 // CHECK-32: omp.dispatch.body:
18025 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
18026 // CHECK-32-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
18027 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18028 // CHECK-32: omp.inner.for.cond:
18029 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP409:![0-9]+]]
18030 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP409]]
18031 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
18032 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18033 // CHECK-32: omp.inner.for.body:
18034 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP409]]
18035 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
18036 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18037 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP409]]
18038 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
18039 // CHECK-32: omp.body.continue:
18040 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18041 // CHECK-32: omp.inner.for.inc:
18042 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP409]]
18043 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
18044 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP409]]
18045 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP410:![0-9]+]]
18046 // CHECK-32: omp.inner.for.end:
18047 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
18048 // CHECK-32: omp.dispatch.inc:
18049 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
18050 // CHECK-32: omp.dispatch.end:
18051 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
18052 // CHECK-32-NEXT: ret void
18055 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l268
18056 // CHECK-32-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
18057 // CHECK-32-NEXT: entry:
18058 // CHECK-32-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
18059 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
18060 // CHECK-32-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
18061 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l268_kernel_environment, ptr [[DYN_PTR]])
18062 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
18063 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
18064 // CHECK-32: user_code.entry:
18065 // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
18066 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l268_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
18067 // CHECK-32-NEXT: call void @__kmpc_target_deinit()
18068 // CHECK-32-NEXT: ret void
18069 // CHECK-32: worker.exit:
18070 // CHECK-32-NEXT: ret void
18073 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l268_omp_outlined
18074 // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
18075 // CHECK-32-NEXT: entry:
18076 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
18077 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
18078 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18079 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4
18080 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
18081 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
18082 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18083 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18084 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4
18085 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
18086 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
18087 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
18088 // CHECK-32-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
18089 // CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
18090 // CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
18091 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
18092 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
18093 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1)
18094 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
18095 // CHECK-32: omp.dispatch.cond:
18096 // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
18097 // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
18098 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
18099 // CHECK-32: omp.dispatch.body:
18100 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
18101 // CHECK-32-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
18102 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18103 // CHECK-32: omp.inner.for.cond:
18104 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP412:![0-9]+]]
18105 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP412]]
18106 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
18107 // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18108 // CHECK-32: omp.inner.for.body:
18109 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP412]]
18110 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
18111 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18112 // CHECK-32-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP412]]
18113 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
18114 // CHECK-32: omp.body.continue:
18115 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18116 // CHECK-32: omp.inner.for.inc:
18117 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP412]]
18118 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
18119 // CHECK-32-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP412]]
18120 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP413:![0-9]+]]
18121 // CHECK-32: omp.inner.for.end:
18122 // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
18123 // CHECK-32: omp.dispatch.inc:
18124 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]]
18125 // CHECK-32: omp.dispatch.end:
18126 // CHECK-32-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
18127 // CHECK-32-NEXT: ret void
18130 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15
18131 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] {
18132 // CHECK-32-EX-NEXT: entry:
18133 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
18134 // CHECK-32-EX-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
18135 // CHECK-32-EX-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
18136 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
18137 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
18138 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
18139 // CHECK-32-EX-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
18140 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_kernel_environment, ptr [[DYN_PTR]])
18141 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
18142 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
18143 // CHECK-32-EX: user_code.entry:
18144 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
18145 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
18146 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
18147 // CHECK-32-EX-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
18148 // CHECK-32-EX-NEXT: store i8 [[FROMBOOL]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
18149 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
18150 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
18151 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
18152 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i32 [[TMP3]]) #[[ATTR2:[0-9]+]]
18153 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
18154 // CHECK-32-EX-NEXT: ret void
18155 // CHECK-32-EX: worker.exit:
18156 // CHECK-32-EX-NEXT: ret void
18159 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined
18160 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] {
18161 // CHECK-32-EX-NEXT: entry:
18162 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
18163 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
18164 // CHECK-32-EX-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
18165 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18166 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
18167 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18168 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18169 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18170 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18171 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
18172 // CHECK-32-EX-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
18173 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x ptr], align 4
18174 // CHECK-32-EX-NEXT: [[DOTCAPTURE_EXPR__CASTED15:%.*]] = alloca i32, align 4
18175 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS17:%.*]] = alloca [3 x ptr], align 4
18176 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
18177 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
18178 // CHECK-32-EX-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
18179 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
18180 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
18181 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
18182 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
18183 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
18184 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
18185 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
18186 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
18187 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
18188 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
18189 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18190 // CHECK-32-EX: cond.true:
18191 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
18192 // CHECK-32-EX: cond.false:
18193 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
18194 // CHECK-32-EX-NEXT: br label [[COND_END]]
18195 // CHECK-32-EX: cond.end:
18196 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
18197 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
18198 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
18199 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
18200 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
18201 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP5]] to i1
18202 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
18203 // CHECK-32-EX: omp_if.then:
18204 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18205 // CHECK-32-EX: omp.inner.for.cond:
18206 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP221:![0-9]+]]
18207 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
18208 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18209 // CHECK-32-EX: omp.inner.for.body:
18210 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP221]]
18211 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP221]]
18212 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP221]]
18213 // CHECK-32-EX-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP9]] to i1
18214 // CHECK-32-EX-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL2]] to i8
18215 // CHECK-32-EX-NEXT: store i8 [[FROMBOOL]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1, !llvm.access.group [[ACC_GRP221]]
18216 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP221]]
18217 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
18218 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to ptr
18219 // CHECK-32-EX-NEXT: store ptr [[TMP12]], ptr [[TMP11]], align 4, !llvm.access.group [[ACC_GRP221]]
18220 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
18221 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to ptr
18222 // CHECK-32-EX-NEXT: store ptr [[TMP14]], ptr [[TMP13]], align 4, !llvm.access.group [[ACC_GRP221]]
18223 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
18224 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = inttoptr i32 [[TMP10]] to ptr
18225 // CHECK-32-EX-NEXT: store ptr [[TMP16]], ptr [[TMP15]], align 4, !llvm.access.group [[ACC_GRP221]]
18226 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP221]]
18227 // CHECK-32-EX-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP17]] to i1
18228 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = zext i1 [[TOBOOL3]] to i32
18229 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP18]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 3), !llvm.access.group [[ACC_GRP221]]
18230 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18231 // CHECK-32-EX: omp.inner.for.inc:
18232 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP221]]
18233 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP221]]
18234 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
18235 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP221]]
18236 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP221]]
18237 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP221]]
18238 // CHECK-32-EX-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
18239 // CHECK-32-EX-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP221]]
18240 // CHECK-32-EX-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP221]]
18241 // CHECK-32-EX-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP221]]
18242 // CHECK-32-EX-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
18243 // CHECK-32-EX-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP221]]
18244 // CHECK-32-EX-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP221]]
18245 // CHECK-32-EX-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP25]], 9
18246 // CHECK-32-EX-NEXT: br i1 [[CMP6]], label [[COND_TRUE7:%.*]], label [[COND_FALSE8:%.*]]
18247 // CHECK-32-EX: cond.true7:
18248 // CHECK-32-EX-NEXT: br label [[COND_END9:%.*]]
18249 // CHECK-32-EX: cond.false8:
18250 // CHECK-32-EX-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP221]]
18251 // CHECK-32-EX-NEXT: br label [[COND_END9]]
18252 // CHECK-32-EX: cond.end9:
18253 // CHECK-32-EX-NEXT: [[COND10:%.*]] = phi i32 [ 9, [[COND_TRUE7]] ], [ [[TMP26]], [[COND_FALSE8]] ]
18254 // CHECK-32-EX-NEXT: store i32 [[COND10]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP221]]
18255 // CHECK-32-EX-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP221]]
18256 // CHECK-32-EX-NEXT: store i32 [[TMP27]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP221]]
18257 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP222:![0-9]+]]
18258 // CHECK-32-EX: omp.inner.for.end:
18259 // CHECK-32-EX-NEXT: br label [[OMP_IF_END:%.*]]
18260 // CHECK-32-EX: omp_if.else:
18261 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND11:%.*]]
18262 // CHECK-32-EX: omp.inner.for.cond11:
18263 // CHECK-32-EX-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
18264 // CHECK-32-EX-NEXT: [[CMP12:%.*]] = icmp slt i32 [[TMP28]], 10
18265 // CHECK-32-EX-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY13:%.*]], label [[OMP_INNER_FOR_END28:%.*]]
18266 // CHECK-32-EX: omp.inner.for.body13:
18267 // CHECK-32-EX-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
18268 // CHECK-32-EX-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
18269 // CHECK-32-EX-NEXT: [[TMP31:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
18270 // CHECK-32-EX-NEXT: [[TOBOOL14:%.*]] = trunc i8 [[TMP31]] to i1
18271 // CHECK-32-EX-NEXT: [[FROMBOOL16:%.*]] = zext i1 [[TOBOOL14]] to i8
18272 // CHECK-32-EX-NEXT: store i8 [[FROMBOOL16]], ptr [[DOTCAPTURE_EXPR__CASTED15]], align 1
18273 // CHECK-32-EX-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED15]], align 4
18274 // CHECK-32-EX-NEXT: [[TMP33:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS17]], i32 0, i32 0
18275 // CHECK-32-EX-NEXT: [[TMP34:%.*]] = inttoptr i32 [[TMP29]] to ptr
18276 // CHECK-32-EX-NEXT: store ptr [[TMP34]], ptr [[TMP33]], align 4
18277 // CHECK-32-EX-NEXT: [[TMP35:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS17]], i32 0, i32 1
18278 // CHECK-32-EX-NEXT: [[TMP36:%.*]] = inttoptr i32 [[TMP30]] to ptr
18279 // CHECK-32-EX-NEXT: store ptr [[TMP36]], ptr [[TMP35]], align 4
18280 // CHECK-32-EX-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS17]], i32 0, i32 2
18281 // CHECK-32-EX-NEXT: [[TMP38:%.*]] = inttoptr i32 [[TMP32]] to ptr
18282 // CHECK-32-EX-NEXT: store ptr [[TMP38]], ptr [[TMP37]], align 4
18283 // CHECK-32-EX-NEXT: [[TMP39:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
18284 // CHECK-32-EX-NEXT: [[TOBOOL18:%.*]] = trunc i8 [[TMP39]] to i1
18285 // CHECK-32-EX-NEXT: [[TMP40:%.*]] = zext i1 [[TOBOOL18]] to i32
18286 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP40]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined_omp_outlined1, ptr null, ptr [[CAPTURED_VARS_ADDRS17]], i32 3)
18287 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]
18288 // CHECK-32-EX: omp.inner.for.inc19:
18289 // CHECK-32-EX-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
18290 // CHECK-32-EX-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
18291 // CHECK-32-EX-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP41]], [[TMP42]]
18292 // CHECK-32-EX-NEXT: store i32 [[ADD20]], ptr [[DOTOMP_IV]], align 4
18293 // CHECK-32-EX-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
18294 // CHECK-32-EX-NEXT: [[TMP44:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
18295 // CHECK-32-EX-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP43]], [[TMP44]]
18296 // CHECK-32-EX-NEXT: store i32 [[ADD21]], ptr [[DOTOMP_COMB_LB]], align 4
18297 // CHECK-32-EX-NEXT: [[TMP45:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
18298 // CHECK-32-EX-NEXT: [[TMP46:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
18299 // CHECK-32-EX-NEXT: [[ADD22:%.*]] = add nsw i32 [[TMP45]], [[TMP46]]
18300 // CHECK-32-EX-NEXT: store i32 [[ADD22]], ptr [[DOTOMP_COMB_UB]], align 4
18301 // CHECK-32-EX-NEXT: [[TMP47:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
18302 // CHECK-32-EX-NEXT: [[CMP23:%.*]] = icmp sgt i32 [[TMP47]], 9
18303 // CHECK-32-EX-NEXT: br i1 [[CMP23]], label [[COND_TRUE24:%.*]], label [[COND_FALSE25:%.*]]
18304 // CHECK-32-EX: cond.true24:
18305 // CHECK-32-EX-NEXT: br label [[COND_END26:%.*]]
18306 // CHECK-32-EX: cond.false25:
18307 // CHECK-32-EX-NEXT: [[TMP48:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
18308 // CHECK-32-EX-NEXT: br label [[COND_END26]]
18309 // CHECK-32-EX: cond.end26:
18310 // CHECK-32-EX-NEXT: [[COND27:%.*]] = phi i32 [ 9, [[COND_TRUE24]] ], [ [[TMP48]], [[COND_FALSE25]] ]
18311 // CHECK-32-EX-NEXT: store i32 [[COND27]], ptr [[DOTOMP_COMB_UB]], align 4
18312 // CHECK-32-EX-NEXT: [[TMP49:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
18313 // CHECK-32-EX-NEXT: store i32 [[TMP49]], ptr [[DOTOMP_IV]], align 4
18314 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND11]], !llvm.loop [[LOOP225:![0-9]+]]
18315 // CHECK-32-EX: omp.inner.for.end28:
18316 // CHECK-32-EX-NEXT: br label [[OMP_IF_END]]
18317 // CHECK-32-EX: omp_if.end:
18318 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
18319 // CHECK-32-EX: omp.loop.exit:
18320 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
18321 // CHECK-32-EX-NEXT: [[TMP50:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
18322 // CHECK-32-EX-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0
18323 // CHECK-32-EX-NEXT: br i1 [[TMP51]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
18324 // CHECK-32-EX: .omp.final.then:
18325 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
18326 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
18327 // CHECK-32-EX: .omp.final.done:
18328 // CHECK-32-EX-NEXT: ret void
18331 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined_omp_outlined
18332 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
18333 // CHECK-32-EX-NEXT: entry:
18334 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
18335 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
18336 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
18337 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
18338 // CHECK-32-EX-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
18339 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18340 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
18341 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
18342 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
18343 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18344 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18345 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
18346 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
18347 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
18348 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
18349 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
18350 // CHECK-32-EX-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
18351 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
18352 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
18353 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
18354 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
18355 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
18356 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
18357 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
18358 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
18359 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
18360 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
18361 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
18362 // CHECK-32-EX: omp_if.then:
18363 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
18364 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
18365 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
18366 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
18367 // CHECK-32-EX-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
18368 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18369 // CHECK-32-EX: omp.inner.for.cond:
18370 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP227:![0-9]+]]
18371 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group [[ACC_GRP227]]
18372 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
18373 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18374 // CHECK-32-EX: omp.inner.for.body:
18375 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP227]]
18376 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
18377 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18378 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP227]]
18379 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
18380 // CHECK-32-EX: omp.body.continue:
18381 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18382 // CHECK-32-EX: omp.inner.for.inc:
18383 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP227]]
18384 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP227]]
18385 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
18386 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP227]]
18387 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP228:![0-9]+]]
18388 // CHECK-32-EX: omp.inner.for.end:
18389 // CHECK-32-EX-NEXT: br label [[OMP_IF_END:%.*]]
18390 // CHECK-32-EX: omp_if.else:
18391 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
18392 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
18393 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
18394 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
18395 // CHECK-32-EX-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
18396 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND2:%.*]]
18397 // CHECK-32-EX: omp.inner.for.cond2:
18398 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
18399 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
18400 // CHECK-32-EX-NEXT: [[CMP3:%.*]] = icmp ule i32 [[TMP14]], [[TMP15]]
18401 // CHECK-32-EX-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY4:%.*]], label [[OMP_INNER_FOR_END10:%.*]]
18402 // CHECK-32-EX: omp.inner.for.body4:
18403 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
18404 // CHECK-32-EX-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP16]], 1
18405 // CHECK-32-EX-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
18406 // CHECK-32-EX-NEXT: store i32 [[ADD6]], ptr [[I]], align 4
18407 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE7:%.*]]
18408 // CHECK-32-EX: omp.body.continue7:
18409 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC8:%.*]]
18410 // CHECK-32-EX: omp.inner.for.inc8:
18411 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
18412 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
18413 // CHECK-32-EX-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
18414 // CHECK-32-EX-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4
18415 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND2]], !llvm.loop [[LOOP230:![0-9]+]]
18416 // CHECK-32-EX: omp.inner.for.end10:
18417 // CHECK-32-EX-NEXT: br label [[OMP_IF_END]]
18418 // CHECK-32-EX: omp_if.end:
18419 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
18420 // CHECK-32-EX: omp.loop.exit:
18421 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
18422 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
18423 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP20]])
18424 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
18425 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
18426 // CHECK-32-EX-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
18427 // CHECK-32-EX: .omp.final.then:
18428 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
18429 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
18430 // CHECK-32-EX: .omp.final.done:
18431 // CHECK-32-EX-NEXT: ret void
18434 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined_omp_outlined1
18435 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
18436 // CHECK-32-EX-NEXT: entry:
18437 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
18438 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
18439 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
18440 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
18441 // CHECK-32-EX-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
18442 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18443 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
18444 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
18445 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
18446 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18447 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18448 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
18449 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
18450 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
18451 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
18452 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
18453 // CHECK-32-EX-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
18454 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
18455 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
18456 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
18457 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
18458 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
18459 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
18460 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
18461 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
18462 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
18463 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
18464 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
18465 // CHECK-32-EX: omp_if.then:
18466 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
18467 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
18468 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
18469 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
18470 // CHECK-32-EX-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
18471 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18472 // CHECK-32-EX: omp.inner.for.cond:
18473 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231:![0-9]+]]
18474 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group [[ACC_GRP231]]
18475 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
18476 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18477 // CHECK-32-EX: omp.inner.for.body:
18478 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231]]
18479 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
18480 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18481 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP231]]
18482 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
18483 // CHECK-32-EX: omp.body.continue:
18484 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18485 // CHECK-32-EX: omp.inner.for.inc:
18486 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231]]
18487 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP231]]
18488 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
18489 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231]]
18490 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP232:![0-9]+]]
18491 // CHECK-32-EX: omp.inner.for.end:
18492 // CHECK-32-EX-NEXT: br label [[OMP_IF_END:%.*]]
18493 // CHECK-32-EX: omp_if.else:
18494 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
18495 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
18496 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
18497 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
18498 // CHECK-32-EX-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
18499 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND2:%.*]]
18500 // CHECK-32-EX: omp.inner.for.cond2:
18501 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
18502 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
18503 // CHECK-32-EX-NEXT: [[CMP3:%.*]] = icmp ule i32 [[TMP14]], [[TMP15]]
18504 // CHECK-32-EX-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY4:%.*]], label [[OMP_INNER_FOR_END10:%.*]]
18505 // CHECK-32-EX: omp.inner.for.body4:
18506 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
18507 // CHECK-32-EX-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP16]], 1
18508 // CHECK-32-EX-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
18509 // CHECK-32-EX-NEXT: store i32 [[ADD6]], ptr [[I]], align 4
18510 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE7:%.*]]
18511 // CHECK-32-EX: omp.body.continue7:
18512 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC8:%.*]]
18513 // CHECK-32-EX: omp.inner.for.inc8:
18514 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
18515 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
18516 // CHECK-32-EX-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
18517 // CHECK-32-EX-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4
18518 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND2]], !llvm.loop [[LOOP234:![0-9]+]]
18519 // CHECK-32-EX: omp.inner.for.end10:
18520 // CHECK-32-EX-NEXT: br label [[OMP_IF_END]]
18521 // CHECK-32-EX: omp_if.end:
18522 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
18523 // CHECK-32-EX: omp.loop.exit:
18524 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
18525 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
18526 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP20]])
18527 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
18528 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
18529 // CHECK-32-EX-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
18530 // CHECK-32-EX: .omp.final.then:
18531 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
18532 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
18533 // CHECK-32-EX: .omp.final.done:
18534 // CHECK-32-EX-NEXT: ret void
18537 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18
18538 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
18539 // CHECK-32-EX-NEXT: entry:
18540 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
18541 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
18542 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
18543 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
18544 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18_kernel_environment, ptr [[DYN_PTR]])
18545 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
18546 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
18547 // CHECK-32-EX: user_code.entry:
18548 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
18549 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
18550 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
18551 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
18552 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
18553 // CHECK-32-EX-NEXT: ret void
18554 // CHECK-32-EX: worker.exit:
18555 // CHECK-32-EX-NEXT: ret void
18558 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18_omp_outlined
18559 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
18560 // CHECK-32-EX-NEXT: entry:
18561 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
18562 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
18563 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18564 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
18565 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18566 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18567 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18568 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18569 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
18570 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
18571 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
18572 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
18573 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
18574 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
18575 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
18576 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
18577 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
18578 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
18579 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
18580 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
18581 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
18582 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
18583 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18584 // CHECK-32-EX: cond.true:
18585 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
18586 // CHECK-32-EX: cond.false:
18587 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
18588 // CHECK-32-EX-NEXT: br label [[COND_END]]
18589 // CHECK-32-EX: cond.end:
18590 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
18591 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
18592 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
18593 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
18594 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18595 // CHECK-32-EX: omp.inner.for.cond:
18596 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP235:![0-9]+]]
18597 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
18598 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18599 // CHECK-32-EX: omp.inner.for.body:
18600 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP235]]
18601 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP235]]
18602 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
18603 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
18604 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP235]]
18605 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
18606 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
18607 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP235]]
18608 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP235]]
18609 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18610 // CHECK-32-EX: omp.inner.for.inc:
18611 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP235]]
18612 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP235]]
18613 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
18614 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP235]]
18615 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP235]]
18616 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP235]]
18617 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
18618 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP235]]
18619 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP235]]
18620 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP235]]
18621 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
18622 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP235]]
18623 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP235]]
18624 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
18625 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
18626 // CHECK-32-EX: cond.true5:
18627 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
18628 // CHECK-32-EX: cond.false6:
18629 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP235]]
18630 // CHECK-32-EX-NEXT: br label [[COND_END7]]
18631 // CHECK-32-EX: cond.end7:
18632 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
18633 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP235]]
18634 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP235]]
18635 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP235]]
18636 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP236:![0-9]+]]
18637 // CHECK-32-EX: omp.inner.for.end:
18638 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
18639 // CHECK-32-EX: omp.loop.exit:
18640 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
18641 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
18642 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
18643 // CHECK-32-EX-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
18644 // CHECK-32-EX: .omp.final.then:
18645 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
18646 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
18647 // CHECK-32-EX: .omp.final.done:
18648 // CHECK-32-EX-NEXT: ret void
18651 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18_omp_outlined_omp_outlined
18652 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
18653 // CHECK-32-EX-NEXT: entry:
18654 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
18655 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
18656 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
18657 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
18658 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18659 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
18660 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
18661 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
18662 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18663 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18664 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
18665 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
18666 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
18667 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
18668 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
18669 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
18670 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
18671 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
18672 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
18673 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
18674 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
18675 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
18676 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
18677 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
18678 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
18679 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
18680 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
18681 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9
18682 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18683 // CHECK-32-EX: cond.true:
18684 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
18685 // CHECK-32-EX: cond.false:
18686 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
18687 // CHECK-32-EX-NEXT: br label [[COND_END]]
18688 // CHECK-32-EX: cond.end:
18689 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
18690 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
18691 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
18692 // CHECK-32-EX-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
18693 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18694 // CHECK-32-EX: omp.inner.for.cond:
18695 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP238:![0-9]+]]
18696 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP238]]
18697 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
18698 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18699 // CHECK-32-EX: omp.inner.for.body:
18700 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP238]]
18701 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
18702 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18703 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP238]]
18704 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
18705 // CHECK-32-EX: omp.body.continue:
18706 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18707 // CHECK-32-EX: omp.inner.for.inc:
18708 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP238]]
18709 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
18710 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP238]]
18711 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP239:![0-9]+]]
18712 // CHECK-32-EX: omp.inner.for.end:
18713 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
18714 // CHECK-32-EX: omp.loop.exit:
18715 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
18716 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
18717 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
18718 // CHECK-32-EX-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
18719 // CHECK-32-EX: .omp.final.then:
18720 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
18721 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
18722 // CHECK-32-EX: .omp.final.done:
18723 // CHECK-32-EX-NEXT: ret void
18726 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21
18727 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
18728 // CHECK-32-EX-NEXT: entry:
18729 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
18730 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
18731 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
18732 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
18733 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21_kernel_environment, ptr [[DYN_PTR]])
18734 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
18735 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
18736 // CHECK-32-EX: user_code.entry:
18737 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
18738 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
18739 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
18740 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
18741 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
18742 // CHECK-32-EX-NEXT: ret void
18743 // CHECK-32-EX: worker.exit:
18744 // CHECK-32-EX-NEXT: ret void
18747 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21_omp_outlined
18748 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
18749 // CHECK-32-EX-NEXT: entry:
18750 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
18751 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
18752 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18753 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
18754 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18755 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18756 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18757 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18758 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
18759 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
18760 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
18761 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
18762 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
18763 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
18764 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
18765 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
18766 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
18767 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
18768 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
18769 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
18770 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
18771 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
18772 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18773 // CHECK-32-EX: cond.true:
18774 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
18775 // CHECK-32-EX: cond.false:
18776 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
18777 // CHECK-32-EX-NEXT: br label [[COND_END]]
18778 // CHECK-32-EX: cond.end:
18779 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
18780 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
18781 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
18782 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
18783 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18784 // CHECK-32-EX: omp.inner.for.cond:
18785 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP241:![0-9]+]]
18786 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
18787 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18788 // CHECK-32-EX: omp.inner.for.body:
18789 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP241]]
18790 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP241]]
18791 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
18792 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
18793 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP241]]
18794 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
18795 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
18796 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP241]]
18797 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP241]]
18798 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18799 // CHECK-32-EX: omp.inner.for.inc:
18800 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP241]]
18801 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP241]]
18802 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
18803 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP241]]
18804 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP241]]
18805 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP241]]
18806 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
18807 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP241]]
18808 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP241]]
18809 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP241]]
18810 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
18811 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP241]]
18812 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP241]]
18813 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
18814 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
18815 // CHECK-32-EX: cond.true5:
18816 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
18817 // CHECK-32-EX: cond.false6:
18818 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP241]]
18819 // CHECK-32-EX-NEXT: br label [[COND_END7]]
18820 // CHECK-32-EX: cond.end7:
18821 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
18822 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP241]]
18823 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP241]]
18824 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP241]]
18825 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP242:![0-9]+]]
18826 // CHECK-32-EX: omp.inner.for.end:
18827 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
18828 // CHECK-32-EX: omp.loop.exit:
18829 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
18830 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
18831 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
18832 // CHECK-32-EX-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
18833 // CHECK-32-EX: .omp.final.then:
18834 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
18835 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
18836 // CHECK-32-EX: .omp.final.done:
18837 // CHECK-32-EX-NEXT: ret void
18840 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21_omp_outlined_omp_outlined
18841 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
18842 // CHECK-32-EX-NEXT: entry:
18843 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
18844 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
18845 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
18846 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
18847 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18848 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
18849 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
18850 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
18851 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18852 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18853 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
18854 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
18855 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
18856 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
18857 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
18858 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
18859 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
18860 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
18861 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
18862 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
18863 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
18864 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
18865 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
18866 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
18867 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
18868 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
18869 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
18870 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
18871 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18872 // CHECK-32-EX: omp.inner.for.cond:
18873 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP244:![0-9]+]]
18874 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group [[ACC_GRP244]]
18875 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]]
18876 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18877 // CHECK-32-EX: omp.inner.for.body:
18878 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP244]]
18879 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
18880 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18881 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP244]]
18882 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
18883 // CHECK-32-EX: omp.body.continue:
18884 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18885 // CHECK-32-EX: omp.inner.for.inc:
18886 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP244]]
18887 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP244]]
18888 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
18889 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP244]]
18890 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP245:![0-9]+]]
18891 // CHECK-32-EX: omp.inner.for.end:
18892 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
18893 // CHECK-32-EX: omp.loop.exit:
18894 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
18895 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
18896 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
18897 // CHECK-32-EX-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
18898 // CHECK-32-EX: .omp.final.then:
18899 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
18900 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
18901 // CHECK-32-EX: .omp.final.done:
18902 // CHECK-32-EX-NEXT: ret void
18905 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24
18906 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
18907 // CHECK-32-EX-NEXT: entry:
18908 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
18909 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
18910 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
18911 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
18912 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24_kernel_environment, ptr [[DYN_PTR]])
18913 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
18914 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
18915 // CHECK-32-EX: user_code.entry:
18916 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
18917 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
18918 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
18919 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
18920 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
18921 // CHECK-32-EX-NEXT: ret void
18922 // CHECK-32-EX: worker.exit:
18923 // CHECK-32-EX-NEXT: ret void
18926 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24_omp_outlined
18927 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
18928 // CHECK-32-EX-NEXT: entry:
18929 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
18930 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
18931 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18932 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
18933 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18934 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18935 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18936 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18937 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
18938 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
18939 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
18940 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
18941 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
18942 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
18943 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
18944 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
18945 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
18946 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
18947 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
18948 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
18949 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
18950 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
18951 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18952 // CHECK-32-EX: cond.true:
18953 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
18954 // CHECK-32-EX: cond.false:
18955 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
18956 // CHECK-32-EX-NEXT: br label [[COND_END]]
18957 // CHECK-32-EX: cond.end:
18958 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
18959 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
18960 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
18961 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
18962 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18963 // CHECK-32-EX: omp.inner.for.cond:
18964 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP247:![0-9]+]]
18965 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
18966 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18967 // CHECK-32-EX: omp.inner.for.body:
18968 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP247]]
18969 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP247]]
18970 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
18971 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
18972 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP247]]
18973 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
18974 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
18975 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP247]]
18976 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP247]]
18977 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18978 // CHECK-32-EX: omp.inner.for.inc:
18979 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP247]]
18980 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP247]]
18981 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
18982 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP247]]
18983 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP247]]
18984 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP247]]
18985 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
18986 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP247]]
18987 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP247]]
18988 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP247]]
18989 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
18990 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP247]]
18991 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP247]]
18992 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
18993 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
18994 // CHECK-32-EX: cond.true5:
18995 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
18996 // CHECK-32-EX: cond.false6:
18997 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP247]]
18998 // CHECK-32-EX-NEXT: br label [[COND_END7]]
18999 // CHECK-32-EX: cond.end7:
19000 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
19001 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP247]]
19002 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP247]]
19003 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP247]]
19004 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP248:![0-9]+]]
19005 // CHECK-32-EX: omp.inner.for.end:
19006 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
19007 // CHECK-32-EX: omp.loop.exit:
19008 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
19009 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
19010 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
19011 // CHECK-32-EX-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
19012 // CHECK-32-EX: .omp.final.then:
19013 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
19014 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
19015 // CHECK-32-EX: .omp.final.done:
19016 // CHECK-32-EX-NEXT: ret void
19019 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24_omp_outlined_omp_outlined
19020 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
19021 // CHECK-32-EX-NEXT: entry:
19022 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
19023 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
19024 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
19025 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
19026 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19027 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
19028 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
19029 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
19030 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19031 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19032 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
19033 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
19034 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
19035 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
19036 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
19037 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
19038 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
19039 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
19040 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
19041 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
19042 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
19043 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
19044 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
19045 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
19046 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
19047 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
19048 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
19049 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
19050 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
19051 // CHECK-32-EX: omp.dispatch.cond:
19052 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
19053 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
19054 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
19055 // CHECK-32-EX: omp.dispatch.body:
19056 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
19057 // CHECK-32-EX-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
19058 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19059 // CHECK-32-EX: omp.inner.for.cond:
19060 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP250:![0-9]+]]
19061 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP250]]
19062 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
19063 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19064 // CHECK-32-EX: omp.inner.for.body:
19065 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP250]]
19066 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
19067 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19068 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP250]]
19069 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
19070 // CHECK-32-EX: omp.body.continue:
19071 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19072 // CHECK-32-EX: omp.inner.for.inc:
19073 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP250]]
19074 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
19075 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP250]]
19076 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP251:![0-9]+]]
19077 // CHECK-32-EX: omp.inner.for.end:
19078 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
19079 // CHECK-32-EX: omp.dispatch.inc:
19080 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
19081 // CHECK-32-EX: omp.dispatch.end:
19082 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
19083 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
19084 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
19085 // CHECK-32-EX-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
19086 // CHECK-32-EX: .omp.final.then:
19087 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
19088 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
19089 // CHECK-32-EX: .omp.final.done:
19090 // CHECK-32-EX-NEXT: ret void
19093 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27
19094 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
19095 // CHECK-32-EX-NEXT: entry:
19096 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
19097 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
19098 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
19099 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
19100 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27_kernel_environment, ptr [[DYN_PTR]])
19101 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
19102 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
19103 // CHECK-32-EX: user_code.entry:
19104 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
19105 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
19106 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
19107 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
19108 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
19109 // CHECK-32-EX-NEXT: ret void
19110 // CHECK-32-EX: worker.exit:
19111 // CHECK-32-EX-NEXT: ret void
19114 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27_omp_outlined
19115 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
19116 // CHECK-32-EX-NEXT: entry:
19117 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
19118 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
19119 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19120 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
19121 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
19122 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
19123 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19124 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19125 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
19126 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
19127 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
19128 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
19129 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
19130 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
19131 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
19132 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
19133 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
19134 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
19135 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
19136 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
19137 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
19138 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
19139 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19140 // CHECK-32-EX: cond.true:
19141 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
19142 // CHECK-32-EX: cond.false:
19143 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
19144 // CHECK-32-EX-NEXT: br label [[COND_END]]
19145 // CHECK-32-EX: cond.end:
19146 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
19147 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
19148 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
19149 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
19150 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19151 // CHECK-32-EX: omp.inner.for.cond:
19152 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP253:![0-9]+]]
19153 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
19154 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19155 // CHECK-32-EX: omp.inner.for.body:
19156 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP253]]
19157 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP253]]
19158 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
19159 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
19160 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP253]]
19161 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
19162 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
19163 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP253]]
19164 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP253]]
19165 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19166 // CHECK-32-EX: omp.inner.for.inc:
19167 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP253]]
19168 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP253]]
19169 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
19170 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP253]]
19171 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP253]]
19172 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP253]]
19173 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
19174 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP253]]
19175 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP253]]
19176 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP253]]
19177 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
19178 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP253]]
19179 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP253]]
19180 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
19181 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
19182 // CHECK-32-EX: cond.true5:
19183 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
19184 // CHECK-32-EX: cond.false6:
19185 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP253]]
19186 // CHECK-32-EX-NEXT: br label [[COND_END7]]
19187 // CHECK-32-EX: cond.end7:
19188 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
19189 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP253]]
19190 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP253]]
19191 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP253]]
19192 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP254:![0-9]+]]
19193 // CHECK-32-EX: omp.inner.for.end:
19194 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
19195 // CHECK-32-EX: omp.loop.exit:
19196 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
19197 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
19198 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
19199 // CHECK-32-EX-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
19200 // CHECK-32-EX: .omp.final.then:
19201 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
19202 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
19203 // CHECK-32-EX: .omp.final.done:
19204 // CHECK-32-EX-NEXT: ret void
19207 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27_omp_outlined_omp_outlined
19208 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
19209 // CHECK-32-EX-NEXT: entry:
19210 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
19211 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
19212 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
19213 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
19214 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19215 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
19216 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
19217 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
19218 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19219 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19220 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
19221 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
19222 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
19223 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
19224 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
19225 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
19226 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
19227 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
19228 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
19229 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
19230 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
19231 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
19232 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
19233 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
19234 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
19235 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
19236 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
19237 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
19238 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
19239 // CHECK-32-EX: omp.dispatch.cond:
19240 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
19241 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
19242 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
19243 // CHECK-32-EX: omp.dispatch.body:
19244 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
19245 // CHECK-32-EX-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
19246 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19247 // CHECK-32-EX: omp.inner.for.cond:
19248 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP256:![0-9]+]]
19249 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP256]]
19250 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
19251 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19252 // CHECK-32-EX: omp.inner.for.body:
19253 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP256]]
19254 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
19255 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19256 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP256]]
19257 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
19258 // CHECK-32-EX: omp.body.continue:
19259 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19260 // CHECK-32-EX: omp.inner.for.inc:
19261 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP256]]
19262 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
19263 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP256]]
19264 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP257:![0-9]+]]
19265 // CHECK-32-EX: omp.inner.for.end:
19266 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
19267 // CHECK-32-EX: omp.dispatch.inc:
19268 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
19269 // CHECK-32-EX: omp.dispatch.end:
19270 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
19271 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
19272 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
19273 // CHECK-32-EX-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
19274 // CHECK-32-EX: .omp.final.then:
19275 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
19276 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
19277 // CHECK-32-EX: .omp.final.done:
19278 // CHECK-32-EX-NEXT: ret void
19281 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30
19282 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
19283 // CHECK-32-EX-NEXT: entry:
19284 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
19285 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
19286 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
19287 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
19288 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30_kernel_environment, ptr [[DYN_PTR]])
19289 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
19290 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
19291 // CHECK-32-EX: user_code.entry:
19292 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
19293 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
19294 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
19295 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
19296 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
19297 // CHECK-32-EX-NEXT: ret void
19298 // CHECK-32-EX: worker.exit:
19299 // CHECK-32-EX-NEXT: ret void
19302 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30_omp_outlined
19303 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
19304 // CHECK-32-EX-NEXT: entry:
19305 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
19306 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
19307 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19308 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
19309 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
19310 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
19311 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19312 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19313 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
19314 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
19315 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
19316 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
19317 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
19318 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
19319 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
19320 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
19321 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
19322 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
19323 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
19324 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
19325 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
19326 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
19327 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19328 // CHECK-32-EX: cond.true:
19329 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
19330 // CHECK-32-EX: cond.false:
19331 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
19332 // CHECK-32-EX-NEXT: br label [[COND_END]]
19333 // CHECK-32-EX: cond.end:
19334 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
19335 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
19336 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
19337 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
19338 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19339 // CHECK-32-EX: omp.inner.for.cond:
19340 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP259:![0-9]+]]
19341 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
19342 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19343 // CHECK-32-EX: omp.inner.for.body:
19344 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP259]]
19345 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP259]]
19346 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
19347 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
19348 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP259]]
19349 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
19350 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
19351 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP259]]
19352 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP259]]
19353 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19354 // CHECK-32-EX: omp.inner.for.inc:
19355 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP259]]
19356 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP259]]
19357 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
19358 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP259]]
19359 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP259]]
19360 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP259]]
19361 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
19362 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP259]]
19363 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP259]]
19364 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP259]]
19365 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
19366 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP259]]
19367 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP259]]
19368 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
19369 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
19370 // CHECK-32-EX: cond.true5:
19371 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
19372 // CHECK-32-EX: cond.false6:
19373 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP259]]
19374 // CHECK-32-EX-NEXT: br label [[COND_END7]]
19375 // CHECK-32-EX: cond.end7:
19376 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
19377 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP259]]
19378 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP259]]
19379 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP259]]
19380 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP260:![0-9]+]]
19381 // CHECK-32-EX: omp.inner.for.end:
19382 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
19383 // CHECK-32-EX: omp.loop.exit:
19384 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
19385 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
19386 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
19387 // CHECK-32-EX-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
19388 // CHECK-32-EX: .omp.final.then:
19389 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
19390 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
19391 // CHECK-32-EX: .omp.final.done:
19392 // CHECK-32-EX-NEXT: ret void
19395 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30_omp_outlined_omp_outlined
19396 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
19397 // CHECK-32-EX-NEXT: entry:
19398 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
19399 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
19400 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
19401 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
19402 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19403 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
19404 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
19405 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
19406 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19407 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19408 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
19409 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
19410 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
19411 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
19412 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
19413 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
19414 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
19415 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
19416 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
19417 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
19418 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
19419 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
19420 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
19421 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
19422 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
19423 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
19424 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
19425 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
19426 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
19427 // CHECK-32-EX: omp.dispatch.cond:
19428 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
19429 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
19430 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
19431 // CHECK-32-EX: omp.dispatch.body:
19432 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
19433 // CHECK-32-EX-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
19434 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19435 // CHECK-32-EX: omp.inner.for.cond:
19436 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP262:![0-9]+]]
19437 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP262]]
19438 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
19439 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19440 // CHECK-32-EX: omp.inner.for.body:
19441 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP262]]
19442 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
19443 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19444 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP262]]
19445 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
19446 // CHECK-32-EX: omp.body.continue:
19447 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19448 // CHECK-32-EX: omp.inner.for.inc:
19449 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP262]]
19450 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
19451 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP262]]
19452 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP263:![0-9]+]]
19453 // CHECK-32-EX: omp.inner.for.end:
19454 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
19455 // CHECK-32-EX: omp.dispatch.inc:
19456 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
19457 // CHECK-32-EX: omp.dispatch.end:
19458 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
19459 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
19460 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
19461 // CHECK-32-EX-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
19462 // CHECK-32-EX: .omp.final.then:
19463 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
19464 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
19465 // CHECK-32-EX: .omp.final.done:
19466 // CHECK-32-EX-NEXT: ret void
19469 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33
19470 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
19471 // CHECK-32-EX-NEXT: entry:
19472 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
19473 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
19474 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
19475 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
19476 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33_kernel_environment, ptr [[DYN_PTR]])
19477 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
19478 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
19479 // CHECK-32-EX: user_code.entry:
19480 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
19481 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
19482 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
19483 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
19484 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
19485 // CHECK-32-EX-NEXT: ret void
19486 // CHECK-32-EX: worker.exit:
19487 // CHECK-32-EX-NEXT: ret void
19490 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33_omp_outlined
19491 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
19492 // CHECK-32-EX-NEXT: entry:
19493 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
19494 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
19495 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19496 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
19497 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
19498 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
19499 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19500 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19501 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
19502 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
19503 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
19504 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
19505 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
19506 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
19507 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
19508 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
19509 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
19510 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
19511 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
19512 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
19513 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
19514 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
19515 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19516 // CHECK-32-EX: cond.true:
19517 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
19518 // CHECK-32-EX: cond.false:
19519 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
19520 // CHECK-32-EX-NEXT: br label [[COND_END]]
19521 // CHECK-32-EX: cond.end:
19522 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
19523 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
19524 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
19525 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
19526 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19527 // CHECK-32-EX: omp.inner.for.cond:
19528 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP265:![0-9]+]]
19529 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
19530 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19531 // CHECK-32-EX: omp.inner.for.body:
19532 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP265]]
19533 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP265]]
19534 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
19535 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
19536 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP265]]
19537 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
19538 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
19539 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP265]]
19540 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP265]]
19541 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19542 // CHECK-32-EX: omp.inner.for.inc:
19543 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP265]]
19544 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP265]]
19545 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
19546 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP265]]
19547 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP265]]
19548 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP265]]
19549 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
19550 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP265]]
19551 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP265]]
19552 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP265]]
19553 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
19554 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP265]]
19555 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP265]]
19556 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
19557 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
19558 // CHECK-32-EX: cond.true5:
19559 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
19560 // CHECK-32-EX: cond.false6:
19561 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP265]]
19562 // CHECK-32-EX-NEXT: br label [[COND_END7]]
19563 // CHECK-32-EX: cond.end7:
19564 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
19565 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP265]]
19566 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP265]]
19567 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP265]]
19568 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP266:![0-9]+]]
19569 // CHECK-32-EX: omp.inner.for.end:
19570 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
19571 // CHECK-32-EX: omp.loop.exit:
19572 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
19573 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
19574 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
19575 // CHECK-32-EX-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
19576 // CHECK-32-EX: .omp.final.then:
19577 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
19578 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
19579 // CHECK-32-EX: .omp.final.done:
19580 // CHECK-32-EX-NEXT: ret void
19583 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33_omp_outlined_omp_outlined
19584 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
19585 // CHECK-32-EX-NEXT: entry:
19586 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
19587 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
19588 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
19589 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
19590 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19591 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
19592 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
19593 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
19594 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19595 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19596 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
19597 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
19598 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
19599 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
19600 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
19601 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
19602 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
19603 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
19604 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
19605 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
19606 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
19607 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
19608 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
19609 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
19610 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
19611 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
19612 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
19613 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
19614 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
19615 // CHECK-32-EX: omp.dispatch.cond:
19616 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
19617 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
19618 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
19619 // CHECK-32-EX: omp.dispatch.body:
19620 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
19621 // CHECK-32-EX-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
19622 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19623 // CHECK-32-EX: omp.inner.for.cond:
19624 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP268:![0-9]+]]
19625 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP268]]
19626 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
19627 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19628 // CHECK-32-EX: omp.inner.for.body:
19629 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP268]]
19630 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
19631 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19632 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP268]]
19633 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
19634 // CHECK-32-EX: omp.body.continue:
19635 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19636 // CHECK-32-EX: omp.inner.for.inc:
19637 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP268]]
19638 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
19639 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP268]]
19640 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP269:![0-9]+]]
19641 // CHECK-32-EX: omp.inner.for.end:
19642 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
19643 // CHECK-32-EX: omp.dispatch.inc:
19644 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
19645 // CHECK-32-EX: omp.dispatch.end:
19646 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
19647 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
19648 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
19649 // CHECK-32-EX-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
19650 // CHECK-32-EX: .omp.final.then:
19651 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
19652 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
19653 // CHECK-32-EX: .omp.final.done:
19654 // CHECK-32-EX-NEXT: ret void
19657 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37
19658 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[A:%.*]]) #[[ATTR0]] {
19659 // CHECK-32-EX-NEXT: entry:
19660 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
19661 // CHECK-32-EX-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
19662 // CHECK-32-EX-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
19663 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
19664 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
19665 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
19666 // CHECK-32-EX-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
19667 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37_kernel_environment, ptr [[DYN_PTR]])
19668 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
19669 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
19670 // CHECK-32-EX: user_code.entry:
19671 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
19672 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[A_ADDR]], align 4
19673 // CHECK-32-EX-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
19674 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
19675 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
19676 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
19677 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i32 [[TMP3]]) #[[ATTR2]]
19678 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
19679 // CHECK-32-EX-NEXT: ret void
19680 // CHECK-32-EX: worker.exit:
19681 // CHECK-32-EX-NEXT: ret void
19684 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37_omp_outlined
19685 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR1]] {
19686 // CHECK-32-EX-NEXT: entry:
19687 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
19688 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
19689 // CHECK-32-EX-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
19690 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19691 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
19692 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
19693 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
19694 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19695 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19696 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
19697 // CHECK-32-EX-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
19698 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x ptr], align 4
19699 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
19700 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
19701 // CHECK-32-EX-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
19702 // CHECK-32-EX-NEXT: [[A1:%.*]] = call align 8 ptr @__kmpc_alloc_shared(i32 4)
19703 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
19704 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
19705 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
19706 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
19707 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
19708 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
19709 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
19710 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
19711 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
19712 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
19713 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19714 // CHECK-32-EX: cond.true:
19715 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
19716 // CHECK-32-EX: cond.false:
19717 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
19718 // CHECK-32-EX-NEXT: br label [[COND_END]]
19719 // CHECK-32-EX: cond.end:
19720 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
19721 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
19722 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
19723 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
19724 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19725 // CHECK-32-EX: omp.inner.for.cond:
19726 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
19727 // CHECK-32-EX-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP5]], 10
19728 // CHECK-32-EX-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19729 // CHECK-32-EX: omp.inner.for.body:
19730 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
19731 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
19732 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[A1]], align 4
19733 // CHECK-32-EX-NEXT: store i32 [[TMP8]], ptr [[A_CASTED]], align 4
19734 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[A_CASTED]], align 4
19735 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
19736 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP6]] to ptr
19737 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
19738 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
19739 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = inttoptr i32 [[TMP7]] to ptr
19740 // CHECK-32-EX-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 4
19741 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
19742 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = inttoptr i32 [[TMP9]] to ptr
19743 // CHECK-32-EX-NEXT: store ptr [[TMP15]], ptr [[TMP14]], align 4
19744 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 3)
19745 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19746 // CHECK-32-EX: omp.inner.for.inc:
19747 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
19748 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
19749 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
19750 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
19751 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
19752 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
19753 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
19754 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_LB]], align 4
19755 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
19756 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
19757 // CHECK-32-EX-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
19758 // CHECK-32-EX-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_COMB_UB]], align 4
19759 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
19760 // CHECK-32-EX-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP22]], 9
19761 // CHECK-32-EX-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
19762 // CHECK-32-EX: cond.true6:
19763 // CHECK-32-EX-NEXT: br label [[COND_END8:%.*]]
19764 // CHECK-32-EX: cond.false7:
19765 // CHECK-32-EX-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
19766 // CHECK-32-EX-NEXT: br label [[COND_END8]]
19767 // CHECK-32-EX: cond.end8:
19768 // CHECK-32-EX-NEXT: [[COND9:%.*]] = phi i32 [ 9, [[COND_TRUE6]] ], [ [[TMP23]], [[COND_FALSE7]] ]
19769 // CHECK-32-EX-NEXT: store i32 [[COND9]], ptr [[DOTOMP_COMB_UB]], align 4
19770 // CHECK-32-EX-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
19771 // CHECK-32-EX-NEXT: store i32 [[TMP24]], ptr [[DOTOMP_IV]], align 4
19772 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
19773 // CHECK-32-EX: omp.inner.for.end:
19774 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
19775 // CHECK-32-EX: omp.loop.exit:
19776 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
19777 // CHECK-32-EX-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
19778 // CHECK-32-EX-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
19779 // CHECK-32-EX-NEXT: br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
19780 // CHECK-32-EX: .omp.lastprivate.then:
19781 // CHECK-32-EX-NEXT: [[TMP27:%.*]] = load i32, ptr [[A1]], align 4
19782 // CHECK-32-EX-NEXT: store i32 [[TMP27]], ptr [[A_ADDR]], align 4
19783 // CHECK-32-EX-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
19784 // CHECK-32-EX: .omp.lastprivate.done:
19785 // CHECK-32-EX-NEXT: call void @__kmpc_free_shared(ptr [[A1]], i32 4)
19786 // CHECK-32-EX-NEXT: ret void
19789 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37_omp_outlined_omp_outlined
19790 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR1]] {
19791 // CHECK-32-EX-NEXT: entry:
19792 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
19793 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
19794 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
19795 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
19796 // CHECK-32-EX-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
19797 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19798 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
19799 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
19800 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
19801 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19802 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19803 // CHECK-32-EX-NEXT: [[A1:%.*]] = alloca i32, align 4
19804 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
19805 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
19806 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
19807 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
19808 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
19809 // CHECK-32-EX-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
19810 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
19811 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
19812 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
19813 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
19814 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
19815 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
19816 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
19817 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
19818 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
19819 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
19820 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
19821 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
19822 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
19823 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19824 // CHECK-32-EX: omp.inner.for.cond:
19825 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
19826 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
19827 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]]
19828 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19829 // CHECK-32-EX: omp.inner.for.body:
19830 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
19831 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
19832 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19833 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4
19834 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[I]], align 4
19835 // CHECK-32-EX-NEXT: store i32 [[TMP8]], ptr [[A1]], align 4
19836 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
19837 // CHECK-32-EX: omp.body.continue:
19838 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19839 // CHECK-32-EX: omp.inner.for.inc:
19840 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
19841 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
19842 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
19843 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
19844 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
19845 // CHECK-32-EX: omp.inner.for.end:
19846 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
19847 // CHECK-32-EX: omp.loop.exit:
19848 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
19849 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
19850 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
19851 // CHECK-32-EX-NEXT: br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
19852 // CHECK-32-EX: .omp.lastprivate.then:
19853 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[A1]], align 4
19854 // CHECK-32-EX-NEXT: store i32 [[TMP13]], ptr [[A_ADDR]], align 4
19855 // CHECK-32-EX-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
19856 // CHECK-32-EX: .omp.lastprivate.done:
19857 // CHECK-32-EX-NEXT: ret void
19860 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40
19861 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
19862 // CHECK-32-EX-NEXT: entry:
19863 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
19864 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
19865 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
19866 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
19867 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40_kernel_environment, ptr [[DYN_PTR]])
19868 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
19869 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
19870 // CHECK-32-EX: user_code.entry:
19871 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
19872 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
19873 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
19874 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
19875 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
19876 // CHECK-32-EX-NEXT: ret void
19877 // CHECK-32-EX: worker.exit:
19878 // CHECK-32-EX-NEXT: ret void
19881 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40_omp_outlined
19882 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
19883 // CHECK-32-EX-NEXT: entry:
19884 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
19885 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
19886 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19887 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
19888 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
19889 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
19890 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19891 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19892 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
19893 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
19894 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
19895 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
19896 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
19897 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
19898 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
19899 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
19900 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
19901 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
19902 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
19903 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
19904 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
19905 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
19906 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19907 // CHECK-32-EX: cond.true:
19908 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
19909 // CHECK-32-EX: cond.false:
19910 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
19911 // CHECK-32-EX-NEXT: br label [[COND_END]]
19912 // CHECK-32-EX: cond.end:
19913 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
19914 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
19915 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
19916 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
19917 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19918 // CHECK-32-EX: omp.inner.for.cond:
19919 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
19920 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
19921 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19922 // CHECK-32-EX: omp.inner.for.body:
19923 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
19924 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
19925 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
19926 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
19927 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
19928 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
19929 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
19930 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
19931 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
19932 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19933 // CHECK-32-EX: omp.inner.for.inc:
19934 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
19935 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
19936 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
19937 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
19938 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
19939 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
19940 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
19941 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
19942 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
19943 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
19944 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
19945 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
19946 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
19947 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
19948 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
19949 // CHECK-32-EX: cond.true5:
19950 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
19951 // CHECK-32-EX: cond.false6:
19952 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
19953 // CHECK-32-EX-NEXT: br label [[COND_END7]]
19954 // CHECK-32-EX: cond.end7:
19955 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
19956 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
19957 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
19958 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
19959 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
19960 // CHECK-32-EX: omp.inner.for.end:
19961 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
19962 // CHECK-32-EX: omp.loop.exit:
19963 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
19964 // CHECK-32-EX-NEXT: ret void
19967 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40_omp_outlined_omp_outlined
19968 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
19969 // CHECK-32-EX-NEXT: entry:
19970 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
19971 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
19972 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
19973 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
19974 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19975 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
19976 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
19977 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
19978 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19979 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19980 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
19981 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
19982 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
19983 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
19984 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
19985 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
19986 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
19987 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
19988 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
19989 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
19990 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
19991 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
19992 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
19993 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
19994 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
19995 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
19996 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
19997 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9
19998 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19999 // CHECK-32-EX: cond.true:
20000 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
20001 // CHECK-32-EX: cond.false:
20002 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
20003 // CHECK-32-EX-NEXT: br label [[COND_END]]
20004 // CHECK-32-EX: cond.end:
20005 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
20006 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
20007 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
20008 // CHECK-32-EX-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
20009 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20010 // CHECK-32-EX: omp.inner.for.cond:
20011 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
20012 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
20013 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
20014 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20015 // CHECK-32-EX: omp.inner.for.body:
20016 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
20017 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
20018 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20019 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4
20020 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
20021 // CHECK-32-EX: omp.body.continue:
20022 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20023 // CHECK-32-EX: omp.inner.for.inc:
20024 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
20025 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
20026 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
20027 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
20028 // CHECK-32-EX: omp.inner.for.end:
20029 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
20030 // CHECK-32-EX: omp.loop.exit:
20031 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
20032 // CHECK-32-EX-NEXT: ret void
20035 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43
20036 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
20037 // CHECK-32-EX-NEXT: entry:
20038 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
20039 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
20040 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
20041 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
20042 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43_kernel_environment, ptr [[DYN_PTR]])
20043 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
20044 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
20045 // CHECK-32-EX: user_code.entry:
20046 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
20047 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
20048 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
20049 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
20050 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
20051 // CHECK-32-EX-NEXT: ret void
20052 // CHECK-32-EX: worker.exit:
20053 // CHECK-32-EX-NEXT: ret void
20056 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43_omp_outlined
20057 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
20058 // CHECK-32-EX-NEXT: entry:
20059 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
20060 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
20061 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20062 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
20063 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20064 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20065 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20066 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20067 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
20068 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
20069 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
20070 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
20071 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
20072 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
20073 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
20074 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
20075 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
20076 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
20077 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
20078 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
20079 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20080 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
20081 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20082 // CHECK-32-EX: cond.true:
20083 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
20084 // CHECK-32-EX: cond.false:
20085 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20086 // CHECK-32-EX-NEXT: br label [[COND_END]]
20087 // CHECK-32-EX: cond.end:
20088 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
20089 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
20090 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20091 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
20092 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20093 // CHECK-32-EX: omp.inner.for.cond:
20094 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
20095 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
20096 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20097 // CHECK-32-EX: omp.inner.for.body:
20098 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20099 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20100 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
20101 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
20102 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
20103 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
20104 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
20105 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
20106 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
20107 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20108 // CHECK-32-EX: omp.inner.for.inc:
20109 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
20110 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
20111 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
20112 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
20113 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20114 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
20115 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
20116 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
20117 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20118 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
20119 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
20120 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
20121 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20122 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
20123 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
20124 // CHECK-32-EX: cond.true5:
20125 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
20126 // CHECK-32-EX: cond.false6:
20127 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20128 // CHECK-32-EX-NEXT: br label [[COND_END7]]
20129 // CHECK-32-EX: cond.end7:
20130 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
20131 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
20132 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20133 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
20134 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
20135 // CHECK-32-EX: omp.inner.for.end:
20136 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
20137 // CHECK-32-EX: omp.loop.exit:
20138 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
20139 // CHECK-32-EX-NEXT: ret void
20142 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43_omp_outlined_omp_outlined
20143 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
20144 // CHECK-32-EX-NEXT: entry:
20145 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
20146 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
20147 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
20148 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
20149 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20150 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
20151 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
20152 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
20153 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20154 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20155 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
20156 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
20157 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
20158 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
20159 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
20160 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
20161 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
20162 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
20163 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
20164 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
20165 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
20166 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
20167 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
20168 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
20169 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
20170 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
20171 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
20172 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
20173 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20174 // CHECK-32-EX: omp.inner.for.cond:
20175 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
20176 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
20177 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]]
20178 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20179 // CHECK-32-EX: omp.inner.for.body:
20180 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
20181 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
20182 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20183 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4
20184 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
20185 // CHECK-32-EX: omp.body.continue:
20186 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20187 // CHECK-32-EX: omp.inner.for.inc:
20188 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
20189 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
20190 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
20191 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4
20192 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
20193 // CHECK-32-EX: omp.inner.for.end:
20194 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
20195 // CHECK-32-EX: omp.loop.exit:
20196 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
20197 // CHECK-32-EX-NEXT: ret void
20200 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46
20201 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
20202 // CHECK-32-EX-NEXT: entry:
20203 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
20204 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
20205 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
20206 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
20207 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46_kernel_environment, ptr [[DYN_PTR]])
20208 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
20209 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
20210 // CHECK-32-EX: user_code.entry:
20211 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
20212 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
20213 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
20214 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
20215 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
20216 // CHECK-32-EX-NEXT: ret void
20217 // CHECK-32-EX: worker.exit:
20218 // CHECK-32-EX-NEXT: ret void
20221 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46_omp_outlined
20222 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
20223 // CHECK-32-EX-NEXT: entry:
20224 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
20225 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
20226 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20227 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
20228 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20229 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20230 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20231 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20232 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
20233 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
20234 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
20235 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
20236 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
20237 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
20238 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
20239 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
20240 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
20241 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
20242 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
20243 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
20244 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20245 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
20246 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20247 // CHECK-32-EX: cond.true:
20248 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
20249 // CHECK-32-EX: cond.false:
20250 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20251 // CHECK-32-EX-NEXT: br label [[COND_END]]
20252 // CHECK-32-EX: cond.end:
20253 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
20254 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
20255 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20256 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
20257 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20258 // CHECK-32-EX: omp.inner.for.cond:
20259 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
20260 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
20261 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20262 // CHECK-32-EX: omp.inner.for.body:
20263 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20264 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20265 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
20266 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
20267 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
20268 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
20269 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
20270 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
20271 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
20272 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20273 // CHECK-32-EX: omp.inner.for.inc:
20274 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
20275 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
20276 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
20277 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
20278 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20279 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
20280 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
20281 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
20282 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20283 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
20284 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
20285 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
20286 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20287 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
20288 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
20289 // CHECK-32-EX: cond.true5:
20290 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
20291 // CHECK-32-EX: cond.false6:
20292 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20293 // CHECK-32-EX-NEXT: br label [[COND_END7]]
20294 // CHECK-32-EX: cond.end7:
20295 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
20296 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
20297 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20298 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
20299 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
20300 // CHECK-32-EX: omp.inner.for.end:
20301 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
20302 // CHECK-32-EX: omp.loop.exit:
20303 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
20304 // CHECK-32-EX-NEXT: ret void
20307 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46_omp_outlined_omp_outlined
20308 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
20309 // CHECK-32-EX-NEXT: entry:
20310 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
20311 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
20312 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
20313 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
20314 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20315 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
20316 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
20317 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
20318 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20319 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20320 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
20321 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
20322 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
20323 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
20324 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
20325 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
20326 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
20327 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
20328 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
20329 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
20330 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
20331 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
20332 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
20333 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
20334 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
20335 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
20336 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
20337 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
20338 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
20339 // CHECK-32-EX: omp.dispatch.cond:
20340 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
20341 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
20342 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
20343 // CHECK-32-EX: omp.dispatch.body:
20344 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
20345 // CHECK-32-EX-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
20346 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20347 // CHECK-32-EX: omp.inner.for.cond:
20348 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP271:![0-9]+]]
20349 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP271]]
20350 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
20351 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20352 // CHECK-32-EX: omp.inner.for.body:
20353 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP271]]
20354 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
20355 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20356 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP271]]
20357 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
20358 // CHECK-32-EX: omp.body.continue:
20359 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20360 // CHECK-32-EX: omp.inner.for.inc:
20361 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP271]]
20362 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
20363 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP271]]
20364 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP272:![0-9]+]]
20365 // CHECK-32-EX: omp.inner.for.end:
20366 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
20367 // CHECK-32-EX: omp.dispatch.inc:
20368 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
20369 // CHECK-32-EX: omp.dispatch.end:
20370 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
20371 // CHECK-32-EX-NEXT: ret void
20374 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49
20375 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
20376 // CHECK-32-EX-NEXT: entry:
20377 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
20378 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
20379 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
20380 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
20381 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49_kernel_environment, ptr [[DYN_PTR]])
20382 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
20383 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
20384 // CHECK-32-EX: user_code.entry:
20385 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
20386 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
20387 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
20388 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
20389 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
20390 // CHECK-32-EX-NEXT: ret void
20391 // CHECK-32-EX: worker.exit:
20392 // CHECK-32-EX-NEXT: ret void
20395 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49_omp_outlined
20396 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
20397 // CHECK-32-EX-NEXT: entry:
20398 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
20399 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
20400 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20401 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
20402 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20403 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20404 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20405 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20406 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
20407 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
20408 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
20409 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
20410 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
20411 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
20412 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
20413 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
20414 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
20415 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
20416 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
20417 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
20418 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20419 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
20420 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20421 // CHECK-32-EX: cond.true:
20422 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
20423 // CHECK-32-EX: cond.false:
20424 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20425 // CHECK-32-EX-NEXT: br label [[COND_END]]
20426 // CHECK-32-EX: cond.end:
20427 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
20428 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
20429 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20430 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
20431 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20432 // CHECK-32-EX: omp.inner.for.cond:
20433 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
20434 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
20435 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20436 // CHECK-32-EX: omp.inner.for.body:
20437 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20438 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20439 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
20440 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
20441 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
20442 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
20443 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
20444 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
20445 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
20446 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20447 // CHECK-32-EX: omp.inner.for.inc:
20448 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
20449 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
20450 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
20451 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
20452 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20453 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
20454 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
20455 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
20456 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20457 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
20458 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
20459 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
20460 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20461 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
20462 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
20463 // CHECK-32-EX: cond.true5:
20464 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
20465 // CHECK-32-EX: cond.false6:
20466 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20467 // CHECK-32-EX-NEXT: br label [[COND_END7]]
20468 // CHECK-32-EX: cond.end7:
20469 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
20470 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
20471 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20472 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
20473 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
20474 // CHECK-32-EX: omp.inner.for.end:
20475 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
20476 // CHECK-32-EX: omp.loop.exit:
20477 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
20478 // CHECK-32-EX-NEXT: ret void
20481 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49_omp_outlined_omp_outlined
20482 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
20483 // CHECK-32-EX-NEXT: entry:
20484 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
20485 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
20486 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
20487 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
20488 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20489 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
20490 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
20491 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
20492 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20493 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20494 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
20495 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
20496 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
20497 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
20498 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
20499 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
20500 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
20501 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
20502 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
20503 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
20504 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
20505 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
20506 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
20507 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
20508 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
20509 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
20510 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
20511 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
20512 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
20513 // CHECK-32-EX: omp.dispatch.cond:
20514 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
20515 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
20516 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
20517 // CHECK-32-EX: omp.dispatch.body:
20518 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
20519 // CHECK-32-EX-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
20520 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20521 // CHECK-32-EX: omp.inner.for.cond:
20522 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP274:![0-9]+]]
20523 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP274]]
20524 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
20525 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20526 // CHECK-32-EX: omp.inner.for.body:
20527 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP274]]
20528 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
20529 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20530 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP274]]
20531 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
20532 // CHECK-32-EX: omp.body.continue:
20533 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20534 // CHECK-32-EX: omp.inner.for.inc:
20535 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP274]]
20536 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
20537 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP274]]
20538 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP275:![0-9]+]]
20539 // CHECK-32-EX: omp.inner.for.end:
20540 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
20541 // CHECK-32-EX: omp.dispatch.inc:
20542 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
20543 // CHECK-32-EX: omp.dispatch.end:
20544 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
20545 // CHECK-32-EX-NEXT: ret void
20548 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52
20549 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
20550 // CHECK-32-EX-NEXT: entry:
20551 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
20552 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
20553 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
20554 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
20555 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52_kernel_environment, ptr [[DYN_PTR]])
20556 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
20557 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
20558 // CHECK-32-EX: user_code.entry:
20559 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
20560 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
20561 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
20562 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
20563 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
20564 // CHECK-32-EX-NEXT: ret void
20565 // CHECK-32-EX: worker.exit:
20566 // CHECK-32-EX-NEXT: ret void
20569 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52_omp_outlined
20570 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
20571 // CHECK-32-EX-NEXT: entry:
20572 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
20573 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
20574 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20575 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
20576 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20577 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20578 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20579 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20580 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
20581 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
20582 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
20583 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
20584 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
20585 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
20586 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
20587 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
20588 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
20589 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
20590 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
20591 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
20592 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20593 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
20594 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20595 // CHECK-32-EX: cond.true:
20596 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
20597 // CHECK-32-EX: cond.false:
20598 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20599 // CHECK-32-EX-NEXT: br label [[COND_END]]
20600 // CHECK-32-EX: cond.end:
20601 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
20602 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
20603 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20604 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
20605 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20606 // CHECK-32-EX: omp.inner.for.cond:
20607 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
20608 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
20609 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20610 // CHECK-32-EX: omp.inner.for.body:
20611 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20612 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20613 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
20614 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
20615 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
20616 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
20617 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
20618 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
20619 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
20620 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20621 // CHECK-32-EX: omp.inner.for.inc:
20622 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
20623 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
20624 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
20625 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
20626 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20627 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
20628 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
20629 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
20630 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20631 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
20632 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
20633 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
20634 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20635 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
20636 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
20637 // CHECK-32-EX: cond.true5:
20638 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
20639 // CHECK-32-EX: cond.false6:
20640 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20641 // CHECK-32-EX-NEXT: br label [[COND_END7]]
20642 // CHECK-32-EX: cond.end7:
20643 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
20644 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
20645 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20646 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
20647 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
20648 // CHECK-32-EX: omp.inner.for.end:
20649 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
20650 // CHECK-32-EX: omp.loop.exit:
20651 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
20652 // CHECK-32-EX-NEXT: ret void
20655 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52_omp_outlined_omp_outlined
20656 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
20657 // CHECK-32-EX-NEXT: entry:
20658 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
20659 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
20660 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
20661 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
20662 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20663 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
20664 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
20665 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
20666 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20667 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20668 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
20669 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
20670 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
20671 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
20672 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
20673 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
20674 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
20675 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
20676 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
20677 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
20678 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
20679 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
20680 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
20681 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
20682 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
20683 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
20684 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
20685 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
20686 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
20687 // CHECK-32-EX: omp.dispatch.cond:
20688 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
20689 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
20690 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
20691 // CHECK-32-EX: omp.dispatch.body:
20692 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
20693 // CHECK-32-EX-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
20694 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20695 // CHECK-32-EX: omp.inner.for.cond:
20696 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP277:![0-9]+]]
20697 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP277]]
20698 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
20699 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20700 // CHECK-32-EX: omp.inner.for.body:
20701 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP277]]
20702 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
20703 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20704 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP277]]
20705 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
20706 // CHECK-32-EX: omp.body.continue:
20707 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20708 // CHECK-32-EX: omp.inner.for.inc:
20709 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP277]]
20710 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
20711 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP277]]
20712 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP278:![0-9]+]]
20713 // CHECK-32-EX: omp.inner.for.end:
20714 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
20715 // CHECK-32-EX: omp.dispatch.inc:
20716 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
20717 // CHECK-32-EX: omp.dispatch.end:
20718 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
20719 // CHECK-32-EX-NEXT: ret void
20722 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55
20723 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
20724 // CHECK-32-EX-NEXT: entry:
20725 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
20726 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
20727 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
20728 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
20729 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55_kernel_environment, ptr [[DYN_PTR]])
20730 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
20731 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
20732 // CHECK-32-EX: user_code.entry:
20733 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
20734 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
20735 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
20736 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
20737 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
20738 // CHECK-32-EX-NEXT: ret void
20739 // CHECK-32-EX: worker.exit:
20740 // CHECK-32-EX-NEXT: ret void
20743 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55_omp_outlined
20744 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
20745 // CHECK-32-EX-NEXT: entry:
20746 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
20747 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
20748 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20749 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
20750 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20751 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20752 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20753 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20754 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
20755 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
20756 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
20757 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
20758 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
20759 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
20760 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
20761 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
20762 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
20763 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
20764 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
20765 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
20766 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20767 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
20768 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20769 // CHECK-32-EX: cond.true:
20770 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
20771 // CHECK-32-EX: cond.false:
20772 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20773 // CHECK-32-EX-NEXT: br label [[COND_END]]
20774 // CHECK-32-EX: cond.end:
20775 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
20776 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
20777 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20778 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
20779 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20780 // CHECK-32-EX: omp.inner.for.cond:
20781 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
20782 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
20783 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20784 // CHECK-32-EX: omp.inner.for.body:
20785 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20786 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20787 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
20788 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
20789 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
20790 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
20791 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
20792 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
20793 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
20794 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20795 // CHECK-32-EX: omp.inner.for.inc:
20796 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
20797 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
20798 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
20799 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
20800 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20801 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
20802 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
20803 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
20804 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20805 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
20806 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
20807 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
20808 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20809 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
20810 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
20811 // CHECK-32-EX: cond.true5:
20812 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
20813 // CHECK-32-EX: cond.false6:
20814 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20815 // CHECK-32-EX-NEXT: br label [[COND_END7]]
20816 // CHECK-32-EX: cond.end7:
20817 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
20818 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
20819 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20820 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
20821 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
20822 // CHECK-32-EX: omp.inner.for.end:
20823 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
20824 // CHECK-32-EX: omp.loop.exit:
20825 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
20826 // CHECK-32-EX-NEXT: ret void
20829 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55_omp_outlined_omp_outlined
20830 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
20831 // CHECK-32-EX-NEXT: entry:
20832 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
20833 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
20834 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
20835 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
20836 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20837 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
20838 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
20839 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
20840 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20841 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20842 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
20843 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
20844 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
20845 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
20846 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
20847 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
20848 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
20849 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
20850 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
20851 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
20852 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
20853 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
20854 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
20855 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
20856 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
20857 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
20858 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
20859 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
20860 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
20861 // CHECK-32-EX: omp.dispatch.cond:
20862 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
20863 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
20864 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
20865 // CHECK-32-EX: omp.dispatch.body:
20866 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
20867 // CHECK-32-EX-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
20868 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20869 // CHECK-32-EX: omp.inner.for.cond:
20870 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP280:![0-9]+]]
20871 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP280]]
20872 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
20873 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20874 // CHECK-32-EX: omp.inner.for.body:
20875 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP280]]
20876 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
20877 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20878 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP280]]
20879 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
20880 // CHECK-32-EX: omp.body.continue:
20881 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20882 // CHECK-32-EX: omp.inner.for.inc:
20883 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP280]]
20884 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
20885 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP280]]
20886 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP281:![0-9]+]]
20887 // CHECK-32-EX: omp.inner.for.end:
20888 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
20889 // CHECK-32-EX: omp.dispatch.inc:
20890 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
20891 // CHECK-32-EX: omp.dispatch.end:
20892 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
20893 // CHECK-32-EX-NEXT: ret void
20896 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58
20897 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
20898 // CHECK-32-EX-NEXT: entry:
20899 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
20900 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
20901 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
20902 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
20903 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58_kernel_environment, ptr [[DYN_PTR]])
20904 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
20905 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
20906 // CHECK-32-EX: user_code.entry:
20907 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
20908 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
20909 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
20910 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
20911 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
20912 // CHECK-32-EX-NEXT: ret void
20913 // CHECK-32-EX: worker.exit:
20914 // CHECK-32-EX-NEXT: ret void
20917 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58_omp_outlined
20918 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
20919 // CHECK-32-EX-NEXT: entry:
20920 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
20921 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
20922 // CHECK-32-EX-NEXT: [[B:%.*]] = alloca i32, align 4
20923 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20924 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
20925 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20926 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20927 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20928 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20929 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
20930 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
20931 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
20932 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
20933 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
20934 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
20935 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
20936 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
20937 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
20938 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
20939 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
20940 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
20941 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20942 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
20943 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20944 // CHECK-32-EX: cond.true:
20945 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
20946 // CHECK-32-EX: cond.false:
20947 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
20948 // CHECK-32-EX-NEXT: br label [[COND_END]]
20949 // CHECK-32-EX: cond.end:
20950 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
20951 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
20952 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
20953 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
20954 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20955 // CHECK-32-EX: omp.inner.for.cond:
20956 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP283:![0-9]+]]
20957 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
20958 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20959 // CHECK-32-EX: omp.inner.for.body:
20960 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP283]]
20961 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP283]]
20962 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
20963 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
20964 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP283]]
20965 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
20966 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
20967 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP283]]
20968 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP283]]
20969 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20970 // CHECK-32-EX: omp.inner.for.inc:
20971 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP283]]
20972 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP283]]
20973 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
20974 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP283]]
20975 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP283]]
20976 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP283]]
20977 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
20978 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP283]]
20979 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP283]]
20980 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP283]]
20981 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
20982 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP283]]
20983 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP283]]
20984 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
20985 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
20986 // CHECK-32-EX: cond.true5:
20987 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
20988 // CHECK-32-EX: cond.false6:
20989 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP283]]
20990 // CHECK-32-EX-NEXT: br label [[COND_END7]]
20991 // CHECK-32-EX: cond.end7:
20992 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
20993 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP283]]
20994 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP283]]
20995 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP283]]
20996 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP284:![0-9]+]]
20997 // CHECK-32-EX: omp.inner.for.end:
20998 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
20999 // CHECK-32-EX: omp.loop.exit:
21000 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
21001 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
21002 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
21003 // CHECK-32-EX-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21004 // CHECK-32-EX: .omp.final.then:
21005 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
21006 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
21007 // CHECK-32-EX: .omp.final.done:
21008 // CHECK-32-EX-NEXT: ret void
21011 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58_omp_outlined_omp_outlined
21012 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
21013 // CHECK-32-EX-NEXT: entry:
21014 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
21015 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
21016 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
21017 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
21018 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21019 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
21020 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
21021 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
21022 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21023 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21024 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
21025 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
21026 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
21027 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
21028 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
21029 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
21030 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
21031 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
21032 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
21033 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
21034 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
21035 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
21036 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
21037 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
21038 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
21039 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
21040 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
21041 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
21042 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21043 // CHECK-32-EX: omp.inner.for.cond:
21044 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP286:![0-9]+]]
21045 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group [[ACC_GRP286]]
21046 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]]
21047 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21048 // CHECK-32-EX: omp.inner.for.body:
21049 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP286]]
21050 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
21051 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21052 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP286]]
21053 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
21054 // CHECK-32-EX: omp.body.continue:
21055 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21056 // CHECK-32-EX: omp.inner.for.inc:
21057 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP286]]
21058 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP286]]
21059 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
21060 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP286]]
21061 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP287:![0-9]+]]
21062 // CHECK-32-EX: omp.inner.for.end:
21063 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
21064 // CHECK-32-EX: omp.loop.exit:
21065 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
21066 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
21067 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
21068 // CHECK-32-EX-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21069 // CHECK-32-EX: .omp.final.then:
21070 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
21071 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
21072 // CHECK-32-EX: .omp.final.done:
21073 // CHECK-32-EX-NEXT: ret void
21076 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66
21077 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
21078 // CHECK-32-EX-NEXT: entry:
21079 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
21080 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
21081 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
21082 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
21083 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66_kernel_environment, ptr [[DYN_PTR]])
21084 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
21085 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
21086 // CHECK-32-EX: user_code.entry:
21087 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
21088 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
21089 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
21090 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
21091 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
21092 // CHECK-32-EX-NEXT: ret void
21093 // CHECK-32-EX: worker.exit:
21094 // CHECK-32-EX-NEXT: ret void
21097 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66_omp_outlined
21098 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
21099 // CHECK-32-EX-NEXT: entry:
21100 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
21101 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
21102 // CHECK-32-EX-NEXT: [[B:%.*]] = alloca [3 x i32], align 4
21103 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21104 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
21105 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21106 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21107 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21108 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21109 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
21110 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
21111 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
21112 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
21113 // CHECK-32-EX-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[B]], ptr align 4 @"__const.<captured>.b", i32 12, i1 false)
21114 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
21115 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
21116 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
21117 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
21118 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
21119 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
21120 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
21121 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
21122 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
21123 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
21124 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21125 // CHECK-32-EX: cond.true:
21126 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
21127 // CHECK-32-EX: cond.false:
21128 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
21129 // CHECK-32-EX-NEXT: br label [[COND_END]]
21130 // CHECK-32-EX: cond.end:
21131 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
21132 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
21133 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
21134 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
21135 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21136 // CHECK-32-EX: omp.inner.for.cond:
21137 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP289:![0-9]+]]
21138 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
21139 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21140 // CHECK-32-EX: omp.inner.for.body:
21141 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP289]]
21142 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP289]]
21143 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
21144 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
21145 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP289]]
21146 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
21147 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
21148 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP289]]
21149 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP289]]
21150 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21151 // CHECK-32-EX: omp.inner.for.inc:
21152 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP289]]
21153 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP289]]
21154 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
21155 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP289]]
21156 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP289]]
21157 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP289]]
21158 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
21159 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP289]]
21160 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP289]]
21161 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP289]]
21162 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
21163 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP289]]
21164 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP289]]
21165 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
21166 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
21167 // CHECK-32-EX: cond.true5:
21168 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
21169 // CHECK-32-EX: cond.false6:
21170 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP289]]
21171 // CHECK-32-EX-NEXT: br label [[COND_END7]]
21172 // CHECK-32-EX: cond.end7:
21173 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
21174 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP289]]
21175 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP289]]
21176 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP289]]
21177 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP290:![0-9]+]]
21178 // CHECK-32-EX: omp.inner.for.end:
21179 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
21180 // CHECK-32-EX: omp.loop.exit:
21181 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
21182 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
21183 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
21184 // CHECK-32-EX-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21185 // CHECK-32-EX: .omp.final.then:
21186 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
21187 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
21188 // CHECK-32-EX: .omp.final.done:
21189 // CHECK-32-EX-NEXT: ret void
21192 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66_omp_outlined_omp_outlined
21193 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
21194 // CHECK-32-EX-NEXT: entry:
21195 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
21196 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
21197 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
21198 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
21199 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21200 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
21201 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
21202 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
21203 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21204 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21205 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
21206 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
21207 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
21208 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
21209 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
21210 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
21211 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
21212 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
21213 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
21214 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
21215 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
21216 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
21217 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
21218 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
21219 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
21220 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
21221 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
21222 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9
21223 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21224 // CHECK-32-EX: cond.true:
21225 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
21226 // CHECK-32-EX: cond.false:
21227 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
21228 // CHECK-32-EX-NEXT: br label [[COND_END]]
21229 // CHECK-32-EX: cond.end:
21230 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
21231 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
21232 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
21233 // CHECK-32-EX-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
21234 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21235 // CHECK-32-EX: omp.inner.for.cond:
21236 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP292:![0-9]+]]
21237 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP292]]
21238 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
21239 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21240 // CHECK-32-EX: omp.inner.for.body:
21241 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP292]]
21242 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
21243 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21244 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP292]]
21245 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
21246 // CHECK-32-EX: omp.body.continue:
21247 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21248 // CHECK-32-EX: omp.inner.for.inc:
21249 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP292]]
21250 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
21251 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP292]]
21252 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP293:![0-9]+]]
21253 // CHECK-32-EX: omp.inner.for.end:
21254 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
21255 // CHECK-32-EX: omp.loop.exit:
21256 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
21257 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
21258 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
21259 // CHECK-32-EX-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21260 // CHECK-32-EX: .omp.final.then:
21261 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
21262 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
21263 // CHECK-32-EX: .omp.final.done:
21264 // CHECK-32-EX-NEXT: ret void
21267 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73
21268 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
21269 // CHECK-32-EX-NEXT: entry:
21270 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
21271 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
21272 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
21273 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
21274 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_kernel_environment, ptr [[DYN_PTR]])
21275 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
21276 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
21277 // CHECK-32-EX: user_code.entry:
21278 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
21279 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
21280 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
21281 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
21282 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
21283 // CHECK-32-EX-NEXT: ret void
21284 // CHECK-32-EX: worker.exit:
21285 // CHECK-32-EX-NEXT: ret void
21288 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined
21289 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
21290 // CHECK-32-EX-NEXT: entry:
21291 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
21292 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
21293 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21294 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
21295 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21296 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21297 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21298 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21299 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
21300 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
21301 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
21302 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
21303 // CHECK-32-EX-NEXT: [[C:%.*]] = call align 8 ptr @__kmpc_alloc_shared(i32 4)
21304 // CHECK-32-EX-NEXT: [[B:%.*]] = call align 8 ptr @__kmpc_alloc_shared(i32 4)
21305 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
21306 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
21307 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
21308 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
21309 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
21310 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
21311 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
21312 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
21313 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
21314 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21315 // CHECK-32-EX: cond.true:
21316 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
21317 // CHECK-32-EX: cond.false:
21318 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
21319 // CHECK-32-EX-NEXT: br label [[COND_END]]
21320 // CHECK-32-EX: cond.end:
21321 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
21322 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
21323 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
21324 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
21325 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21326 // CHECK-32-EX: omp.inner.for.cond:
21327 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP295:![0-9]+]]
21328 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP295]]
21329 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
21330 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21331 // CHECK-32-EX: omp.inner.for.body:
21332 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP295]]
21333 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP295]]
21334 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
21335 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to ptr
21336 // CHECK-32-EX-NEXT: store ptr [[TMP10]], ptr [[TMP9]], align 4, !llvm.access.group [[ACC_GRP295]]
21337 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
21338 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to ptr
21339 // CHECK-32-EX-NEXT: store ptr [[TMP12]], ptr [[TMP11]], align 4, !llvm.access.group [[ACC_GRP295]]
21340 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined_omp_outlined, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined_omp_outlined_wrapper, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP295]]
21341 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21342 // CHECK-32-EX: omp.inner.for.inc:
21343 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP295]]
21344 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP295]]
21345 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
21346 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP295]]
21347 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP296:![0-9]+]]
21348 // CHECK-32-EX: omp.inner.for.end:
21349 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
21350 // CHECK-32-EX: omp.loop.exit:
21351 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
21352 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
21353 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
21354 // CHECK-32-EX-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21355 // CHECK-32-EX: .omp.final.then:
21356 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
21357 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
21358 // CHECK-32-EX: .omp.final.done:
21359 // CHECK-32-EX-NEXT: store ptr [[B]], ptr [[C]], align 4
21360 // CHECK-32-EX-NEXT: call void @__kmpc_free_shared(ptr [[B]], i32 4)
21361 // CHECK-32-EX-NEXT: call void @__kmpc_free_shared(ptr [[C]], i32 4)
21362 // CHECK-32-EX-NEXT: ret void
21365 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined_omp_outlined
21366 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
21367 // CHECK-32-EX-NEXT: entry:
21368 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
21369 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
21370 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
21371 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
21372 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21373 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
21374 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
21375 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
21376 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21377 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21378 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
21379 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
21380 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
21381 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
21382 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
21383 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
21384 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
21385 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
21386 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
21387 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
21388 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
21389 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
21390 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
21391 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
21392 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
21393 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
21394 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
21395 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
21396 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21397 // CHECK-32-EX: omp.inner.for.cond:
21398 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP298:![0-9]+]]
21399 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group [[ACC_GRP298]]
21400 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]]
21401 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21402 // CHECK-32-EX: omp.inner.for.body:
21403 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP298]]
21404 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
21405 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21406 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP298]]
21407 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
21408 // CHECK-32-EX: omp.body.continue:
21409 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21410 // CHECK-32-EX: omp.inner.for.inc:
21411 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP298]]
21412 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP298]]
21413 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
21414 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP298]]
21415 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP299:![0-9]+]]
21416 // CHECK-32-EX: omp.inner.for.end:
21417 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
21418 // CHECK-32-EX: omp.loop.exit:
21419 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
21420 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
21421 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
21422 // CHECK-32-EX-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21423 // CHECK-32-EX: .omp.final.then:
21424 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
21425 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
21426 // CHECK-32-EX: .omp.final.done:
21427 // CHECK-32-EX-NEXT: ret void
21430 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined_omp_outlined_wrapper
21431 // CHECK-32-EX-SAME: (i16 noundef zeroext [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] {
21432 // CHECK-32-EX-NEXT: entry:
21433 // CHECK-32-EX-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2
21434 // CHECK-32-EX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
21435 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
21436 // CHECK-32-EX-NEXT: [[GLOBAL_ARGS:%.*]] = alloca ptr, align 4
21437 // CHECK-32-EX-NEXT: store i16 [[TMP0]], ptr [[DOTADDR]], align 2
21438 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
21439 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
21440 // CHECK-32-EX-NEXT: call void @__kmpc_get_shared_variables(ptr [[GLOBAL_ARGS]])
21441 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load ptr, ptr [[GLOBAL_ARGS]], align 4
21442 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i32 0
21443 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
21444 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i32 1
21445 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
21446 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73_omp_outlined_omp_outlined(ptr [[DOTADDR1]], ptr [[DOTZERO_ADDR]], i32 [[TMP4]], i32 [[TMP6]]) #[[ATTR2]]
21447 // CHECK-32-EX-NEXT: ret void
21450 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81
21451 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
21452 // CHECK-32-EX-NEXT: entry:
21453 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
21454 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
21455 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
21456 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
21457 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81_kernel_environment, ptr [[DYN_PTR]])
21458 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
21459 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
21460 // CHECK-32-EX: user_code.entry:
21461 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
21462 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
21463 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
21464 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
21465 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
21466 // CHECK-32-EX-NEXT: ret void
21467 // CHECK-32-EX: worker.exit:
21468 // CHECK-32-EX-NEXT: ret void
21471 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81_omp_outlined
21472 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
21473 // CHECK-32-EX-NEXT: entry:
21474 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
21475 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
21476 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21477 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
21478 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21479 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21480 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21481 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21482 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
21483 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
21484 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
21485 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
21486 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
21487 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
21488 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
21489 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
21490 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
21491 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
21492 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
21493 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
21494 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
21495 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
21496 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21497 // CHECK-32-EX: cond.true:
21498 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
21499 // CHECK-32-EX: cond.false:
21500 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
21501 // CHECK-32-EX-NEXT: br label [[COND_END]]
21502 // CHECK-32-EX: cond.end:
21503 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
21504 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
21505 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
21506 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
21507 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21508 // CHECK-32-EX: omp.inner.for.cond:
21509 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP301:![0-9]+]]
21510 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
21511 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21512 // CHECK-32-EX: omp.inner.for.body:
21513 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP301]]
21514 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP301]]
21515 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
21516 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
21517 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP301]]
21518 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
21519 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
21520 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP301]]
21521 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP301]]
21522 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21523 // CHECK-32-EX: omp.inner.for.inc:
21524 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP301]]
21525 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP301]]
21526 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
21527 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP301]]
21528 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP301]]
21529 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP301]]
21530 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
21531 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP301]]
21532 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP301]]
21533 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP301]]
21534 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
21535 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP301]]
21536 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP301]]
21537 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
21538 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
21539 // CHECK-32-EX: cond.true5:
21540 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
21541 // CHECK-32-EX: cond.false6:
21542 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP301]]
21543 // CHECK-32-EX-NEXT: br label [[COND_END7]]
21544 // CHECK-32-EX: cond.end7:
21545 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
21546 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP301]]
21547 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP301]]
21548 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP301]]
21549 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP302:![0-9]+]]
21550 // CHECK-32-EX: omp.inner.for.end:
21551 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
21552 // CHECK-32-EX: omp.loop.exit:
21553 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
21554 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
21555 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
21556 // CHECK-32-EX-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21557 // CHECK-32-EX: .omp.final.then:
21558 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
21559 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
21560 // CHECK-32-EX: .omp.final.done:
21561 // CHECK-32-EX-NEXT: ret void
21564 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81_omp_outlined_omp_outlined
21565 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
21566 // CHECK-32-EX-NEXT: entry:
21567 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
21568 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
21569 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
21570 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
21571 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21572 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
21573 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
21574 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
21575 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21576 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21577 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
21578 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
21579 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
21580 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
21581 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
21582 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
21583 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
21584 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
21585 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
21586 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
21587 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
21588 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
21589 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
21590 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
21591 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
21592 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
21593 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
21594 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
21595 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
21596 // CHECK-32-EX: omp.dispatch.cond:
21597 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
21598 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
21599 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
21600 // CHECK-32-EX: omp.dispatch.body:
21601 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
21602 // CHECK-32-EX-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
21603 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21604 // CHECK-32-EX: omp.inner.for.cond:
21605 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP304:![0-9]+]]
21606 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP304]]
21607 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
21608 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21609 // CHECK-32-EX: omp.inner.for.body:
21610 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP304]]
21611 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
21612 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21613 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP304]]
21614 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
21615 // CHECK-32-EX: omp.body.continue:
21616 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21617 // CHECK-32-EX: omp.inner.for.inc:
21618 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP304]]
21619 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
21620 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP304]]
21621 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP305:![0-9]+]]
21622 // CHECK-32-EX: omp.inner.for.end:
21623 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
21624 // CHECK-32-EX: omp.dispatch.inc:
21625 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
21626 // CHECK-32-EX: omp.dispatch.end:
21627 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
21628 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
21629 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
21630 // CHECK-32-EX-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21631 // CHECK-32-EX: .omp.final.then:
21632 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
21633 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
21634 // CHECK-32-EX: .omp.final.done:
21635 // CHECK-32-EX-NEXT: ret void
21638 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85
21639 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
21640 // CHECK-32-EX-NEXT: entry:
21641 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
21642 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
21643 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
21644 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
21645 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85_kernel_environment, ptr [[DYN_PTR]])
21646 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
21647 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
21648 // CHECK-32-EX: user_code.entry:
21649 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
21650 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
21651 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
21652 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
21653 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
21654 // CHECK-32-EX-NEXT: ret void
21655 // CHECK-32-EX: worker.exit:
21656 // CHECK-32-EX-NEXT: ret void
21659 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85_omp_outlined
21660 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
21661 // CHECK-32-EX-NEXT: entry:
21662 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
21663 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
21664 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21665 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
21666 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21667 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21668 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21669 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21670 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
21671 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
21672 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
21673 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
21674 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
21675 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
21676 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
21677 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
21678 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
21679 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
21680 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
21681 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
21682 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
21683 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
21684 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21685 // CHECK-32-EX: cond.true:
21686 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
21687 // CHECK-32-EX: cond.false:
21688 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
21689 // CHECK-32-EX-NEXT: br label [[COND_END]]
21690 // CHECK-32-EX: cond.end:
21691 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
21692 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
21693 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
21694 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
21695 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21696 // CHECK-32-EX: omp.inner.for.cond:
21697 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP307:![0-9]+]]
21698 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
21699 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21700 // CHECK-32-EX: omp.inner.for.body:
21701 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP307]]
21702 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP307]]
21703 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
21704 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
21705 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP307]]
21706 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
21707 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
21708 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP307]]
21709 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP307]]
21710 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21711 // CHECK-32-EX: omp.inner.for.inc:
21712 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP307]]
21713 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP307]]
21714 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
21715 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP307]]
21716 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP307]]
21717 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP307]]
21718 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
21719 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP307]]
21720 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP307]]
21721 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP307]]
21722 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
21723 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP307]]
21724 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP307]]
21725 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
21726 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
21727 // CHECK-32-EX: cond.true5:
21728 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
21729 // CHECK-32-EX: cond.false6:
21730 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP307]]
21731 // CHECK-32-EX-NEXT: br label [[COND_END7]]
21732 // CHECK-32-EX: cond.end7:
21733 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
21734 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP307]]
21735 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP307]]
21736 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP307]]
21737 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP308:![0-9]+]]
21738 // CHECK-32-EX: omp.inner.for.end:
21739 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
21740 // CHECK-32-EX: omp.loop.exit:
21741 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
21742 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
21743 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
21744 // CHECK-32-EX-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21745 // CHECK-32-EX: .omp.final.then:
21746 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
21747 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
21748 // CHECK-32-EX: .omp.final.done:
21749 // CHECK-32-EX-NEXT: ret void
21752 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85_omp_outlined_omp_outlined
21753 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
21754 // CHECK-32-EX-NEXT: entry:
21755 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
21756 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
21757 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
21758 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
21759 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21760 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
21761 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
21762 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
21763 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21764 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21765 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
21766 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
21767 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
21768 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
21769 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
21770 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
21771 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
21772 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
21773 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
21774 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
21775 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
21776 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
21777 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
21778 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
21779 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
21780 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
21781 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
21782 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
21783 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
21784 // CHECK-32-EX: omp.dispatch.cond:
21785 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
21786 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
21787 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
21788 // CHECK-32-EX: omp.dispatch.body:
21789 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
21790 // CHECK-32-EX-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
21791 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21792 // CHECK-32-EX: omp.inner.for.cond:
21793 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP310:![0-9]+]]
21794 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP310]]
21795 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
21796 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21797 // CHECK-32-EX: omp.inner.for.body:
21798 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP310]]
21799 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
21800 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21801 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP310]]
21802 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
21803 // CHECK-32-EX: omp.body.continue:
21804 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21805 // CHECK-32-EX: omp.inner.for.inc:
21806 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP310]]
21807 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
21808 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP310]]
21809 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP311:![0-9]+]]
21810 // CHECK-32-EX: omp.inner.for.end:
21811 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
21812 // CHECK-32-EX: omp.dispatch.inc:
21813 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
21814 // CHECK-32-EX: omp.dispatch.end:
21815 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
21816 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
21817 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
21818 // CHECK-32-EX-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21819 // CHECK-32-EX: .omp.final.then:
21820 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
21821 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
21822 // CHECK-32-EX: .omp.final.done:
21823 // CHECK-32-EX-NEXT: ret void
21826 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89
21827 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
21828 // CHECK-32-EX-NEXT: entry:
21829 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
21830 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
21831 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
21832 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
21833 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89_kernel_environment, ptr [[DYN_PTR]])
21834 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
21835 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
21836 // CHECK-32-EX: user_code.entry:
21837 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
21838 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
21839 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
21840 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
21841 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
21842 // CHECK-32-EX-NEXT: ret void
21843 // CHECK-32-EX: worker.exit:
21844 // CHECK-32-EX-NEXT: ret void
21847 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89_omp_outlined
21848 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
21849 // CHECK-32-EX-NEXT: entry:
21850 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
21851 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
21852 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21853 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
21854 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21855 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21856 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21857 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21858 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
21859 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
21860 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
21861 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
21862 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
21863 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
21864 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
21865 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
21866 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
21867 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
21868 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
21869 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
21870 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
21871 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
21872 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21873 // CHECK-32-EX: cond.true:
21874 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
21875 // CHECK-32-EX: cond.false:
21876 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
21877 // CHECK-32-EX-NEXT: br label [[COND_END]]
21878 // CHECK-32-EX: cond.end:
21879 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
21880 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
21881 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
21882 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
21883 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21884 // CHECK-32-EX: omp.inner.for.cond:
21885 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP313:![0-9]+]]
21886 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
21887 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21888 // CHECK-32-EX: omp.inner.for.body:
21889 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP313]]
21890 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP313]]
21891 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
21892 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
21893 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP313]]
21894 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
21895 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
21896 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP313]]
21897 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP313]]
21898 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21899 // CHECK-32-EX: omp.inner.for.inc:
21900 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP313]]
21901 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP313]]
21902 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
21903 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP313]]
21904 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP313]]
21905 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP313]]
21906 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
21907 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP313]]
21908 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP313]]
21909 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP313]]
21910 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
21911 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP313]]
21912 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP313]]
21913 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
21914 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
21915 // CHECK-32-EX: cond.true5:
21916 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
21917 // CHECK-32-EX: cond.false6:
21918 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP313]]
21919 // CHECK-32-EX-NEXT: br label [[COND_END7]]
21920 // CHECK-32-EX: cond.end7:
21921 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
21922 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP313]]
21923 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP313]]
21924 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP313]]
21925 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP314:![0-9]+]]
21926 // CHECK-32-EX: omp.inner.for.end:
21927 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
21928 // CHECK-32-EX: omp.loop.exit:
21929 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
21930 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
21931 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
21932 // CHECK-32-EX-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21933 // CHECK-32-EX: .omp.final.then:
21934 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
21935 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
21936 // CHECK-32-EX: .omp.final.done:
21937 // CHECK-32-EX-NEXT: ret void
21940 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89_omp_outlined_omp_outlined
21941 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
21942 // CHECK-32-EX-NEXT: entry:
21943 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
21944 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
21945 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
21946 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
21947 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21948 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
21949 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
21950 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
21951 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21952 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21953 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
21954 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
21955 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
21956 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
21957 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
21958 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
21959 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
21960 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
21961 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
21962 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
21963 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
21964 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
21965 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
21966 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
21967 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
21968 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
21969 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
21970 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
21971 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
21972 // CHECK-32-EX: omp.dispatch.cond:
21973 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
21974 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
21975 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
21976 // CHECK-32-EX: omp.dispatch.body:
21977 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
21978 // CHECK-32-EX-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
21979 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21980 // CHECK-32-EX: omp.inner.for.cond:
21981 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP316:![0-9]+]]
21982 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP316]]
21983 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
21984 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21985 // CHECK-32-EX: omp.inner.for.body:
21986 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP316]]
21987 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
21988 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21989 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP316]]
21990 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
21991 // CHECK-32-EX: omp.body.continue:
21992 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21993 // CHECK-32-EX: omp.inner.for.inc:
21994 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP316]]
21995 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
21996 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP316]]
21997 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP317:![0-9]+]]
21998 // CHECK-32-EX: omp.inner.for.end:
21999 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
22000 // CHECK-32-EX: omp.dispatch.inc:
22001 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
22002 // CHECK-32-EX: omp.dispatch.end:
22003 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
22004 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
22005 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
22006 // CHECK-32-EX-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
22007 // CHECK-32-EX: .omp.final.then:
22008 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
22009 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
22010 // CHECK-32-EX: .omp.final.done:
22011 // CHECK-32-EX-NEXT: ret void
22014 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93
22015 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
22016 // CHECK-32-EX-NEXT: entry:
22017 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
22018 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
22019 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
22020 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
22021 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93_kernel_environment, ptr [[DYN_PTR]])
22022 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
22023 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
22024 // CHECK-32-EX: user_code.entry:
22025 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
22026 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
22027 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
22028 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
22029 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
22030 // CHECK-32-EX-NEXT: ret void
22031 // CHECK-32-EX: worker.exit:
22032 // CHECK-32-EX-NEXT: ret void
22035 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93_omp_outlined
22036 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
22037 // CHECK-32-EX-NEXT: entry:
22038 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
22039 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
22040 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
22041 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
22042 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
22043 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
22044 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22045 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22046 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
22047 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
22048 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
22049 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
22050 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
22051 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
22052 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
22053 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
22054 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
22055 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
22056 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
22057 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
22058 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22059 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
22060 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22061 // CHECK-32-EX: cond.true:
22062 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
22063 // CHECK-32-EX: cond.false:
22064 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22065 // CHECK-32-EX-NEXT: br label [[COND_END]]
22066 // CHECK-32-EX: cond.end:
22067 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
22068 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
22069 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22070 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
22071 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
22072 // CHECK-32-EX: omp.inner.for.cond:
22073 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP319:![0-9]+]]
22074 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
22075 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22076 // CHECK-32-EX: omp.inner.for.body:
22077 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP319]]
22078 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP319]]
22079 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
22080 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
22081 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP319]]
22082 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
22083 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
22084 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP319]]
22085 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2), !llvm.access.group [[ACC_GRP319]]
22086 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
22087 // CHECK-32-EX: omp.inner.for.inc:
22088 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP319]]
22089 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP319]]
22090 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
22091 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP319]]
22092 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP319]]
22093 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP319]]
22094 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
22095 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP319]]
22096 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP319]]
22097 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP319]]
22098 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
22099 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP319]]
22100 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP319]]
22101 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
22102 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
22103 // CHECK-32-EX: cond.true5:
22104 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
22105 // CHECK-32-EX: cond.false6:
22106 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP319]]
22107 // CHECK-32-EX-NEXT: br label [[COND_END7]]
22108 // CHECK-32-EX: cond.end7:
22109 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
22110 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP319]]
22111 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP319]]
22112 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP319]]
22113 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP320:![0-9]+]]
22114 // CHECK-32-EX: omp.inner.for.end:
22115 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
22116 // CHECK-32-EX: omp.loop.exit:
22117 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
22118 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
22119 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
22120 // CHECK-32-EX-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
22121 // CHECK-32-EX: .omp.final.then:
22122 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
22123 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
22124 // CHECK-32-EX: .omp.final.done:
22125 // CHECK-32-EX-NEXT: ret void
22128 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93_omp_outlined_omp_outlined
22129 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
22130 // CHECK-32-EX-NEXT: entry:
22131 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
22132 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
22133 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
22134 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
22135 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
22136 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
22137 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
22138 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
22139 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22140 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22141 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
22142 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
22143 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
22144 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
22145 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
22146 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
22147 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
22148 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
22149 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
22150 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
22151 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
22152 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
22153 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
22154 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
22155 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
22156 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
22157 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
22158 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
22159 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
22160 // CHECK-32-EX: omp.dispatch.cond:
22161 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
22162 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
22163 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
22164 // CHECK-32-EX: omp.dispatch.body:
22165 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
22166 // CHECK-32-EX-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
22167 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
22168 // CHECK-32-EX: omp.inner.for.cond:
22169 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP322:![0-9]+]]
22170 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP322]]
22171 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
22172 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22173 // CHECK-32-EX: omp.inner.for.body:
22174 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP322]]
22175 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
22176 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
22177 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP322]]
22178 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
22179 // CHECK-32-EX: omp.body.continue:
22180 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
22181 // CHECK-32-EX: omp.inner.for.inc:
22182 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP322]]
22183 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
22184 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP322]]
22185 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP323:![0-9]+]]
22186 // CHECK-32-EX: omp.inner.for.end:
22187 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
22188 // CHECK-32-EX: omp.dispatch.inc:
22189 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
22190 // CHECK-32-EX: omp.dispatch.end:
22191 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
22192 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
22193 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
22194 // CHECK-32-EX-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
22195 // CHECK-32-EX: .omp.final.then:
22196 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
22197 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
22198 // CHECK-32-EX: .omp.final.done:
22199 // CHECK-32-EX-NEXT: ret void
22202 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97
22203 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
22204 // CHECK-32-EX-NEXT: entry:
22205 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
22206 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
22207 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
22208 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
22209 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97_kernel_environment, ptr [[DYN_PTR]])
22210 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
22211 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
22212 // CHECK-32-EX: user_code.entry:
22213 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
22214 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
22215 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
22216 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
22217 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
22218 // CHECK-32-EX-NEXT: ret void
22219 // CHECK-32-EX: worker.exit:
22220 // CHECK-32-EX-NEXT: ret void
22223 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97_omp_outlined
22224 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
22225 // CHECK-32-EX-NEXT: entry:
22226 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
22227 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
22228 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
22229 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
22230 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
22231 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
22232 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22233 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22234 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
22235 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
22236 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
22237 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
22238 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
22239 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
22240 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
22241 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
22242 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
22243 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
22244 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
22245 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
22246 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22247 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
22248 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22249 // CHECK-32-EX: cond.true:
22250 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
22251 // CHECK-32-EX: cond.false:
22252 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22253 // CHECK-32-EX-NEXT: br label [[COND_END]]
22254 // CHECK-32-EX: cond.end:
22255 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
22256 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
22257 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22258 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
22259 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
22260 // CHECK-32-EX: omp.inner.for.cond:
22261 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
22262 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
22263 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22264 // CHECK-32-EX: omp.inner.for.body:
22265 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22266 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22267 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
22268 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
22269 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
22270 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
22271 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
22272 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
22273 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
22274 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
22275 // CHECK-32-EX: omp.inner.for.inc:
22276 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
22277 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
22278 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
22279 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
22280 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22281 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
22282 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
22283 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
22284 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22285 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
22286 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
22287 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
22288 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22289 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
22290 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
22291 // CHECK-32-EX: cond.true5:
22292 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
22293 // CHECK-32-EX: cond.false6:
22294 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22295 // CHECK-32-EX-NEXT: br label [[COND_END7]]
22296 // CHECK-32-EX: cond.end7:
22297 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
22298 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
22299 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22300 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
22301 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
22302 // CHECK-32-EX: omp.inner.for.end:
22303 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
22304 // CHECK-32-EX: omp.loop.exit:
22305 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
22306 // CHECK-32-EX-NEXT: ret void
22309 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97_omp_outlined_omp_outlined
22310 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
22311 // CHECK-32-EX-NEXT: entry:
22312 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
22313 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
22314 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
22315 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
22316 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
22317 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
22318 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
22319 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
22320 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22321 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22322 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
22323 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
22324 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
22325 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
22326 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
22327 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
22328 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
22329 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
22330 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
22331 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
22332 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
22333 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
22334 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
22335 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
22336 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
22337 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
22338 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
22339 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
22340 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
22341 // CHECK-32-EX: omp.inner.for.cond:
22342 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
22343 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
22344 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]]
22345 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22346 // CHECK-32-EX: omp.inner.for.body:
22347 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
22348 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
22349 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
22350 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4
22351 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
22352 // CHECK-32-EX: omp.body.continue:
22353 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
22354 // CHECK-32-EX: omp.inner.for.inc:
22355 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
22356 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
22357 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
22358 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4
22359 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
22360 // CHECK-32-EX: omp.inner.for.end:
22361 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
22362 // CHECK-32-EX: omp.loop.exit:
22363 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
22364 // CHECK-32-EX-NEXT: ret void
22367 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101
22368 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
22369 // CHECK-32-EX-NEXT: entry:
22370 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
22371 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
22372 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
22373 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
22374 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101_kernel_environment, ptr [[DYN_PTR]])
22375 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
22376 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
22377 // CHECK-32-EX: user_code.entry:
22378 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
22379 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
22380 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
22381 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
22382 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
22383 // CHECK-32-EX-NEXT: ret void
22384 // CHECK-32-EX: worker.exit:
22385 // CHECK-32-EX-NEXT: ret void
22388 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101_omp_outlined
22389 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
22390 // CHECK-32-EX-NEXT: entry:
22391 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
22392 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
22393 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
22394 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
22395 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
22396 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
22397 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22398 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22399 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
22400 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
22401 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
22402 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
22403 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
22404 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
22405 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
22406 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
22407 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
22408 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
22409 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
22410 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
22411 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22412 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
22413 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22414 // CHECK-32-EX: cond.true:
22415 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
22416 // CHECK-32-EX: cond.false:
22417 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22418 // CHECK-32-EX-NEXT: br label [[COND_END]]
22419 // CHECK-32-EX: cond.end:
22420 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
22421 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
22422 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22423 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
22424 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
22425 // CHECK-32-EX: omp.inner.for.cond:
22426 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
22427 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
22428 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22429 // CHECK-32-EX: omp.inner.for.body:
22430 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22431 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22432 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
22433 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
22434 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
22435 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
22436 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
22437 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
22438 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
22439 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
22440 // CHECK-32-EX: omp.inner.for.inc:
22441 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
22442 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
22443 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
22444 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
22445 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22446 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
22447 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
22448 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
22449 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22450 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
22451 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
22452 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
22453 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22454 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
22455 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
22456 // CHECK-32-EX: cond.true5:
22457 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
22458 // CHECK-32-EX: cond.false6:
22459 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22460 // CHECK-32-EX-NEXT: br label [[COND_END7]]
22461 // CHECK-32-EX: cond.end7:
22462 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
22463 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
22464 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22465 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
22466 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
22467 // CHECK-32-EX: omp.inner.for.end:
22468 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
22469 // CHECK-32-EX: omp.loop.exit:
22470 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
22471 // CHECK-32-EX-NEXT: ret void
22474 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101_omp_outlined_omp_outlined
22475 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
22476 // CHECK-32-EX-NEXT: entry:
22477 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
22478 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
22479 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
22480 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
22481 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
22482 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
22483 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
22484 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
22485 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22486 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22487 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
22488 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
22489 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
22490 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
22491 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
22492 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
22493 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
22494 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
22495 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
22496 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
22497 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
22498 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
22499 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
22500 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
22501 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
22502 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
22503 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
22504 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9
22505 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22506 // CHECK-32-EX: cond.true:
22507 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
22508 // CHECK-32-EX: cond.false:
22509 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
22510 // CHECK-32-EX-NEXT: br label [[COND_END]]
22511 // CHECK-32-EX: cond.end:
22512 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
22513 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
22514 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
22515 // CHECK-32-EX-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
22516 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
22517 // CHECK-32-EX: omp.inner.for.cond:
22518 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
22519 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
22520 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
22521 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22522 // CHECK-32-EX: omp.inner.for.body:
22523 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
22524 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
22525 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
22526 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4
22527 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
22528 // CHECK-32-EX: omp.body.continue:
22529 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
22530 // CHECK-32-EX: omp.inner.for.inc:
22531 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
22532 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
22533 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
22534 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
22535 // CHECK-32-EX: omp.inner.for.end:
22536 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
22537 // CHECK-32-EX: omp.loop.exit:
22538 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
22539 // CHECK-32-EX-NEXT: ret void
22542 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105
22543 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
22544 // CHECK-32-EX-NEXT: entry:
22545 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
22546 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
22547 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
22548 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
22549 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105_kernel_environment, ptr [[DYN_PTR]])
22550 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
22551 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
22552 // CHECK-32-EX: user_code.entry:
22553 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
22554 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
22555 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
22556 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
22557 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
22558 // CHECK-32-EX-NEXT: ret void
22559 // CHECK-32-EX: worker.exit:
22560 // CHECK-32-EX-NEXT: ret void
22563 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105_omp_outlined
22564 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
22565 // CHECK-32-EX-NEXT: entry:
22566 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
22567 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
22568 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
22569 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
22570 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
22571 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
22572 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22573 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22574 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
22575 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
22576 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
22577 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
22578 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
22579 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
22580 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
22581 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
22582 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
22583 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
22584 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
22585 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
22586 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22587 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
22588 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22589 // CHECK-32-EX: cond.true:
22590 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
22591 // CHECK-32-EX: cond.false:
22592 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22593 // CHECK-32-EX-NEXT: br label [[COND_END]]
22594 // CHECK-32-EX: cond.end:
22595 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
22596 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
22597 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22598 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
22599 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
22600 // CHECK-32-EX: omp.inner.for.cond:
22601 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
22602 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
22603 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22604 // CHECK-32-EX: omp.inner.for.body:
22605 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22606 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22607 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
22608 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
22609 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
22610 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
22611 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
22612 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
22613 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
22614 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
22615 // CHECK-32-EX: omp.inner.for.inc:
22616 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
22617 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
22618 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
22619 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
22620 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22621 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
22622 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
22623 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
22624 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22625 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
22626 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
22627 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
22628 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22629 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
22630 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
22631 // CHECK-32-EX: cond.true5:
22632 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
22633 // CHECK-32-EX: cond.false6:
22634 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22635 // CHECK-32-EX-NEXT: br label [[COND_END7]]
22636 // CHECK-32-EX: cond.end7:
22637 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
22638 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
22639 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22640 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
22641 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
22642 // CHECK-32-EX: omp.inner.for.end:
22643 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
22644 // CHECK-32-EX: omp.loop.exit:
22645 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
22646 // CHECK-32-EX-NEXT: ret void
22649 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105_omp_outlined_omp_outlined
22650 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
22651 // CHECK-32-EX-NEXT: entry:
22652 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
22653 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
22654 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
22655 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
22656 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
22657 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
22658 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
22659 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
22660 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22661 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22662 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
22663 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
22664 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
22665 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
22666 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
22667 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
22668 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
22669 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
22670 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
22671 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
22672 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
22673 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
22674 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
22675 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
22676 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
22677 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
22678 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
22679 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
22680 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
22681 // CHECK-32-EX: omp.inner.for.cond:
22682 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
22683 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
22684 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]]
22685 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22686 // CHECK-32-EX: omp.inner.for.body:
22687 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
22688 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
22689 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
22690 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4
22691 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
22692 // CHECK-32-EX: omp.body.continue:
22693 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
22694 // CHECK-32-EX: omp.inner.for.inc:
22695 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
22696 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
22697 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
22698 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4
22699 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
22700 // CHECK-32-EX: omp.inner.for.end:
22701 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
22702 // CHECK-32-EX: omp.loop.exit:
22703 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
22704 // CHECK-32-EX-NEXT: ret void
22707 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109
22708 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
22709 // CHECK-32-EX-NEXT: entry:
22710 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
22711 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
22712 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
22713 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
22714 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109_kernel_environment, ptr [[DYN_PTR]])
22715 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
22716 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
22717 // CHECK-32-EX: user_code.entry:
22718 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
22719 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
22720 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
22721 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
22722 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
22723 // CHECK-32-EX-NEXT: ret void
22724 // CHECK-32-EX: worker.exit:
22725 // CHECK-32-EX-NEXT: ret void
22728 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109_omp_outlined
22729 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
22730 // CHECK-32-EX-NEXT: entry:
22731 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
22732 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
22733 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
22734 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
22735 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
22736 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
22737 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22738 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22739 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
22740 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
22741 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
22742 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
22743 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
22744 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
22745 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
22746 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
22747 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
22748 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
22749 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
22750 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
22751 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22752 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
22753 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22754 // CHECK-32-EX: cond.true:
22755 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
22756 // CHECK-32-EX: cond.false:
22757 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22758 // CHECK-32-EX-NEXT: br label [[COND_END]]
22759 // CHECK-32-EX: cond.end:
22760 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
22761 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
22762 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22763 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
22764 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
22765 // CHECK-32-EX: omp.inner.for.cond:
22766 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
22767 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
22768 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22769 // CHECK-32-EX: omp.inner.for.body:
22770 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22771 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22772 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
22773 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
22774 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
22775 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
22776 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
22777 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
22778 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
22779 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
22780 // CHECK-32-EX: omp.inner.for.inc:
22781 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
22782 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
22783 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
22784 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
22785 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22786 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
22787 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
22788 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
22789 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22790 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
22791 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
22792 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
22793 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22794 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
22795 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
22796 // CHECK-32-EX: cond.true5:
22797 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
22798 // CHECK-32-EX: cond.false6:
22799 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22800 // CHECK-32-EX-NEXT: br label [[COND_END7]]
22801 // CHECK-32-EX: cond.end7:
22802 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
22803 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
22804 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22805 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
22806 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
22807 // CHECK-32-EX: omp.inner.for.end:
22808 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
22809 // CHECK-32-EX: omp.loop.exit:
22810 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
22811 // CHECK-32-EX-NEXT: ret void
22814 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109_omp_outlined_omp_outlined
22815 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
22816 // CHECK-32-EX-NEXT: entry:
22817 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
22818 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
22819 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
22820 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
22821 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
22822 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
22823 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
22824 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
22825 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22826 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22827 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
22828 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
22829 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
22830 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
22831 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
22832 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
22833 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
22834 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
22835 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
22836 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
22837 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
22838 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
22839 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
22840 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
22841 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
22842 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
22843 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
22844 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
22845 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
22846 // CHECK-32-EX: omp.dispatch.cond:
22847 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
22848 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
22849 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
22850 // CHECK-32-EX: omp.dispatch.body:
22851 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
22852 // CHECK-32-EX-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
22853 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
22854 // CHECK-32-EX: omp.inner.for.cond:
22855 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP325:![0-9]+]]
22856 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP325]]
22857 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
22858 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22859 // CHECK-32-EX: omp.inner.for.body:
22860 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP325]]
22861 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
22862 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
22863 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP325]]
22864 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
22865 // CHECK-32-EX: omp.body.continue:
22866 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
22867 // CHECK-32-EX: omp.inner.for.inc:
22868 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP325]]
22869 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
22870 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP325]]
22871 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP326:![0-9]+]]
22872 // CHECK-32-EX: omp.inner.for.end:
22873 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
22874 // CHECK-32-EX: omp.dispatch.inc:
22875 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
22876 // CHECK-32-EX: omp.dispatch.end:
22877 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
22878 // CHECK-32-EX-NEXT: ret void
22881 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113
22882 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
22883 // CHECK-32-EX-NEXT: entry:
22884 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
22885 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
22886 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
22887 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
22888 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113_kernel_environment, ptr [[DYN_PTR]])
22889 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
22890 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
22891 // CHECK-32-EX: user_code.entry:
22892 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
22893 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
22894 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
22895 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
22896 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
22897 // CHECK-32-EX-NEXT: ret void
22898 // CHECK-32-EX: worker.exit:
22899 // CHECK-32-EX-NEXT: ret void
22902 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113_omp_outlined
22903 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
22904 // CHECK-32-EX-NEXT: entry:
22905 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
22906 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
22907 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
22908 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
22909 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
22910 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
22911 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22912 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22913 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
22914 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
22915 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
22916 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
22917 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
22918 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
22919 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
22920 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
22921 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
22922 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
22923 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
22924 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
22925 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22926 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
22927 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22928 // CHECK-32-EX: cond.true:
22929 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
22930 // CHECK-32-EX: cond.false:
22931 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22932 // CHECK-32-EX-NEXT: br label [[COND_END]]
22933 // CHECK-32-EX: cond.end:
22934 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
22935 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
22936 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22937 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
22938 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
22939 // CHECK-32-EX: omp.inner.for.cond:
22940 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
22941 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
22942 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22943 // CHECK-32-EX: omp.inner.for.body:
22944 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22945 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22946 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
22947 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
22948 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
22949 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
22950 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
22951 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
22952 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
22953 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
22954 // CHECK-32-EX: omp.inner.for.inc:
22955 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
22956 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
22957 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
22958 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
22959 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22960 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
22961 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
22962 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
22963 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22964 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
22965 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
22966 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
22967 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22968 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
22969 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
22970 // CHECK-32-EX: cond.true5:
22971 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
22972 // CHECK-32-EX: cond.false6:
22973 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
22974 // CHECK-32-EX-NEXT: br label [[COND_END7]]
22975 // CHECK-32-EX: cond.end7:
22976 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
22977 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
22978 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
22979 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
22980 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
22981 // CHECK-32-EX: omp.inner.for.end:
22982 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
22983 // CHECK-32-EX: omp.loop.exit:
22984 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
22985 // CHECK-32-EX-NEXT: ret void
22988 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113_omp_outlined_omp_outlined
22989 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
22990 // CHECK-32-EX-NEXT: entry:
22991 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
22992 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
22993 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
22994 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
22995 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
22996 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
22997 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
22998 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
22999 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23000 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23001 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
23002 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
23003 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
23004 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
23005 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
23006 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
23007 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
23008 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
23009 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
23010 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
23011 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
23012 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
23013 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
23014 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
23015 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
23016 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
23017 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
23018 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
23019 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
23020 // CHECK-32-EX: omp.dispatch.cond:
23021 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
23022 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
23023 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
23024 // CHECK-32-EX: omp.dispatch.body:
23025 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
23026 // CHECK-32-EX-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
23027 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23028 // CHECK-32-EX: omp.inner.for.cond:
23029 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP328:![0-9]+]]
23030 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP328]]
23031 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
23032 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23033 // CHECK-32-EX: omp.inner.for.body:
23034 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP328]]
23035 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
23036 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23037 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP328]]
23038 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
23039 // CHECK-32-EX: omp.body.continue:
23040 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23041 // CHECK-32-EX: omp.inner.for.inc:
23042 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP328]]
23043 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
23044 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP328]]
23045 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP329:![0-9]+]]
23046 // CHECK-32-EX: omp.inner.for.end:
23047 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
23048 // CHECK-32-EX: omp.dispatch.inc:
23049 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
23050 // CHECK-32-EX: omp.dispatch.end:
23051 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
23052 // CHECK-32-EX-NEXT: ret void
23055 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117
23056 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
23057 // CHECK-32-EX-NEXT: entry:
23058 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
23059 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
23060 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
23061 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
23062 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117_kernel_environment, ptr [[DYN_PTR]])
23063 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
23064 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
23065 // CHECK-32-EX: user_code.entry:
23066 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
23067 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
23068 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
23069 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
23070 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
23071 // CHECK-32-EX-NEXT: ret void
23072 // CHECK-32-EX: worker.exit:
23073 // CHECK-32-EX-NEXT: ret void
23076 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117_omp_outlined
23077 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
23078 // CHECK-32-EX-NEXT: entry:
23079 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
23080 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
23081 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
23082 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
23083 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23084 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23085 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23086 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23087 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
23088 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
23089 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
23090 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
23091 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
23092 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
23093 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
23094 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
23095 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
23096 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
23097 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
23098 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
23099 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23100 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
23101 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23102 // CHECK-32-EX: cond.true:
23103 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
23104 // CHECK-32-EX: cond.false:
23105 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23106 // CHECK-32-EX-NEXT: br label [[COND_END]]
23107 // CHECK-32-EX: cond.end:
23108 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
23109 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
23110 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23111 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
23112 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23113 // CHECK-32-EX: omp.inner.for.cond:
23114 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23115 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
23116 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23117 // CHECK-32-EX: omp.inner.for.body:
23118 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23119 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23120 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
23121 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
23122 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
23123 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
23124 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
23125 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
23126 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
23127 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23128 // CHECK-32-EX: omp.inner.for.inc:
23129 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23130 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
23131 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
23132 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
23133 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23134 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
23135 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
23136 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
23137 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23138 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
23139 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
23140 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
23141 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23142 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
23143 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
23144 // CHECK-32-EX: cond.true5:
23145 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
23146 // CHECK-32-EX: cond.false6:
23147 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23148 // CHECK-32-EX-NEXT: br label [[COND_END7]]
23149 // CHECK-32-EX: cond.end7:
23150 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
23151 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
23152 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23153 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
23154 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
23155 // CHECK-32-EX: omp.inner.for.end:
23156 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
23157 // CHECK-32-EX: omp.loop.exit:
23158 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
23159 // CHECK-32-EX-NEXT: ret void
23162 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117_omp_outlined_omp_outlined
23163 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
23164 // CHECK-32-EX-NEXT: entry:
23165 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
23166 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
23167 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23168 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23169 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
23170 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
23171 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
23172 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
23173 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23174 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23175 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
23176 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
23177 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
23178 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
23179 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
23180 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
23181 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
23182 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
23183 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
23184 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
23185 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
23186 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
23187 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
23188 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
23189 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
23190 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
23191 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
23192 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
23193 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
23194 // CHECK-32-EX: omp.dispatch.cond:
23195 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
23196 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
23197 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
23198 // CHECK-32-EX: omp.dispatch.body:
23199 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
23200 // CHECK-32-EX-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
23201 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23202 // CHECK-32-EX: omp.inner.for.cond:
23203 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP331:![0-9]+]]
23204 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP331]]
23205 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
23206 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23207 // CHECK-32-EX: omp.inner.for.body:
23208 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP331]]
23209 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
23210 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23211 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP331]]
23212 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
23213 // CHECK-32-EX: omp.body.continue:
23214 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23215 // CHECK-32-EX: omp.inner.for.inc:
23216 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP331]]
23217 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
23218 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP331]]
23219 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP332:![0-9]+]]
23220 // CHECK-32-EX: omp.inner.for.end:
23221 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
23222 // CHECK-32-EX: omp.dispatch.inc:
23223 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
23224 // CHECK-32-EX: omp.dispatch.end:
23225 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
23226 // CHECK-32-EX-NEXT: ret void
23229 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121
23230 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
23231 // CHECK-32-EX-NEXT: entry:
23232 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
23233 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
23234 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
23235 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
23236 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121_kernel_environment, ptr [[DYN_PTR]])
23237 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
23238 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
23239 // CHECK-32-EX: user_code.entry:
23240 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
23241 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
23242 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
23243 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
23244 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
23245 // CHECK-32-EX-NEXT: ret void
23246 // CHECK-32-EX: worker.exit:
23247 // CHECK-32-EX-NEXT: ret void
23250 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121_omp_outlined
23251 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
23252 // CHECK-32-EX-NEXT: entry:
23253 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
23254 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
23255 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
23256 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
23257 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23258 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23259 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23260 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23261 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
23262 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
23263 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
23264 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
23265 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
23266 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
23267 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
23268 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
23269 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
23270 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
23271 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
23272 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
23273 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23274 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
23275 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23276 // CHECK-32-EX: cond.true:
23277 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
23278 // CHECK-32-EX: cond.false:
23279 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23280 // CHECK-32-EX-NEXT: br label [[COND_END]]
23281 // CHECK-32-EX: cond.end:
23282 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
23283 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
23284 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23285 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
23286 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23287 // CHECK-32-EX: omp.inner.for.cond:
23288 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23289 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
23290 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23291 // CHECK-32-EX: omp.inner.for.body:
23292 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23293 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23294 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
23295 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
23296 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
23297 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
23298 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
23299 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
23300 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
23301 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23302 // CHECK-32-EX: omp.inner.for.inc:
23303 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23304 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
23305 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
23306 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
23307 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23308 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
23309 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
23310 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
23311 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23312 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
23313 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
23314 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
23315 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23316 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
23317 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
23318 // CHECK-32-EX: cond.true5:
23319 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
23320 // CHECK-32-EX: cond.false6:
23321 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23322 // CHECK-32-EX-NEXT: br label [[COND_END7]]
23323 // CHECK-32-EX: cond.end7:
23324 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
23325 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
23326 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23327 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
23328 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
23329 // CHECK-32-EX: omp.inner.for.end:
23330 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
23331 // CHECK-32-EX: omp.loop.exit:
23332 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
23333 // CHECK-32-EX-NEXT: ret void
23336 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121_omp_outlined_omp_outlined
23337 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
23338 // CHECK-32-EX-NEXT: entry:
23339 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
23340 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
23341 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23342 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23343 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
23344 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
23345 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
23346 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
23347 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23348 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23349 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
23350 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
23351 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
23352 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
23353 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
23354 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
23355 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
23356 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
23357 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
23358 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
23359 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
23360 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
23361 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
23362 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
23363 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
23364 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
23365 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
23366 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
23367 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
23368 // CHECK-32-EX: omp.dispatch.cond:
23369 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
23370 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
23371 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
23372 // CHECK-32-EX: omp.dispatch.body:
23373 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
23374 // CHECK-32-EX-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
23375 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23376 // CHECK-32-EX: omp.inner.for.cond:
23377 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP334:![0-9]+]]
23378 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP334]]
23379 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
23380 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23381 // CHECK-32-EX: omp.inner.for.body:
23382 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP334]]
23383 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
23384 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23385 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP334]]
23386 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
23387 // CHECK-32-EX: omp.body.continue:
23388 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23389 // CHECK-32-EX: omp.inner.for.inc:
23390 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP334]]
23391 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
23392 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP334]]
23393 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP335:![0-9]+]]
23394 // CHECK-32-EX: omp.inner.for.end:
23395 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
23396 // CHECK-32-EX: omp.dispatch.inc:
23397 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
23398 // CHECK-32-EX: omp.dispatch.end:
23399 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
23400 // CHECK-32-EX-NEXT: ret void
23403 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125
23404 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
23405 // CHECK-32-EX-NEXT: entry:
23406 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
23407 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
23408 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
23409 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
23410 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125_kernel_environment, ptr [[DYN_PTR]])
23411 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
23412 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
23413 // CHECK-32-EX: user_code.entry:
23414 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
23415 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
23416 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
23417 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
23418 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
23419 // CHECK-32-EX-NEXT: ret void
23420 // CHECK-32-EX: worker.exit:
23421 // CHECK-32-EX-NEXT: ret void
23424 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125_omp_outlined
23425 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
23426 // CHECK-32-EX-NEXT: entry:
23427 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
23428 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
23429 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
23430 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
23431 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23432 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23433 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23434 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23435 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
23436 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
23437 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
23438 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
23439 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
23440 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
23441 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
23442 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
23443 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
23444 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
23445 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
23446 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
23447 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23448 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
23449 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23450 // CHECK-32-EX: cond.true:
23451 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
23452 // CHECK-32-EX: cond.false:
23453 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23454 // CHECK-32-EX-NEXT: br label [[COND_END]]
23455 // CHECK-32-EX: cond.end:
23456 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
23457 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
23458 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23459 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
23460 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23461 // CHECK-32-EX: omp.inner.for.cond:
23462 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23463 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
23464 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23465 // CHECK-32-EX: omp.inner.for.body:
23466 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23467 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23468 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
23469 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
23470 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
23471 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
23472 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
23473 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
23474 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
23475 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23476 // CHECK-32-EX: omp.inner.for.inc:
23477 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23478 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
23479 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
23480 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
23481 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23482 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
23483 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
23484 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
23485 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23486 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
23487 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
23488 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
23489 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23490 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
23491 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
23492 // CHECK-32-EX: cond.true5:
23493 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
23494 // CHECK-32-EX: cond.false6:
23495 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23496 // CHECK-32-EX-NEXT: br label [[COND_END7]]
23497 // CHECK-32-EX: cond.end7:
23498 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
23499 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
23500 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23501 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
23502 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
23503 // CHECK-32-EX: omp.inner.for.end:
23504 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
23505 // CHECK-32-EX: omp.loop.exit:
23506 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
23507 // CHECK-32-EX-NEXT: ret void
23510 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125_omp_outlined_omp_outlined
23511 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
23512 // CHECK-32-EX-NEXT: entry:
23513 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
23514 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
23515 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23516 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23517 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
23518 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
23519 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
23520 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
23521 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23522 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23523 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
23524 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
23525 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
23526 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
23527 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
23528 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
23529 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
23530 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
23531 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
23532 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
23533 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
23534 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
23535 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
23536 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
23537 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
23538 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
23539 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
23540 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
23541 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23542 // CHECK-32-EX: omp.inner.for.cond:
23543 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23544 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
23545 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]]
23546 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23547 // CHECK-32-EX: omp.inner.for.body:
23548 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23549 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
23550 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23551 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4
23552 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
23553 // CHECK-32-EX: omp.body.continue:
23554 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23555 // CHECK-32-EX: omp.inner.for.inc:
23556 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23557 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
23558 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
23559 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4
23560 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
23561 // CHECK-32-EX: omp.inner.for.end:
23562 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
23563 // CHECK-32-EX: omp.loop.exit:
23564 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
23565 // CHECK-32-EX-NEXT: ret void
23568 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130
23569 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
23570 // CHECK-32-EX-NEXT: entry:
23571 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
23572 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
23573 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
23574 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
23575 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130_kernel_environment, ptr [[DYN_PTR]])
23576 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
23577 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
23578 // CHECK-32-EX: user_code.entry:
23579 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
23580 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
23581 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
23582 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
23583 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
23584 // CHECK-32-EX-NEXT: ret void
23585 // CHECK-32-EX: worker.exit:
23586 // CHECK-32-EX-NEXT: ret void
23589 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130_omp_outlined
23590 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
23591 // CHECK-32-EX-NEXT: entry:
23592 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
23593 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
23594 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
23595 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
23596 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23597 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23598 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23599 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23600 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
23601 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
23602 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
23603 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
23604 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
23605 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
23606 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
23607 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
23608 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
23609 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
23610 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
23611 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
23612 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23613 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
23614 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23615 // CHECK-32-EX: cond.true:
23616 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
23617 // CHECK-32-EX: cond.false:
23618 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23619 // CHECK-32-EX-NEXT: br label [[COND_END]]
23620 // CHECK-32-EX: cond.end:
23621 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
23622 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
23623 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23624 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
23625 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23626 // CHECK-32-EX: omp.inner.for.cond:
23627 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23628 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
23629 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23630 // CHECK-32-EX: omp.inner.for.body:
23631 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23632 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23633 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
23634 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
23635 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
23636 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
23637 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
23638 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
23639 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
23640 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23641 // CHECK-32-EX: omp.inner.for.inc:
23642 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23643 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
23644 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
23645 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
23646 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23647 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
23648 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
23649 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
23650 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23651 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
23652 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
23653 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
23654 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23655 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
23656 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
23657 // CHECK-32-EX: cond.true5:
23658 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
23659 // CHECK-32-EX: cond.false6:
23660 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23661 // CHECK-32-EX-NEXT: br label [[COND_END7]]
23662 // CHECK-32-EX: cond.end7:
23663 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
23664 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
23665 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23666 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
23667 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
23668 // CHECK-32-EX: omp.inner.for.end:
23669 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
23670 // CHECK-32-EX: omp.loop.exit:
23671 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
23672 // CHECK-32-EX-NEXT: ret void
23675 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130_omp_outlined_omp_outlined
23676 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
23677 // CHECK-32-EX-NEXT: entry:
23678 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
23679 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
23680 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23681 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23682 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
23683 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
23684 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
23685 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
23686 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23687 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23688 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
23689 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
23690 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
23691 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
23692 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
23693 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
23694 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
23695 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
23696 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
23697 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
23698 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
23699 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
23700 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
23701 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
23702 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
23703 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
23704 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
23705 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9
23706 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23707 // CHECK-32-EX: cond.true:
23708 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
23709 // CHECK-32-EX: cond.false:
23710 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
23711 // CHECK-32-EX-NEXT: br label [[COND_END]]
23712 // CHECK-32-EX: cond.end:
23713 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
23714 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
23715 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
23716 // CHECK-32-EX-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
23717 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23718 // CHECK-32-EX: omp.inner.for.cond:
23719 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23720 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
23721 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
23722 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23723 // CHECK-32-EX: omp.inner.for.body:
23724 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23725 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
23726 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23727 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4
23728 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
23729 // CHECK-32-EX: omp.body.continue:
23730 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23731 // CHECK-32-EX: omp.inner.for.inc:
23732 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23733 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
23734 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
23735 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
23736 // CHECK-32-EX: omp.inner.for.end:
23737 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
23738 // CHECK-32-EX: omp.loop.exit:
23739 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
23740 // CHECK-32-EX-NEXT: ret void
23743 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135
23744 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
23745 // CHECK-32-EX-NEXT: entry:
23746 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
23747 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
23748 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
23749 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
23750 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135_kernel_environment, ptr [[DYN_PTR]])
23751 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
23752 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
23753 // CHECK-32-EX: user_code.entry:
23754 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
23755 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
23756 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
23757 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
23758 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
23759 // CHECK-32-EX-NEXT: ret void
23760 // CHECK-32-EX: worker.exit:
23761 // CHECK-32-EX-NEXT: ret void
23764 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135_omp_outlined
23765 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
23766 // CHECK-32-EX-NEXT: entry:
23767 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
23768 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
23769 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
23770 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
23771 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23772 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23773 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23774 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23775 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
23776 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
23777 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
23778 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
23779 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
23780 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
23781 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
23782 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
23783 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
23784 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
23785 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
23786 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
23787 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23788 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
23789 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23790 // CHECK-32-EX: cond.true:
23791 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
23792 // CHECK-32-EX: cond.false:
23793 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23794 // CHECK-32-EX-NEXT: br label [[COND_END]]
23795 // CHECK-32-EX: cond.end:
23796 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
23797 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
23798 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23799 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
23800 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23801 // CHECK-32-EX: omp.inner.for.cond:
23802 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23803 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
23804 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23805 // CHECK-32-EX: omp.inner.for.body:
23806 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23807 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23808 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
23809 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
23810 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
23811 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
23812 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
23813 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
23814 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
23815 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23816 // CHECK-32-EX: omp.inner.for.inc:
23817 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23818 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
23819 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
23820 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
23821 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23822 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
23823 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
23824 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
23825 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23826 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
23827 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
23828 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
23829 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23830 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
23831 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
23832 // CHECK-32-EX: cond.true5:
23833 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
23834 // CHECK-32-EX: cond.false6:
23835 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23836 // CHECK-32-EX-NEXT: br label [[COND_END7]]
23837 // CHECK-32-EX: cond.end7:
23838 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
23839 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
23840 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23841 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
23842 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
23843 // CHECK-32-EX: omp.inner.for.end:
23844 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
23845 // CHECK-32-EX: omp.loop.exit:
23846 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
23847 // CHECK-32-EX-NEXT: ret void
23850 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135_omp_outlined_omp_outlined
23851 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
23852 // CHECK-32-EX-NEXT: entry:
23853 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
23854 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
23855 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23856 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23857 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
23858 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
23859 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
23860 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
23861 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23862 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23863 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
23864 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
23865 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
23866 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
23867 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
23868 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
23869 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
23870 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
23871 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
23872 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
23873 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
23874 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
23875 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
23876 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
23877 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
23878 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP3]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
23879 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
23880 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
23881 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23882 // CHECK-32-EX: omp.inner.for.cond:
23883 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23884 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
23885 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]]
23886 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23887 // CHECK-32-EX: omp.inner.for.body:
23888 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23889 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
23890 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23891 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4
23892 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
23893 // CHECK-32-EX: omp.body.continue:
23894 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23895 // CHECK-32-EX: omp.inner.for.inc:
23896 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23897 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
23898 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
23899 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4
23900 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
23901 // CHECK-32-EX: omp.inner.for.end:
23902 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
23903 // CHECK-32-EX: omp.loop.exit:
23904 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP3]])
23905 // CHECK-32-EX-NEXT: ret void
23908 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140
23909 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
23910 // CHECK-32-EX-NEXT: entry:
23911 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
23912 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
23913 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
23914 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
23915 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140_kernel_environment, ptr [[DYN_PTR]])
23916 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
23917 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
23918 // CHECK-32-EX: user_code.entry:
23919 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
23920 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
23921 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
23922 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
23923 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
23924 // CHECK-32-EX-NEXT: ret void
23925 // CHECK-32-EX: worker.exit:
23926 // CHECK-32-EX-NEXT: ret void
23929 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140_omp_outlined
23930 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
23931 // CHECK-32-EX-NEXT: entry:
23932 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
23933 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
23934 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
23935 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
23936 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23937 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23938 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23939 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23940 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
23941 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
23942 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
23943 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
23944 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
23945 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
23946 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
23947 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
23948 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
23949 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
23950 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
23951 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
23952 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23953 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
23954 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23955 // CHECK-32-EX: cond.true:
23956 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
23957 // CHECK-32-EX: cond.false:
23958 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23959 // CHECK-32-EX-NEXT: br label [[COND_END]]
23960 // CHECK-32-EX: cond.end:
23961 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
23962 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
23963 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23964 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
23965 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23966 // CHECK-32-EX: omp.inner.for.cond:
23967 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23968 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
23969 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23970 // CHECK-32-EX: omp.inner.for.body:
23971 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23972 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23973 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
23974 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
23975 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
23976 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
23977 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
23978 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
23979 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
23980 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23981 // CHECK-32-EX: omp.inner.for.inc:
23982 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
23983 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
23984 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
23985 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
23986 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
23987 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
23988 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
23989 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
23990 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23991 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
23992 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
23993 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
23994 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
23995 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
23996 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
23997 // CHECK-32-EX: cond.true5:
23998 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
23999 // CHECK-32-EX: cond.false6:
24000 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
24001 // CHECK-32-EX-NEXT: br label [[COND_END7]]
24002 // CHECK-32-EX: cond.end7:
24003 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
24004 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
24005 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
24006 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
24007 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
24008 // CHECK-32-EX: omp.inner.for.end:
24009 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
24010 // CHECK-32-EX: omp.loop.exit:
24011 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
24012 // CHECK-32-EX-NEXT: ret void
24015 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140_omp_outlined_omp_outlined
24016 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
24017 // CHECK-32-EX-NEXT: entry:
24018 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
24019 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
24020 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24021 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24022 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
24023 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
24024 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
24025 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
24026 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24027 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24028 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
24029 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
24030 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
24031 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
24032 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
24033 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
24034 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
24035 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
24036 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
24037 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
24038 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
24039 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
24040 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
24041 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
24042 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
24043 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
24044 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
24045 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
24046 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
24047 // CHECK-32-EX: omp.dispatch.cond:
24048 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
24049 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
24050 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
24051 // CHECK-32-EX: omp.dispatch.body:
24052 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
24053 // CHECK-32-EX-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
24054 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
24055 // CHECK-32-EX: omp.inner.for.cond:
24056 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP337:![0-9]+]]
24057 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP337]]
24058 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
24059 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24060 // CHECK-32-EX: omp.inner.for.body:
24061 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP337]]
24062 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
24063 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24064 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP337]]
24065 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
24066 // CHECK-32-EX: omp.body.continue:
24067 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
24068 // CHECK-32-EX: omp.inner.for.inc:
24069 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP337]]
24070 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
24071 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP337]]
24072 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP338:![0-9]+]]
24073 // CHECK-32-EX: omp.inner.for.end:
24074 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
24075 // CHECK-32-EX: omp.dispatch.inc:
24076 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
24077 // CHECK-32-EX: omp.dispatch.end:
24078 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
24079 // CHECK-32-EX-NEXT: ret void
24082 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145
24083 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
24084 // CHECK-32-EX-NEXT: entry:
24085 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
24086 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
24087 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
24088 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
24089 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145_kernel_environment, ptr [[DYN_PTR]])
24090 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
24091 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
24092 // CHECK-32-EX: user_code.entry:
24093 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
24094 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
24095 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
24096 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
24097 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
24098 // CHECK-32-EX-NEXT: ret void
24099 // CHECK-32-EX: worker.exit:
24100 // CHECK-32-EX-NEXT: ret void
24103 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145_omp_outlined
24104 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
24105 // CHECK-32-EX-NEXT: entry:
24106 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
24107 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
24108 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
24109 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
24110 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
24111 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
24112 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24113 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24114 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
24115 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
24116 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
24117 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
24118 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
24119 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
24120 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
24121 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
24122 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
24123 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
24124 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
24125 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
24126 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
24127 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
24128 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24129 // CHECK-32-EX: cond.true:
24130 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
24131 // CHECK-32-EX: cond.false:
24132 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
24133 // CHECK-32-EX-NEXT: br label [[COND_END]]
24134 // CHECK-32-EX: cond.end:
24135 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
24136 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
24137 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
24138 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
24139 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
24140 // CHECK-32-EX: omp.inner.for.cond:
24141 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
24142 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
24143 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24144 // CHECK-32-EX: omp.inner.for.body:
24145 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
24146 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
24147 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
24148 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
24149 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
24150 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
24151 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
24152 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
24153 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
24154 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
24155 // CHECK-32-EX: omp.inner.for.inc:
24156 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
24157 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
24158 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
24159 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
24160 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
24161 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
24162 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
24163 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
24164 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
24165 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
24166 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
24167 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
24168 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
24169 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
24170 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
24171 // CHECK-32-EX: cond.true5:
24172 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
24173 // CHECK-32-EX: cond.false6:
24174 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
24175 // CHECK-32-EX-NEXT: br label [[COND_END7]]
24176 // CHECK-32-EX: cond.end7:
24177 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
24178 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
24179 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
24180 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
24181 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
24182 // CHECK-32-EX: omp.inner.for.end:
24183 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
24184 // CHECK-32-EX: omp.loop.exit:
24185 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
24186 // CHECK-32-EX-NEXT: ret void
24189 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145_omp_outlined_omp_outlined
24190 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
24191 // CHECK-32-EX-NEXT: entry:
24192 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
24193 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
24194 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24195 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24196 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
24197 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
24198 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
24199 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
24200 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24201 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24202 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
24203 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
24204 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
24205 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
24206 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
24207 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
24208 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
24209 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
24210 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
24211 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
24212 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
24213 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
24214 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
24215 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
24216 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
24217 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
24218 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
24219 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
24220 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
24221 // CHECK-32-EX: omp.dispatch.cond:
24222 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
24223 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
24224 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
24225 // CHECK-32-EX: omp.dispatch.body:
24226 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
24227 // CHECK-32-EX-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
24228 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
24229 // CHECK-32-EX: omp.inner.for.cond:
24230 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP340:![0-9]+]]
24231 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP340]]
24232 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
24233 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24234 // CHECK-32-EX: omp.inner.for.body:
24235 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP340]]
24236 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
24237 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24238 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP340]]
24239 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
24240 // CHECK-32-EX: omp.body.continue:
24241 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
24242 // CHECK-32-EX: omp.inner.for.inc:
24243 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP340]]
24244 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
24245 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP340]]
24246 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP341:![0-9]+]]
24247 // CHECK-32-EX: omp.inner.for.end:
24248 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
24249 // CHECK-32-EX: omp.dispatch.inc:
24250 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
24251 // CHECK-32-EX: omp.dispatch.end:
24252 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
24253 // CHECK-32-EX-NEXT: ret void
24256 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150
24257 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
24258 // CHECK-32-EX-NEXT: entry:
24259 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
24260 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
24261 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
24262 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
24263 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150_kernel_environment, ptr [[DYN_PTR]])
24264 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
24265 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
24266 // CHECK-32-EX: user_code.entry:
24267 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
24268 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
24269 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
24270 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
24271 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
24272 // CHECK-32-EX-NEXT: ret void
24273 // CHECK-32-EX: worker.exit:
24274 // CHECK-32-EX-NEXT: ret void
24277 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150_omp_outlined
24278 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
24279 // CHECK-32-EX-NEXT: entry:
24280 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
24281 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
24282 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
24283 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
24284 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
24285 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
24286 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24287 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24288 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
24289 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
24290 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
24291 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
24292 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
24293 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
24294 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
24295 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
24296 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
24297 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
24298 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
24299 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
24300 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
24301 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
24302 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24303 // CHECK-32-EX: cond.true:
24304 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
24305 // CHECK-32-EX: cond.false:
24306 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
24307 // CHECK-32-EX-NEXT: br label [[COND_END]]
24308 // CHECK-32-EX: cond.end:
24309 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
24310 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
24311 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
24312 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
24313 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
24314 // CHECK-32-EX: omp.inner.for.cond:
24315 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
24316 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
24317 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24318 // CHECK-32-EX: omp.inner.for.body:
24319 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
24320 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
24321 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
24322 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
24323 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
24324 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
24325 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
24326 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
24327 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
24328 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
24329 // CHECK-32-EX: omp.inner.for.inc:
24330 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
24331 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
24332 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
24333 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
24334 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
24335 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
24336 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
24337 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
24338 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
24339 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
24340 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
24341 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
24342 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
24343 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
24344 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
24345 // CHECK-32-EX: cond.true5:
24346 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
24347 // CHECK-32-EX: cond.false6:
24348 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
24349 // CHECK-32-EX-NEXT: br label [[COND_END7]]
24350 // CHECK-32-EX: cond.end7:
24351 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
24352 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
24353 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
24354 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
24355 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
24356 // CHECK-32-EX: omp.inner.for.end:
24357 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
24358 // CHECK-32-EX: omp.loop.exit:
24359 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
24360 // CHECK-32-EX-NEXT: ret void
24363 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150_omp_outlined_omp_outlined
24364 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
24365 // CHECK-32-EX-NEXT: entry:
24366 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
24367 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
24368 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24369 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24370 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
24371 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
24372 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
24373 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
24374 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24375 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24376 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
24377 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
24378 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
24379 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
24380 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
24381 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
24382 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
24383 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
24384 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
24385 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
24386 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
24387 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
24388 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
24389 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
24390 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
24391 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
24392 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
24393 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
24394 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
24395 // CHECK-32-EX: omp.dispatch.cond:
24396 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
24397 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
24398 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
24399 // CHECK-32-EX: omp.dispatch.body:
24400 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
24401 // CHECK-32-EX-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
24402 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
24403 // CHECK-32-EX: omp.inner.for.cond:
24404 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP343:![0-9]+]]
24405 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP343]]
24406 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
24407 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24408 // CHECK-32-EX: omp.inner.for.body:
24409 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP343]]
24410 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
24411 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24412 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP343]]
24413 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
24414 // CHECK-32-EX: omp.body.continue:
24415 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
24416 // CHECK-32-EX: omp.inner.for.inc:
24417 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP343]]
24418 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
24419 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP343]]
24420 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP344:![0-9]+]]
24421 // CHECK-32-EX: omp.inner.for.end:
24422 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
24423 // CHECK-32-EX: omp.dispatch.inc:
24424 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
24425 // CHECK-32-EX: omp.dispatch.end:
24426 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
24427 // CHECK-32-EX-NEXT: ret void
24430 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155
24431 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
24432 // CHECK-32-EX-NEXT: entry:
24433 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
24434 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
24435 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
24436 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
24437 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155_kernel_environment, ptr [[DYN_PTR]])
24438 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
24439 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
24440 // CHECK-32-EX: user_code.entry:
24441 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
24442 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
24443 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
24444 // CHECK-32-EX-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR2]]
24445 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
24446 // CHECK-32-EX-NEXT: ret void
24447 // CHECK-32-EX: worker.exit:
24448 // CHECK-32-EX-NEXT: ret void
24451 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155_omp_outlined
24452 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
24453 // CHECK-32-EX-NEXT: entry:
24454 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
24455 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
24456 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
24457 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
24458 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
24459 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
24460 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24461 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24462 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
24463 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
24464 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
24465 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
24466 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
24467 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
24468 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
24469 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
24470 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
24471 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
24472 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
24473 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP1]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
24474 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
24475 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
24476 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24477 // CHECK-32-EX: cond.true:
24478 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
24479 // CHECK-32-EX: cond.false:
24480 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
24481 // CHECK-32-EX-NEXT: br label [[COND_END]]
24482 // CHECK-32-EX: cond.end:
24483 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
24484 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
24485 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
24486 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
24487 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
24488 // CHECK-32-EX: omp.inner.for.cond:
24489 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
24490 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10
24491 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24492 // CHECK-32-EX: omp.inner.for.body:
24493 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
24494 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
24495 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
24496 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr
24497 // CHECK-32-EX-NEXT: store ptr [[TMP9]], ptr [[TMP8]], align 4
24498 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
24499 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to ptr
24500 // CHECK-32-EX-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4
24501 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
24502 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
24503 // CHECK-32-EX: omp.inner.for.inc:
24504 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
24505 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
24506 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
24507 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
24508 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
24509 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
24510 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
24511 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
24512 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
24513 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
24514 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
24515 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
24516 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
24517 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9
24518 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
24519 // CHECK-32-EX: cond.true5:
24520 // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]]
24521 // CHECK-32-EX: cond.false6:
24522 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
24523 // CHECK-32-EX-NEXT: br label [[COND_END7]]
24524 // CHECK-32-EX: cond.end7:
24525 // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ]
24526 // CHECK-32-EX-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
24527 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
24528 // CHECK-32-EX-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4
24529 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
24530 // CHECK-32-EX: omp.inner.for.end:
24531 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
24532 // CHECK-32-EX: omp.loop.exit:
24533 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
24534 // CHECK-32-EX-NEXT: ret void
24537 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155_omp_outlined_omp_outlined
24538 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
24539 // CHECK-32-EX-NEXT: entry:
24540 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
24541 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
24542 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24543 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24544 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
24545 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
24546 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
24547 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
24548 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24549 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24550 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
24551 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
24552 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
24553 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
24554 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
24555 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
24556 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
24557 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
24558 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
24559 // CHECK-32-EX-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
24560 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
24561 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
24562 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
24563 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
24564 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
24565 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
24566 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
24567 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1)
24568 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
24569 // CHECK-32-EX: omp.dispatch.cond:
24570 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP5]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
24571 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0
24572 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
24573 // CHECK-32-EX: omp.dispatch.body:
24574 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
24575 // CHECK-32-EX-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
24576 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
24577 // CHECK-32-EX: omp.inner.for.cond:
24578 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP346:![0-9]+]]
24579 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP346]]
24580 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
24581 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24582 // CHECK-32-EX: omp.inner.for.body:
24583 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP346]]
24584 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
24585 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24586 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP346]]
24587 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
24588 // CHECK-32-EX: omp.body.continue:
24589 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
24590 // CHECK-32-EX: omp.inner.for.inc:
24591 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP346]]
24592 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1
24593 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP346]]
24594 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP347:![0-9]+]]
24595 // CHECK-32-EX: omp.inner.for.end:
24596 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
24597 // CHECK-32-EX: omp.dispatch.inc:
24598 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
24599 // CHECK-32-EX: omp.dispatch.end:
24600 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP5]])
24601 // CHECK-32-EX-NEXT: ret void
24604 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l160
24605 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR8:[0-9]+]] {
24606 // CHECK-32-EX-NEXT: entry:
24607 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
24608 // CHECK-32-EX-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
24609 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
24610 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
24611 // CHECK-32-EX-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
24612 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l160_kernel_environment, ptr [[DYN_PTR]])
24613 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
24614 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
24615 // CHECK-32-EX: user_code.entry:
24616 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
24617 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
24618 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
24619 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i32
24620 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP3]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l160_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
24621 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
24622 // CHECK-32-EX-NEXT: ret void
24623 // CHECK-32-EX: worker.exit:
24624 // CHECK-32-EX-NEXT: ret void
24627 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l160_omp_outlined
24628 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
24629 // CHECK-32-EX-NEXT: entry:
24630 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
24631 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
24632 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
24633 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
24634 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
24635 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
24636 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24637 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24638 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
24639 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
24640 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
24641 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
24642 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
24643 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
24644 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
24645 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
24646 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
24647 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
24648 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
24649 // CHECK-32-EX: omp.dispatch.cond:
24650 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
24651 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
24652 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24653 // CHECK-32-EX: cond.true:
24654 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
24655 // CHECK-32-EX: cond.false:
24656 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
24657 // CHECK-32-EX-NEXT: br label [[COND_END]]
24658 // CHECK-32-EX: cond.end:
24659 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
24660 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
24661 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
24662 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
24663 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
24664 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
24665 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
24666 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
24667 // CHECK-32-EX: omp.dispatch.body:
24668 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
24669 // CHECK-32-EX: omp.inner.for.cond:
24670 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
24671 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
24672 // CHECK-32-EX-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
24673 // CHECK-32-EX-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24674 // CHECK-32-EX: omp.inner.for.body:
24675 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
24676 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
24677 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24678 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4
24679 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
24680 // CHECK-32-EX: omp.body.continue:
24681 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
24682 // CHECK-32-EX: omp.inner.for.inc:
24683 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
24684 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
24685 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
24686 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
24687 // CHECK-32-EX: omp.inner.for.end:
24688 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
24689 // CHECK-32-EX: omp.dispatch.inc:
24690 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
24691 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
24692 // CHECK-32-EX-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
24693 // CHECK-32-EX-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
24694 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
24695 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
24696 // CHECK-32-EX-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
24697 // CHECK-32-EX-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
24698 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
24699 // CHECK-32-EX: omp.dispatch.end:
24700 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
24701 // CHECK-32-EX-NEXT: ret void
24704 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l163
24705 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
24706 // CHECK-32-EX-NEXT: entry:
24707 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
24708 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
24709 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
24710 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l163_kernel_environment, ptr [[DYN_PTR]])
24711 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
24712 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
24713 // CHECK-32-EX: user_code.entry:
24714 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
24715 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l163_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
24716 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
24717 // CHECK-32-EX-NEXT: ret void
24718 // CHECK-32-EX: worker.exit:
24719 // CHECK-32-EX-NEXT: ret void
24722 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l163_omp_outlined
24723 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
24724 // CHECK-32-EX-NEXT: entry:
24725 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
24726 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
24727 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
24728 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
24729 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
24730 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
24731 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24732 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24733 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
24734 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
24735 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
24736 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
24737 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
24738 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
24739 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
24740 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
24741 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
24742 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
24743 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
24744 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
24745 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24746 // CHECK-32-EX: cond.true:
24747 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
24748 // CHECK-32-EX: cond.false:
24749 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
24750 // CHECK-32-EX-NEXT: br label [[COND_END]]
24751 // CHECK-32-EX: cond.end:
24752 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
24753 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
24754 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
24755 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
24756 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
24757 // CHECK-32-EX: omp.inner.for.cond:
24758 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
24759 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
24760 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
24761 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24762 // CHECK-32-EX: omp.inner.for.body:
24763 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
24764 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
24765 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24766 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4
24767 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
24768 // CHECK-32-EX: omp.body.continue:
24769 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
24770 // CHECK-32-EX: omp.inner.for.inc:
24771 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
24772 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
24773 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
24774 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
24775 // CHECK-32-EX: omp.inner.for.end:
24776 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
24777 // CHECK-32-EX: omp.loop.exit:
24778 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
24779 // CHECK-32-EX-NEXT: ret void
24782 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l166
24783 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
24784 // CHECK-32-EX-NEXT: entry:
24785 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
24786 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
24787 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
24788 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l166_kernel_environment, ptr [[DYN_PTR]])
24789 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
24790 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
24791 // CHECK-32-EX: user_code.entry:
24792 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
24793 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l166_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
24794 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
24795 // CHECK-32-EX-NEXT: ret void
24796 // CHECK-32-EX: worker.exit:
24797 // CHECK-32-EX-NEXT: ret void
24800 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l166_omp_outlined
24801 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
24802 // CHECK-32-EX-NEXT: entry:
24803 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
24804 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
24805 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
24806 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
24807 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
24808 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
24809 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24810 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24811 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
24812 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
24813 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
24814 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
24815 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
24816 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
24817 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
24818 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
24819 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
24820 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
24821 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
24822 // CHECK-32-EX: omp.dispatch.cond:
24823 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
24824 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
24825 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24826 // CHECK-32-EX: cond.true:
24827 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
24828 // CHECK-32-EX: cond.false:
24829 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
24830 // CHECK-32-EX-NEXT: br label [[COND_END]]
24831 // CHECK-32-EX: cond.end:
24832 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
24833 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
24834 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
24835 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
24836 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
24837 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
24838 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
24839 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
24840 // CHECK-32-EX: omp.dispatch.body:
24841 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
24842 // CHECK-32-EX: omp.inner.for.cond:
24843 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
24844 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
24845 // CHECK-32-EX-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
24846 // CHECK-32-EX-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24847 // CHECK-32-EX: omp.inner.for.body:
24848 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
24849 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
24850 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24851 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4
24852 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
24853 // CHECK-32-EX: omp.body.continue:
24854 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
24855 // CHECK-32-EX: omp.inner.for.inc:
24856 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
24857 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
24858 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
24859 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
24860 // CHECK-32-EX: omp.inner.for.end:
24861 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
24862 // CHECK-32-EX: omp.dispatch.inc:
24863 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
24864 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
24865 // CHECK-32-EX-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
24866 // CHECK-32-EX-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
24867 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
24868 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
24869 // CHECK-32-EX-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
24870 // CHECK-32-EX-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
24871 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
24872 // CHECK-32-EX: omp.dispatch.end:
24873 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
24874 // CHECK-32-EX-NEXT: ret void
24877 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l169
24878 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
24879 // CHECK-32-EX-NEXT: entry:
24880 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
24881 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
24882 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
24883 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l169_kernel_environment, ptr [[DYN_PTR]])
24884 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
24885 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
24886 // CHECK-32-EX: user_code.entry:
24887 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
24888 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l169_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
24889 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
24890 // CHECK-32-EX-NEXT: ret void
24891 // CHECK-32-EX: worker.exit:
24892 // CHECK-32-EX-NEXT: ret void
24895 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l169_omp_outlined
24896 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
24897 // CHECK-32-EX-NEXT: entry:
24898 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
24899 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
24900 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
24901 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
24902 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
24903 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
24904 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24905 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24906 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
24907 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
24908 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
24909 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
24910 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
24911 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
24912 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
24913 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
24914 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
24915 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1)
24916 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
24917 // CHECK-32-EX: omp.dispatch.cond:
24918 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
24919 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
24920 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
24921 // CHECK-32-EX: omp.dispatch.body:
24922 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
24923 // CHECK-32-EX-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
24924 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
24925 // CHECK-32-EX: omp.inner.for.cond:
24926 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP349:![0-9]+]]
24927 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP349]]
24928 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
24929 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24930 // CHECK-32-EX: omp.inner.for.body:
24931 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP349]]
24932 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
24933 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24934 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP349]]
24935 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
24936 // CHECK-32-EX: omp.body.continue:
24937 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
24938 // CHECK-32-EX: omp.inner.for.inc:
24939 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP349]]
24940 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
24941 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP349]]
24942 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP350:![0-9]+]]
24943 // CHECK-32-EX: omp.inner.for.end:
24944 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
24945 // CHECK-32-EX: omp.dispatch.inc:
24946 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
24947 // CHECK-32-EX: omp.dispatch.end:
24948 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
24949 // CHECK-32-EX-NEXT: ret void
24952 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l172
24953 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
24954 // CHECK-32-EX-NEXT: entry:
24955 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
24956 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
24957 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
24958 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l172_kernel_environment, ptr [[DYN_PTR]])
24959 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
24960 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
24961 // CHECK-32-EX: user_code.entry:
24962 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
24963 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l172_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
24964 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
24965 // CHECK-32-EX-NEXT: ret void
24966 // CHECK-32-EX: worker.exit:
24967 // CHECK-32-EX-NEXT: ret void
24970 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l172_omp_outlined
24971 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
24972 // CHECK-32-EX-NEXT: entry:
24973 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
24974 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
24975 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
24976 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
24977 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
24978 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
24979 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24980 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24981 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
24982 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
24983 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
24984 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
24985 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
24986 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
24987 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
24988 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
24989 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
24990 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1)
24991 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
24992 // CHECK-32-EX: omp.dispatch.cond:
24993 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
24994 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
24995 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
24996 // CHECK-32-EX: omp.dispatch.body:
24997 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
24998 // CHECK-32-EX-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
24999 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
25000 // CHECK-32-EX: omp.inner.for.cond:
25001 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP352:![0-9]+]]
25002 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP352]]
25003 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
25004 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25005 // CHECK-32-EX: omp.inner.for.body:
25006 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP352]]
25007 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
25008 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25009 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP352]]
25010 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
25011 // CHECK-32-EX: omp.body.continue:
25012 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25013 // CHECK-32-EX: omp.inner.for.inc:
25014 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP352]]
25015 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
25016 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP352]]
25017 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP353:![0-9]+]]
25018 // CHECK-32-EX: omp.inner.for.end:
25019 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
25020 // CHECK-32-EX: omp.dispatch.inc:
25021 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
25022 // CHECK-32-EX: omp.dispatch.end:
25023 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
25024 // CHECK-32-EX-NEXT: ret void
25027 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l175
25028 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
25029 // CHECK-32-EX-NEXT: entry:
25030 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
25031 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
25032 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
25033 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l175_kernel_environment, ptr [[DYN_PTR]])
25034 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
25035 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
25036 // CHECK-32-EX: user_code.entry:
25037 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
25038 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l175_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
25039 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
25040 // CHECK-32-EX-NEXT: ret void
25041 // CHECK-32-EX: worker.exit:
25042 // CHECK-32-EX-NEXT: ret void
25045 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l175_omp_outlined
25046 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
25047 // CHECK-32-EX-NEXT: entry:
25048 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
25049 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
25050 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
25051 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
25052 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
25053 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
25054 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25055 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25056 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
25057 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
25058 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
25059 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
25060 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
25061 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
25062 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
25063 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
25064 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
25065 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1)
25066 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
25067 // CHECK-32-EX: omp.dispatch.cond:
25068 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
25069 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
25070 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
25071 // CHECK-32-EX: omp.dispatch.body:
25072 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
25073 // CHECK-32-EX-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
25074 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
25075 // CHECK-32-EX: omp.inner.for.cond:
25076 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP355:![0-9]+]]
25077 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP355]]
25078 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
25079 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25080 // CHECK-32-EX: omp.inner.for.body:
25081 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP355]]
25082 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
25083 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25084 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP355]]
25085 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
25086 // CHECK-32-EX: omp.body.continue:
25087 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25088 // CHECK-32-EX: omp.inner.for.inc:
25089 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP355]]
25090 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
25091 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP355]]
25092 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP356:![0-9]+]]
25093 // CHECK-32-EX: omp.inner.for.end:
25094 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
25095 // CHECK-32-EX: omp.dispatch.inc:
25096 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
25097 // CHECK-32-EX: omp.dispatch.end:
25098 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
25099 // CHECK-32-EX-NEXT: ret void
25102 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l178
25103 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
25104 // CHECK-32-EX-NEXT: entry:
25105 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
25106 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
25107 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
25108 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l178_kernel_environment, ptr [[DYN_PTR]])
25109 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
25110 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
25111 // CHECK-32-EX: user_code.entry:
25112 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
25113 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l178_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
25114 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
25115 // CHECK-32-EX-NEXT: ret void
25116 // CHECK-32-EX: worker.exit:
25117 // CHECK-32-EX-NEXT: ret void
25120 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l178_omp_outlined
25121 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
25122 // CHECK-32-EX-NEXT: entry:
25123 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
25124 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
25125 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
25126 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
25127 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
25128 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
25129 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25130 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25131 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
25132 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
25133 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
25134 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
25135 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
25136 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
25137 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
25138 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
25139 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
25140 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1)
25141 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
25142 // CHECK-32-EX: omp.dispatch.cond:
25143 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
25144 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
25145 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
25146 // CHECK-32-EX: omp.dispatch.body:
25147 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
25148 // CHECK-32-EX-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
25149 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
25150 // CHECK-32-EX: omp.inner.for.cond:
25151 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP358:![0-9]+]]
25152 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP358]]
25153 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
25154 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25155 // CHECK-32-EX: omp.inner.for.body:
25156 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP358]]
25157 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
25158 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25159 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP358]]
25160 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
25161 // CHECK-32-EX: omp.body.continue:
25162 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25163 // CHECK-32-EX: omp.inner.for.inc:
25164 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP358]]
25165 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
25166 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP358]]
25167 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP359:![0-9]+]]
25168 // CHECK-32-EX: omp.inner.for.end:
25169 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
25170 // CHECK-32-EX: omp.dispatch.inc:
25171 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
25172 // CHECK-32-EX: omp.dispatch.end:
25173 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
25174 // CHECK-32-EX-NEXT: ret void
25177 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l181
25178 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR8]] {
25179 // CHECK-32-EX-NEXT: entry:
25180 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
25181 // CHECK-32-EX-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
25182 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
25183 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
25184 // CHECK-32-EX-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
25185 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l181_kernel_environment, ptr [[DYN_PTR]])
25186 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
25187 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
25188 // CHECK-32-EX: user_code.entry:
25189 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
25190 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
25191 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
25192 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i32
25193 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP3]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l181_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
25194 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
25195 // CHECK-32-EX-NEXT: ret void
25196 // CHECK-32-EX: worker.exit:
25197 // CHECK-32-EX-NEXT: ret void
25200 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l181_omp_outlined
25201 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
25202 // CHECK-32-EX-NEXT: entry:
25203 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
25204 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
25205 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
25206 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
25207 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
25208 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
25209 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25210 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25211 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
25212 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
25213 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
25214 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
25215 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
25216 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
25217 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
25218 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
25219 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
25220 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
25221 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
25222 // CHECK-32-EX: omp.dispatch.cond:
25223 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
25224 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
25225 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25226 // CHECK-32-EX: cond.true:
25227 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
25228 // CHECK-32-EX: cond.false:
25229 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
25230 // CHECK-32-EX-NEXT: br label [[COND_END]]
25231 // CHECK-32-EX: cond.end:
25232 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
25233 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
25234 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
25235 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
25236 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
25237 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
25238 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
25239 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
25240 // CHECK-32-EX: omp.dispatch.body:
25241 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
25242 // CHECK-32-EX: omp.inner.for.cond:
25243 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP361:![0-9]+]]
25244 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP361]]
25245 // CHECK-32-EX-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
25246 // CHECK-32-EX-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25247 // CHECK-32-EX: omp.inner.for.body:
25248 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP361]]
25249 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
25250 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25251 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP361]]
25252 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
25253 // CHECK-32-EX: omp.body.continue:
25254 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25255 // CHECK-32-EX: omp.inner.for.inc:
25256 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP361]]
25257 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
25258 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP361]]
25259 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP362:![0-9]+]]
25260 // CHECK-32-EX: omp.inner.for.end:
25261 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
25262 // CHECK-32-EX: omp.dispatch.inc:
25263 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
25264 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
25265 // CHECK-32-EX-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
25266 // CHECK-32-EX-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
25267 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
25268 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
25269 // CHECK-32-EX-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
25270 // CHECK-32-EX-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
25271 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
25272 // CHECK-32-EX: omp.dispatch.end:
25273 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
25274 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
25275 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
25276 // CHECK-32-EX-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
25277 // CHECK-32-EX: .omp.final.then:
25278 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
25279 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
25280 // CHECK-32-EX: .omp.final.done:
25281 // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4:[0-9]+]], i32 [[TMP1]])
25282 // CHECK-32-EX-NEXT: ret void
25285 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l185
25286 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
25287 // CHECK-32-EX-NEXT: entry:
25288 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
25289 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
25290 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
25291 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l185_kernel_environment, ptr [[DYN_PTR]])
25292 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
25293 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
25294 // CHECK-32-EX: user_code.entry:
25295 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
25296 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l185_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
25297 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
25298 // CHECK-32-EX-NEXT: ret void
25299 // CHECK-32-EX: worker.exit:
25300 // CHECK-32-EX-NEXT: ret void
25303 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l185_omp_outlined
25304 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
25305 // CHECK-32-EX-NEXT: entry:
25306 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
25307 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
25308 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
25309 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
25310 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
25311 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
25312 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25313 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25314 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
25315 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
25316 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
25317 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
25318 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
25319 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
25320 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
25321 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
25322 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
25323 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
25324 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
25325 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
25326 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25327 // CHECK-32-EX: cond.true:
25328 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
25329 // CHECK-32-EX: cond.false:
25330 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
25331 // CHECK-32-EX-NEXT: br label [[COND_END]]
25332 // CHECK-32-EX: cond.end:
25333 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
25334 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
25335 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
25336 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
25337 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
25338 // CHECK-32-EX: omp.inner.for.cond:
25339 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP364:![0-9]+]]
25340 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP364]]
25341 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
25342 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25343 // CHECK-32-EX: omp.inner.for.body:
25344 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP364]]
25345 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
25346 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25347 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP364]]
25348 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
25349 // CHECK-32-EX: omp.body.continue:
25350 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25351 // CHECK-32-EX: omp.inner.for.inc:
25352 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP364]]
25353 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
25354 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP364]]
25355 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP365:![0-9]+]]
25356 // CHECK-32-EX: omp.inner.for.end:
25357 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
25358 // CHECK-32-EX: omp.loop.exit:
25359 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
25360 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
25361 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
25362 // CHECK-32-EX-NEXT: br i1 [[TMP10]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
25363 // CHECK-32-EX: .omp.final.then:
25364 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
25365 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
25366 // CHECK-32-EX: .omp.final.done:
25367 // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
25368 // CHECK-32-EX-NEXT: ret void
25371 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l189
25372 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
25373 // CHECK-32-EX-NEXT: entry:
25374 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
25375 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
25376 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
25377 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l189_kernel_environment, ptr [[DYN_PTR]])
25378 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
25379 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
25380 // CHECK-32-EX: user_code.entry:
25381 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
25382 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l189_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
25383 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
25384 // CHECK-32-EX-NEXT: ret void
25385 // CHECK-32-EX: worker.exit:
25386 // CHECK-32-EX-NEXT: ret void
25389 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l189_omp_outlined
25390 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
25391 // CHECK-32-EX-NEXT: entry:
25392 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
25393 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
25394 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
25395 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
25396 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
25397 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
25398 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25399 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25400 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
25401 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
25402 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
25403 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
25404 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
25405 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
25406 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
25407 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
25408 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
25409 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
25410 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
25411 // CHECK-32-EX: omp.dispatch.cond:
25412 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
25413 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
25414 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25415 // CHECK-32-EX: cond.true:
25416 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
25417 // CHECK-32-EX: cond.false:
25418 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
25419 // CHECK-32-EX-NEXT: br label [[COND_END]]
25420 // CHECK-32-EX: cond.end:
25421 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
25422 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
25423 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
25424 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
25425 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
25426 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
25427 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
25428 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
25429 // CHECK-32-EX: omp.dispatch.body:
25430 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
25431 // CHECK-32-EX: omp.inner.for.cond:
25432 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP367:![0-9]+]]
25433 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP367]]
25434 // CHECK-32-EX-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
25435 // CHECK-32-EX-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25436 // CHECK-32-EX: omp.inner.for.body:
25437 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP367]]
25438 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
25439 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25440 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP367]]
25441 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
25442 // CHECK-32-EX: omp.body.continue:
25443 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25444 // CHECK-32-EX: omp.inner.for.inc:
25445 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP367]]
25446 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
25447 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP367]]
25448 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP368:![0-9]+]]
25449 // CHECK-32-EX: omp.inner.for.end:
25450 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
25451 // CHECK-32-EX: omp.dispatch.inc:
25452 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
25453 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
25454 // CHECK-32-EX-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
25455 // CHECK-32-EX-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
25456 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
25457 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
25458 // CHECK-32-EX-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
25459 // CHECK-32-EX-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
25460 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
25461 // CHECK-32-EX: omp.dispatch.end:
25462 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
25463 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
25464 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
25465 // CHECK-32-EX-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
25466 // CHECK-32-EX: .omp.final.then:
25467 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
25468 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
25469 // CHECK-32-EX: .omp.final.done:
25470 // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
25471 // CHECK-32-EX-NEXT: ret void
25474 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l193
25475 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
25476 // CHECK-32-EX-NEXT: entry:
25477 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
25478 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
25479 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
25480 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l193_kernel_environment, ptr [[DYN_PTR]])
25481 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
25482 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
25483 // CHECK-32-EX: user_code.entry:
25484 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
25485 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l193_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
25486 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
25487 // CHECK-32-EX-NEXT: ret void
25488 // CHECK-32-EX: worker.exit:
25489 // CHECK-32-EX-NEXT: ret void
25492 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l193_omp_outlined
25493 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
25494 // CHECK-32-EX-NEXT: entry:
25495 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
25496 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
25497 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
25498 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
25499 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
25500 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
25501 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25502 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25503 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
25504 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
25505 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
25506 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
25507 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
25508 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
25509 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
25510 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
25511 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
25512 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1)
25513 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
25514 // CHECK-32-EX: omp.dispatch.cond:
25515 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
25516 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
25517 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
25518 // CHECK-32-EX: omp.dispatch.body:
25519 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
25520 // CHECK-32-EX-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
25521 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
25522 // CHECK-32-EX: omp.inner.for.cond:
25523 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP370:![0-9]+]]
25524 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP370]]
25525 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
25526 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25527 // CHECK-32-EX: omp.inner.for.body:
25528 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP370]]
25529 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
25530 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25531 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP370]]
25532 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
25533 // CHECK-32-EX: omp.body.continue:
25534 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25535 // CHECK-32-EX: omp.inner.for.inc:
25536 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP370]]
25537 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
25538 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP370]]
25539 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP371:![0-9]+]]
25540 // CHECK-32-EX: omp.inner.for.end:
25541 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
25542 // CHECK-32-EX: omp.dispatch.inc:
25543 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
25544 // CHECK-32-EX: omp.dispatch.end:
25545 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
25546 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
25547 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
25548 // CHECK-32-EX-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
25549 // CHECK-32-EX: .omp.final.then:
25550 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
25551 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
25552 // CHECK-32-EX: .omp.final.done:
25553 // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
25554 // CHECK-32-EX-NEXT: ret void
25557 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l197
25558 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
25559 // CHECK-32-EX-NEXT: entry:
25560 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
25561 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
25562 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
25563 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l197_kernel_environment, ptr [[DYN_PTR]])
25564 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
25565 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
25566 // CHECK-32-EX: user_code.entry:
25567 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
25568 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l197_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
25569 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
25570 // CHECK-32-EX-NEXT: ret void
25571 // CHECK-32-EX: worker.exit:
25572 // CHECK-32-EX-NEXT: ret void
25575 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l197_omp_outlined
25576 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
25577 // CHECK-32-EX-NEXT: entry:
25578 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
25579 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
25580 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
25581 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
25582 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
25583 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
25584 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25585 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25586 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
25587 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
25588 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
25589 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
25590 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
25591 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
25592 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
25593 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
25594 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
25595 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1)
25596 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
25597 // CHECK-32-EX: omp.dispatch.cond:
25598 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
25599 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
25600 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
25601 // CHECK-32-EX: omp.dispatch.body:
25602 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
25603 // CHECK-32-EX-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
25604 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
25605 // CHECK-32-EX: omp.inner.for.cond:
25606 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP373:![0-9]+]]
25607 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP373]]
25608 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
25609 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25610 // CHECK-32-EX: omp.inner.for.body:
25611 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP373]]
25612 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
25613 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25614 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP373]]
25615 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
25616 // CHECK-32-EX: omp.body.continue:
25617 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25618 // CHECK-32-EX: omp.inner.for.inc:
25619 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP373]]
25620 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
25621 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP373]]
25622 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP374:![0-9]+]]
25623 // CHECK-32-EX: omp.inner.for.end:
25624 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
25625 // CHECK-32-EX: omp.dispatch.inc:
25626 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
25627 // CHECK-32-EX: omp.dispatch.end:
25628 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
25629 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
25630 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
25631 // CHECK-32-EX-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
25632 // CHECK-32-EX: .omp.final.then:
25633 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
25634 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
25635 // CHECK-32-EX: .omp.final.done:
25636 // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
25637 // CHECK-32-EX-NEXT: ret void
25640 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l201
25641 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
25642 // CHECK-32-EX-NEXT: entry:
25643 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
25644 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
25645 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
25646 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l201_kernel_environment, ptr [[DYN_PTR]])
25647 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
25648 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
25649 // CHECK-32-EX: user_code.entry:
25650 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
25651 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l201_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
25652 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
25653 // CHECK-32-EX-NEXT: ret void
25654 // CHECK-32-EX: worker.exit:
25655 // CHECK-32-EX-NEXT: ret void
25658 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l201_omp_outlined
25659 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
25660 // CHECK-32-EX-NEXT: entry:
25661 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
25662 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
25663 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
25664 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
25665 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
25666 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
25667 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25668 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25669 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
25670 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
25671 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
25672 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
25673 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
25674 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
25675 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
25676 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
25677 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
25678 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1)
25679 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
25680 // CHECK-32-EX: omp.dispatch.cond:
25681 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
25682 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
25683 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
25684 // CHECK-32-EX: omp.dispatch.body:
25685 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
25686 // CHECK-32-EX-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
25687 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
25688 // CHECK-32-EX: omp.inner.for.cond:
25689 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP376:![0-9]+]]
25690 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP376]]
25691 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
25692 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25693 // CHECK-32-EX: omp.inner.for.body:
25694 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP376]]
25695 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
25696 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25697 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP376]]
25698 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
25699 // CHECK-32-EX: omp.body.continue:
25700 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25701 // CHECK-32-EX: omp.inner.for.inc:
25702 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP376]]
25703 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
25704 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP376]]
25705 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP377:![0-9]+]]
25706 // CHECK-32-EX: omp.inner.for.end:
25707 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
25708 // CHECK-32-EX: omp.dispatch.inc:
25709 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
25710 // CHECK-32-EX: omp.dispatch.end:
25711 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
25712 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
25713 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
25714 // CHECK-32-EX-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
25715 // CHECK-32-EX: .omp.final.then:
25716 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
25717 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
25718 // CHECK-32-EX: .omp.final.done:
25719 // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
25720 // CHECK-32-EX-NEXT: ret void
25723 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l205
25724 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
25725 // CHECK-32-EX-NEXT: entry:
25726 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
25727 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
25728 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
25729 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l205_kernel_environment, ptr [[DYN_PTR]])
25730 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
25731 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
25732 // CHECK-32-EX: user_code.entry:
25733 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
25734 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l205_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
25735 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
25736 // CHECK-32-EX-NEXT: ret void
25737 // CHECK-32-EX: worker.exit:
25738 // CHECK-32-EX-NEXT: ret void
25741 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l205_omp_outlined
25742 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
25743 // CHECK-32-EX-NEXT: entry:
25744 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
25745 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
25746 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
25747 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
25748 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
25749 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
25750 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25751 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25752 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
25753 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
25754 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
25755 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
25756 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
25757 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
25758 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
25759 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
25760 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
25761 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1)
25762 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
25763 // CHECK-32-EX: omp.dispatch.cond:
25764 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
25765 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
25766 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
25767 // CHECK-32-EX: omp.dispatch.body:
25768 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
25769 // CHECK-32-EX-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
25770 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
25771 // CHECK-32-EX: omp.inner.for.cond:
25772 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP379:![0-9]+]]
25773 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP379]]
25774 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
25775 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25776 // CHECK-32-EX: omp.inner.for.body:
25777 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP379]]
25778 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
25779 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25780 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP379]]
25781 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
25782 // CHECK-32-EX: omp.body.continue:
25783 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25784 // CHECK-32-EX: omp.inner.for.inc:
25785 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP379]]
25786 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
25787 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP379]]
25788 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP380:![0-9]+]]
25789 // CHECK-32-EX: omp.inner.for.end:
25790 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
25791 // CHECK-32-EX: omp.dispatch.inc:
25792 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
25793 // CHECK-32-EX: omp.dispatch.end:
25794 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
25795 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
25796 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
25797 // CHECK-32-EX-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
25798 // CHECK-32-EX: .omp.final.then:
25799 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
25800 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
25801 // CHECK-32-EX: .omp.final.done:
25802 // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
25803 // CHECK-32-EX-NEXT: ret void
25806 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l209
25807 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10:[0-9]+]] {
25808 // CHECK-32-EX-NEXT: entry:
25809 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
25810 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
25811 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
25812 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l209_kernel_environment, ptr [[DYN_PTR]])
25813 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
25814 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
25815 // CHECK-32-EX: user_code.entry:
25816 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
25817 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l209_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
25818 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
25819 // CHECK-32-EX-NEXT: ret void
25820 // CHECK-32-EX: worker.exit:
25821 // CHECK-32-EX-NEXT: ret void
25824 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l209_omp_outlined
25825 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
25826 // CHECK-32-EX-NEXT: entry:
25827 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
25828 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
25829 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
25830 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
25831 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
25832 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
25833 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25834 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25835 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
25836 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
25837 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
25838 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
25839 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
25840 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
25841 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
25842 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
25843 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
25844 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 65, i32 0, i32 9, i32 1, i32 1)
25845 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
25846 // CHECK-32-EX: omp.dispatch.cond:
25847 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
25848 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
25849 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
25850 // CHECK-32-EX: omp.dispatch.body:
25851 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
25852 // CHECK-32-EX-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
25853 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
25854 // CHECK-32-EX: omp.inner.for.cond:
25855 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP382:![0-9]+]]
25856 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP382]]
25857 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
25858 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25859 // CHECK-32-EX: omp.inner.for.body:
25860 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP382]]
25861 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
25862 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25863 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP382]]
25864 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
25865 // CHECK-32-EX: omp.body.continue:
25866 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25867 // CHECK-32-EX: omp.inner.for.inc:
25868 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP382]]
25869 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
25870 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP382]]
25871 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_fini_4(ptr @[[GLOB1]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP382]]
25872 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP383:![0-9]+]]
25873 // CHECK-32-EX: omp.inner.for.end:
25874 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
25875 // CHECK-32-EX: omp.dispatch.inc:
25876 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
25877 // CHECK-32-EX: omp.dispatch.end:
25878 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
25879 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
25880 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
25881 // CHECK-32-EX-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
25882 // CHECK-32-EX: .omp.final.then:
25883 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
25884 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
25885 // CHECK-32-EX: .omp.final.done:
25886 // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
25887 // CHECK-32-EX-NEXT: ret void
25890 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l214
25891 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10]] {
25892 // CHECK-32-EX-NEXT: entry:
25893 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
25894 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
25895 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
25896 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l214_kernel_environment, ptr [[DYN_PTR]])
25897 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
25898 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
25899 // CHECK-32-EX: user_code.entry:
25900 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
25901 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l214_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
25902 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
25903 // CHECK-32-EX-NEXT: ret void
25904 // CHECK-32-EX: worker.exit:
25905 // CHECK-32-EX-NEXT: ret void
25908 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l214_omp_outlined
25909 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
25910 // CHECK-32-EX-NEXT: entry:
25911 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
25912 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
25913 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
25914 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
25915 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
25916 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
25917 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25918 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25919 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
25920 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
25921 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
25922 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
25923 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
25924 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
25925 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
25926 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
25927 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
25928 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
25929 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
25930 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
25931 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25932 // CHECK-32-EX: cond.true:
25933 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
25934 // CHECK-32-EX: cond.false:
25935 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
25936 // CHECK-32-EX-NEXT: br label [[COND_END]]
25937 // CHECK-32-EX: cond.end:
25938 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
25939 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
25940 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
25941 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
25942 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
25943 // CHECK-32-EX: omp.inner.for.cond:
25944 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP385:![0-9]+]]
25945 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP385]]
25946 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
25947 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25948 // CHECK-32-EX: omp.inner.for.body:
25949 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP385]]
25950 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
25951 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25952 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP385]]
25953 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
25954 // CHECK-32-EX: omp.body.continue:
25955 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25956 // CHECK-32-EX: omp.inner.for.inc:
25957 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP385]]
25958 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
25959 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP385]]
25960 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP386:![0-9]+]]
25961 // CHECK-32-EX: omp.inner.for.end:
25962 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
25963 // CHECK-32-EX: omp.loop.exit:
25964 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
25965 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
25966 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
25967 // CHECK-32-EX-NEXT: br i1 [[TMP10]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
25968 // CHECK-32-EX: .omp.final.then:
25969 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
25970 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
25971 // CHECK-32-EX: .omp.final.done:
25972 // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
25973 // CHECK-32-EX-NEXT: ret void
25976 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l219
25977 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10]] {
25978 // CHECK-32-EX-NEXT: entry:
25979 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
25980 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
25981 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
25982 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l219_kernel_environment, ptr [[DYN_PTR]])
25983 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
25984 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
25985 // CHECK-32-EX: user_code.entry:
25986 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
25987 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l219_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
25988 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
25989 // CHECK-32-EX-NEXT: ret void
25990 // CHECK-32-EX: worker.exit:
25991 // CHECK-32-EX-NEXT: ret void
25994 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l219_omp_outlined
25995 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
25996 // CHECK-32-EX-NEXT: entry:
25997 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
25998 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
25999 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26000 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
26001 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
26002 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
26003 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26004 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26005 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
26006 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
26007 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
26008 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
26009 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
26010 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
26011 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
26012 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
26013 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
26014 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
26015 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
26016 // CHECK-32-EX: omp.dispatch.cond:
26017 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
26018 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
26019 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26020 // CHECK-32-EX: cond.true:
26021 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
26022 // CHECK-32-EX: cond.false:
26023 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
26024 // CHECK-32-EX-NEXT: br label [[COND_END]]
26025 // CHECK-32-EX: cond.end:
26026 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
26027 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
26028 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
26029 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
26030 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
26031 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
26032 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
26033 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26034 // CHECK-32-EX: omp.dispatch.body:
26035 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26036 // CHECK-32-EX: omp.inner.for.cond:
26037 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP388:![0-9]+]]
26038 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP388]]
26039 // CHECK-32-EX-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
26040 // CHECK-32-EX-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26041 // CHECK-32-EX: omp.inner.for.body:
26042 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP388]]
26043 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
26044 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26045 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP388]]
26046 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
26047 // CHECK-32-EX: omp.body.continue:
26048 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26049 // CHECK-32-EX: omp.inner.for.inc:
26050 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP388]]
26051 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
26052 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP388]]
26053 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP389:![0-9]+]]
26054 // CHECK-32-EX: omp.inner.for.end:
26055 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
26056 // CHECK-32-EX: omp.dispatch.inc:
26057 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
26058 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
26059 // CHECK-32-EX-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
26060 // CHECK-32-EX-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
26061 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
26062 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
26063 // CHECK-32-EX-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
26064 // CHECK-32-EX-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
26065 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
26066 // CHECK-32-EX: omp.dispatch.end:
26067 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
26068 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
26069 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
26070 // CHECK-32-EX-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
26071 // CHECK-32-EX: .omp.final.then:
26072 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
26073 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
26074 // CHECK-32-EX: .omp.final.done:
26075 // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
26076 // CHECK-32-EX-NEXT: ret void
26079 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l224
26080 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10]] {
26081 // CHECK-32-EX-NEXT: entry:
26082 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
26083 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
26084 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
26085 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l224_kernel_environment, ptr [[DYN_PTR]])
26086 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
26087 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
26088 // CHECK-32-EX: user_code.entry:
26089 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
26090 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l224_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
26091 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
26092 // CHECK-32-EX-NEXT: ret void
26093 // CHECK-32-EX: worker.exit:
26094 // CHECK-32-EX-NEXT: ret void
26097 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l224_omp_outlined
26098 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
26099 // CHECK-32-EX-NEXT: entry:
26100 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
26101 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
26102 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26103 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
26104 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
26105 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
26106 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26107 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26108 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
26109 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
26110 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
26111 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
26112 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
26113 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
26114 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
26115 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
26116 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
26117 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1)
26118 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
26119 // CHECK-32-EX: omp.dispatch.cond:
26120 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
26121 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
26122 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26123 // CHECK-32-EX: omp.dispatch.body:
26124 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
26125 // CHECK-32-EX-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
26126 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26127 // CHECK-32-EX: omp.inner.for.cond:
26128 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP391:![0-9]+]]
26129 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP391]]
26130 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
26131 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26132 // CHECK-32-EX: omp.inner.for.body:
26133 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP391]]
26134 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
26135 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26136 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP391]]
26137 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
26138 // CHECK-32-EX: omp.body.continue:
26139 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26140 // CHECK-32-EX: omp.inner.for.inc:
26141 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP391]]
26142 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
26143 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP391]]
26144 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP392:![0-9]+]]
26145 // CHECK-32-EX: omp.inner.for.end:
26146 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
26147 // CHECK-32-EX: omp.dispatch.inc:
26148 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
26149 // CHECK-32-EX: omp.dispatch.end:
26150 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
26151 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
26152 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
26153 // CHECK-32-EX-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
26154 // CHECK-32-EX: .omp.final.then:
26155 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
26156 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
26157 // CHECK-32-EX: .omp.final.done:
26158 // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
26159 // CHECK-32-EX-NEXT: ret void
26162 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l229
26163 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10]] {
26164 // CHECK-32-EX-NEXT: entry:
26165 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
26166 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
26167 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
26168 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l229_kernel_environment, ptr [[DYN_PTR]])
26169 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
26170 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
26171 // CHECK-32-EX: user_code.entry:
26172 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
26173 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l229_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
26174 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
26175 // CHECK-32-EX-NEXT: ret void
26176 // CHECK-32-EX: worker.exit:
26177 // CHECK-32-EX-NEXT: ret void
26180 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l229_omp_outlined
26181 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
26182 // CHECK-32-EX-NEXT: entry:
26183 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
26184 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
26185 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26186 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
26187 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
26188 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
26189 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26190 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26191 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
26192 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
26193 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
26194 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
26195 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
26196 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
26197 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
26198 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
26199 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
26200 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1)
26201 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
26202 // CHECK-32-EX: omp.dispatch.cond:
26203 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
26204 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
26205 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26206 // CHECK-32-EX: omp.dispatch.body:
26207 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
26208 // CHECK-32-EX-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
26209 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26210 // CHECK-32-EX: omp.inner.for.cond:
26211 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP394:![0-9]+]]
26212 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP394]]
26213 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
26214 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26215 // CHECK-32-EX: omp.inner.for.body:
26216 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP394]]
26217 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
26218 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26219 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP394]]
26220 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
26221 // CHECK-32-EX: omp.body.continue:
26222 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26223 // CHECK-32-EX: omp.inner.for.inc:
26224 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP394]]
26225 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
26226 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP394]]
26227 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP395:![0-9]+]]
26228 // CHECK-32-EX: omp.inner.for.end:
26229 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
26230 // CHECK-32-EX: omp.dispatch.inc:
26231 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
26232 // CHECK-32-EX: omp.dispatch.end:
26233 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
26234 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
26235 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
26236 // CHECK-32-EX-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
26237 // CHECK-32-EX: .omp.final.then:
26238 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
26239 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
26240 // CHECK-32-EX: .omp.final.done:
26241 // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
26242 // CHECK-32-EX-NEXT: ret void
26245 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l234
26246 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10]] {
26247 // CHECK-32-EX-NEXT: entry:
26248 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
26249 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
26250 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
26251 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l234_kernel_environment, ptr [[DYN_PTR]])
26252 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
26253 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
26254 // CHECK-32-EX: user_code.entry:
26255 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
26256 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l234_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
26257 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
26258 // CHECK-32-EX-NEXT: ret void
26259 // CHECK-32-EX: worker.exit:
26260 // CHECK-32-EX-NEXT: ret void
26263 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l234_omp_outlined
26264 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
26265 // CHECK-32-EX-NEXT: entry:
26266 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
26267 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
26268 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26269 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
26270 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
26271 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
26272 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26273 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26274 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
26275 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
26276 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
26277 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
26278 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
26279 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
26280 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
26281 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
26282 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
26283 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1)
26284 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
26285 // CHECK-32-EX: omp.dispatch.cond:
26286 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
26287 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
26288 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26289 // CHECK-32-EX: omp.dispatch.body:
26290 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
26291 // CHECK-32-EX-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
26292 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26293 // CHECK-32-EX: omp.inner.for.cond:
26294 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP397:![0-9]+]]
26295 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP397]]
26296 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
26297 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26298 // CHECK-32-EX: omp.inner.for.body:
26299 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP397]]
26300 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
26301 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26302 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP397]]
26303 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
26304 // CHECK-32-EX: omp.body.continue:
26305 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26306 // CHECK-32-EX: omp.inner.for.inc:
26307 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP397]]
26308 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
26309 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP397]]
26310 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP398:![0-9]+]]
26311 // CHECK-32-EX: omp.inner.for.end:
26312 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
26313 // CHECK-32-EX: omp.dispatch.inc:
26314 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
26315 // CHECK-32-EX: omp.dispatch.end:
26316 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
26317 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
26318 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
26319 // CHECK-32-EX-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
26320 // CHECK-32-EX: .omp.final.then:
26321 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
26322 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
26323 // CHECK-32-EX: .omp.final.done:
26324 // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
26325 // CHECK-32-EX-NEXT: ret void
26328 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l239
26329 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR10]] {
26330 // CHECK-32-EX-NEXT: entry:
26331 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
26332 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
26333 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
26334 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l239_kernel_environment, ptr [[DYN_PTR]])
26335 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
26336 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
26337 // CHECK-32-EX: user_code.entry:
26338 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
26339 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l239_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
26340 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
26341 // CHECK-32-EX-NEXT: ret void
26342 // CHECK-32-EX: worker.exit:
26343 // CHECK-32-EX-NEXT: ret void
26346 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l239_omp_outlined
26347 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
26348 // CHECK-32-EX-NEXT: entry:
26349 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
26350 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
26351 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26352 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
26353 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
26354 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
26355 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26356 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26357 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
26358 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
26359 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
26360 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
26361 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
26362 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
26363 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
26364 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
26365 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
26366 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1)
26367 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
26368 // CHECK-32-EX: omp.dispatch.cond:
26369 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
26370 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
26371 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26372 // CHECK-32-EX: omp.dispatch.body:
26373 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
26374 // CHECK-32-EX-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
26375 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26376 // CHECK-32-EX: omp.inner.for.cond:
26377 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP400:![0-9]+]]
26378 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP400]]
26379 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
26380 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26381 // CHECK-32-EX: omp.inner.for.body:
26382 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP400]]
26383 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
26384 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26385 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP400]]
26386 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
26387 // CHECK-32-EX: omp.body.continue:
26388 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26389 // CHECK-32-EX: omp.inner.for.inc:
26390 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP400]]
26391 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
26392 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP400]]
26393 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP401:![0-9]+]]
26394 // CHECK-32-EX: omp.inner.for.end:
26395 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
26396 // CHECK-32-EX: omp.dispatch.inc:
26397 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
26398 // CHECK-32-EX: omp.dispatch.end:
26399 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
26400 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
26401 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
26402 // CHECK-32-EX-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
26403 // CHECK-32-EX: .omp.final.then:
26404 // CHECK-32-EX-NEXT: store i32 10, ptr [[I]], align 4
26405 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]]
26406 // CHECK-32-EX: .omp.final.done:
26407 // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4]], i32 [[TMP1]])
26408 // CHECK-32-EX-NEXT: ret void
26411 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l244
26412 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
26413 // CHECK-32-EX-NEXT: entry:
26414 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
26415 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
26416 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
26417 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l244_kernel_environment, ptr [[DYN_PTR]])
26418 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
26419 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
26420 // CHECK-32-EX: user_code.entry:
26421 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
26422 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l244_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
26423 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
26424 // CHECK-32-EX-NEXT: ret void
26425 // CHECK-32-EX: worker.exit:
26426 // CHECK-32-EX-NEXT: ret void
26429 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l244_omp_outlined
26430 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
26431 // CHECK-32-EX-NEXT: entry:
26432 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
26433 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
26434 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26435 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
26436 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
26437 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
26438 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26439 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26440 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
26441 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
26442 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
26443 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
26444 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
26445 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
26446 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
26447 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
26448 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
26449 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
26450 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
26451 // CHECK-32-EX: omp.dispatch.cond:
26452 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
26453 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
26454 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26455 // CHECK-32-EX: cond.true:
26456 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
26457 // CHECK-32-EX: cond.false:
26458 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
26459 // CHECK-32-EX-NEXT: br label [[COND_END]]
26460 // CHECK-32-EX: cond.end:
26461 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
26462 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
26463 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
26464 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
26465 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
26466 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
26467 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
26468 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26469 // CHECK-32-EX: omp.dispatch.body:
26470 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26471 // CHECK-32-EX: omp.inner.for.cond:
26472 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
26473 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
26474 // CHECK-32-EX-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
26475 // CHECK-32-EX-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26476 // CHECK-32-EX: omp.inner.for.body:
26477 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
26478 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
26479 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26480 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4
26481 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
26482 // CHECK-32-EX: omp.body.continue:
26483 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26484 // CHECK-32-EX: omp.inner.for.inc:
26485 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
26486 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
26487 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
26488 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
26489 // CHECK-32-EX: omp.inner.for.end:
26490 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
26491 // CHECK-32-EX: omp.dispatch.inc:
26492 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
26493 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
26494 // CHECK-32-EX-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
26495 // CHECK-32-EX-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
26496 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
26497 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
26498 // CHECK-32-EX-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
26499 // CHECK-32-EX-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
26500 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
26501 // CHECK-32-EX: omp.dispatch.end:
26502 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
26503 // CHECK-32-EX-NEXT: ret void
26506 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l248
26507 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
26508 // CHECK-32-EX-NEXT: entry:
26509 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
26510 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
26511 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
26512 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l248_kernel_environment, ptr [[DYN_PTR]])
26513 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
26514 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
26515 // CHECK-32-EX: user_code.entry:
26516 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
26517 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l248_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
26518 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
26519 // CHECK-32-EX-NEXT: ret void
26520 // CHECK-32-EX: worker.exit:
26521 // CHECK-32-EX-NEXT: ret void
26524 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l248_omp_outlined
26525 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
26526 // CHECK-32-EX-NEXT: entry:
26527 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
26528 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
26529 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26530 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
26531 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
26532 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
26533 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26534 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26535 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
26536 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
26537 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
26538 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
26539 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
26540 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
26541 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
26542 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
26543 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
26544 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
26545 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
26546 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
26547 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26548 // CHECK-32-EX: cond.true:
26549 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
26550 // CHECK-32-EX: cond.false:
26551 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
26552 // CHECK-32-EX-NEXT: br label [[COND_END]]
26553 // CHECK-32-EX: cond.end:
26554 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
26555 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
26556 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
26557 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
26558 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26559 // CHECK-32-EX: omp.inner.for.cond:
26560 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
26561 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
26562 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
26563 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26564 // CHECK-32-EX: omp.inner.for.body:
26565 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
26566 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
26567 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26568 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4
26569 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
26570 // CHECK-32-EX: omp.body.continue:
26571 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26572 // CHECK-32-EX: omp.inner.for.inc:
26573 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
26574 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
26575 // CHECK-32-EX-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
26576 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
26577 // CHECK-32-EX: omp.inner.for.end:
26578 // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
26579 // CHECK-32-EX: omp.loop.exit:
26580 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
26581 // CHECK-32-EX-NEXT: ret void
26584 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l252
26585 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
26586 // CHECK-32-EX-NEXT: entry:
26587 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
26588 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
26589 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
26590 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l252_kernel_environment, ptr [[DYN_PTR]])
26591 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
26592 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
26593 // CHECK-32-EX: user_code.entry:
26594 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
26595 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l252_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
26596 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
26597 // CHECK-32-EX-NEXT: ret void
26598 // CHECK-32-EX: worker.exit:
26599 // CHECK-32-EX-NEXT: ret void
26602 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l252_omp_outlined
26603 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
26604 // CHECK-32-EX-NEXT: entry:
26605 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
26606 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
26607 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26608 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
26609 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
26610 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
26611 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26612 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26613 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
26614 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
26615 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
26616 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
26617 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
26618 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
26619 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
26620 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
26621 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
26622 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP1]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
26623 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
26624 // CHECK-32-EX: omp.dispatch.cond:
26625 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
26626 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
26627 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26628 // CHECK-32-EX: cond.true:
26629 // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
26630 // CHECK-32-EX: cond.false:
26631 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
26632 // CHECK-32-EX-NEXT: br label [[COND_END]]
26633 // CHECK-32-EX: cond.end:
26634 // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
26635 // CHECK-32-EX-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
26636 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
26637 // CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
26638 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
26639 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
26640 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
26641 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26642 // CHECK-32-EX: omp.dispatch.body:
26643 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26644 // CHECK-32-EX: omp.inner.for.cond:
26645 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
26646 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
26647 // CHECK-32-EX-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
26648 // CHECK-32-EX-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26649 // CHECK-32-EX: omp.inner.for.body:
26650 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
26651 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
26652 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26653 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4
26654 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
26655 // CHECK-32-EX: omp.body.continue:
26656 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26657 // CHECK-32-EX: omp.inner.for.inc:
26658 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
26659 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
26660 // CHECK-32-EX-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
26661 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]]
26662 // CHECK-32-EX: omp.inner.for.end:
26663 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
26664 // CHECK-32-EX: omp.dispatch.inc:
26665 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
26666 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
26667 // CHECK-32-EX-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
26668 // CHECK-32-EX-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
26669 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
26670 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
26671 // CHECK-32-EX-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
26672 // CHECK-32-EX-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
26673 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
26674 // CHECK-32-EX: omp.dispatch.end:
26675 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP1]])
26676 // CHECK-32-EX-NEXT: ret void
26679 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l256
26680 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
26681 // CHECK-32-EX-NEXT: entry:
26682 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
26683 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
26684 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
26685 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l256_kernel_environment, ptr [[DYN_PTR]])
26686 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
26687 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
26688 // CHECK-32-EX: user_code.entry:
26689 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
26690 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l256_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
26691 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
26692 // CHECK-32-EX-NEXT: ret void
26693 // CHECK-32-EX: worker.exit:
26694 // CHECK-32-EX-NEXT: ret void
26697 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l256_omp_outlined
26698 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
26699 // CHECK-32-EX-NEXT: entry:
26700 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
26701 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
26702 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26703 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
26704 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
26705 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
26706 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26707 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26708 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
26709 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
26710 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
26711 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
26712 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
26713 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
26714 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
26715 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
26716 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
26717 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1)
26718 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
26719 // CHECK-32-EX: omp.dispatch.cond:
26720 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
26721 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
26722 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26723 // CHECK-32-EX: omp.dispatch.body:
26724 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
26725 // CHECK-32-EX-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
26726 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26727 // CHECK-32-EX: omp.inner.for.cond:
26728 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP403:![0-9]+]]
26729 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP403]]
26730 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
26731 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26732 // CHECK-32-EX: omp.inner.for.body:
26733 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP403]]
26734 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
26735 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26736 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP403]]
26737 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
26738 // CHECK-32-EX: omp.body.continue:
26739 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26740 // CHECK-32-EX: omp.inner.for.inc:
26741 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP403]]
26742 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
26743 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP403]]
26744 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP404:![0-9]+]]
26745 // CHECK-32-EX: omp.inner.for.end:
26746 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
26747 // CHECK-32-EX: omp.dispatch.inc:
26748 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
26749 // CHECK-32-EX: omp.dispatch.end:
26750 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
26751 // CHECK-32-EX-NEXT: ret void
26754 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l260
26755 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
26756 // CHECK-32-EX-NEXT: entry:
26757 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
26758 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
26759 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
26760 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l260_kernel_environment, ptr [[DYN_PTR]])
26761 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
26762 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
26763 // CHECK-32-EX: user_code.entry:
26764 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
26765 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l260_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
26766 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
26767 // CHECK-32-EX-NEXT: ret void
26768 // CHECK-32-EX: worker.exit:
26769 // CHECK-32-EX-NEXT: ret void
26772 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l260_omp_outlined
26773 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
26774 // CHECK-32-EX-NEXT: entry:
26775 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
26776 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
26777 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26778 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
26779 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
26780 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
26781 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26782 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26783 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
26784 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
26785 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
26786 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
26787 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
26788 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
26789 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
26790 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
26791 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
26792 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1)
26793 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
26794 // CHECK-32-EX: omp.dispatch.cond:
26795 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
26796 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
26797 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26798 // CHECK-32-EX: omp.dispatch.body:
26799 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
26800 // CHECK-32-EX-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
26801 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26802 // CHECK-32-EX: omp.inner.for.cond:
26803 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP406:![0-9]+]]
26804 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP406]]
26805 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
26806 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26807 // CHECK-32-EX: omp.inner.for.body:
26808 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP406]]
26809 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
26810 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26811 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP406]]
26812 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
26813 // CHECK-32-EX: omp.body.continue:
26814 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26815 // CHECK-32-EX: omp.inner.for.inc:
26816 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP406]]
26817 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
26818 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP406]]
26819 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP407:![0-9]+]]
26820 // CHECK-32-EX: omp.inner.for.end:
26821 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
26822 // CHECK-32-EX: omp.dispatch.inc:
26823 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
26824 // CHECK-32-EX: omp.dispatch.end:
26825 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
26826 // CHECK-32-EX-NEXT: ret void
26829 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l264
26830 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
26831 // CHECK-32-EX-NEXT: entry:
26832 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
26833 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
26834 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
26835 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l264_kernel_environment, ptr [[DYN_PTR]])
26836 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
26837 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
26838 // CHECK-32-EX: user_code.entry:
26839 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
26840 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l264_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
26841 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
26842 // CHECK-32-EX-NEXT: ret void
26843 // CHECK-32-EX: worker.exit:
26844 // CHECK-32-EX-NEXT: ret void
26847 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l264_omp_outlined
26848 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
26849 // CHECK-32-EX-NEXT: entry:
26850 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
26851 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
26852 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26853 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
26854 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
26855 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
26856 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26857 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26858 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
26859 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
26860 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
26861 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
26862 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
26863 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
26864 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
26865 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
26866 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
26867 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1)
26868 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
26869 // CHECK-32-EX: omp.dispatch.cond:
26870 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
26871 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
26872 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26873 // CHECK-32-EX: omp.dispatch.body:
26874 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
26875 // CHECK-32-EX-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
26876 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26877 // CHECK-32-EX: omp.inner.for.cond:
26878 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP409:![0-9]+]]
26879 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP409]]
26880 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
26881 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26882 // CHECK-32-EX: omp.inner.for.body:
26883 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP409]]
26884 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
26885 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26886 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP409]]
26887 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
26888 // CHECK-32-EX: omp.body.continue:
26889 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26890 // CHECK-32-EX: omp.inner.for.inc:
26891 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP409]]
26892 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
26893 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP409]]
26894 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP410:![0-9]+]]
26895 // CHECK-32-EX: omp.inner.for.end:
26896 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
26897 // CHECK-32-EX: omp.dispatch.inc:
26898 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
26899 // CHECK-32-EX: omp.dispatch.end:
26900 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
26901 // CHECK-32-EX-NEXT: ret void
26904 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l268
26905 // CHECK-32-EX-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
26906 // CHECK-32-EX-NEXT: entry:
26907 // CHECK-32-EX-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
26908 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
26909 // CHECK-32-EX-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
26910 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l268_kernel_environment, ptr [[DYN_PTR]])
26911 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
26912 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
26913 // CHECK-32-EX: user_code.entry:
26914 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
26915 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l268_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
26916 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
26917 // CHECK-32-EX-NEXT: ret void
26918 // CHECK-32-EX: worker.exit:
26919 // CHECK-32-EX-NEXT: ret void
26922 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l268_omp_outlined
26923 // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
26924 // CHECK-32-EX-NEXT: entry:
26925 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
26926 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
26927 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26928 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4
26929 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
26930 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
26931 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26932 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26933 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4
26934 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
26935 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
26936 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
26937 // CHECK-32-EX-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
26938 // CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
26939 // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
26940 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
26941 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
26942 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1)
26943 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
26944 // CHECK-32-EX: omp.dispatch.cond:
26945 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
26946 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
26947 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26948 // CHECK-32-EX: omp.dispatch.body:
26949 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
26950 // CHECK-32-EX-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
26951 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26952 // CHECK-32-EX: omp.inner.for.cond:
26953 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP412:![0-9]+]]
26954 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP412]]
26955 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
26956 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26957 // CHECK-32-EX: omp.inner.for.body:
26958 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP412]]
26959 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
26960 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26961 // CHECK-32-EX-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP412]]
26962 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
26963 // CHECK-32-EX: omp.body.continue:
26964 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26965 // CHECK-32-EX: omp.inner.for.inc:
26966 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP412]]
26967 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1
26968 // CHECK-32-EX-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP412]]
26969 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP413:![0-9]+]]
26970 // CHECK-32-EX: omp.inner.for.end:
26971 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
26972 // CHECK-32-EX: omp.dispatch.inc:
26973 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]]
26974 // CHECK-32-EX: omp.dispatch.end:
26975 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB1]], i32 [[TMP1]])
26976 // CHECK-32-EX-NEXT: ret void