llvm/test/MC/AMDGPU/gfx8_asm_sopk.s

   1 // RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
   2
   3 s_movk_i32 s5, 0x3141
   4 // CHECK: [0x41,0x31,0x05,0xb0]
   5
   6 s_movk_i32 s101, 0x3141
   7 // CHECK: [0x41,0x31,0x65,0xb0]
   8
   9 s_movk_i32 flat_scratch_lo, 0x3141
  10 // CHECK: [0x41,0x31,0x66,0xb0]
  11
  12 s_movk_i32 flat_scratch_hi, 0x3141
  13 // CHECK: [0x41,0x31,0x67,0xb0]
  14
  15 s_movk_i32 vcc_lo, 0x3141
  16 // CHECK: [0x41,0x31,0x6a,0xb0]
  17
  18 s_movk_i32 vcc_hi, 0x3141
  19 // CHECK: [0x41,0x31,0x6b,0xb0]
  20
  21 s_movk_i32 tba_lo, 0x3141
  22 // CHECK: [0x41,0x31,0x6c,0xb0]
  23
  24 s_movk_i32 tba_hi, 0x3141
  25 // CHECK: [0x41,0x31,0x6d,0xb0]
  26
  27 s_movk_i32 tma_lo, 0x3141
  28 // CHECK: [0x41,0x31,0x6e,0xb0]
  29
  30 s_movk_i32 tma_hi, 0x3141
  31 // CHECK: [0x41,0x31,0x6f,0xb0]
  32
  33 s_movk_i32 ttmp11, 0x3141
  34 // CHECK: [0x41,0x31,0x7b,0xb0]
  35
  36 s_movk_i32 m0, 0x3141
  37 // CHECK: [0x41,0x31,0x7c,0xb0]
  38
  39 s_movk_i32 exec_lo, 0x3141
  40 // CHECK: [0x41,0x31,0x7e,0xb0]
  41
  42 s_movk_i32 exec_hi, 0x3141
  43 // CHECK: [0x41,0x31,0x7f,0xb0]
  44
  45 s_movk_i32 s5, 0xc1d1
  46 // CHECK: [0xd1,0xc1,0x05,0xb0]
  47
  48 s_cmovk_i32 s5, 0x3141
  49 // CHECK: [0x41,0x31,0x85,0xb0]
  50
  51 s_cmovk_i32 s101, 0x3141
  52 // CHECK: [0x41,0x31,0xe5,0xb0]
  53
  54 s_cmovk_i32 flat_scratch_lo, 0x3141
  55 // CHECK: [0x41,0x31,0xe6,0xb0]
  56
  57 s_cmovk_i32 flat_scratch_hi, 0x3141
  58 // CHECK: [0x41,0x31,0xe7,0xb0]
  59
  60 s_cmovk_i32 vcc_lo, 0x3141
  61 // CHECK: [0x41,0x31,0xea,0xb0]
  62
  63 s_cmovk_i32 vcc_hi, 0x3141
  64 // CHECK: [0x41,0x31,0xeb,0xb0]
  65
  66 s_cmovk_i32 tba_lo, 0x3141
  67 // CHECK: [0x41,0x31,0xec,0xb0]
  68
  69 s_cmovk_i32 tba_hi, 0x3141
  70 // CHECK: [0x41,0x31,0xed,0xb0]
  71
  72 s_cmovk_i32 tma_lo, 0x3141
  73 // CHECK: [0x41,0x31,0xee,0xb0]
  74
  75 s_cmovk_i32 tma_hi, 0x3141
  76 // CHECK: [0x41,0x31,0xef,0xb0]
  77
  78 s_cmovk_i32 ttmp11, 0x3141
  79 // CHECK: [0x41,0x31,0xfb,0xb0]
  80
  81 s_cmovk_i32 m0, 0x3141
  82 // CHECK: [0x41,0x31,0xfc,0xb0]
  83
  84 s_cmovk_i32 exec_lo, 0x3141
  85 // CHECK: [0x41,0x31,0xfe,0xb0]
  86
  87 s_cmovk_i32 exec_hi, 0x3141
  88 // CHECK: [0x41,0x31,0xff,0xb0]
  89
  90 s_cmovk_i32 s5, 0xc1d1
  91 // CHECK: [0xd1,0xc1,0x85,0xb0]
  92
  93 s_cmpk_eq_i32 s1, 0x3141
  94 // CHECK: [0x41,0x31,0x01,0xb1]
  95
  96 s_cmpk_eq_i32 s101, 0x3141
  97 // CHECK: [0x41,0x31,0x65,0xb1]
  98
  99 s_cmpk_eq_i32 flat_scratch_lo, 0x3141
 100 // CHECK: [0x41,0x31,0x66,0xb1]
 101
 102 s_cmpk_eq_i32 flat_scratch_hi, 0x3141
 103 // CHECK: [0x41,0x31,0x67,0xb1]
 104
 105 s_cmpk_eq_i32 vcc_lo, 0x3141
 106 // CHECK: [0x41,0x31,0x6a,0xb1]
 107
 108 s_cmpk_eq_i32 vcc_hi, 0x3141
 109 // CHECK: [0x41,0x31,0x6b,0xb1]
 110
 111 s_cmpk_eq_i32 tba_lo, 0x3141
 112 // CHECK: [0x41,0x31,0x6c,0xb1]
 113
 114 s_cmpk_eq_i32 tba_hi, 0x3141
 115 // CHECK: [0x41,0x31,0x6d,0xb1]
 116
 117 s_cmpk_eq_i32 tma_lo, 0x3141
 118 // CHECK: [0x41,0x31,0x6e,0xb1]
 119
 120 s_cmpk_eq_i32 tma_hi, 0x3141
 121 // CHECK: [0x41,0x31,0x6f,0xb1]
 122
 123 s_cmpk_eq_i32 ttmp11, 0x3141
 124 // CHECK: [0x41,0x31,0x7b,0xb1]
 125
 126 s_cmpk_eq_i32 m0, 0x3141
 127 // CHECK: [0x41,0x31,0x7c,0xb1]
 128
 129 s_cmpk_eq_i32 exec_lo, 0x3141
 130 // CHECK: [0x41,0x31,0x7e,0xb1]
 131
 132 s_cmpk_eq_i32 exec_hi, 0x3141
 133 // CHECK: [0x41,0x31,0x7f,0xb1]
 134
 135 s_cmpk_eq_i32 s1, 0xc1d1
 136 // CHECK: [0xd1,0xc1,0x01,0xb1]
 137
 138 s_cmpk_lg_i32 s1, 0x3141
 139 // CHECK: [0x41,0x31,0x81,0xb1]
 140
 141 s_cmpk_lg_i32 s101, 0x3141
 142 // CHECK: [0x41,0x31,0xe5,0xb1]
 143
 144 s_cmpk_lg_i32 flat_scratch_lo, 0x3141
 145 // CHECK: [0x41,0x31,0xe6,0xb1]
 146
 147 s_cmpk_lg_i32 flat_scratch_hi, 0x3141
 148 // CHECK: [0x41,0x31,0xe7,0xb1]
 149
 150 s_cmpk_lg_i32 vcc_lo, 0x3141
 151 // CHECK: [0x41,0x31,0xea,0xb1]
 152
 153 s_cmpk_lg_i32 vcc_hi, 0x3141
 154 // CHECK: [0x41,0x31,0xeb,0xb1]
 155
 156 s_cmpk_lg_i32 tba_lo, 0x3141
 157 // CHECK: [0x41,0x31,0xec,0xb1]
 158
 159 s_cmpk_lg_i32 tba_hi, 0x3141
 160 // CHECK: [0x41,0x31,0xed,0xb1]
 161
 162 s_cmpk_lg_i32 tma_lo, 0x3141
 163 // CHECK: [0x41,0x31,0xee,0xb1]
 164
 165 s_cmpk_lg_i32 tma_hi, 0x3141
 166 // CHECK: [0x41,0x31,0xef,0xb1]
 167
 168 s_cmpk_lg_i32 ttmp11, 0x3141
 169 // CHECK: [0x41,0x31,0xfb,0xb1]
 170
 171 s_cmpk_lg_i32 m0, 0x3141
 172 // CHECK: [0x41,0x31,0xfc,0xb1]
 173
 174 s_cmpk_lg_i32 exec_lo, 0x3141
 175 // CHECK: [0x41,0x31,0xfe,0xb1]
 176
 177 s_cmpk_lg_i32 exec_hi, 0x3141
 178 // CHECK: [0x41,0x31,0xff,0xb1]
 179
 180 s_cmpk_lg_i32 s1, 0xc1d1
 181 // CHECK: [0xd1,0xc1,0x81,0xb1]
 182
 183 s_cmpk_gt_i32 s1, 0x3141
 184 // CHECK: [0x41,0x31,0x01,0xb2]
 185
 186 s_cmpk_gt_i32 s101, 0x3141
 187 // CHECK: [0x41,0x31,0x65,0xb2]
 188
 189 s_cmpk_gt_i32 flat_scratch_lo, 0x3141
 190 // CHECK: [0x41,0x31,0x66,0xb2]
 191
 192 s_cmpk_gt_i32 flat_scratch_hi, 0x3141
 193 // CHECK: [0x41,0x31,0x67,0xb2]
 194
 195 s_cmpk_gt_i32 vcc_lo, 0x3141
 196 // CHECK: [0x41,0x31,0x6a,0xb2]
 197
 198 s_cmpk_gt_i32 vcc_hi, 0x3141
 199 // CHECK: [0x41,0x31,0x6b,0xb2]
 200
 201 s_cmpk_gt_i32 tba_lo, 0x3141
 202 // CHECK: [0x41,0x31,0x6c,0xb2]
 203
 204 s_cmpk_gt_i32 tba_hi, 0x3141
 205 // CHECK: [0x41,0x31,0x6d,0xb2]
 206
 207 s_cmpk_gt_i32 tma_lo, 0x3141
 208 // CHECK: [0x41,0x31,0x6e,0xb2]
 209
 210 s_cmpk_gt_i32 tma_hi, 0x3141
 211 // CHECK: [0x41,0x31,0x6f,0xb2]
 212
 213 s_cmpk_gt_i32 ttmp11, 0x3141
 214 // CHECK: [0x41,0x31,0x7b,0xb2]
 215
 216 s_cmpk_gt_i32 m0, 0x3141
 217 // CHECK: [0x41,0x31,0x7c,0xb2]
 218
 219 s_cmpk_gt_i32 exec_lo, 0x3141
 220 // CHECK: [0x41,0x31,0x7e,0xb2]
 221
 222 s_cmpk_gt_i32 exec_hi, 0x3141
 223 // CHECK: [0x41,0x31,0x7f,0xb2]
 224
 225 s_cmpk_gt_i32 s1, 0xc1d1
 226 // CHECK: [0xd1,0xc1,0x01,0xb2]
 227
 228 s_cmpk_ge_i32 s1, 0x3141
 229 // CHECK: [0x41,0x31,0x81,0xb2]
 230
 231 s_cmpk_ge_i32 s101, 0x3141
 232 // CHECK: [0x41,0x31,0xe5,0xb2]
 233
 234 s_cmpk_ge_i32 flat_scratch_lo, 0x3141
 235 // CHECK: [0x41,0x31,0xe6,0xb2]
 236
 237 s_cmpk_ge_i32 flat_scratch_hi, 0x3141
 238 // CHECK: [0x41,0x31,0xe7,0xb2]
 239
 240 s_cmpk_ge_i32 vcc_lo, 0x3141
 241 // CHECK: [0x41,0x31,0xea,0xb2]
 242
 243 s_cmpk_ge_i32 vcc_hi, 0x3141
 244 // CHECK: [0x41,0x31,0xeb,0xb2]
 245
 246 s_cmpk_ge_i32 tba_lo, 0x3141
 247 // CHECK: [0x41,0x31,0xec,0xb2]
 248
 249 s_cmpk_ge_i32 tba_hi, 0x3141
 250 // CHECK: [0x41,0x31,0xed,0xb2]
 251
 252 s_cmpk_ge_i32 tma_lo, 0x3141
 253 // CHECK: [0x41,0x31,0xee,0xb2]
 254
 255 s_cmpk_ge_i32 tma_hi, 0x3141
 256 // CHECK: [0x41,0x31,0xef,0xb2]
 257
 258 s_cmpk_ge_i32 ttmp11, 0x3141
 259 // CHECK: [0x41,0x31,0xfb,0xb2]
 260
 261 s_cmpk_ge_i32 m0, 0x3141
 262 // CHECK: [0x41,0x31,0xfc,0xb2]
 263
 264 s_cmpk_ge_i32 exec_lo, 0x3141
 265 // CHECK: [0x41,0x31,0xfe,0xb2]
 266
 267 s_cmpk_ge_i32 exec_hi, 0x3141
 268 // CHECK: [0x41,0x31,0xff,0xb2]
 269
 270 s_cmpk_ge_i32 s1, 0xc1d1
 271 // CHECK: [0xd1,0xc1,0x81,0xb2]
 272
 273 s_cmpk_lt_i32 s1, 0x3141
 274 // CHECK: [0x41,0x31,0x01,0xb3]
 275
 276 s_cmpk_lt_i32 s101, 0x3141
 277 // CHECK: [0x41,0x31,0x65,0xb3]
 278
 279 s_cmpk_lt_i32 flat_scratch_lo, 0x3141
 280 // CHECK: [0x41,0x31,0x66,0xb3]
 281
 282 s_cmpk_lt_i32 flat_scratch_hi, 0x3141
 283 // CHECK: [0x41,0x31,0x67,0xb3]
 284
 285 s_cmpk_lt_i32 vcc_lo, 0x3141
 286 // CHECK: [0x41,0x31,0x6a,0xb3]
 287
 288 s_cmpk_lt_i32 vcc_hi, 0x3141
 289 // CHECK: [0x41,0x31,0x6b,0xb3]
 290
 291 s_cmpk_lt_i32 tba_lo, 0x3141
 292 // CHECK: [0x41,0x31,0x6c,0xb3]
 293
 294 s_cmpk_lt_i32 tba_hi, 0x3141
 295 // CHECK: [0x41,0x31,0x6d,0xb3]
 296
 297 s_cmpk_lt_i32 tma_lo, 0x3141
 298 // CHECK: [0x41,0x31,0x6e,0xb3]
 299
 300 s_cmpk_lt_i32 tma_hi, 0x3141
 301 // CHECK: [0x41,0x31,0x6f,0xb3]
 302
 303 s_cmpk_lt_i32 ttmp11, 0x3141
 304 // CHECK: [0x41,0x31,0x7b,0xb3]
 305
 306 s_cmpk_lt_i32 m0, 0x3141
 307 // CHECK: [0x41,0x31,0x7c,0xb3]
 308
 309 s_cmpk_lt_i32 exec_lo, 0x3141
 310 // CHECK: [0x41,0x31,0x7e,0xb3]
 311
 312 s_cmpk_lt_i32 exec_hi, 0x3141
 313 // CHECK: [0x41,0x31,0x7f,0xb3]
 314
 315 s_cmpk_lt_i32 s1, 0xc1d1
 316 // CHECK: [0xd1,0xc1,0x01,0xb3]
 317
 318 s_cmpk_le_i32 s1, 0x3141
 319 // CHECK: [0x41,0x31,0x81,0xb3]
 320
 321 s_cmpk_le_i32 s101, 0x3141
 322 // CHECK: [0x41,0x31,0xe5,0xb3]
 323
 324 s_cmpk_le_i32 flat_scratch_lo, 0x3141
 325 // CHECK: [0x41,0x31,0xe6,0xb3]
 326
 327 s_cmpk_le_i32 flat_scratch_hi, 0x3141
 328 // CHECK: [0x41,0x31,0xe7,0xb3]
 329
 330 s_cmpk_le_i32 vcc_lo, 0x3141
 331 // CHECK: [0x41,0x31,0xea,0xb3]
 332
 333 s_cmpk_le_i32 vcc_hi, 0x3141
 334 // CHECK: [0x41,0x31,0xeb,0xb3]
 335
 336 s_cmpk_le_i32 tba_lo, 0x3141
 337 // CHECK: [0x41,0x31,0xec,0xb3]
 338
 339 s_cmpk_le_i32 tba_hi, 0x3141
 340 // CHECK: [0x41,0x31,0xed,0xb3]
 341
 342 s_cmpk_le_i32 tma_lo, 0x3141
 343 // CHECK: [0x41,0x31,0xee,0xb3]
 344
 345 s_cmpk_le_i32 tma_hi, 0x3141
 346 // CHECK: [0x41,0x31,0xef,0xb3]
 347
 348 s_cmpk_le_i32 ttmp11, 0x3141
 349 // CHECK: [0x41,0x31,0xfb,0xb3]
 350
 351 s_cmpk_le_i32 m0, 0x3141
 352 // CHECK: [0x41,0x31,0xfc,0xb3]
 353
 354 s_cmpk_le_i32 exec_lo, 0x3141
 355 // CHECK: [0x41,0x31,0xfe,0xb3]
 356
 357 s_cmpk_le_i32 exec_hi, 0x3141
 358 // CHECK: [0x41,0x31,0xff,0xb3]
 359
 360 s_cmpk_le_i32 s1, 0xc1d1
 361 // CHECK: [0xd1,0xc1,0x81,0xb3]
 362
 363 s_cmpk_eq_u32 s1, 0x3141
 364 // CHECK: [0x41,0x31,0x01,0xb4]
 365
 366 s_cmpk_eq_u32 s101, 0x3141
 367 // CHECK: [0x41,0x31,0x65,0xb4]
 368
 369 s_cmpk_eq_u32 flat_scratch_lo, 0x3141
 370 // CHECK: [0x41,0x31,0x66,0xb4]
 371
 372 s_cmpk_eq_u32 flat_scratch_hi, 0x3141
 373 // CHECK: [0x41,0x31,0x67,0xb4]
 374
 375 s_cmpk_eq_u32 vcc_lo, 0x3141
 376 // CHECK: [0x41,0x31,0x6a,0xb4]
 377
 378 s_cmpk_eq_u32 vcc_hi, 0x3141
 379 // CHECK: [0x41,0x31,0x6b,0xb4]
 380
 381 s_cmpk_eq_u32 tba_lo, 0x3141
 382 // CHECK: [0x41,0x31,0x6c,0xb4]
 383
 384 s_cmpk_eq_u32 tba_hi, 0x3141
 385 // CHECK: [0x41,0x31,0x6d,0xb4]
 386
 387 s_cmpk_eq_u32 tma_lo, 0x3141
 388 // CHECK: [0x41,0x31,0x6e,0xb4]
 389
 390 s_cmpk_eq_u32 tma_hi, 0x3141
 391 // CHECK: [0x41,0x31,0x6f,0xb4]
 392
 393 s_cmpk_eq_u32 ttmp11, 0x3141
 394 // CHECK: [0x41,0x31,0x7b,0xb4]
 395
 396 s_cmpk_eq_u32 m0, 0x3141
 397 // CHECK: [0x41,0x31,0x7c,0xb4]
 398
 399 s_cmpk_eq_u32 exec_lo, 0x3141
 400 // CHECK: [0x41,0x31,0x7e,0xb4]
 401
 402 s_cmpk_eq_u32 exec_hi, 0x3141
 403 // CHECK: [0x41,0x31,0x7f,0xb4]
 404
 405 s_cmpk_eq_u32 s1, 0xc1d1
 406 // CHECK: [0xd1,0xc1,0x01,0xb4]
 407
 408 s_cmpk_lg_u32 s1, 0x3141
 409 // CHECK: [0x41,0x31,0x81,0xb4]
 410
 411 s_cmpk_lg_u32 s101, 0x3141
 412 // CHECK: [0x41,0x31,0xe5,0xb4]
 413
 414 s_cmpk_lg_u32 flat_scratch_lo, 0x3141
 415 // CHECK: [0x41,0x31,0xe6,0xb4]
 416
 417 s_cmpk_lg_u32 flat_scratch_hi, 0x3141
 418 // CHECK: [0x41,0x31,0xe7,0xb4]
 419
 420 s_cmpk_lg_u32 vcc_lo, 0x3141
 421 // CHECK: [0x41,0x31,0xea,0xb4]
 422
 423 s_cmpk_lg_u32 vcc_hi, 0x3141
 424 // CHECK: [0x41,0x31,0xeb,0xb4]
 425
 426 s_cmpk_lg_u32 tba_lo, 0x3141
 427 // CHECK: [0x41,0x31,0xec,0xb4]
 428
 429 s_cmpk_lg_u32 tba_hi, 0x3141
 430 // CHECK: [0x41,0x31,0xed,0xb4]
 431
 432 s_cmpk_lg_u32 tma_lo, 0x3141
 433 // CHECK: [0x41,0x31,0xee,0xb4]
 434
 435 s_cmpk_lg_u32 tma_hi, 0x3141
 436 // CHECK: [0x41,0x31,0xef,0xb4]
 437
 438 s_cmpk_lg_u32 ttmp11, 0x3141
 439 // CHECK: [0x41,0x31,0xfb,0xb4]
 440
 441 s_cmpk_lg_u32 m0, 0x3141
 442 // CHECK: [0x41,0x31,0xfc,0xb4]
 443
 444 s_cmpk_lg_u32 exec_lo, 0x3141
 445 // CHECK: [0x41,0x31,0xfe,0xb4]
 446
 447 s_cmpk_lg_u32 exec_hi, 0x3141
 448 // CHECK: [0x41,0x31,0xff,0xb4]
 449
 450 s_cmpk_lg_u32 s1, 0xc1d1
 451 // CHECK: [0xd1,0xc1,0x81,0xb4]
 452
 453 s_cmpk_gt_u32 s1, 0x3141
 454 // CHECK: [0x41,0x31,0x01,0xb5]
 455
 456 s_cmpk_gt_u32 s101, 0x3141
 457 // CHECK: [0x41,0x31,0x65,0xb5]
 458
 459 s_cmpk_gt_u32 flat_scratch_lo, 0x3141
 460 // CHECK: [0x41,0x31,0x66,0xb5]
 461
 462 s_cmpk_gt_u32 flat_scratch_hi, 0x3141
 463 // CHECK: [0x41,0x31,0x67,0xb5]
 464
 465 s_cmpk_gt_u32 vcc_lo, 0x3141
 466 // CHECK: [0x41,0x31,0x6a,0xb5]
 467
 468 s_cmpk_gt_u32 vcc_hi, 0x3141
 469 // CHECK: [0x41,0x31,0x6b,0xb5]
 470
 471 s_cmpk_gt_u32 tba_lo, 0x3141
 472 // CHECK: [0x41,0x31,0x6c,0xb5]
 473
 474 s_cmpk_gt_u32 tba_hi, 0x3141
 475 // CHECK: [0x41,0x31,0x6d,0xb5]
 476
 477 s_cmpk_gt_u32 tma_lo, 0x3141
 478 // CHECK: [0x41,0x31,0x6e,0xb5]
 479
 480 s_cmpk_gt_u32 tma_hi, 0x3141
 481 // CHECK: [0x41,0x31,0x6f,0xb5]
 482
 483 s_cmpk_gt_u32 ttmp11, 0x3141
 484 // CHECK: [0x41,0x31,0x7b,0xb5]
 485
 486 s_cmpk_gt_u32 m0, 0x3141
 487 // CHECK: [0x41,0x31,0x7c,0xb5]
 488
 489 s_cmpk_gt_u32 exec_lo, 0x3141
 490 // CHECK: [0x41,0x31,0x7e,0xb5]
 491
 492 s_cmpk_gt_u32 exec_hi, 0x3141
 493 // CHECK: [0x41,0x31,0x7f,0xb5]
 494
 495 s_cmpk_gt_u32 s1, 0xc1d1
 496 // CHECK: [0xd1,0xc1,0x01,0xb5]
 497
 498 s_cmpk_ge_u32 s1, 0x3141
 499 // CHECK: [0x41,0x31,0x81,0xb5]
 500
 501 s_cmpk_ge_u32 s101, 0x3141
 502 // CHECK: [0x41,0x31,0xe5,0xb5]
 503
 504 s_cmpk_ge_u32 flat_scratch_lo, 0x3141
 505 // CHECK: [0x41,0x31,0xe6,0xb5]
 506
 507 s_cmpk_ge_u32 flat_scratch_hi, 0x3141
 508 // CHECK: [0x41,0x31,0xe7,0xb5]
 509
 510 s_cmpk_ge_u32 vcc_lo, 0x3141
 511 // CHECK: [0x41,0x31,0xea,0xb5]
 512
 513 s_cmpk_ge_u32 vcc_hi, 0x3141
 514 // CHECK: [0x41,0x31,0xeb,0xb5]
 515
 516 s_cmpk_ge_u32 tba_lo, 0x3141
 517 // CHECK: [0x41,0x31,0xec,0xb5]
 518
 519 s_cmpk_ge_u32 tba_hi, 0x3141
 520 // CHECK: [0x41,0x31,0xed,0xb5]
 521
 522 s_cmpk_ge_u32 tma_lo, 0x3141
 523 // CHECK: [0x41,0x31,0xee,0xb5]
 524
 525 s_cmpk_ge_u32 tma_hi, 0x3141
 526 // CHECK: [0x41,0x31,0xef,0xb5]
 527
 528 s_cmpk_ge_u32 ttmp11, 0x3141
 529 // CHECK: [0x41,0x31,0xfb,0xb5]
 530
 531 s_cmpk_ge_u32 m0, 0x3141
 532 // CHECK: [0x41,0x31,0xfc,0xb5]
 533
 534 s_cmpk_ge_u32 exec_lo, 0x3141
 535 // CHECK: [0x41,0x31,0xfe,0xb5]
 536
 537 s_cmpk_ge_u32 exec_hi, 0x3141
 538 // CHECK: [0x41,0x31,0xff,0xb5]
 539
 540 s_cmpk_ge_u32 s1, 0xc1d1
 541 // CHECK: [0xd1,0xc1,0x81,0xb5]
 542
 543 s_cmpk_lt_u32 s1, 0x3141
 544 // CHECK: [0x41,0x31,0x01,0xb6]
 545
 546 s_cmpk_lt_u32 s101, 0x3141
 547 // CHECK: [0x41,0x31,0x65,0xb6]
 548
 549 s_cmpk_lt_u32 flat_scratch_lo, 0x3141
 550 // CHECK: [0x41,0x31,0x66,0xb6]
 551
 552 s_cmpk_lt_u32 flat_scratch_hi, 0x3141
 553 // CHECK: [0x41,0x31,0x67,0xb6]
 554
 555 s_cmpk_lt_u32 vcc_lo, 0x3141
 556 // CHECK: [0x41,0x31,0x6a,0xb6]
 557
 558 s_cmpk_lt_u32 vcc_hi, 0x3141
 559 // CHECK: [0x41,0x31,0x6b,0xb6]
 560
 561 s_cmpk_lt_u32 tba_lo, 0x3141
 562 // CHECK: [0x41,0x31,0x6c,0xb6]
 563
 564 s_cmpk_lt_u32 tba_hi, 0x3141
 565 // CHECK: [0x41,0x31,0x6d,0xb6]
 566
 567 s_cmpk_lt_u32 tma_lo, 0x3141
 568 // CHECK: [0x41,0x31,0x6e,0xb6]
 569
 570 s_cmpk_lt_u32 tma_hi, 0x3141
 571 // CHECK: [0x41,0x31,0x6f,0xb6]
 572
 573 s_cmpk_lt_u32 ttmp11, 0x3141
 574 // CHECK: [0x41,0x31,0x7b,0xb6]
 575
 576 s_cmpk_lt_u32 m0, 0x3141
 577 // CHECK: [0x41,0x31,0x7c,0xb6]
 578
 579 s_cmpk_lt_u32 exec_lo, 0x3141
 580 // CHECK: [0x41,0x31,0x7e,0xb6]
 581
 582 s_cmpk_lt_u32 exec_hi, 0x3141
 583 // CHECK: [0x41,0x31,0x7f,0xb6]
 584
 585 s_cmpk_lt_u32 s1, 0xc1d1
 586 // CHECK: [0xd1,0xc1,0x01,0xb6]
 587
 588 s_cmpk_le_u32 s1, 0x3141
 589 // CHECK: [0x41,0x31,0x81,0xb6]
 590
 591 s_cmpk_le_u32 s101, 0x3141
 592 // CHECK: [0x41,0x31,0xe5,0xb6]
 593
 594 s_cmpk_le_u32 flat_scratch_lo, 0x3141
 595 // CHECK: [0x41,0x31,0xe6,0xb6]
 596
 597 s_cmpk_le_u32 flat_scratch_hi, 0x3141
 598 // CHECK: [0x41,0x31,0xe7,0xb6]
 599
 600 s_cmpk_le_u32 vcc_lo, 0x3141
 601 // CHECK: [0x41,0x31,0xea,0xb6]
 602
 603 s_cmpk_le_u32 vcc_hi, 0x3141
 604 // CHECK: [0x41,0x31,0xeb,0xb6]
 605
 606 s_cmpk_le_u32 tba_lo, 0x3141
 607 // CHECK: [0x41,0x31,0xec,0xb6]
 608
 609 s_cmpk_le_u32 tba_hi, 0x3141
 610 // CHECK: [0x41,0x31,0xed,0xb6]
 611
 612 s_cmpk_le_u32 tma_lo, 0x3141
 613 // CHECK: [0x41,0x31,0xee,0xb6]
 614
 615 s_cmpk_le_u32 tma_hi, 0x3141
 616 // CHECK: [0x41,0x31,0xef,0xb6]
 617
 618 s_cmpk_le_u32 ttmp11, 0x3141
 619 // CHECK: [0x41,0x31,0xfb,0xb6]
 620
 621 s_cmpk_le_u32 m0, 0x3141
 622 // CHECK: [0x41,0x31,0xfc,0xb6]
 623
 624 s_cmpk_le_u32 exec_lo, 0x3141
 625 // CHECK: [0x41,0x31,0xfe,0xb6]
 626
 627 s_cmpk_le_u32 exec_hi, 0x3141
 628 // CHECK: [0x41,0x31,0xff,0xb6]
 629
 630 s_cmpk_le_u32 s1, 0xc1d1
 631 // CHECK: [0xd1,0xc1,0x81,0xb6]
 632
 633 s_addk_i32 s5, 0x3141
 634 // CHECK: [0x41,0x31,0x05,0xb7]
 635
 636 s_addk_i32 s101, 0x3141
 637 // CHECK: [0x41,0x31,0x65,0xb7]
 638
 639 s_addk_i32 flat_scratch_lo, 0x3141
 640 // CHECK: [0x41,0x31,0x66,0xb7]
 641
 642 s_addk_i32 flat_scratch_hi, 0x3141
 643 // CHECK: [0x41,0x31,0x67,0xb7]
 644
 645 s_addk_i32 vcc_lo, 0x3141
 646 // CHECK: [0x41,0x31,0x6a,0xb7]
 647
 648 s_addk_i32 vcc_hi, 0x3141
 649 // CHECK: [0x41,0x31,0x6b,0xb7]
 650
 651 s_addk_i32 tba_lo, 0x3141
 652 // CHECK: [0x41,0x31,0x6c,0xb7]
 653
 654 s_addk_i32 tba_hi, 0x3141
 655 // CHECK: [0x41,0x31,0x6d,0xb7]
 656
 657 s_addk_i32 tma_lo, 0x3141
 658 // CHECK: [0x41,0x31,0x6e,0xb7]
 659
 660 s_addk_i32 tma_hi, 0x3141
 661 // CHECK: [0x41,0x31,0x6f,0xb7]
 662
 663 s_addk_i32 ttmp11, 0x3141
 664 // CHECK: [0x41,0x31,0x7b,0xb7]
 665
 666 s_addk_i32 m0, 0x3141
 667 // CHECK: [0x41,0x31,0x7c,0xb7]
 668
 669 s_addk_i32 exec_lo, 0x3141
 670 // CHECK: [0x41,0x31,0x7e,0xb7]
 671
 672 s_addk_i32 exec_hi, 0x3141
 673 // CHECK: [0x41,0x31,0x7f,0xb7]
 674
 675 s_addk_i32 s5, 0xc1d1
 676 // CHECK: [0xd1,0xc1,0x05,0xb7]
 677
 678 s_mulk_i32 s5, 0x3141
 679 // CHECK: [0x41,0x31,0x85,0xb7]
 680
 681 s_mulk_i32 s101, 0x3141
 682 // CHECK: [0x41,0x31,0xe5,0xb7]
 683
 684 s_mulk_i32 flat_scratch_lo, 0x3141
 685 // CHECK: [0x41,0x31,0xe6,0xb7]
 686
 687 s_mulk_i32 flat_scratch_hi, 0x3141
 688 // CHECK: [0x41,0x31,0xe7,0xb7]
 689
 690 s_mulk_i32 vcc_lo, 0x3141
 691 // CHECK: [0x41,0x31,0xea,0xb7]
 692
 693 s_mulk_i32 vcc_hi, 0x3141
 694 // CHECK: [0x41,0x31,0xeb,0xb7]
 695
 696 s_mulk_i32 tba_lo, 0x3141
 697 // CHECK: [0x41,0x31,0xec,0xb7]
 698
 699 s_mulk_i32 tba_hi, 0x3141
 700 // CHECK: [0x41,0x31,0xed,0xb7]
 701
 702 s_mulk_i32 tma_lo, 0x3141
 703 // CHECK: [0x41,0x31,0xee,0xb7]
 704
 705 s_mulk_i32 tma_hi, 0x3141
 706 // CHECK: [0x41,0x31,0xef,0xb7]
 707
 708 s_mulk_i32 ttmp11, 0x3141
 709 // CHECK: [0x41,0x31,0xfb,0xb7]
 710
 711 s_mulk_i32 m0, 0x3141
 712 // CHECK: [0x41,0x31,0xfc,0xb7]
 713
 714 s_mulk_i32 exec_lo, 0x3141
 715 // CHECK: [0x41,0x31,0xfe,0xb7]
 716
 717 s_mulk_i32 exec_hi, 0x3141
 718 // CHECK: [0x41,0x31,0xff,0xb7]
 719
 720 s_mulk_i32 s5, 0xc1d1
 721 // CHECK: [0xd1,0xc1,0x85,0xb7]
 722
 723 s_cbranch_i_fork s[2:3], 12609
 724 // CHECK: [0x41,0x31,0x02,0xb8]
 725
 726 s_cbranch_i_fork s[4:5], 12609
 727 // CHECK: [0x41,0x31,0x04,0xb8]
 728
 729 s_cbranch_i_fork s[100:101], 12609
 730 // CHECK: [0x41,0x31,0x64,0xb8]
 731
 732 s_cbranch_i_fork flat_scratch, 12609
 733 // CHECK: [0x41,0x31,0x66,0xb8]
 734
 735 s_cbranch_i_fork vcc, 12609
 736 // CHECK: [0x41,0x31,0x6a,0xb8]
 737
 738 s_cbranch_i_fork tba, 12609
 739 // CHECK: [0x41,0x31,0x6c,0xb8]
 740
 741 s_cbranch_i_fork tma, 12609
 742 // CHECK: [0x41,0x31,0x6e,0xb8]
 743
 744 s_cbranch_i_fork ttmp[10:11], 12609
 745 // CHECK: [0x41,0x31,0x7a,0xb8]
 746
 747 s_cbranch_i_fork exec, 12609
 748 // CHECK: [0x41,0x31,0x7e,0xb8]
 749
 750 s_cbranch_i_fork s[2:3], 49617
 751 // CHECK: [0xd1,0xc1,0x02,0xb8]
 752
 753 s_getreg_b32 s5, 0x3141
 754 // CHECK: [0x41,0x31,0x85,0xb8]
 755
 756 s_getreg_b32 s101, 0x3141
 757 // CHECK: [0x41,0x31,0xe5,0xb8]
 758
 759 s_getreg_b32 flat_scratch_lo, 0x3141
 760 // CHECK: [0x41,0x31,0xe6,0xb8]
 761
 762 s_getreg_b32 flat_scratch_hi, 0x3141
 763 // CHECK: [0x41,0x31,0xe7,0xb8]
 764
 765 s_getreg_b32 vcc_lo, 0x3141
 766 // CHECK: [0x41,0x31,0xea,0xb8]
 767
 768 s_getreg_b32 vcc_hi, 0x3141
 769 // CHECK: [0x41,0x31,0xeb,0xb8]
 770
 771 s_getreg_b32 tba_lo, 0x3141
 772 // CHECK: [0x41,0x31,0xec,0xb8]
 773
 774 s_getreg_b32 tba_hi, 0x3141
 775 // CHECK: [0x41,0x31,0xed,0xb8]
 776
 777 s_getreg_b32 tma_lo, 0x3141
 778 // CHECK: [0x41,0x31,0xee,0xb8]
 779
 780 s_getreg_b32 tma_hi, 0x3141
 781 // CHECK: [0x41,0x31,0xef,0xb8]
 782
 783 s_getreg_b32 ttmp11, 0x3141
 784 // CHECK: [0x41,0x31,0xfb,0xb8]
 785
 786 s_getreg_b32 m0, 0x3141
 787 // CHECK: [0x41,0x31,0xfc,0xb8]
 788
 789 s_getreg_b32 exec_lo, 0x3141
 790 // CHECK: [0x41,0x31,0xfe,0xb8]
 791
 792 s_getreg_b32 exec_hi, 0x3141
 793 // CHECK: [0x41,0x31,0xff,0xb8]
 794
 795 s_getreg_b32 s5, 0xc1d1
 796 // CHECK: [0xd1,0xc1,0x85,0xb8]
 797
 798 s_setreg_b32 0x3141, s1
 799 // CHECK: [0x41,0x31,0x01,0xb9]
 800
 801 s_setreg_b32 0xc1d1, s1
 802 // CHECK: [0xd1,0xc1,0x01,0xb9]
 803
 804 s_setreg_b32 0x3141, s101
 805 // CHECK: [0x41,0x31,0x65,0xb9]
 806
 807 s_setreg_b32 0x3141, flat_scratch_lo
 808 // CHECK: [0x41,0x31,0x66,0xb9]
 809
 810 s_setreg_b32 0x3141, flat_scratch_hi
 811 // CHECK: [0x41,0x31,0x67,0xb9]
 812
 813 s_setreg_b32 0x3141, vcc_lo
 814 // CHECK: [0x41,0x31,0x6a,0xb9]
 815
 816 s_setreg_b32 0x3141, vcc_hi
 817 // CHECK: [0x41,0x31,0x6b,0xb9]
 818
 819 s_setreg_b32 0x3141, tba_lo
 820 // CHECK: [0x41,0x31,0x6c,0xb9]
 821
 822 s_setreg_b32 0x3141, tba_hi
 823 // CHECK: [0x41,0x31,0x6d,0xb9]
 824
 825 s_setreg_b32 0x3141, tma_lo
 826 // CHECK: [0x41,0x31,0x6e,0xb9]
 827
 828 s_setreg_b32 0x3141, tma_hi
 829 // CHECK: [0x41,0x31,0x6f,0xb9]
 830
 831 s_setreg_b32 0x3141, ttmp11
 832 // CHECK: [0x41,0x31,0x7b,0xb9]
 833
 834 s_setreg_b32 0x3141, m0
 835 // CHECK: [0x41,0x31,0x7c,0xb9]
 836
 837 s_setreg_b32 0x3141, exec_lo
 838 // CHECK: [0x41,0x31,0x7e,0xb9]
 839
 840 s_setreg_b32 0x3141, exec_hi
 841 // CHECK: [0x41,0x31,0x7f,0xb9]
 842
 843 s_setreg_imm32_b32 0x3141, 0x11213141
 844 // CHECK: [0x41,0x31,0x00,0xba,0x41,0x31,0x21,0x11]
 845
 846 s_setreg_imm32_b32 0xc1d1, 0x11213141
 847 // CHECK: [0xd1,0xc1,0x00,0xba,0x41,0x31,0x21,0x11]
 848
 849 s_setreg_imm32_b32 0x3141, 0xa1b1c1d1
 850 // CHECK: [0x41,0x31,0x00,0xba,0xd1,0xc1,0xb1,0xa1]