llvm/docs/AMDGPU/AMDGPUAsmGFX908.rst

   1 ..
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   7
   8 ====================================================================================
   9 Syntax of gfx908 Instructions
  10 ====================================================================================
  11
  12 .. contents::
  13   :local:
  14
  15 Introduction
  16 ============
  17
  18 This document describes the syntax of *instructions specific to gfx908*.
  19
  20 For a description of other gfx908 instructions see :doc:`Syntax of Core GFX9 Instructions<AMDGPUAsmGFX9>`.
  21
  22 Notation
  23 ========
  24
  25 Notation used in this document is explained :ref:`here<amdgpu_syn_instruction_notation>`.
  26
  27 Overview
  28 ========
  29
  30 An overview of generic syntax and other features of AMDGPU instructions may be found :ref:`in this document<amdgpu_syn_instructions>`.
  31
  32 Instructions
  33 ============
  34
  35
  36 FLAT
  37 -----------------------
  38
  39 .. parsed-literal::
  40
  41     **INSTRUCTION**                    **DST**       **SRC0**      **SRC1**      **SRC2**           **MODIFIERS**
  42     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
  43     global_atomic_add_f32          :ref:`vdst<amdgpu_synid_gfx908_vdst>`::ref:`opt<amdgpu_synid_gfx908_opt>`, :ref:`vaddr<amdgpu_synid_gfx908_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx908_vdata>`,    :ref:`saddr<amdgpu_synid_gfx908_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`slc<amdgpu_synid_slc>`
  44     global_atomic_pk_add_f16       :ref:`vdst<amdgpu_synid_gfx908_vdst>`::ref:`opt<amdgpu_synid_gfx908_opt>`, :ref:`vaddr<amdgpu_synid_gfx908_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx908_vdata>`,    :ref:`saddr<amdgpu_synid_gfx908_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`slc<amdgpu_synid_slc>`
  45
  46 MUBUF
  47 -----------------------
  48
  49 .. parsed-literal::
  50
  51     **INSTRUCTION**                    **SRC0**       **SRC1**      **SRC2**      **SRC3**        **MODIFIERS**
  52     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
  53     buffer_atomic_add_f32          :ref:`vdata<amdgpu_synid_gfx908_vdata_1>`::ref:`dst<amdgpu_synid_gfx908_dst>`, :ref:`vaddr<amdgpu_synid_gfx908_vaddr_1>`,    :ref:`srsrc<amdgpu_synid_gfx908_srsrc>`,    :ref:`soffset<amdgpu_synid_gfx908_soffset>`     :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`slc<amdgpu_synid_slc>`
  54     buffer_atomic_pk_add_f16       :ref:`vdata<amdgpu_synid_gfx908_vdata_1>`::ref:`dst<amdgpu_synid_gfx908_dst>`, :ref:`vaddr<amdgpu_synid_gfx908_vaddr_1>`,    :ref:`srsrc<amdgpu_synid_gfx908_srsrc>`,    :ref:`soffset<amdgpu_synid_gfx908_soffset>`     :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`slc<amdgpu_synid_slc>`
  55
  56 VOP2
  57 -----------------------
  58
  59 .. parsed-literal::
  60
  61     **INSTRUCTION**             **DST**      **SRC0**         **SRC1**             **MODIFIERS**
  62     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
  63     v_dot2c_f32_f16         :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,    :ref:`src0<amdgpu_synid_gfx908_src>`::ref:`f16x2<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`::ref:`f16x2<amdgpu_synid_gfx908_type_deviation>`
  64     v_dot2c_f32_f16_dpp     :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,    :ref:`vsrc0<amdgpu_synid_gfx908_vsrc>`::ref:`f16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`::ref:`f16x2<amdgpu_synid_gfx908_type_deviation>`      :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
  65     v_dot2c_i32_i16         :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,    :ref:`src0<amdgpu_synid_gfx908_src>`::ref:`i16x2<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`::ref:`i16x2<amdgpu_synid_gfx908_type_deviation>`
  66     v_dot2c_i32_i16_dpp     :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,    :ref:`vsrc0<amdgpu_synid_gfx908_vsrc>`::ref:`i16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`::ref:`i16x2<amdgpu_synid_gfx908_type_deviation>`      :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
  67     v_dot4c_i32_i8          :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,    :ref:`src0<amdgpu_synid_gfx908_src>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`,   :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`
  68     v_dot4c_i32_i8_dpp      :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,    :ref:`vsrc0<amdgpu_synid_gfx908_vsrc>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`       :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
  69     v_dot8c_i32_i4          :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,    :ref:`src0<amdgpu_synid_gfx908_src>`::ref:`i4x8<amdgpu_synid_gfx908_type_deviation>`,   :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`::ref:`i4x8<amdgpu_synid_gfx908_type_deviation>`
  70     v_dot8c_i32_i4_dpp      :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,    :ref:`vsrc0<amdgpu_synid_gfx908_vsrc>`::ref:`i4x8<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`::ref:`i4x8<amdgpu_synid_gfx908_type_deviation>`       :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
  71     v_fmac_f32              :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,    :ref:`src0<amdgpu_synid_gfx908_src>`,        :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`
  72     v_fmac_f32_dpp          :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,    :ref:`vsrc0<amdgpu_synid_gfx908_vsrc>`::ref:`m<amdgpu_synid_gfx908_m>`,     :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`::ref:`m<amdgpu_synid_gfx908_m>`          :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
  73     v_pk_fmac_f16           :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,    :ref:`src0<amdgpu_synid_gfx908_src>`,        :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`
  74     v_xnor_b32              :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,    :ref:`src0<amdgpu_synid_gfx908_src>`,        :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`
  75     v_xnor_b32_dpp          :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,    :ref:`vsrc0<amdgpu_synid_gfx908_vsrc>`,       :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
  76     v_xnor_b32_sdwa         :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,    :ref:`src0<amdgpu_synid_gfx908_src_1>`::ref:`m<amdgpu_synid_gfx908_m_1>`,      :ref:`src1<amdgpu_synid_gfx908_src_1>`::ref:`m<amdgpu_synid_gfx908_m_1>`           :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
  77
  78 VOP3
  79 -----------------------
  80
  81 .. parsed-literal::
  82
  83     **INSTRUCTION**                    **DST**       **SRC0**      **SRC1**           **MODIFIERS**
  84     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
  85     v_fmac_f32_e64                 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,     :ref:`src0<amdgpu_synid_gfx908_src_2>`::ref:`m<amdgpu_synid_gfx908_m>`,   :ref:`src1<amdgpu_synid_gfx908_src_1>`::ref:`m<amdgpu_synid_gfx908_m>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
  86     v_xnor_b32_e64                 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,     :ref:`src0<amdgpu_synid_gfx908_src_2>`,     :ref:`src1<amdgpu_synid_gfx908_src_1>`
  87
  88 VOP3P
  89 -----------------------
  90
  91 .. parsed-literal::
  92
  93     **INSTRUCTION**             **DST**          **SRC0**          **SRC1**          **SRC2**          **MODIFIERS**
  94     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
  95     v_accvgpr_read_b32      :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,        :ref:`vsrc<amdgpu_synid_gfx908_vsrc_1>`
  96     v_accvgpr_write_b32     :ref:`vdst<amdgpu_synid_gfx908_vdst_2>`,        :ref:`src<amdgpu_synid_gfx908_src_3>`
  97     v_dot2_f32_f16          :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,        :ref:`src0<amdgpu_synid_gfx908_src_2>`::ref:`f16x2<amdgpu_synid_gfx908_type_deviation>`,   :ref:`src1<amdgpu_synid_gfx908_src_1>`::ref:`f16x2<amdgpu_synid_gfx908_type_deviation>`,   :ref:`src2<amdgpu_synid_gfx908_src_1>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`      :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
  98     v_dot2_i32_i16          :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,        :ref:`src0<amdgpu_synid_gfx908_src_4>`::ref:`i16x2<amdgpu_synid_gfx908_type_deviation>`,   :ref:`src1<amdgpu_synid_gfx908_src_5>`::ref:`i16x2<amdgpu_synid_gfx908_type_deviation>`,   :ref:`src2<amdgpu_synid_gfx908_src_1>`::ref:`i32<amdgpu_synid_gfx908_type_deviation>`      :ref:`clamp<amdgpu_synid_clamp>`
  99     v_dot2_u32_u16          :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,        :ref:`src0<amdgpu_synid_gfx908_src_4>`::ref:`u16x2<amdgpu_synid_gfx908_type_deviation>`,   :ref:`src1<amdgpu_synid_gfx908_src_5>`::ref:`u16x2<amdgpu_synid_gfx908_type_deviation>`,   :ref:`src2<amdgpu_synid_gfx908_src_1>`::ref:`u32<amdgpu_synid_gfx908_type_deviation>`      :ref:`clamp<amdgpu_synid_clamp>`
 100     v_dot4_i32_i8           :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,        :ref:`src0<amdgpu_synid_gfx908_src_2>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx908_src_1>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`,    :ref:`src2<amdgpu_synid_gfx908_src_1>`::ref:`i32<amdgpu_synid_gfx908_type_deviation>`      :ref:`clamp<amdgpu_synid_clamp>`
 101     v_dot4_u32_u8           :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,        :ref:`src0<amdgpu_synid_gfx908_src_2>`::ref:`u8x4<amdgpu_synid_gfx908_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx908_src_1>`::ref:`u8x4<amdgpu_synid_gfx908_type_deviation>`,    :ref:`src2<amdgpu_synid_gfx908_src_1>`::ref:`u32<amdgpu_synid_gfx908_type_deviation>`      :ref:`clamp<amdgpu_synid_clamp>`
 102     v_dot8_i32_i4           :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,        :ref:`src0<amdgpu_synid_gfx908_src_2>`::ref:`i4x8<amdgpu_synid_gfx908_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx908_src_1>`::ref:`i4x8<amdgpu_synid_gfx908_type_deviation>`,    :ref:`src2<amdgpu_synid_gfx908_src_1>`::ref:`i32<amdgpu_synid_gfx908_type_deviation>`      :ref:`clamp<amdgpu_synid_clamp>`
 103     v_dot8_u32_u4           :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,        :ref:`src0<amdgpu_synid_gfx908_src_2>`::ref:`u4x8<amdgpu_synid_gfx908_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx908_src_1>`::ref:`u4x8<amdgpu_synid_gfx908_type_deviation>`,    :ref:`src2<amdgpu_synid_gfx908_src_1>`::ref:`u32<amdgpu_synid_gfx908_type_deviation>`      :ref:`clamp<amdgpu_synid_clamp>`
 104     v_fma_mix_f32           :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,        :ref:`src0<amdgpu_synid_gfx908_src_2>`::ref:`m<amdgpu_synid_gfx908_m>`::ref:`fx<amdgpu_synid_gfx908_fx_operand>`,    :ref:`src1<amdgpu_synid_gfx908_src_1>`::ref:`m<amdgpu_synid_gfx908_m>`::ref:`fx<amdgpu_synid_gfx908_fx_operand>`,    :ref:`src2<amdgpu_synid_gfx908_src_1>`::ref:`m<amdgpu_synid_gfx908_m>`::ref:`fx<amdgpu_synid_gfx908_fx_operand>`     :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
 105     v_fma_mixhi_f16         :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,        :ref:`src0<amdgpu_synid_gfx908_src_2>`::ref:`m<amdgpu_synid_gfx908_m>`::ref:`fx<amdgpu_synid_gfx908_fx_operand>`,    :ref:`src1<amdgpu_synid_gfx908_src_1>`::ref:`m<amdgpu_synid_gfx908_m>`::ref:`fx<amdgpu_synid_gfx908_fx_operand>`,    :ref:`src2<amdgpu_synid_gfx908_src_1>`::ref:`m<amdgpu_synid_gfx908_m>`::ref:`fx<amdgpu_synid_gfx908_fx_operand>`     :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
 106     v_fma_mixlo_f16         :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`,        :ref:`src0<amdgpu_synid_gfx908_src_2>`::ref:`m<amdgpu_synid_gfx908_m>`::ref:`fx<amdgpu_synid_gfx908_fx_operand>`,    :ref:`src1<amdgpu_synid_gfx908_src_1>`::ref:`m<amdgpu_synid_gfx908_m>`::ref:`fx<amdgpu_synid_gfx908_fx_operand>`,    :ref:`src2<amdgpu_synid_gfx908_src_1>`::ref:`m<amdgpu_synid_gfx908_m>`::ref:`fx<amdgpu_synid_gfx908_fx_operand>`     :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
 107     v_mfma_f32_16x16x16f16  :ref:`vdst<amdgpu_synid_gfx908_vdst_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_2>`::ref:`f16x4<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_2>`::ref:`f16x4<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>`   :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
 108     v_mfma_f32_16x16x1f32   :ref:`vdst<amdgpu_synid_gfx908_vdst_4>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`,    :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`,    :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_5>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`  :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
 109     v_mfma_f32_16x16x2bf16  :ref:`vdst<amdgpu_synid_gfx908_vdst_4>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`bf16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`bf16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_5>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`  :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
 110     v_mfma_f32_16x16x4f16   :ref:`vdst<amdgpu_synid_gfx908_vdst_4>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_2>`::ref:`f16x4<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_2>`::ref:`f16x4<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_5>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`  :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
 111     v_mfma_f32_16x16x4f32   :ref:`vdst<amdgpu_synid_gfx908_vdst_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`,    :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`,    :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>`   :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
 112     v_mfma_f32_16x16x8bf16  :ref:`vdst<amdgpu_synid_gfx908_vdst_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`bf16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`bf16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>`   :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
 113     v_mfma_f32_32x32x1f32   :ref:`vdst<amdgpu_synid_gfx908_vdst_5>`::ref:`f32x32<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`,    :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`,    :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_6>`::ref:`f32x32<amdgpu_synid_gfx908_type_deviation>`  :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
 114     v_mfma_f32_32x32x2bf16  :ref:`vdst<amdgpu_synid_gfx908_vdst_5>`::ref:`f32x32<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`bf16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`bf16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_6>`::ref:`f32x32<amdgpu_synid_gfx908_type_deviation>`  :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
 115     v_mfma_f32_32x32x2f32   :ref:`vdst<amdgpu_synid_gfx908_vdst_4>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`,    :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`,    :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_5>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`  :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
 116     v_mfma_f32_32x32x4bf16  :ref:`vdst<amdgpu_synid_gfx908_vdst_4>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`bf16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`bf16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_5>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`  :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
 117     v_mfma_f32_32x32x4f16   :ref:`vdst<amdgpu_synid_gfx908_vdst_5>`::ref:`f32x32<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_2>`::ref:`f16x4<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_2>`::ref:`f16x4<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_6>`::ref:`f32x32<amdgpu_synid_gfx908_type_deviation>`  :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
 118     v_mfma_f32_32x32x8f16   :ref:`vdst<amdgpu_synid_gfx908_vdst_4>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_2>`::ref:`f16x4<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_2>`::ref:`f16x4<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_5>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`  :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
 119     v_mfma_f32_4x4x1f32     :ref:`vdst<amdgpu_synid_gfx908_vdst_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`,    :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`,    :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>`   :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
 120     v_mfma_f32_4x4x2bf16    :ref:`vdst<amdgpu_synid_gfx908_vdst_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`bf16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`bf16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>`   :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
 121     v_mfma_f32_4x4x4f16     :ref:`vdst<amdgpu_synid_gfx908_vdst_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_2>`::ref:`f16x4<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_2>`::ref:`f16x4<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>`   :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
 122     v_mfma_i32_16x16x16i8   :ref:`vdst<amdgpu_synid_gfx908_vdst_3>`::ref:`i32x4<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`,   :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`,   :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_3>`::ref:`i32x4<amdgpu_synid_gfx908_type_deviation>`   :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
 123     v_mfma_i32_16x16x4i8    :ref:`vdst<amdgpu_synid_gfx908_vdst_4>`::ref:`i32x16<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`,   :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`,   :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_5>`::ref:`i32x16<amdgpu_synid_gfx908_type_deviation>`  :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
 124     v_mfma_i32_32x32x4i8    :ref:`vdst<amdgpu_synid_gfx908_vdst_5>`::ref:`i32x32<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`,   :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`,   :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_6>`::ref:`i32x32<amdgpu_synid_gfx908_type_deviation>`  :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
 125     v_mfma_i32_32x32x8i8    :ref:`vdst<amdgpu_synid_gfx908_vdst_4>`::ref:`i32x16<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`,   :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`,   :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_5>`::ref:`i32x16<amdgpu_synid_gfx908_type_deviation>`  :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
 126     v_mfma_i32_4x4x4i8      :ref:`vdst<amdgpu_synid_gfx908_vdst_3>`::ref:`i32x4<amdgpu_synid_gfx908_type_deviation>`,  :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`,   :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`,   :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_3>`::ref:`i32x4<amdgpu_synid_gfx908_type_deviation>`   :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
 127
 128 .. |---| unicode:: U+02014 .. em dash
 129
 130 .. toctree::
 131     :hidden:
 132
 133     gfx908_dst
 134     gfx908_fx_operand
 135     gfx908_m
 136     gfx908_m_1
 137     gfx908_opt
 138     gfx908_saddr
 139     gfx908_soffset
 140     gfx908_src
 141     gfx908_src_1
 142     gfx908_src_2
 143     gfx908_src_3
 144     gfx908_src_4
 145     gfx908_src_5
 146     gfx908_srsrc
 147     gfx908_type_deviation
 148     gfx908_vaddr
 149     gfx908_vaddr_1
 150     gfx908_vdata
 151     gfx908_vdata_1
 152     gfx908_vdst
 153     gfx908_vdst_1
 154     gfx908_vdst_2
 155     gfx908_vdst_3
 156     gfx908_vdst_4
 157     gfx908_vdst_5
 158     gfx908_vsrc
 159     gfx908_vsrc_1
 160     gfx908_vsrc_2
 161     gfx908_vsrc_3
 162     gfx908_vsrc_4
 163     gfx908_vsrc_5
 164     gfx908_vsrc_6