llvm/lib/CodeGen/CallingConvLower.cpp

   1 //===-- CallingConvLower.cpp - Calling Conventions ------------------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file implements the CCState class, used for lowering and implementing
  10 // calling conventions.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "llvm/CodeGen/CallingConvLower.h"
  15 #include "llvm/CodeGen/MachineFrameInfo.h"
  16 #include "llvm/CodeGen/MachineFunction.h"
  17 #include "llvm/CodeGen/MachineRegisterInfo.h"
  18 #include "llvm/CodeGen/TargetLowering.h"
  19 #include "llvm/CodeGen/TargetRegisterInfo.h"
  20 #include "llvm/CodeGen/TargetSubtargetInfo.h"
  21 #include "llvm/IR/DataLayout.h"
  22 #include "llvm/Support/Debug.h"
  23 #include "llvm/Support/ErrorHandling.h"
  24 #include "llvm/Support/SaveAndRestore.h"
  25 #include "llvm/Support/raw_ostream.h"
  26 #include <algorithm>
  27
  28 using namespace llvm;
  29
  30 CCState::CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &mf,
  31                  SmallVectorImpl<CCValAssign> &locs, LLVMContext &C)
  32     : CallingConv(CC), IsVarArg(isVarArg), MF(mf),
  33       TRI(*MF.getSubtarget().getRegisterInfo()), Locs(locs), Context(C) {
  34   // No stack is used.
  35   StackOffset = 0;
  36
  37   clearByValRegsInfo();
  38   UsedRegs.resize((TRI.getNumRegs()+31)/32);
  39 }
  40
  41 /// Allocate space on the stack large enough to pass an argument by value.
  42 /// The size and alignment information of the argument is encoded in
  43 /// its parameter attribute.
  44 void CCState::HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT,
  45                           CCValAssign::LocInfo LocInfo, int MinSize,
  46                           Align MinAlign, ISD::ArgFlagsTy ArgFlags) {
  47   Align Alignment = ArgFlags.getNonZeroByValAlign();
  48   unsigned Size  = ArgFlags.getByValSize();
  49   if (MinSize > (int)Size)
  50     Size = MinSize;
  51   if (MinAlign > Alignment)
  52     Alignment = MinAlign;
  53   ensureMaxAlignment(Alignment);
  54   MF.getSubtarget().getTargetLowering()->HandleByVal(this, Size, Alignment);
  55   Size = unsigned(alignTo(Size, MinAlign));
  56   unsigned Offset = AllocateStack(Size, Alignment);
  57   addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
  58 }
  59
  60 /// Mark a register and all of its aliases as allocated.
  61 void CCState::MarkAllocated(MCPhysReg Reg) {
  62   for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
  63     UsedRegs[*AI / 32] |= 1 << (*AI & 31);
  64 }
  65
  66 void CCState::MarkUnallocated(MCPhysReg Reg) {
  67   for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
  68     UsedRegs[*AI / 32] &= ~(1 << (*AI & 31));
  69 }
  70
  71 bool CCState::IsShadowAllocatedReg(MCRegister Reg) const {
  72   if (!isAllocated(Reg))
  73     return false;
  74
  75   for (auto const &ValAssign : Locs) {
  76     if (ValAssign.isRegLoc()) {
  77       for (MCRegAliasIterator AI(ValAssign.getLocReg(), &TRI, true);
  78            AI.isValid(); ++AI) {
  79         if (*AI == Reg)
  80           return false;
  81       }
  82     }
  83   }
  84   return true;
  85 }
  86
  87 /// Analyze an array of argument values,
  88 /// incorporating info about the formals into this state.
  89 void
  90 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
  91                                 CCAssignFn Fn) {
  92   unsigned NumArgs = Ins.size();
  93
  94   for (unsigned i = 0; i != NumArgs; ++i) {
  95     MVT ArgVT = Ins[i].VT;
  96     ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
  97     if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this))
  98       report_fatal_error("unable to allocate function argument #" + Twine(i));
  99   }
 100 }
 101
 102 /// Analyze the return values of a function, returning true if the return can
 103 /// be performed without sret-demotion and false otherwise.
 104 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
 105                           CCAssignFn Fn) {
 106   // Determine which register each value should be copied into.
 107   for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
 108     MVT VT = Outs[i].VT;
 109     ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
 110     if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
 111       return false;
 112   }
 113   return true;
 114 }
 115
 116 /// Analyze the returned values of a return,
 117 /// incorporating info about the result values into this state.
 118 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
 119                             CCAssignFn Fn) {
 120   // Determine which register each value should be copied into.
 121   for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
 122     MVT VT = Outs[i].VT;
 123     ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
 124     if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
 125       report_fatal_error("unable to allocate function return #" + Twine(i));
 126   }
 127 }
 128
 129 /// Analyze the outgoing arguments to a call,
 130 /// incorporating info about the passed values into this state.
 131 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
 132                                   CCAssignFn Fn) {
 133   unsigned NumOps = Outs.size();
 134   for (unsigned i = 0; i != NumOps; ++i) {
 135     MVT ArgVT = Outs[i].VT;
 136     ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
 137     if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
 138 #ifndef NDEBUG
 139       dbgs() << "Call operand #" << i << " has unhandled type "
 140              << EVT(ArgVT).getEVTString() << '\n';
 141 #endif
 142       llvm_unreachable(nullptr);
 143     }
 144   }
 145 }
 146
 147 /// Same as above except it takes vectors of types and argument flags.
 148 void CCState::AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
 149                                   SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
 150                                   CCAssignFn Fn) {
 151   unsigned NumOps = ArgVTs.size();
 152   for (unsigned i = 0; i != NumOps; ++i) {
 153     MVT ArgVT = ArgVTs[i];
 154     ISD::ArgFlagsTy ArgFlags = Flags[i];
 155     if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
 156 #ifndef NDEBUG
 157       dbgs() << "Call operand #" << i << " has unhandled type "
 158              << EVT(ArgVT).getEVTString() << '\n';
 159 #endif
 160       llvm_unreachable(nullptr);
 161     }
 162   }
 163 }
 164
 165 /// Analyze the return values of a call, incorporating info about the passed
 166 /// values into this state.
 167 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
 168                                 CCAssignFn Fn) {
 169   for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
 170     MVT VT = Ins[i].VT;
 171     ISD::ArgFlagsTy Flags = Ins[i].Flags;
 172     if (Fn(i, VT, VT, CCValAssign::Full, Flags, *this)) {
 173 #ifndef NDEBUG
 174       dbgs() << "Call result #" << i << " has unhandled type "
 175              << EVT(VT).getEVTString() << '\n';
 176 #endif
 177       llvm_unreachable(nullptr);
 178     }
 179   }
 180 }
 181
 182 /// Same as above except it's specialized for calls that produce a single value.
 183 void CCState::AnalyzeCallResult(MVT VT, CCAssignFn Fn) {
 184   if (Fn(0, VT, VT, CCValAssign::Full, ISD::ArgFlagsTy(), *this)) {
 185 #ifndef NDEBUG
 186     dbgs() << "Call result has unhandled type "
 187            << EVT(VT).getEVTString() << '\n';
 188 #endif
 189     llvm_unreachable(nullptr);
 190   }
 191 }
 192
 193 void CCState::ensureMaxAlignment(Align Alignment) {
 194   if (!AnalyzingMustTailForwardedRegs)
 195     MF.getFrameInfo().ensureMaxAlignment(Alignment);
 196 }
 197
 198 static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT) {
 199   if (VT.isVector())
 200     return true; // Assume -msse-regparm might be in effect.
 201   if (!VT.isInteger())
 202     return false;
 203   return (CC == CallingConv::X86_VectorCall || CC == CallingConv::X86_FastCall);
 204 }
 205
 206 void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs,
 207                                           MVT VT, CCAssignFn Fn) {
 208   unsigned SavedStackOffset = StackOffset;
 209   Align SavedMaxStackArgAlign = MaxStackArgAlign;
 210   unsigned NumLocs = Locs.size();
 211
 212   // Set the 'inreg' flag if it is used for this calling convention.
 213   ISD::ArgFlagsTy Flags;
 214   if (isValueTypeInRegForCC(CallingConv, VT))
 215     Flags.setInReg();
 216
 217   // Allocate something of this value type repeatedly until we get assigned a
 218   // location in memory.
 219   bool HaveRegParm;
 220   do {
 221     if (Fn(0, VT, VT, CCValAssign::Full, Flags, *this)) {
 222 #ifndef NDEBUG
 223       dbgs() << "Call has unhandled type " << EVT(VT).getEVTString()
 224              << " while computing remaining regparms\n";
 225 #endif
 226       llvm_unreachable(nullptr);
 227     }
 228     HaveRegParm = Locs.back().isRegLoc();
 229   } while (HaveRegParm);
 230
 231   // Copy all the registers from the value locations we added.
 232   assert(NumLocs < Locs.size() && "CC assignment failed to add location");
 233   for (unsigned I = NumLocs, E = Locs.size(); I != E; ++I)
 234     if (Locs[I].isRegLoc())
 235       Regs.push_back(MCPhysReg(Locs[I].getLocReg()));
 236
 237   // Clear the assigned values and stack memory. We leave the registers marked
 238   // as allocated so that future queries don't return the same registers, i.e.
 239   // when i64 and f64 are both passed in GPRs.
 240   StackOffset = SavedStackOffset;
 241   MaxStackArgAlign = SavedMaxStackArgAlign;
 242   Locs.resize(NumLocs);
 243 }
 244
 245 void CCState::analyzeMustTailForwardedRegisters(
 246     SmallVectorImpl<ForwardedRegister> &Forwards, ArrayRef<MVT> RegParmTypes,
 247     CCAssignFn Fn) {
 248   // Oftentimes calling conventions will not user register parameters for
 249   // variadic functions, so we need to assume we're not variadic so that we get
 250   // all the registers that might be used in a non-variadic call.
 251   SaveAndRestore<bool> SavedVarArg(IsVarArg, false);
 252   SaveAndRestore<bool> SavedMustTail(AnalyzingMustTailForwardedRegs, true);
 253
 254   for (MVT RegVT : RegParmTypes) {
 255     SmallVector<MCPhysReg, 8> RemainingRegs;
 256     getRemainingRegParmsForType(RemainingRegs, RegVT, Fn);
 257     const TargetLowering *TL = MF.getSubtarget().getTargetLowering();
 258     const TargetRegisterClass *RC = TL->getRegClassFor(RegVT);
 259     for (MCPhysReg PReg : RemainingRegs) {
 260       Register VReg = MF.addLiveIn(PReg, RC);
 261       Forwards.push_back(ForwardedRegister(VReg, PReg, RegVT));
 262     }
 263   }
 264 }
 265
 266 bool CCState::resultsCompatible(CallingConv::ID CalleeCC,
 267                                 CallingConv::ID CallerCC, MachineFunction &MF,
 268                                 LLVMContext &C,
 269                                 const SmallVectorImpl<ISD::InputArg> &Ins,
 270                                 CCAssignFn CalleeFn, CCAssignFn CallerFn) {
 271   if (CalleeCC == CallerCC)
 272     return true;
 273   SmallVector<CCValAssign, 4> RVLocs1;
 274   CCState CCInfo1(CalleeCC, false, MF, RVLocs1, C);
 275   CCInfo1.AnalyzeCallResult(Ins, CalleeFn);
 276
 277   SmallVector<CCValAssign, 4> RVLocs2;
 278   CCState CCInfo2(CallerCC, false, MF, RVLocs2, C);
 279   CCInfo2.AnalyzeCallResult(Ins, CallerFn);
 280
 281   if (RVLocs1.size() != RVLocs2.size())
 282     return false;
 283   for (unsigned I = 0, E = RVLocs1.size(); I != E; ++I) {
 284     const CCValAssign &Loc1 = RVLocs1[I];
 285     const CCValAssign &Loc2 = RVLocs2[I];
 286
 287     if ( // Must both be in registers, or both in memory
 288         Loc1.isRegLoc() != Loc2.isRegLoc() ||
 289         // Must fill the same part of their locations
 290         Loc1.getLocInfo() != Loc2.getLocInfo() ||
 291         // Memory offset/register number must be the same
 292         Loc1.getExtraInfo() != Loc2.getExtraInfo())
 293       return false;
 294   }
 295   return true;
 296 }