llvm/lib/CodeGen/GlobalISel/RegisterBank.cpp

   1 //===- llvm/CodeGen/GlobalISel/RegisterBank.cpp - Register Bank --*- C++ -*-==//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 /// \file
   9 /// This file implements the RegisterBank class.
  10 //===----------------------------------------------------------------------===//
  11
  12 #include "llvm/CodeGen/GlobalISel/RegisterBank.h"
  13 #include "llvm/ADT/StringExtras.h"
  14 #include "llvm/CodeGen/TargetRegisterInfo.h"
  15 #include "llvm/Config/llvm-config.h"
  16 #include "llvm/Support/Debug.h"
  17
  18 #define DEBUG_TYPE "registerbank"
  19
  20 using namespace llvm;
  21
  22 const unsigned RegisterBank::InvalidID = UINT_MAX;
  23
  24 RegisterBank::RegisterBank(
  25     unsigned ID, const char *Name, unsigned Size,
  26     const uint32_t *CoveredClasses, unsigned NumRegClasses)
  27     : ID(ID), Name(Name), Size(Size) {
  28   ContainedRegClasses.resize(NumRegClasses);
  29   ContainedRegClasses.setBitsInMask(CoveredClasses);
  30 }
  31
  32 bool RegisterBank::verify(const TargetRegisterInfo &TRI) const {
  33   assert(isValid() && "Invalid register bank");
  34   for (unsigned RCId = 0, End = TRI.getNumRegClasses(); RCId != End; ++RCId) {
  35     const TargetRegisterClass &RC = *TRI.getRegClass(RCId);
  36
  37     if (!covers(RC))
  38       continue;
  39     // Verify that the register bank covers all the sub classes of the
  40     // classes it covers.
  41
  42     // Use a different (slow in that case) method than
  43     // RegisterBankInfo to find the subclasses of RC, to make sure
  44     // both agree on the covers.
  45     for (unsigned SubRCId = 0; SubRCId != End; ++SubRCId) {
  46       const TargetRegisterClass &SubRC = *TRI.getRegClass(RCId);
  47
  48       if (!RC.hasSubClassEq(&SubRC))
  49         continue;
  50
  51       // Verify that the Size of the register bank is big enough to cover
  52       // all the register classes it covers.
  53       assert(getSize() >= TRI.getRegSizeInBits(SubRC) &&
  54              "Size is not big enough for all the subclasses!");
  55       assert(covers(SubRC) && "Not all subclasses are covered");
  56     }
  57   }
  58   return true;
  59 }
  60
  61 bool RegisterBank::covers(const TargetRegisterClass &RC) const {
  62   assert(isValid() && "RB hasn't been initialized yet");
  63   return ContainedRegClasses.test(RC.getID());
  64 }
  65
  66 bool RegisterBank::isValid() const {
  67   return ID != InvalidID && Name != nullptr && Size != 0 &&
  68          // A register bank that does not cover anything is useless.
  69          !ContainedRegClasses.empty();
  70 }
  71
  72 bool RegisterBank::operator==(const RegisterBank &OtherRB) const {
  73   // There must be only one instance of a given register bank alive
  74   // for the whole compilation.
  75   // The RegisterBankInfo is supposed to enforce that.
  76   assert((OtherRB.getID() != getID() || &OtherRB == this) &&
  77          "ID does not uniquely identify a RegisterBank");
  78   return &OtherRB == this;
  79 }
  80
  81 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
  82 LLVM_DUMP_METHOD void RegisterBank::dump(const TargetRegisterInfo *TRI) const {
  83   print(dbgs(), /* IsForDebug */ true, TRI);
  84 }
  85 #endif
  86
  87 void RegisterBank::print(raw_ostream &OS, bool IsForDebug,
  88                          const TargetRegisterInfo *TRI) const {
  89   OS << getName();
  90   if (!IsForDebug)
  91     return;
  92   OS << "(ID:" << getID() << ", Size:" << getSize() << ")\n"
  93      << "isValid:" << isValid() << '\n'
  94      << "Number of Covered register classes: " << ContainedRegClasses.count()
  95      << '\n';
  96   // Print all the subclasses if we can.
  97   // This register classes may not be properly initialized yet.
  98   if (!TRI || ContainedRegClasses.empty())
  99     return;
 100   assert(ContainedRegClasses.size() == TRI->getNumRegClasses() &&
 101          "TRI does not match the initialization process?");
 102   OS << "Covered register classes:\n";
 103   ListSeparator LS;
 104   for (unsigned RCId = 0, End = TRI->getNumRegClasses(); RCId != End; ++RCId) {
 105     const TargetRegisterClass &RC = *TRI->getRegClass(RCId);
 106
 107     if (covers(RC))
 108       OS << LS << TRI->getRegClassName(&RC);
 109   }
 110 }