llvm/lib/CodeGen/LiveRegUnits.cpp

   1 //===- LiveRegUnits.cpp - Register Unit Set -------------------------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 /// \file This file imlements the LiveRegUnits set.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "llvm/CodeGen/LiveRegUnits.h"
  14 #include "llvm/CodeGen/MachineBasicBlock.h"
  15 #include "llvm/CodeGen/MachineFrameInfo.h"
  16 #include "llvm/CodeGen/MachineFunction.h"
  17 #include "llvm/CodeGen/MachineOperand.h"
  18 #include "llvm/CodeGen/MachineRegisterInfo.h"
  19
  20 using namespace llvm;
  21
  22 void LiveRegUnits::removeRegsNotPreserved(const uint32_t *RegMask) {
  23   for (unsigned U = 0, E = TRI->getNumRegUnits(); U != E; ++U) {
  24     for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); ++RootReg) {
  25       if (MachineOperand::clobbersPhysReg(RegMask, *RootReg))
  26         Units.reset(U);
  27     }
  28   }
  29 }
  30
  31 void LiveRegUnits::addRegsInMask(const uint32_t *RegMask) {
  32   for (unsigned U = 0, E = TRI->getNumRegUnits(); U != E; ++U) {
  33     for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); ++RootReg) {
  34       if (MachineOperand::clobbersPhysReg(RegMask, *RootReg))
  35         Units.set(U);
  36     }
  37   }
  38 }
  39
  40 void LiveRegUnits::stepBackward(const MachineInstr &MI) {
  41   // Remove defined registers and regmask kills from the set.
  42   for (const MachineOperand &MOP : phys_regs_and_masks(MI)) {
  43     if (MOP.isRegMask()) {
  44       removeRegsNotPreserved(MOP.getRegMask());
  45       continue;
  46     }
  47
  48     if (MOP.isDef())
  49       removeReg(MOP.getReg());
  50   }
  51
  52   // Add uses to the set.
  53   for (const MachineOperand &MOP : phys_regs_and_masks(MI)) {
  54     if (!MOP.isReg() || !MOP.readsReg())
  55       continue;
  56     addReg(MOP.getReg());
  57   }
  58 }
  59
  60 void LiveRegUnits::accumulate(const MachineInstr &MI) {
  61   // Add defs, uses and regmask clobbers to the set.
  62   for (const MachineOperand &MOP : phys_regs_and_masks(MI)) {
  63     if (MOP.isRegMask()) {
  64       addRegsInMask(MOP.getRegMask());
  65       continue;
  66     }
  67     if (!MOP.isDef() && !MOP.readsReg())
  68       continue;
  69     addReg(MOP.getReg());
  70   }
  71 }
  72
  73 /// Add live-in registers of basic block \p MBB to \p LiveUnits.
  74 static void addBlockLiveIns(LiveRegUnits &LiveUnits,
  75                             const MachineBasicBlock &MBB) {
  76   for (const auto &LI : MBB.liveins())
  77     LiveUnits.addRegMasked(LI.PhysReg, LI.LaneMask);
  78 }
  79
  80 /// Adds all callee saved registers to \p LiveUnits.
  81 static void addCalleeSavedRegs(LiveRegUnits &LiveUnits,
  82                                const MachineFunction &MF) {
  83   const MachineRegisterInfo &MRI = MF.getRegInfo();
  84   const MachineFrameInfo &MFI = MF.getFrameInfo();
  85   for (const MCPhysReg *CSR = MRI.getCalleeSavedRegs(); CSR && *CSR; ++CSR) {
  86     const unsigned N = *CSR;
  87
  88     const auto &CSI = MFI.getCalleeSavedInfo();
  89     auto Info =
  90         llvm::find_if(CSI, [N](auto Info) { return Info.getReg() == N; });
  91     // If we have no info for this callee-saved register, assume it is liveout
  92     if (Info == CSI.end() || Info->isRestored())
  93       LiveUnits.addReg(N);
  94   }
  95 }
  96
  97 void LiveRegUnits::addPristines(const MachineFunction &MF) {
  98   const MachineFrameInfo &MFI = MF.getFrameInfo();
  99   if (!MFI.isCalleeSavedInfoValid())
 100     return;
 101   /// This function will usually be called on an empty object, handle this
 102   /// as a special case.
 103   if (empty()) {
 104     /// Add all callee saved regs, then remove the ones that are saved and
 105     /// restored.
 106     addCalleeSavedRegs(*this, MF);
 107     /// Remove the ones that are not saved/restored; they are pristine.
 108     for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
 109       removeReg(Info.getReg());
 110     return;
 111   }
 112   /// If a callee-saved register that is not pristine is already present
 113   /// in the set, we should make sure that it stays in it. Precompute the
 114   /// set of pristine registers in a separate object.
 115   /// Add all callee saved regs, then remove the ones that are saved+restored.
 116   LiveRegUnits Pristine(*TRI);
 117   addCalleeSavedRegs(Pristine, MF);
 118   /// Remove the ones that are not saved/restored; they are pristine.
 119   for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
 120     Pristine.removeReg(Info.getReg());
 121   addUnits(Pristine.getBitVector());
 122 }
 123
 124 void LiveRegUnits::addLiveOuts(const MachineBasicBlock &MBB) {
 125   const MachineFunction &MF = *MBB.getParent();
 126
 127   addPristines(MF);
 128
 129   // To get the live-outs we simply merge the live-ins of all successors.
 130   for (const MachineBasicBlock *Succ : MBB.successors())
 131     addBlockLiveIns(*this, *Succ);
 132
 133   // For the return block: Add all callee saved registers.
 134   if (MBB.isReturnBlock()) {
 135     const MachineFrameInfo &MFI = MF.getFrameInfo();
 136     if (MFI.isCalleeSavedInfoValid())
 137       addCalleeSavedRegs(*this, MF);
 138   }
 139 }
 140
 141 void LiveRegUnits::addLiveIns(const MachineBasicBlock &MBB) {
 142   const MachineFunction &MF = *MBB.getParent();
 143   addPristines(MF);
 144   addBlockLiveIns(*this, MBB);
 145 }