llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp

   1 //===- TargetFrameLoweringImpl.cpp - Implement target frame interface ------==//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // Implements the layout of a stack frame on the target machine.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "llvm/CodeGen/TargetFrameLowering.h"
  14 #include "llvm/ADT/BitVector.h"
  15 #include "llvm/CodeGen/MachineFrameInfo.h"
  16 #include "llvm/CodeGen/MachineFunction.h"
  17 #include "llvm/CodeGen/MachineRegisterInfo.h"
  18 #include "llvm/CodeGen/TargetRegisterInfo.h"
  19 #include "llvm/CodeGen/TargetSubtargetInfo.h"
  20 #include "llvm/IR/Attributes.h"
  21 #include "llvm/IR/CallingConv.h"
  22 #include "llvm/IR/Function.h"
  23 #include "llvm/IR/InstrTypes.h"
  24 #include "llvm/MC/MCRegisterInfo.h"
  25 #include "llvm/Support/Compiler.h"
  26 #include "llvm/Target/TargetMachine.h"
  27 #include "llvm/Target/TargetOptions.h"
  28
  29 using namespace llvm;
  30
  31 TargetFrameLowering::~TargetFrameLowering() = default;
  32
  33 bool TargetFrameLowering::enableCalleeSaveSkip(const MachineFunction &MF) const {
  34   assert(MF.getFunction().hasFnAttribute(Attribute::NoReturn) &&
  35          MF.getFunction().hasFnAttribute(Attribute::NoUnwind) &&
  36          !MF.getFunction().hasFnAttribute(Attribute::UWTable));
  37   return false;
  38 }
  39
  40 /// Returns the displacement from the frame register to the stack
  41 /// frame of the specified index, along with the frame register used
  42 /// (in output arg FrameReg). This is the default implementation which
  43 /// is overridden for some targets.
  44 StackOffset
  45 TargetFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
  46                                             Register &FrameReg) const {
  47   const MachineFrameInfo &MFI = MF.getFrameInfo();
  48   const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo();
  49
  50   // By default, assume all frame indices are referenced via whatever
  51   // getFrameRegister() says. The target can override this if it's doing
  52   // something different.
  53   FrameReg = RI->getFrameRegister(MF);
  54
  55   return StackOffset::getFixed(MFI.getObjectOffset(FI) + MFI.getStackSize() -
  56                                getOffsetOfLocalArea() +
  57                                MFI.getOffsetAdjustment());
  58 }
  59
  60 bool TargetFrameLowering::needsFrameIndexResolution(
  61     const MachineFunction &MF) const {
  62   return MF.getFrameInfo().hasStackObjects();
  63 }
  64
  65 void TargetFrameLowering::getCalleeSaves(const MachineFunction &MF,
  66                                          BitVector &CalleeSaves) const {
  67   const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
  68   CalleeSaves.resize(TRI.getNumRegs());
  69
  70   const MachineFrameInfo &MFI = MF.getFrameInfo();
  71   if (!MFI.isCalleeSavedInfoValid())
  72     return;
  73
  74   for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
  75     CalleeSaves.set(Info.getReg());
  76 }
  77
  78 void TargetFrameLowering::determineCalleeSaves(MachineFunction &MF,
  79                                                BitVector &SavedRegs,
  80                                                RegScavenger *RS) const {
  81   const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
  82
  83   // Resize before the early returns. Some backends expect that
  84   // SavedRegs.size() == TRI.getNumRegs() after this call even if there are no
  85   // saved registers.
  86   SavedRegs.resize(TRI.getNumRegs());
  87
  88   // When interprocedural register allocation is enabled caller saved registers
  89   // are preferred over callee saved registers.
  90   if (MF.getTarget().Options.EnableIPRA &&
  91       isSafeForNoCSROpt(MF.getFunction()) &&
  92       isProfitableForNoCSROpt(MF.getFunction()))
  93     return;
  94
  95   // Get the callee saved register list...
  96   const MCPhysReg *CSRegs = MF.getRegInfo().getCalleeSavedRegs();
  97
  98   // Early exit if there are no callee saved registers.
  99   if (!CSRegs || CSRegs[0] == 0)
 100     return;
 101
 102   // In Naked functions we aren't going to save any registers.
 103   if (MF.getFunction().hasFnAttribute(Attribute::Naked))
 104     return;
 105
 106   // Noreturn+nounwind functions never restore CSR, so no saves are needed.
 107   // Purely noreturn functions may still return through throws, so those must
 108   // save CSR for caller exception handlers.
 109   //
 110   // If the function uses longjmp to break out of its current path of
 111   // execution we do not need the CSR spills either: setjmp stores all CSRs
 112   // it was called with into the jmp_buf, which longjmp then restores.
 113   if (MF.getFunction().hasFnAttribute(Attribute::NoReturn) &&
 114         MF.getFunction().hasFnAttribute(Attribute::NoUnwind) &&
 115         !MF.getFunction().hasFnAttribute(Attribute::UWTable) &&
 116         enableCalleeSaveSkip(MF))
 117     return;
 118
 119   // Functions which call __builtin_unwind_init get all their registers saved.
 120   bool CallsUnwindInit = MF.callsUnwindInit();
 121   const MachineRegisterInfo &MRI = MF.getRegInfo();
 122   for (unsigned i = 0; CSRegs[i]; ++i) {
 123     unsigned Reg = CSRegs[i];
 124     if (CallsUnwindInit || MRI.isPhysRegModified(Reg))
 125       SavedRegs.set(Reg);
 126   }
 127 }
 128
 129 unsigned TargetFrameLowering::getStackAlignmentSkew(
 130     const MachineFunction &MF) const {
 131   // When HHVM function is called, the stack is skewed as the return address
 132   // is removed from the stack before we enter the function.
 133   if (LLVM_UNLIKELY(MF.getFunction().getCallingConv() == CallingConv::HHVM))
 134     return MF.getTarget().getAllocaPointerSize();
 135
 136   return 0;
 137 }
 138
 139 bool TargetFrameLowering::allocateScavengingFrameIndexesNearIncomingSP(
 140   const MachineFunction &MF) const {
 141   if (!hasFP(MF))
 142     return false;
 143
 144   const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
 145   return RegInfo->useFPForScavengingIndex(MF) &&
 146          !RegInfo->hasStackRealignment(MF);
 147 }
 148
 149 bool TargetFrameLowering::isSafeForNoCSROpt(const Function &F) {
 150   if (!F.hasLocalLinkage() || F.hasAddressTaken() ||
 151       !F.hasFnAttribute(Attribute::NoRecurse))
 152     return false;
 153   // Function should not be optimized as tail call.
 154   for (const User *U : F.users())
 155     if (auto *CB = dyn_cast<CallBase>(U))
 156       if (CB->isTailCall())
 157         return false;
 158   return true;
 159 }
 160
 161 int TargetFrameLowering::getInitialCFAOffset(const MachineFunction &MF) const {
 162   llvm_unreachable("getInitialCFAOffset() not implemented!");
 163 }
 164
 165 Register
 166 TargetFrameLowering::getInitialCFARegister(const MachineFunction &MF) const {
 167   llvm_unreachable("getInitialCFARegister() not implemented!");
 168 }
 169
 170 TargetFrameLowering::DwarfFrameBase
 171 TargetFrameLowering::getDwarfFrameBase(const MachineFunction &MF) const {
 172   const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo();
 173   return DwarfFrameBase{DwarfFrameBase::Register, {RI->getFrameRegister(MF)}};
 174 }