1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2 # RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,M3
3 # RUN: llvm-mca -march=aarch64 -mcpu=exynos-m4 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,M4
4 # RUN: llvm-mca -march=aarch64 -mcpu=exynos-m5 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,M5
12 # ALL: Iterations: 100
13 # ALL-NEXT: Instructions: 400
15 # M3-NEXT: Total Cycles: 204
16 # M4-NEXT: Total Cycles: 404
17 # M5-NEXT: Total Cycles: 204
19 # ALL-NEXT: Total uOps: 400
21 # ALL: Dispatch Width: 6
23 # M3-NEXT: uOps Per Cycle: 1.96
25 # M3-NEXT: Block RThroughput: 2.0
27 # M4-NEXT: uOps Per Cycle: 0.99
29 # M4-NEXT: Block RThroughput: 4.0
31 # M5-NEXT: uOps Per Cycle: 1.96
33 # M5-NEXT: Block RThroughput: 2.0
35 # ALL: Instruction Info:
36 # ALL-NEXT: [1]: #uOps
37 # ALL-NEXT: [2]: Latency
38 # ALL-NEXT: [3]: RThroughput
39 # ALL-NEXT: [4]: MayLoad
40 # ALL-NEXT: [5]: MayStore
41 # ALL-NEXT: [6]: HasSideEffects (U)
43 # ALL: [1] [2] [3] [4] [5] [6] Instructions:
45 # M3-NEXT: 1 2 0.50 crc32w w0, w1, w2
46 # M3-NEXT: 1 2 0.50 crc32w w0, w0, w3
47 # M3-NEXT: 1 2 0.50 crc32cx w0, w1, x2
48 # M3-NEXT: 1 2 0.50 crc32cx w0, w0, x3
50 # M4-NEXT: 1 2 1.00 crc32w w0, w1, w2
51 # M4-NEXT: 1 2 1.00 crc32w w0, w0, w3
52 # M4-NEXT: 1 2 1.00 crc32cx w0, w1, x2
53 # M4-NEXT: 1 2 1.00 crc32cx w0, w0, x3
55 # M5-NEXT: 1 2 0.50 crc32w w0, w1, w2
56 # M5-NEXT: 1 2 0.50 crc32w w0, w0, w3
57 # M5-NEXT: 1 2 0.50 crc32cx w0, w1, x2
58 # M5-NEXT: 1 2 0.50 crc32cx w0, w0, x3