llvm/test/tools/llvm-mca/AArch64/Exynos/store.s

   1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
   2 # RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -resource-pressure=false -noalias=false < %s | FileCheck %s -check-prefixes=ALL,M3
   3 # RUN: llvm-mca -march=aarch64 -mcpu=exynos-m4 -resource-pressure=false -noalias=false < %s | FileCheck %s -check-prefixes=ALL,M4
   4 # RUN: llvm-mca -march=aarch64 -mcpu=exynos-m5 -resource-pressure=false -noalias=false < %s | FileCheck %s -check-prefixes=ALL,M5
   5
   6 stur    x0, [sp, #8]
   7 strb    w0, [sp], #1
   8 strh    w0, [sp, #2]!
   9 str     x0, [sp, #8]
  10 strb    w0, [sp, x31]
  11 strh    w0, [sp, x31, lsl #1]
  12 str     w0, [sp, w31, sxtw]
  13 str     x0, [sp, w31, uxtw #3]
  14 stnp    w0, w1, [sp, #8]
  15 stp     x0, x1, [sp], #16
  16 stp     w0, w1, [sp, #8]!
  17
  18 # ALL:      Iterations:        100
  19 # ALL-NEXT: Instructions:      1100
  20 # ALL-NEXT: Total Cycles:      1303
  21
  22 # M3-NEXT:  Total uOps:        1300
  23 # M4-NEXT:  Total uOps:        1100
  24 # M5-NEXT:  Total uOps:        1100
  25
  26 # ALL:      Dispatch Width:    6
  27
  28 # M3-NEXT:  uOps Per Cycle:    1.00
  29 # M4-NEXT:  uOps Per Cycle:    0.84
  30 # M5-NEXT:  uOps Per Cycle:    0.84
  31
  32 # ALL-NEXT: IPC:               0.84
  33
  34 # M3-NEXT:  Block RThroughput: 11.0
  35 # M4-NEXT:  Block RThroughput: 5.5
  36 # M5-NEXT:  Block RThroughput: 5.5
  37
  38 # ALL:      Instruction Info:
  39 # ALL-NEXT: [1]: #uOps
  40 # ALL-NEXT: [2]: Latency
  41 # ALL-NEXT: [3]: RThroughput
  42 # ALL-NEXT: [4]: MayLoad
  43 # ALL-NEXT: [5]: MayStore
  44 # ALL-NEXT: [6]: HasSideEffects (U)
  45
  46 # ALL:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
  47
  48 # M3-NEXT:   1      1     1.00           *            stur      x0, [sp, #8]
  49 # M3-NEXT:   1      1     1.00           *            strb      w0, [sp], #1
  50 # M3-NEXT:   1      1     1.00           *            strh      w0, [sp, #2]!
  51 # M3-NEXT:   1      1     1.00           *            str       x0, [sp, #8]
  52 # M3-NEXT:   1      1     1.00           *            strb      w0, [sp, xzr]
  53 # M3-NEXT:   1      1     1.00           *            strh      w0, [sp, xzr, lsl #1]
  54 # M3-NEXT:   2      2     1.00           *            str       w0, [sp, wzr, sxtw]
  55 # M3-NEXT:   2      2     1.00           *            str       x0, [sp, wzr, uxtw #3]
  56 # M3-NEXT:   1      1     1.00           *            stnp      w0, w1, [sp, #8]
  57 # M3-NEXT:   1      1     1.00           *            stp       x0, x1, [sp], #16
  58 # M3-NEXT:   1      1     1.00           *            stp       w0, w1, [sp, #8]!
  59
  60 # M4-NEXT:   1      1     0.50           *            stur      x0, [sp, #8]
  61 # M4-NEXT:   1      1     0.50           *            strb      w0, [sp], #1
  62 # M4-NEXT:   1      1     0.50           *            strh      w0, [sp, #2]!
  63 # M4-NEXT:   1      1     0.50           *            str       x0, [sp, #8]
  64 # M4-NEXT:   1      1     0.50           *            strb      w0, [sp, xzr]
  65 # M4-NEXT:   1      1     0.50           *            strh      w0, [sp, xzr, lsl #1]
  66 # M4-NEXT:   1      2     0.50           *            str       w0, [sp, wzr, sxtw]
  67 # M4-NEXT:   1      2     0.50           *            str       x0, [sp, wzr, uxtw #3]
  68 # M4-NEXT:   1      1     0.50           *            stnp      w0, w1, [sp, #8]
  69 # M4-NEXT:   1      1     0.50           *            stp       x0, x1, [sp], #16
  70 # M4-NEXT:   1      1     0.50           *            stp       w0, w1, [sp, #8]!
  71
  72 # M5-NEXT:   1      1     0.50           *            stur      x0, [sp, #8]
  73 # M5-NEXT:   1      1     0.50           *            strb      w0, [sp], #1
  74 # M5-NEXT:   1      1     0.50           *            strh      w0, [sp, #2]!
  75 # M5-NEXT:   1      1     0.50           *            str       x0, [sp, #8]
  76 # M5-NEXT:   1      1     0.50           *            strb      w0, [sp, xzr]
  77 # M5-NEXT:   1      1     0.50           *            strh      w0, [sp, xzr, lsl #1]
  78 # M5-NEXT:   1      2     0.50           *            str       w0, [sp, wzr, sxtw]
  79 # M5-NEXT:   1      2     0.50           *            str       x0, [sp, wzr, uxtw #3]
  80 # M5-NEXT:   1      1     0.50           *            stnp      w0, w1, [sp, #8]
  81 # M5-NEXT:   1      1     0.50           *            stp       x0, x1, [sp], #16
  82 # M5-NEXT:   1      1     0.50           *            stp       w0, w1, [sp, #8]!