1 //===-- Target.cpp ----------------------------------------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 #include "AArch64RegisterInfo.h"
15 static unsigned getLoadImmediateOpcode(unsigned RegBitWidth
) {
16 switch (RegBitWidth
) {
18 return AArch64::MOVi32imm
;
20 return AArch64::MOVi64imm
;
22 llvm_unreachable("Invalid Value Width");
25 // Generates instruction to load an immediate value into a register.
26 static MCInst
loadImmediate(unsigned Reg
, unsigned RegBitWidth
,
28 if (Value
.getBitWidth() > RegBitWidth
)
29 llvm_unreachable("Value must fit in the Register");
30 return MCInstBuilder(getLoadImmediateOpcode(RegBitWidth
))
32 .addImm(Value
.getZExtValue());
35 #include "AArch64GenExegesis.inc"
39 class ExegesisAArch64Target
: public ExegesisTarget
{
41 ExegesisAArch64Target() : ExegesisTarget(AArch64CpuPfmCounters
) {}
44 std::vector
<MCInst
> setRegTo(const MCSubtargetInfo
&STI
, unsigned Reg
,
45 const APInt
&Value
) const override
{
46 if (AArch64::GPR32RegClass
.contains(Reg
))
47 return {loadImmediate(Reg
, 32, Value
)};
48 if (AArch64::GPR64RegClass
.contains(Reg
))
49 return {loadImmediate(Reg
, 64, Value
)};
50 errs() << "setRegTo is not implemented, results will be unreliable\n";
54 bool matchesArch(Triple::ArchType Arch
) const override
{
55 return Arch
== Triple::aarch64
|| Arch
== Triple::aarch64_be
;
58 void addTargetSpecificPasses(PassManagerBase
&PM
) const override
{
59 // Function return is a pseudo-instruction that needs to be expanded
60 PM
.add(createAArch64ExpandPseudoPass());
66 static ExegesisTarget
*getTheExegesisAArch64Target() {
67 static ExegesisAArch64Target Target
;
71 void InitializeAArch64ExegesisTarget() {
72 ExegesisTarget::registerTarget(getTheExegesisAArch64Target());
75 } // namespace exegesis