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4 * Automatically generated file, do not edit! *
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8 ====================================================================================
9 Syntax of Core GFX10 Instructions
10 ====================================================================================
18 This document describes the syntax of *core* GFX10 instructions.
23 Notation used in this document is explained :ref:`here<amdgpu_syn_instruction_notation>`.
28 An overview of generic syntax and other features of AMDGPU instructions may be found :ref:`in this document<amdgpu_syn_instructions>`.
35 -----------------------
39 **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
40 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
41 v_add_co_ci_u32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
42 v_add_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
43 v_add_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
44 v_add_nc_u32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
45 v_and_b32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
46 v_ashrrev_i32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
47 v_bfrev_b32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
48 v_ceil_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
49 v_ceil_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
50 v_cos_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
51 v_cos_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
52 v_cvt_f16_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
53 v_cvt_f16_i16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
54 v_cvt_f16_u16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
55 v_cvt_f32_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
56 v_cvt_f32_i32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
57 v_cvt_f32_u32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
58 v_cvt_f32_ubyte0_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
59 v_cvt_f32_ubyte1_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
60 v_cvt_f32_ubyte2_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
61 v_cvt_f32_ubyte3_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
62 v_cvt_flr_i32_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
63 v_cvt_i16_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
64 v_cvt_i32_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
65 v_cvt_norm_i16_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
66 v_cvt_norm_u16_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
67 v_cvt_off_f32_i4_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
68 v_cvt_rpi_i32_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
69 v_cvt_u16_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
70 v_cvt_u32_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
71 v_exp_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
72 v_exp_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
73 v_ffbh_i32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
74 v_ffbh_u32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
75 v_ffbl_b32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
76 v_floor_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
77 v_floor_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
78 v_fmac_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
79 v_fmac_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
80 v_fract_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
81 v_fract_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
82 v_frexp_exp_i16_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
83 v_frexp_exp_i32_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
84 v_frexp_mant_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
85 v_frexp_mant_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
86 v_ldexp_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`i16<amdgpu_synid10_type_dev>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
87 v_log_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
88 v_log_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
89 v_lshlrev_b32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
90 v_lshrrev_b32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
91 v_mac_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
92 v_max_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
93 v_max_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
94 v_max_i32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
95 v_max_u32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
96 v_min_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
97 v_min_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
98 v_min_i32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
99 v_min_u32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
100 v_mov_b32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
101 v_mul_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
102 v_mul_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
103 v_mul_hi_i32_i24_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
104 v_mul_hi_u32_u24_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
105 v_mul_i32_i24_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
106 v_mul_legacy_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
107 v_mul_u32_u24_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
108 v_not_b32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
109 v_or_b32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
110 v_rcp_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
111 v_rcp_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
112 v_rcp_iflag_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
113 v_rndne_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
114 v_rndne_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
115 v_rsq_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
116 v_rsq_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
117 v_sat_pk_u8_i16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
118 v_sin_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
119 v_sin_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
120 v_sqrt_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
121 v_sqrt_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
122 v_sub_co_ci_u32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
123 v_sub_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
124 v_sub_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
125 v_sub_nc_u32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
126 v_subrev_co_ci_u32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
127 v_subrev_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
128 v_subrev_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
129 v_subrev_nc_u32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
130 v_trunc_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
131 v_trunc_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
132 v_xnor_b32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
133 v_xor_b32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
136 -----------------------
140 **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
141 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
142 v_add_co_ci_u32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
143 v_add_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
144 v_add_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
145 v_add_nc_u32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
146 v_and_b32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
147 v_ashrrev_i32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
148 v_bfrev_b32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
149 v_ceil_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
150 v_ceil_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
151 v_cos_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
152 v_cos_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
153 v_cvt_f16_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
154 v_cvt_f16_i16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
155 v_cvt_f16_u16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
156 v_cvt_f32_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
157 v_cvt_f32_i32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
158 v_cvt_f32_u32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
159 v_cvt_f32_ubyte0_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
160 v_cvt_f32_ubyte1_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
161 v_cvt_f32_ubyte2_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
162 v_cvt_f32_ubyte3_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
163 v_cvt_flr_i32_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
164 v_cvt_i16_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
165 v_cvt_i32_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
166 v_cvt_norm_i16_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
167 v_cvt_norm_u16_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
168 v_cvt_off_f32_i4_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
169 v_cvt_rpi_i32_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
170 v_cvt_u16_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
171 v_cvt_u32_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
172 v_exp_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
173 v_exp_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
174 v_ffbh_i32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
175 v_ffbh_u32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
176 v_ffbl_b32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
177 v_floor_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
178 v_floor_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
179 v_fmac_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
180 v_fmac_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
181 v_fract_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
182 v_fract_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
183 v_frexp_exp_i16_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
184 v_frexp_exp_i32_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
185 v_frexp_mant_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
186 v_frexp_mant_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
187 v_ldexp_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`i16<amdgpu_synid10_type_dev>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
188 v_log_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
189 v_log_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
190 v_lshlrev_b32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
191 v_lshrrev_b32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
192 v_mac_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
193 v_max_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
194 v_max_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
195 v_max_i32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
196 v_max_u32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
197 v_min_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
198 v_min_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
199 v_min_i32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
200 v_min_u32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
201 v_mov_b32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
202 v_mul_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
203 v_mul_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
204 v_mul_hi_i32_i24_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
205 v_mul_hi_u32_u24_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
206 v_mul_i32_i24_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
207 v_mul_legacy_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
208 v_mul_u32_u24_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
209 v_not_b32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
210 v_or_b32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
211 v_rcp_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
212 v_rcp_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
213 v_rcp_iflag_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
214 v_rndne_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
215 v_rndne_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
216 v_rsq_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
217 v_rsq_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
218 v_sat_pk_u8_i16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
219 v_sin_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
220 v_sin_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
221 v_sqrt_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
222 v_sqrt_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
223 v_sub_co_ci_u32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
224 v_sub_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
225 v_sub_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
226 v_sub_nc_u32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
227 v_subrev_co_ci_u32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
228 v_subrev_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
229 v_subrev_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
230 v_subrev_nc_u32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
231 v_trunc_f16_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
232 v_trunc_f32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
233 v_xnor_b32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
234 v_xor_b32_dpp :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
237 -----------------------
241 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
242 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
243 ds_add_f32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
244 ds_add_rtn_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
245 ds_add_rtn_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
246 ds_add_rtn_u64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
247 ds_add_src2_f32 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
248 ds_add_src2_u32 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
249 ds_add_src2_u64 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
250 ds_add_u32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
251 ds_add_u64 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
252 ds_and_b32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
253 ds_and_b64 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
254 ds_and_rtn_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
255 ds_and_rtn_b64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
256 ds_and_src2_b32 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
257 ds_and_src2_b64 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
258 ds_append :ref:`vdst<amdgpu_synid10_vdst32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
259 ds_bpermute_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>`
260 ds_cmpst_b32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata32_0>`, :ref:`vdata1<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
261 ds_cmpst_b64 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata64_0>`, :ref:`vdata1<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
262 ds_cmpst_f32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata32_0>`, :ref:`vdata1<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
263 ds_cmpst_f64 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata64_0>`, :ref:`vdata1<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
264 ds_cmpst_rtn_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata32_0>`, :ref:`vdata1<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
265 ds_cmpst_rtn_b64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata64_0>`, :ref:`vdata1<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
266 ds_cmpst_rtn_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata32_0>`, :ref:`vdata1<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
267 ds_cmpst_rtn_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata64_0>`, :ref:`vdata1<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
268 ds_condxchg32_rtn_b64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
269 ds_consume :ref:`vdst<amdgpu_synid10_vdst32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
270 ds_dec_rtn_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
271 ds_dec_rtn_u64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
272 ds_dec_src2_u32 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
273 ds_dec_src2_u64 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
274 ds_dec_u32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
275 ds_dec_u64 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
276 ds_gws_barrier :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
277 ds_gws_init :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
278 ds_gws_sema_br :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
279 ds_gws_sema_p :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
280 ds_gws_sema_release_all :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
281 ds_gws_sema_v :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
282 ds_inc_rtn_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
283 ds_inc_rtn_u64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
284 ds_inc_src2_u32 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
285 ds_inc_src2_u64 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
286 ds_inc_u32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
287 ds_inc_u64 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
288 ds_max_f32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
289 ds_max_f64 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
290 ds_max_i32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
291 ds_max_i64 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
292 ds_max_rtn_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
293 ds_max_rtn_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
294 ds_max_rtn_i32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
295 ds_max_rtn_i64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
296 ds_max_rtn_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
297 ds_max_rtn_u64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
298 ds_max_src2_f32 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
299 ds_max_src2_f64 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
300 ds_max_src2_i32 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
301 ds_max_src2_i64 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
302 ds_max_src2_u32 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
303 ds_max_src2_u64 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
304 ds_max_u32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
305 ds_max_u64 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
306 ds_min_f32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
307 ds_min_f64 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
308 ds_min_i32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
309 ds_min_i64 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
310 ds_min_rtn_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
311 ds_min_rtn_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
312 ds_min_rtn_i32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
313 ds_min_rtn_i64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
314 ds_min_rtn_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
315 ds_min_rtn_u64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
316 ds_min_src2_f32 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
317 ds_min_src2_f64 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
318 ds_min_src2_i32 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
319 ds_min_src2_i64 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
320 ds_min_src2_u32 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
321 ds_min_src2_u64 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
322 ds_min_u32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
323 ds_min_u64 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
324 ds_mskor_b32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata32_0>`, :ref:`vdata1<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
325 ds_mskor_b64 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata64_0>`, :ref:`vdata1<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
326 ds_mskor_rtn_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata32_0>`, :ref:`vdata1<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
327 ds_mskor_rtn_b64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata64_0>`, :ref:`vdata1<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
329 ds_or_b32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
330 ds_or_b64 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
331 ds_or_rtn_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
332 ds_or_rtn_b64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
333 ds_or_src2_b32 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
334 ds_or_src2_b64 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
335 ds_ordered_count :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
336 ds_permute_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>`
337 ds_read2_b32 :ref:`vdst<amdgpu_synid10_vdst64_0>`::ref:`b32x2<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`gds<amdgpu_synid_gds>`
338 ds_read2_b64 :ref:`vdst<amdgpu_synid10_vdst128_0>`::ref:`b64x2<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`gds<amdgpu_synid_gds>`
339 ds_read2st64_b32 :ref:`vdst<amdgpu_synid10_vdst64_0>`::ref:`b32x2<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`gds<amdgpu_synid_gds>`
340 ds_read2st64_b64 :ref:`vdst<amdgpu_synid10_vdst128_0>`::ref:`b64x2<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`gds<amdgpu_synid_gds>`
341 ds_read_b128 :ref:`vdst<amdgpu_synid10_vdst128_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
342 ds_read_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
343 ds_read_b64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
344 ds_read_b96 :ref:`vdst<amdgpu_synid10_vdst96_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
345 ds_read_i16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
346 ds_read_i8 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
347 ds_read_i8_d16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
348 ds_read_i8_d16_hi :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
349 ds_read_u16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
350 ds_read_u16_d16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
351 ds_read_u16_d16_hi :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
352 ds_read_u8 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
353 ds_read_u8_d16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
354 ds_read_u8_d16_hi :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
355 ds_rsub_rtn_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
356 ds_rsub_rtn_u64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
357 ds_rsub_src2_u32 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
358 ds_rsub_src2_u64 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
359 ds_rsub_u32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
360 ds_rsub_u64 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
361 ds_sub_rtn_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
362 ds_sub_rtn_u64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
363 ds_sub_src2_u32 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
364 ds_sub_src2_u64 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
365 ds_sub_u32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
366 ds_sub_u64 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
367 ds_swizzle_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`pattern<amdgpu_synid_sw_offset16>` :ref:`gds<amdgpu_synid_gds>`
368 ds_wrap_rtn_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata32_0>`, :ref:`vdata1<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
369 ds_write2_b32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata32_0>`, :ref:`vdata1<amdgpu_synid10_vdata32_0>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`gds<amdgpu_synid_gds>`
370 ds_write2_b64 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata64_0>`, :ref:`vdata1<amdgpu_synid10_vdata64_0>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`gds<amdgpu_synid_gds>`
371 ds_write2st64_b32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata32_0>`, :ref:`vdata1<amdgpu_synid10_vdata32_0>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`gds<amdgpu_synid_gds>`
372 ds_write2st64_b64 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata64_0>`, :ref:`vdata1<amdgpu_synid10_vdata64_0>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`gds<amdgpu_synid_gds>`
373 ds_write_b128 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata128_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
374 ds_write_b16 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
375 ds_write_b16_d16_hi :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
376 ds_write_b32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
377 ds_write_b64 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
378 ds_write_b8 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
379 ds_write_b8_d16_hi :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
380 ds_write_b96 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata96_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
381 ds_write_src2_b32 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
382 ds_write_src2_b64 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
383 ds_wrxchg2_rtn_b32 :ref:`vdst<amdgpu_synid10_vdst64_0>`::ref:`b32x2<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata32_0>`, :ref:`vdata1<amdgpu_synid10_vdata32_0>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`gds<amdgpu_synid_gds>`
384 ds_wrxchg2_rtn_b64 :ref:`vdst<amdgpu_synid10_vdst128_0>`::ref:`b64x2<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata64_0>`, :ref:`vdata1<amdgpu_synid10_vdata64_0>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`gds<amdgpu_synid_gds>`
385 ds_wrxchg2st64_rtn_b32 :ref:`vdst<amdgpu_synid10_vdst64_0>`::ref:`b32x2<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata32_0>`, :ref:`vdata1<amdgpu_synid10_vdata32_0>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`gds<amdgpu_synid_gds>`
386 ds_wrxchg2st64_rtn_b64 :ref:`vdst<amdgpu_synid10_vdst128_0>`::ref:`b64x2<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata64_0>`, :ref:`vdata1<amdgpu_synid10_vdata64_0>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`offset8<amdgpu_synid_ds_offset8>` :ref:`gds<amdgpu_synid_gds>`
387 ds_wrxchg_rtn_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
388 ds_wrxchg_rtn_b64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
389 ds_xor_b32 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
390 ds_xor_b64 :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
391 ds_xor_rtn_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
392 ds_xor_rtn_b64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_ds>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
393 ds_xor_src2_b32 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
394 ds_xor_src2_b64 :ref:`vaddr<amdgpu_synid10_addr_ds>` :ref:`offset16<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
397 -----------------------
401 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
402 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
403 exp :ref:`tgt<amdgpu_synid10_tgt>`, :ref:`vsrc0<amdgpu_synid10_src_exp>`, :ref:`vsrc1<amdgpu_synid10_src_exp>`, :ref:`vsrc2<amdgpu_synid10_src_exp>`, :ref:`vsrc3<amdgpu_synid10_src_exp>` :ref:`done<amdgpu_synid_done>` :ref:`compr<amdgpu_synid_compr>` :ref:`vm<amdgpu_synid_vm>`
406 -----------------------
410 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
411 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
412 flat_atomic_add :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
413 flat_atomic_add_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
414 flat_atomic_and :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
415 flat_atomic_and_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
416 flat_atomic_cmpswap :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`::ref:`b32x2<amdgpu_synid10_type_dev>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
417 flat_atomic_cmpswap_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata128_0>`::ref:`b64x2<amdgpu_synid10_type_dev>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
418 flat_atomic_dec :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`::ref:`u32<amdgpu_synid10_type_dev>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
419 flat_atomic_dec_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`::ref:`u64<amdgpu_synid10_type_dev>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
420 flat_atomic_fcmpswap :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`::ref:`f32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`::ref:`f32x2<amdgpu_synid10_type_dev>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
421 flat_atomic_fcmpswap_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`::ref:`f64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata128_0>`::ref:`f64x2<amdgpu_synid10_type_dev>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
422 flat_atomic_fmax :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`::ref:`f32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`::ref:`f32<amdgpu_synid10_type_dev>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
423 flat_atomic_fmax_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`::ref:`f64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`::ref:`f64<amdgpu_synid10_type_dev>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
424 flat_atomic_fmin :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`::ref:`f32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`::ref:`f32<amdgpu_synid10_type_dev>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
425 flat_atomic_fmin_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`::ref:`f64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`::ref:`f64<amdgpu_synid10_type_dev>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
426 flat_atomic_inc :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`::ref:`u32<amdgpu_synid10_type_dev>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
427 flat_atomic_inc_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`::ref:`u64<amdgpu_synid10_type_dev>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
428 flat_atomic_or :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
429 flat_atomic_or_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
430 flat_atomic_smax :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`::ref:`s32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`::ref:`s32<amdgpu_synid10_type_dev>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
431 flat_atomic_smax_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`::ref:`s64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`::ref:`s64<amdgpu_synid10_type_dev>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
432 flat_atomic_smin :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`::ref:`s32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`::ref:`s32<amdgpu_synid10_type_dev>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
433 flat_atomic_smin_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`::ref:`s64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`::ref:`s64<amdgpu_synid10_type_dev>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
434 flat_atomic_sub :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
435 flat_atomic_sub_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
436 flat_atomic_swap :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
437 flat_atomic_swap_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
438 flat_atomic_umax :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`::ref:`u32<amdgpu_synid10_type_dev>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
439 flat_atomic_umax_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`::ref:`u64<amdgpu_synid10_type_dev>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
440 flat_atomic_umin :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`::ref:`u32<amdgpu_synid10_type_dev>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
441 flat_atomic_umin_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`::ref:`u64<amdgpu_synid10_type_dev>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
442 flat_atomic_xor :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
443 flat_atomic_xor_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
444 flat_load_dword :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_flat>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
445 flat_load_dwordx2 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_addr_flat>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
446 flat_load_dwordx3 :ref:`vdst<amdgpu_synid10_vdst96_0>`, :ref:`vaddr<amdgpu_synid10_addr_flat>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
447 flat_load_dwordx4 :ref:`vdst<amdgpu_synid10_vdst128_0>`, :ref:`vaddr<amdgpu_synid10_addr_flat>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
448 flat_load_sbyte :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_flat>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
449 flat_load_sbyte_d16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_flat>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
450 flat_load_sbyte_d16_hi :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_flat>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
451 flat_load_short_d16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_flat>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
452 flat_load_short_d16_hi :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_flat>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
453 flat_load_sshort :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_flat>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
454 flat_load_ubyte :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_flat>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
455 flat_load_ubyte_d16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_flat>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
456 flat_load_ubyte_d16_hi :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_flat>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
457 flat_load_ushort :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_addr_flat>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
458 flat_store_byte :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
459 flat_store_byte_d16_hi :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
460 flat_store_dword :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
461 flat_store_dwordx2 :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata64_0>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
462 flat_store_dwordx3 :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata96_0>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
463 flat_store_dwordx4 :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata128_0>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
464 flat_store_short :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
465 flat_store_short_d16_hi :ref:`vaddr<amdgpu_synid10_addr_flat>`, :ref:`vdata<amdgpu_synid10_vdata32_0>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
466 global_atomic_add :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
467 global_atomic_add_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
468 global_atomic_and :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
469 global_atomic_and_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
470 global_atomic_cmpswap :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`::ref:`b32x2<amdgpu_synid10_type_dev>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
471 global_atomic_cmpswap_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata128_0>`::ref:`b64x2<amdgpu_synid10_type_dev>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
472 global_atomic_dec :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
473 global_atomic_dec_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
474 global_atomic_fmax :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`::ref:`f32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`::ref:`f32<amdgpu_synid10_type_dev>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
475 global_atomic_fmax_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`::ref:`f64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`::ref:`f64<amdgpu_synid10_type_dev>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
476 global_atomic_fmin :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`::ref:`f32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`::ref:`f32<amdgpu_synid10_type_dev>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
477 global_atomic_fmin_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`::ref:`f64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`::ref:`f64<amdgpu_synid10_type_dev>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
478 global_atomic_inc :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
479 global_atomic_inc_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
480 global_atomic_or :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
481 global_atomic_or_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
482 global_atomic_smax :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`::ref:`s32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`::ref:`s32<amdgpu_synid10_type_dev>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
483 global_atomic_smax_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`::ref:`s64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`::ref:`s64<amdgpu_synid10_type_dev>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
484 global_atomic_smin :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`::ref:`s32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`::ref:`s32<amdgpu_synid10_type_dev>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
485 global_atomic_smin_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`::ref:`s64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`::ref:`s64<amdgpu_synid10_type_dev>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
486 global_atomic_sub :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
487 global_atomic_sub_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
488 global_atomic_swap :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
489 global_atomic_swap_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
490 global_atomic_umax :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
491 global_atomic_umax_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
492 global_atomic_umin :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
493 global_atomic_umin_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
494 global_atomic_xor :ref:`vdst<amdgpu_synid10_dst_flat_atomic32>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
495 global_atomic_xor_x2 :ref:`vdst<amdgpu_synid10_dst_flat_atomic64>`::ref:`opt<amdgpu_synid10_opt>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
496 global_load_dword :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
497 global_load_dwordx2 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
498 global_load_dwordx3 :ref:`vdst<amdgpu_synid10_vdst96_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
499 global_load_dwordx4 :ref:`vdst<amdgpu_synid10_vdst128_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
500 global_load_sbyte :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
501 global_load_sbyte_d16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
502 global_load_sbyte_d16_hi :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
503 global_load_short_d16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
504 global_load_short_d16_hi :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
505 global_load_sshort :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
506 global_load_ubyte :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
507 global_load_ubyte_d16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
508 global_load_ubyte_d16_hi :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
509 global_load_ushort :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
510 global_store_byte :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
511 global_store_byte_d16_hi :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
512 global_store_dword :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
513 global_store_dwordx2 :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
514 global_store_dwordx3 :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata96_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
515 global_store_dwordx4 :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata128_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
516 global_store_short :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
517 global_store_short_d16_hi :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_global>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>`
518 scratch_load_dword :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
519 scratch_load_dwordx2 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
520 scratch_load_dwordx3 :ref:`vdst<amdgpu_synid10_vdst96_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
521 scratch_load_dwordx4 :ref:`vdst<amdgpu_synid10_vdst128_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
522 scratch_load_sbyte :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
523 scratch_load_sbyte_d16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
524 scratch_load_sbyte_d16_hi :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
525 scratch_load_short_d16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
526 scratch_load_short_d16_hi :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
527 scratch_load_sshort :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
528 scratch_load_ubyte :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
529 scratch_load_ubyte_d16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
530 scratch_load_ubyte_d16_hi :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
531 scratch_load_ushort :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
532 scratch_store_byte :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
533 scratch_store_byte_d16_hi :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
534 scratch_store_dword :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
535 scratch_store_dwordx2 :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`vdata<amdgpu_synid10_vdata64_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
536 scratch_store_dwordx3 :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`vdata<amdgpu_synid10_vdata96_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
537 scratch_store_dwordx4 :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`vdata<amdgpu_synid10_vdata128_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
538 scratch_store_short :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
539 scratch_store_short_d16_hi :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
542 -----------------------
546 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
547 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
548 image_atomic_add :ref:`vdata<amdgpu_synid10_data_mimg_atomic_reg>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
549 image_atomic_and :ref:`vdata<amdgpu_synid10_data_mimg_atomic_reg>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
550 image_atomic_cmpswap :ref:`vdata<amdgpu_synid10_data_mimg_atomic_cmp>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
551 image_atomic_dec :ref:`vdata<amdgpu_synid10_data_mimg_atomic_reg>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
552 image_atomic_inc :ref:`vdata<amdgpu_synid10_data_mimg_atomic_reg>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
553 image_atomic_or :ref:`vdata<amdgpu_synid10_data_mimg_atomic_reg>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
554 image_atomic_smax :ref:`vdata<amdgpu_synid10_data_mimg_atomic_reg>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
555 image_atomic_smin :ref:`vdata<amdgpu_synid10_data_mimg_atomic_reg>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
556 image_atomic_sub :ref:`vdata<amdgpu_synid10_data_mimg_atomic_reg>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
557 image_atomic_swap :ref:`vdata<amdgpu_synid10_data_mimg_atomic_reg>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
558 image_atomic_umax :ref:`vdata<amdgpu_synid10_data_mimg_atomic_reg>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
559 image_atomic_umin :ref:`vdata<amdgpu_synid10_data_mimg_atomic_reg>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
560 image_atomic_xor :ref:`vdata<amdgpu_synid10_data_mimg_atomic_reg>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
561 image_gather4 :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
562 image_gather4_b :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
563 image_gather4_b_cl :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
564 image_gather4_b_cl_o :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
565 image_gather4_b_o :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
566 image_gather4_c :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
567 image_gather4_c_b :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
568 image_gather4_c_b_cl :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
569 image_gather4_c_b_cl_o :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
570 image_gather4_c_b_o :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
571 image_gather4_c_cl :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
572 image_gather4_c_cl_o :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
573 image_gather4_c_l :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
574 image_gather4_c_l_o :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
575 image_gather4_c_lz :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
576 image_gather4_c_lz_o :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
577 image_gather4_c_o :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
578 image_gather4_cl :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
579 image_gather4_cl_o :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
580 image_gather4_l :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
581 image_gather4_l_o :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
582 image_gather4_lz :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
583 image_gather4_lz_o :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
584 image_gather4_o :ref:`vdst<amdgpu_synid10_dst_mimg_gather4>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
585 image_get_lod :ref:`vdst<amdgpu_synid10_dst_mimg_regular>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
586 image_get_resinfo :ref:`vdst<amdgpu_synid10_dst_mimg_regular>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
587 image_load :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
588 image_load_mip :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
589 image_load_mip_pck :ref:`vdst<amdgpu_synid10_dst_mimg_regular>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
590 image_load_mip_pck_sgn :ref:`vdst<amdgpu_synid10_dst_mimg_regular>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
591 image_load_pck :ref:`vdst<amdgpu_synid10_dst_mimg_regular>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
592 image_load_pck_sgn :ref:`vdst<amdgpu_synid10_dst_mimg_regular>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
593 image_sample :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
594 image_sample_b :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
595 image_sample_b_cl :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
596 image_sample_b_cl_o :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
597 image_sample_b_o :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
598 image_sample_c :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
599 image_sample_c_b :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
600 image_sample_c_b_cl :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
601 image_sample_c_b_cl_o :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
602 image_sample_c_b_o :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
603 image_sample_c_cd :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
604 image_sample_c_cd_cl :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
605 image_sample_c_cd_cl_o :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
606 image_sample_c_cd_o :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
607 image_sample_c_cl :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
608 image_sample_c_cl_o :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
609 image_sample_c_d :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
610 image_sample_c_d_cl :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
611 image_sample_c_d_cl_o :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
612 image_sample_c_d_o :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
613 image_sample_c_l :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
614 image_sample_c_l_o :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
615 image_sample_c_lz :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
616 image_sample_c_lz_o :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
617 image_sample_c_o :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
618 image_sample_cd :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
619 image_sample_cd_cl :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
620 image_sample_cd_cl_o :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
621 image_sample_cd_o :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
622 image_sample_cl :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
623 image_sample_cl_o :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
624 image_sample_d :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
625 image_sample_d_cl :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
626 image_sample_d_cl_o :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
627 image_sample_d_o :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
628 image_sample_l :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
629 image_sample_l_o :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
630 image_sample_lz :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
631 image_sample_lz_o :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
632 image_sample_o :ref:`vdst<amdgpu_synid10_dst_mimg_regular_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>`, :ref:`ssamp<amdgpu_synid10_samp_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
633 image_store :ref:`vdata<amdgpu_synid10_data_mimg_store_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
634 image_store_mip :ref:`vdata<amdgpu_synid10_data_mimg_store_d16>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>`
635 image_store_mip_pck :ref:`vdata<amdgpu_synid10_data_mimg_store>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
636 image_store_pck :ref:`vdata<amdgpu_synid10_data_mimg_store>`, :ref:`vaddr<amdgpu_synid10_addr_mimg>`, :ref:`srsrc<amdgpu_synid10_rsrc_mimg>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
639 -----------------------
643 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
644 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
645 buffer_atomic_add :ref:`vdata<amdgpu_synid10_data_buf_atomic32>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
646 buffer_atomic_add_x2 :ref:`vdata<amdgpu_synid10_data_buf_atomic64>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
647 buffer_atomic_and :ref:`vdata<amdgpu_synid10_data_buf_atomic32>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
648 buffer_atomic_and_x2 :ref:`vdata<amdgpu_synid10_data_buf_atomic64>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
649 buffer_atomic_cmpswap :ref:`vdata<amdgpu_synid10_data_buf_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`b32x2<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
650 buffer_atomic_cmpswap_x2 :ref:`vdata<amdgpu_synid10_data_buf_atomic128>`::ref:`dst<amdgpu_synid10_ret>`::ref:`b64x2<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
651 buffer_atomic_dec :ref:`vdata<amdgpu_synid10_data_buf_atomic32>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
652 buffer_atomic_dec_x2 :ref:`vdata<amdgpu_synid10_data_buf_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
653 buffer_atomic_inc :ref:`vdata<amdgpu_synid10_data_buf_atomic32>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
654 buffer_atomic_inc_x2 :ref:`vdata<amdgpu_synid10_data_buf_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
655 buffer_atomic_or :ref:`vdata<amdgpu_synid10_data_buf_atomic32>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
656 buffer_atomic_or_x2 :ref:`vdata<amdgpu_synid10_data_buf_atomic64>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
657 buffer_atomic_smax :ref:`vdata<amdgpu_synid10_data_buf_atomic32>`::ref:`dst<amdgpu_synid10_ret>`::ref:`s32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
658 buffer_atomic_smax_x2 :ref:`vdata<amdgpu_synid10_data_buf_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`s64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
659 buffer_atomic_smin :ref:`vdata<amdgpu_synid10_data_buf_atomic32>`::ref:`dst<amdgpu_synid10_ret>`::ref:`s32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
660 buffer_atomic_smin_x2 :ref:`vdata<amdgpu_synid10_data_buf_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`s64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
661 buffer_atomic_sub :ref:`vdata<amdgpu_synid10_data_buf_atomic32>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
662 buffer_atomic_sub_x2 :ref:`vdata<amdgpu_synid10_data_buf_atomic64>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
663 buffer_atomic_swap :ref:`vdata<amdgpu_synid10_data_buf_atomic32>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
664 buffer_atomic_swap_x2 :ref:`vdata<amdgpu_synid10_data_buf_atomic64>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
665 buffer_atomic_umax :ref:`vdata<amdgpu_synid10_data_buf_atomic32>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
666 buffer_atomic_umax_x2 :ref:`vdata<amdgpu_synid10_data_buf_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
667 buffer_atomic_umin :ref:`vdata<amdgpu_synid10_data_buf_atomic32>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
668 buffer_atomic_umin_x2 :ref:`vdata<amdgpu_synid10_data_buf_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
669 buffer_atomic_xor :ref:`vdata<amdgpu_synid10_data_buf_atomic32>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
670 buffer_atomic_xor_x2 :ref:`vdata<amdgpu_synid10_data_buf_atomic64>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
673 buffer_load_dword :ref:`vdst<amdgpu_synid10_dst_buf_lds>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>` :ref:`dlc<amdgpu_synid_dlc>`
674 buffer_load_dwordx2 :ref:`vdst<amdgpu_synid10_dst_buf_64>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
675 buffer_load_dwordx3 :ref:`vdst<amdgpu_synid10_dst_buf_96>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
676 buffer_load_dwordx4 :ref:`vdst<amdgpu_synid10_dst_buf_128>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
677 buffer_load_format_d16_x :ref:`vdst<amdgpu_synid10_dst_buf_32>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
678 buffer_load_format_d16_xy :ref:`vdst<amdgpu_synid10_dst_buf_32>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
679 buffer_load_format_d16_xyz :ref:`vdst<amdgpu_synid10_dst_buf_64>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
680 buffer_load_format_d16_xyzw :ref:`vdst<amdgpu_synid10_dst_buf_64>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
681 buffer_load_format_x :ref:`vdst<amdgpu_synid10_dst_buf_lds>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>` :ref:`dlc<amdgpu_synid_dlc>`
682 buffer_load_format_xy :ref:`vdst<amdgpu_synid10_dst_buf_64>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
683 buffer_load_format_xyz :ref:`vdst<amdgpu_synid10_dst_buf_96>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
684 buffer_load_format_xyzw :ref:`vdst<amdgpu_synid10_dst_buf_128>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
685 buffer_load_sbyte :ref:`vdst<amdgpu_synid10_dst_buf_lds>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>` :ref:`dlc<amdgpu_synid_dlc>`
686 buffer_load_sbyte_d16 :ref:`vdst<amdgpu_synid10_dst_buf_32>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
687 buffer_load_sbyte_d16_hi :ref:`vdst<amdgpu_synid10_dst_buf_32>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
688 buffer_load_short_d16 :ref:`vdst<amdgpu_synid10_dst_buf_32>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
689 buffer_load_short_d16_hi :ref:`vdst<amdgpu_synid10_dst_buf_32>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
690 buffer_load_sshort :ref:`vdst<amdgpu_synid10_dst_buf_lds>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>` :ref:`dlc<amdgpu_synid_dlc>`
691 buffer_load_ubyte :ref:`vdst<amdgpu_synid10_dst_buf_lds>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>` :ref:`dlc<amdgpu_synid_dlc>`
692 buffer_load_ubyte_d16 :ref:`vdst<amdgpu_synid10_dst_buf_32>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
693 buffer_load_ubyte_d16_hi :ref:`vdst<amdgpu_synid10_dst_buf_32>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>`
694 buffer_load_ushort :ref:`vdst<amdgpu_synid10_dst_buf_lds>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>` :ref:`dlc<amdgpu_synid_dlc>`
695 buffer_store_byte :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
696 buffer_store_byte_d16_hi :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
697 buffer_store_dword :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
698 buffer_store_dwordx2 :ref:`vdata<amdgpu_synid10_vdata64_0>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
699 buffer_store_dwordx3 :ref:`vdata<amdgpu_synid10_vdata96_0>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
700 buffer_store_dwordx4 :ref:`vdata<amdgpu_synid10_vdata128_0>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
701 buffer_store_format_d16_x :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
702 buffer_store_format_d16_xy :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
703 buffer_store_format_d16_xyz :ref:`vdata<amdgpu_synid10_vdata64_0>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
704 buffer_store_format_d16_xyzw :ref:`vdata<amdgpu_synid10_vdata64_0>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
705 buffer_store_format_x :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
706 buffer_store_format_xy :ref:`vdata<amdgpu_synid10_vdata64_0>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
707 buffer_store_format_xyz :ref:`vdata<amdgpu_synid10_vdata96_0>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
708 buffer_store_format_xyzw :ref:`vdata<amdgpu_synid10_vdata128_0>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
709 buffer_store_short :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
710 buffer_store_short_d16_hi :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`vaddr<amdgpu_synid10_addr_buf>`, :ref:`srsrc<amdgpu_synid10_rsrc_buf>`, :ref:`soffset<amdgpu_synid10_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
713 -----------------------
717 **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
718 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
719 v_add_co_ci_u32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`vcc<amdgpu_synid10_vcc_32>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
720 v_add_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
721 v_add_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
722 v_add_nc_u32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
723 v_and_b32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
724 v_ashrrev_i32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
725 v_bfrev_b32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
726 v_ceil_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
727 v_ceil_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
728 v_cmp_class_f16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`::ref:`b32<amdgpu_synid10_type_dev>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
729 v_cmp_class_f32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`::ref:`b32<amdgpu_synid10_type_dev>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
730 v_cmp_eq_f16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
731 v_cmp_eq_f32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
732 v_cmp_eq_i16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
733 v_cmp_eq_i32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
734 v_cmp_eq_u16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
735 v_cmp_eq_u32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
736 v_cmp_f_f16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
737 v_cmp_f_f32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
738 v_cmp_f_i32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
739 v_cmp_f_u32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
740 v_cmp_ge_f16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
741 v_cmp_ge_f32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
742 v_cmp_ge_i16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
743 v_cmp_ge_i32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
744 v_cmp_ge_u16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
745 v_cmp_ge_u32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
746 v_cmp_gt_f16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
747 v_cmp_gt_f32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
748 v_cmp_gt_i16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
749 v_cmp_gt_i32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
750 v_cmp_gt_u16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
751 v_cmp_gt_u32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
752 v_cmp_le_f16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
753 v_cmp_le_f32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
754 v_cmp_le_i16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
755 v_cmp_le_i32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
756 v_cmp_le_u16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
757 v_cmp_le_u32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
758 v_cmp_lg_f16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
759 v_cmp_lg_f32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
760 v_cmp_lt_f16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
761 v_cmp_lt_f32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
762 v_cmp_lt_i16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
763 v_cmp_lt_i32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
764 v_cmp_lt_u16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
765 v_cmp_lt_u32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
766 v_cmp_ne_i16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
767 v_cmp_ne_i32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
768 v_cmp_ne_u16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
769 v_cmp_ne_u32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
770 v_cmp_neq_f16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
771 v_cmp_neq_f32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
772 v_cmp_nge_f16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
773 v_cmp_nge_f32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
774 v_cmp_ngt_f16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
775 v_cmp_ngt_f32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
776 v_cmp_nle_f16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
777 v_cmp_nle_f32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
778 v_cmp_nlg_f16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
779 v_cmp_nlg_f32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
780 v_cmp_nlt_f16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
781 v_cmp_nlt_f32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
782 v_cmp_o_f16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
783 v_cmp_o_f32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
784 v_cmp_t_i32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
785 v_cmp_t_u32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
786 v_cmp_tru_f16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
787 v_cmp_tru_f32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
788 v_cmp_u_f16_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
789 v_cmp_u_f32_sdwa :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
790 v_cmpx_class_f16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`::ref:`b32<amdgpu_synid10_type_dev>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
791 v_cmpx_class_f32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`::ref:`b32<amdgpu_synid10_type_dev>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
792 v_cmpx_eq_f16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
793 v_cmpx_eq_f32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
794 v_cmpx_eq_i16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
795 v_cmpx_eq_i32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
796 v_cmpx_eq_u16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
797 v_cmpx_eq_u32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
798 v_cmpx_f_f16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
799 v_cmpx_f_f32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
800 v_cmpx_f_i32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
801 v_cmpx_f_u32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
802 v_cmpx_ge_f16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
803 v_cmpx_ge_f32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
804 v_cmpx_ge_i16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
805 v_cmpx_ge_i32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
806 v_cmpx_ge_u16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
807 v_cmpx_ge_u32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
808 v_cmpx_gt_f16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
809 v_cmpx_gt_f32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
810 v_cmpx_gt_i16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
811 v_cmpx_gt_i32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
812 v_cmpx_gt_u16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
813 v_cmpx_gt_u32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
814 v_cmpx_le_f16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
815 v_cmpx_le_f32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
816 v_cmpx_le_i16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
817 v_cmpx_le_i32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
818 v_cmpx_le_u16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
819 v_cmpx_le_u32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
820 v_cmpx_lg_f16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
821 v_cmpx_lg_f32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
822 v_cmpx_lt_f16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
823 v_cmpx_lt_f32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
824 v_cmpx_lt_i16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
825 v_cmpx_lt_i32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
826 v_cmpx_lt_u16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
827 v_cmpx_lt_u32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
828 v_cmpx_ne_i16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
829 v_cmpx_ne_i32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
830 v_cmpx_ne_u16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
831 v_cmpx_ne_u32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
832 v_cmpx_neq_f16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
833 v_cmpx_neq_f32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
834 v_cmpx_nge_f16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
835 v_cmpx_nge_f32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
836 v_cmpx_ngt_f16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
837 v_cmpx_ngt_f32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
838 v_cmpx_nle_f16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
839 v_cmpx_nle_f32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
840 v_cmpx_nlg_f16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
841 v_cmpx_nlg_f32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
842 v_cmpx_nlt_f16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
843 v_cmpx_nlt_f32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
844 v_cmpx_o_f16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
845 v_cmpx_o_f32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
846 v_cmpx_t_i32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
847 v_cmpx_t_u32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
848 v_cmpx_tru_f16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
849 v_cmpx_tru_f32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
850 v_cmpx_u_f16_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
851 v_cmpx_u_f32_sdwa :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
852 v_cos_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
853 v_cos_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
854 v_cvt_f16_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
855 v_cvt_f16_i16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
856 v_cvt_f16_u16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
857 v_cvt_f32_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
858 v_cvt_f32_i32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
859 v_cvt_f32_u32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
860 v_cvt_f32_ubyte0_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
861 v_cvt_f32_ubyte1_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
862 v_cvt_f32_ubyte2_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
863 v_cvt_f32_ubyte3_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
864 v_cvt_flr_i32_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
865 v_cvt_i16_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
866 v_cvt_i32_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
867 v_cvt_norm_i16_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
868 v_cvt_norm_u16_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
869 v_cvt_off_f32_i4_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
870 v_cvt_rpi_i32_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
871 v_cvt_u16_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
872 v_cvt_u32_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
873 v_exp_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
874 v_exp_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
875 v_ffbh_i32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
876 v_ffbh_u32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
877 v_ffbl_b32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
878 v_floor_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
879 v_floor_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
880 v_fract_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
881 v_fract_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
882 v_frexp_exp_i16_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
883 v_frexp_exp_i32_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
884 v_frexp_mant_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
885 v_frexp_mant_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
886 v_ldexp_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`::ref:`i16<amdgpu_synid10_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
887 v_log_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
888 v_log_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
889 v_lshlrev_b32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
890 v_lshrrev_b32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
891 v_max_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
892 v_max_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
893 v_max_i32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
894 v_max_u32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
895 v_min_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
896 v_min_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
897 v_min_i32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
898 v_min_u32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
899 v_mov_b32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
900 v_mul_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
901 v_mul_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
902 v_mul_hi_i32_i24_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
903 v_mul_hi_u32_u24_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
904 v_mul_i32_i24_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
905 v_mul_legacy_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
906 v_mul_u32_u24_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
907 v_not_b32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
908 v_or_b32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
909 v_rcp_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
910 v_rcp_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
911 v_rcp_iflag_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
912 v_rndne_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
913 v_rndne_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
914 v_rsq_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
915 v_rsq_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
916 v_sat_pk_u8_i16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
917 v_sin_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
918 v_sin_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
919 v_sqrt_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
920 v_sqrt_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
921 v_sub_co_ci_u32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`vcc<amdgpu_synid10_vcc_32>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
922 v_sub_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
923 v_sub_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
924 v_sub_nc_u32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
925 v_subrev_co_ci_u32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`vcc<amdgpu_synid10_vcc_32>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
926 v_subrev_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
927 v_subrev_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
928 v_subrev_nc_u32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
929 v_trunc_f16_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
930 v_trunc_f32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
931 v_xnor_b32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
932 v_xor_b32_sdwa :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
935 -----------------------
939 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
940 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
941 s_atc_probe :ref:`imm3<amdgpu_synid10_perm_smem>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>`
942 s_atc_probe_buffer :ref:`imm3<amdgpu_synid10_perm_smem>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>`
943 s_atomic_add :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
944 s_atomic_add_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
945 s_atomic_and :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
946 s_atomic_and_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
947 s_atomic_cmpswap :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`b32x2<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
948 s_atomic_cmpswap_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic128>`::ref:`dst<amdgpu_synid10_ret>`::ref:`b64x2<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
949 s_atomic_dec :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
950 s_atomic_dec_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
951 s_atomic_inc :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
952 s_atomic_inc_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
953 s_atomic_or :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
954 s_atomic_or_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
955 s_atomic_smax :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`::ref:`s32<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
956 s_atomic_smax_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`s64<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
957 s_atomic_smin :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`::ref:`s32<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
958 s_atomic_smin_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`s64<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
959 s_atomic_sub :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
960 s_atomic_sub_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
961 s_atomic_swap :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
962 s_atomic_swap_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
963 s_atomic_umax :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
964 s_atomic_umax_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
965 s_atomic_umin :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
966 s_atomic_umin_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
967 s_atomic_xor :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
968 s_atomic_xor_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
969 s_buffer_atomic_add :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
970 s_buffer_atomic_add_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
971 s_buffer_atomic_and :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
972 s_buffer_atomic_and_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
973 s_buffer_atomic_cmpswap :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`b32x2<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
974 s_buffer_atomic_cmpswap_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic128>`::ref:`dst<amdgpu_synid10_ret>`::ref:`b64x2<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
975 s_buffer_atomic_dec :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
976 s_buffer_atomic_dec_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
977 s_buffer_atomic_inc :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
978 s_buffer_atomic_inc_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
979 s_buffer_atomic_or :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
980 s_buffer_atomic_or_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
981 s_buffer_atomic_smax :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`::ref:`s32<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
982 s_buffer_atomic_smax_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`s64<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
983 s_buffer_atomic_smin :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`::ref:`s32<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
984 s_buffer_atomic_smin_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`s64<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
985 s_buffer_atomic_sub :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
986 s_buffer_atomic_sub_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
987 s_buffer_atomic_swap :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
988 s_buffer_atomic_swap_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
989 s_buffer_atomic_umax :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
990 s_buffer_atomic_umax_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
991 s_buffer_atomic_umin :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
992 s_buffer_atomic_umin_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`::ref:`u64<amdgpu_synid10_type_dev>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
993 s_buffer_atomic_xor :ref:`sdata<amdgpu_synid10_data_smem_atomic32>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
994 s_buffer_atomic_xor_x2 :ref:`sdata<amdgpu_synid10_data_smem_atomic64>`::ref:`dst<amdgpu_synid10_ret>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
995 s_buffer_load_dword :ref:`sdst<amdgpu_synid10_sdst32_0>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
996 s_buffer_load_dwordx16 :ref:`sdst<amdgpu_synid10_sdst512_0>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
997 s_buffer_load_dwordx2 :ref:`sdst<amdgpu_synid10_sdst64_0>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
998 s_buffer_load_dwordx4 :ref:`sdst<amdgpu_synid10_sdst128_0>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
999 s_buffer_load_dwordx8 :ref:`sdst<amdgpu_synid10_sdst256_0>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
1000 s_buffer_store_dword :ref:`sdata<amdgpu_synid10_sdata32_0>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
1001 s_buffer_store_dwordx2 :ref:`sdata<amdgpu_synid10_sdata64_0>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
1002 s_buffer_store_dwordx4 :ref:`sdata<amdgpu_synid10_sdata128_0>`, :ref:`sbase<amdgpu_synid10_base_smem_buf>`, :ref:`soffset<amdgpu_synid10_offset_smem_buf>` :ref:`glc<amdgpu_synid_glc>`
1003 s_dcache_discard :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>`
1004 s_dcache_discard_x2 :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>`
1007 s_get_waveid_in_workgroup :ref:`sdst<amdgpu_synid10_sdst32_0>`
1009 s_load_dword :ref:`sdst<amdgpu_synid10_sdst32_0>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
1010 s_load_dwordx16 :ref:`sdst<amdgpu_synid10_sdst512_0>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
1011 s_load_dwordx2 :ref:`sdst<amdgpu_synid10_sdst64_0>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
1012 s_load_dwordx4 :ref:`sdst<amdgpu_synid10_sdst128_0>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
1013 s_load_dwordx8 :ref:`sdst<amdgpu_synid10_sdst256_0>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
1014 s_memrealtime :ref:`sdst<amdgpu_synid10_sdst64_0>`
1015 s_memtime :ref:`sdst<amdgpu_synid10_sdst64_0>`
1016 s_scratch_load_dword :ref:`sdst<amdgpu_synid10_sdst32_0>`, :ref:`sbase<amdgpu_synid10_base_smem_scratch>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
1017 s_scratch_load_dwordx2 :ref:`sdst<amdgpu_synid10_sdst64_0>`, :ref:`sbase<amdgpu_synid10_base_smem_scratch>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
1018 s_scratch_load_dwordx4 :ref:`sdst<amdgpu_synid10_sdst128_0>`, :ref:`sbase<amdgpu_synid10_base_smem_scratch>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>`
1019 s_scratch_store_dword :ref:`sdata<amdgpu_synid10_sdata32_0>`, :ref:`sbase<amdgpu_synid10_base_smem_scratch>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
1020 s_scratch_store_dwordx2 :ref:`sdata<amdgpu_synid10_sdata64_0>`, :ref:`sbase<amdgpu_synid10_base_smem_scratch>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
1021 s_scratch_store_dwordx4 :ref:`sdata<amdgpu_synid10_sdata128_0>`, :ref:`sbase<amdgpu_synid10_base_smem_scratch>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
1022 s_store_dword :ref:`sdata<amdgpu_synid10_sdata32_0>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
1023 s_store_dwordx2 :ref:`sdata<amdgpu_synid10_sdata64_0>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
1024 s_store_dwordx4 :ref:`sdata<amdgpu_synid10_sdata128_0>`, :ref:`sbase<amdgpu_synid10_base_smem_addr>`, :ref:`soffset<amdgpu_synid10_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
1027 -----------------------
1031 **INSTRUCTION** **DST** **SRC**
1032 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1033 s_abs_i32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1034 s_and_saveexec_b32 :ref:`sdst<amdgpu_synid10_sdst32_0>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1035 s_and_saveexec_b64 :ref:`sdst<amdgpu_synid10_sdst64_0>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1036 s_andn1_saveexec_b32 :ref:`sdst<amdgpu_synid10_sdst32_0>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1037 s_andn1_saveexec_b64 :ref:`sdst<amdgpu_synid10_sdst64_0>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1038 s_andn1_wrexec_b32 :ref:`sdst<amdgpu_synid10_sdst32_0>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1039 s_andn1_wrexec_b64 :ref:`sdst<amdgpu_synid10_sdst64_0>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1040 s_andn2_saveexec_b32 :ref:`sdst<amdgpu_synid10_sdst32_0>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1041 s_andn2_saveexec_b64 :ref:`sdst<amdgpu_synid10_sdst64_0>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1042 s_andn2_wrexec_b32 :ref:`sdst<amdgpu_synid10_sdst32_0>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1043 s_andn2_wrexec_b64 :ref:`sdst<amdgpu_synid10_sdst64_0>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1044 s_bcnt0_i32_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1045 s_bcnt0_i32_b64 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1046 s_bcnt1_i32_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1047 s_bcnt1_i32_b64 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1048 s_bitreplicate_b64_b32 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1049 s_bitset0_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1050 s_bitset0_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`::ref:`b32<amdgpu_synid10_type_dev>`
1051 s_bitset1_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1052 s_bitset1_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`::ref:`b32<amdgpu_synid10_type_dev>`
1053 s_brev_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1054 s_brev_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1055 s_cmov_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1056 s_cmov_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1057 s_ff0_i32_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1058 s_ff0_i32_b64 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1059 s_ff1_i32_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1060 s_ff1_i32_b64 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1061 s_flbit_i32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1062 s_flbit_i32_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1063 s_flbit_i32_b64 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1064 s_flbit_i32_i64 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1065 s_getpc_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`
1066 s_mov_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1067 s_mov_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1068 s_movreld_b32 :ref:`sdst<amdgpu_synid10_sdst32_0>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1069 s_movreld_b64 :ref:`sdst<amdgpu_synid10_sdst64_0>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1070 s_movrels_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_1>`
1071 s_movrels_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc<amdgpu_synid10_ssrc64_1>`
1072 s_movrelsd_2_b32 :ref:`sdst<amdgpu_synid10_sdst32_0>`, :ref:`ssrc<amdgpu_synid10_ssrc32_1>`
1073 s_nand_saveexec_b32 :ref:`sdst<amdgpu_synid10_sdst32_0>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1074 s_nand_saveexec_b64 :ref:`sdst<amdgpu_synid10_sdst64_0>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1075 s_nor_saveexec_b32 :ref:`sdst<amdgpu_synid10_sdst32_0>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1076 s_nor_saveexec_b64 :ref:`sdst<amdgpu_synid10_sdst64_0>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1077 s_not_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1078 s_not_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1079 s_or_saveexec_b32 :ref:`sdst<amdgpu_synid10_sdst32_0>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1080 s_or_saveexec_b64 :ref:`sdst<amdgpu_synid10_sdst64_0>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1081 s_orn1_saveexec_b32 :ref:`sdst<amdgpu_synid10_sdst32_0>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1082 s_orn1_saveexec_b64 :ref:`sdst<amdgpu_synid10_sdst64_0>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1083 s_orn2_saveexec_b32 :ref:`sdst<amdgpu_synid10_sdst32_0>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1084 s_orn2_saveexec_b64 :ref:`sdst<amdgpu_synid10_sdst64_0>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1085 s_quadmask_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1086 s_quadmask_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1087 s_rfe_b64 :ref:`ssrc<amdgpu_synid10_ssrc64_1>`
1088 s_setpc_b64 :ref:`ssrc<amdgpu_synid10_ssrc64_1>`
1089 s_sext_i32_i16 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1090 s_sext_i32_i8 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1091 s_swappc_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc<amdgpu_synid10_ssrc64_1>`
1092 s_wqm_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1093 s_wqm_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1094 s_xnor_saveexec_b32 :ref:`sdst<amdgpu_synid10_sdst32_0>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1095 s_xnor_saveexec_b64 :ref:`sdst<amdgpu_synid10_sdst64_0>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1096 s_xor_saveexec_b32 :ref:`sdst<amdgpu_synid10_sdst32_0>`, :ref:`ssrc<amdgpu_synid10_ssrc32_0>`
1097 s_xor_saveexec_b64 :ref:`sdst<amdgpu_synid10_sdst64_0>`, :ref:`ssrc<amdgpu_synid10_ssrc64_0>`
1100 -----------------------
1104 **INSTRUCTION** **DST** **SRC0** **SRC1**
1105 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1106 s_absdiff_i32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1107 s_add_i32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1108 s_add_u32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1109 s_addc_u32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1110 s_and_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1111 s_and_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc64_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc64_0>`
1112 s_andn2_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1113 s_andn2_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc64_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc64_0>`
1114 s_ashr_i32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`::ref:`u32<amdgpu_synid10_type_dev>`
1115 s_ashr_i64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc64_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`::ref:`u32<amdgpu_synid10_type_dev>`
1116 s_bfe_i32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`::ref:`u32<amdgpu_synid10_type_dev>`
1117 s_bfe_i64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc64_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`::ref:`u32<amdgpu_synid10_type_dev>`
1118 s_bfe_u32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1119 s_bfe_u64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc64_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`::ref:`u32<amdgpu_synid10_type_dev>`
1120 s_bfm_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1121 s_bfm_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`::ref:`b32<amdgpu_synid10_type_dev>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`::ref:`b32<amdgpu_synid10_type_dev>`
1122 s_cselect_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1123 s_cselect_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc64_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc64_0>`
1124 s_lshl1_add_u32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1125 s_lshl2_add_u32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1126 s_lshl3_add_u32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1127 s_lshl4_add_u32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1128 s_lshl_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`::ref:`u32<amdgpu_synid10_type_dev>`
1129 s_lshl_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc64_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`::ref:`u32<amdgpu_synid10_type_dev>`
1130 s_lshr_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`::ref:`u32<amdgpu_synid10_type_dev>`
1131 s_lshr_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc64_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`::ref:`u32<amdgpu_synid10_type_dev>`
1132 s_max_i32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1133 s_max_u32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1134 s_min_i32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1135 s_min_u32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1136 s_mul_hi_i32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1137 s_mul_hi_u32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1138 s_mul_i32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1139 s_nand_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1140 s_nand_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc64_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc64_0>`
1141 s_nor_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1142 s_nor_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc64_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc64_0>`
1143 s_or_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1144 s_or_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc64_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc64_0>`
1145 s_orn2_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1146 s_orn2_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc64_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc64_0>`
1147 s_pack_hh_b32_b16 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`::ref:`b16x2<amdgpu_synid10_type_dev>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`::ref:`b16x2<amdgpu_synid10_type_dev>`
1148 s_pack_lh_b32_b16 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`::ref:`b16x2<amdgpu_synid10_type_dev>`
1149 s_pack_ll_b32_b16 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1150 s_sub_i32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1151 s_sub_u32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1152 s_subb_u32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1153 s_xnor_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1154 s_xnor_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc64_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc64_0>`
1155 s_xor_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1156 s_xor_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc0<amdgpu_synid10_ssrc64_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc64_0>`
1159 -----------------------
1163 **INSTRUCTION** **SRC0** **SRC1**
1164 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1165 s_bitcmp0_b32 :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1166 s_bitcmp0_b64 :ref:`ssrc0<amdgpu_synid10_ssrc64_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`::ref:`u32<amdgpu_synid10_type_dev>`
1167 s_bitcmp1_b32 :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1168 s_bitcmp1_b64 :ref:`ssrc0<amdgpu_synid10_ssrc64_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`::ref:`u32<amdgpu_synid10_type_dev>`
1169 s_cmp_eq_i32 :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1170 s_cmp_eq_u32 :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1171 s_cmp_eq_u64 :ref:`ssrc0<amdgpu_synid10_ssrc64_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc64_0>`
1172 s_cmp_ge_i32 :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1173 s_cmp_ge_u32 :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1174 s_cmp_gt_i32 :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1175 s_cmp_gt_u32 :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1176 s_cmp_le_i32 :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1177 s_cmp_le_u32 :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1178 s_cmp_lg_i32 :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1179 s_cmp_lg_u32 :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1180 s_cmp_lg_u64 :ref:`ssrc0<amdgpu_synid10_ssrc64_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc64_0>`
1181 s_cmp_lt_i32 :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1182 s_cmp_lt_u32 :ref:`ssrc0<amdgpu_synid10_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_0>`
1185 -----------------------
1189 **INSTRUCTION** **DST** **SRC0** **SRC1**
1190 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1191 s_addk_i32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`imm16<amdgpu_synid10_simm16>`
1192 s_call_b64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`label<amdgpu_synid10_label>`
1193 s_cmovk_i32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`imm16<amdgpu_synid10_simm16>`
1194 s_cmpk_eq_i32 :ref:`ssrc<amdgpu_synid10_ssrc32_2>`, :ref:`imm16<amdgpu_synid10_simm16>`
1195 s_cmpk_eq_u32 :ref:`ssrc<amdgpu_synid10_ssrc32_2>`, :ref:`imm16<amdgpu_synid10_uimm16>`
1196 s_cmpk_ge_i32 :ref:`ssrc<amdgpu_synid10_ssrc32_2>`, :ref:`imm16<amdgpu_synid10_simm16>`
1197 s_cmpk_ge_u32 :ref:`ssrc<amdgpu_synid10_ssrc32_2>`, :ref:`imm16<amdgpu_synid10_uimm16>`
1198 s_cmpk_gt_i32 :ref:`ssrc<amdgpu_synid10_ssrc32_2>`, :ref:`imm16<amdgpu_synid10_simm16>`
1199 s_cmpk_gt_u32 :ref:`ssrc<amdgpu_synid10_ssrc32_2>`, :ref:`imm16<amdgpu_synid10_uimm16>`
1200 s_cmpk_le_i32 :ref:`ssrc<amdgpu_synid10_ssrc32_2>`, :ref:`imm16<amdgpu_synid10_simm16>`
1201 s_cmpk_le_u32 :ref:`ssrc<amdgpu_synid10_ssrc32_2>`, :ref:`imm16<amdgpu_synid10_uimm16>`
1202 s_cmpk_lg_i32 :ref:`ssrc<amdgpu_synid10_ssrc32_2>`, :ref:`imm16<amdgpu_synid10_simm16>`
1203 s_cmpk_lg_u32 :ref:`ssrc<amdgpu_synid10_ssrc32_2>`, :ref:`imm16<amdgpu_synid10_uimm16>`
1204 s_cmpk_lt_i32 :ref:`ssrc<amdgpu_synid10_ssrc32_2>`, :ref:`imm16<amdgpu_synid10_simm16>`
1205 s_cmpk_lt_u32 :ref:`ssrc<amdgpu_synid10_ssrc32_2>`, :ref:`imm16<amdgpu_synid10_uimm16>`
1206 s_getreg_b32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`hwreg<amdgpu_synid10_hwreg>`
1207 s_movk_i32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`imm16<amdgpu_synid10_simm16>`
1208 s_mulk_i32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`imm16<amdgpu_synid10_simm16>`
1209 s_setreg_b32 :ref:`hwreg<amdgpu_synid10_hwreg>`, :ref:`ssrc<amdgpu_synid10_ssrc32_2>`
1210 s_setreg_imm32_b32 :ref:`hwreg<amdgpu_synid10_hwreg>`, :ref:`imm32<amdgpu_synid10_bimm32>`
1211 s_subvector_loop_begin :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`label<amdgpu_synid10_label>`
1212 s_subvector_loop_end :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`label<amdgpu_synid10_label>`
1213 s_version :ref:`imm16<amdgpu_synid10_bimm16>`
1214 s_waitcnt_expcnt :ref:`ssrc<amdgpu_synid10_ssrc32_2>`, :ref:`imm16<amdgpu_synid10_bimm16>`
1215 s_waitcnt_lgkmcnt :ref:`ssrc<amdgpu_synid10_ssrc32_2>`, :ref:`imm16<amdgpu_synid10_bimm16>`
1216 s_waitcnt_vmcnt :ref:`ssrc<amdgpu_synid10_ssrc32_2>`, :ref:`imm16<amdgpu_synid10_bimm16>`
1217 s_waitcnt_vscnt :ref:`ssrc<amdgpu_synid10_ssrc32_2>`, :ref:`imm16<amdgpu_synid10_bimm16>`
1220 -----------------------
1224 **INSTRUCTION** **SRC**
1225 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1227 s_branch :ref:`label<amdgpu_synid10_label>`
1228 s_cbranch_cdbgsys :ref:`label<amdgpu_synid10_label>`
1229 s_cbranch_cdbgsys_and_user :ref:`label<amdgpu_synid10_label>`
1230 s_cbranch_cdbgsys_or_user :ref:`label<amdgpu_synid10_label>`
1231 s_cbranch_cdbguser :ref:`label<amdgpu_synid10_label>`
1232 s_cbranch_execnz :ref:`label<amdgpu_synid10_label>`
1233 s_cbranch_execz :ref:`label<amdgpu_synid10_label>`
1234 s_cbranch_scc0 :ref:`label<amdgpu_synid10_label>`
1235 s_cbranch_scc1 :ref:`label<amdgpu_synid10_label>`
1236 s_cbranch_vccnz :ref:`label<amdgpu_synid10_label>`
1237 s_cbranch_vccz :ref:`label<amdgpu_synid10_label>`
1238 s_clause :ref:`imm16<amdgpu_synid10_bimm16>`
1240 s_decperflevel :ref:`imm16<amdgpu_synid10_bimm16>`
1241 s_denorm_mode :ref:`imm16<amdgpu_synid10_bimm16>`
1243 s_endpgm_ordered_ps_done
1246 s_incperflevel :ref:`imm16<amdgpu_synid10_bimm16>`
1247 s_inst_prefetch :ref:`imm16<amdgpu_synid10_bimm16>`
1248 s_nop :ref:`imm16<amdgpu_synid10_bimm16>`
1249 s_round_mode :ref:`imm16<amdgpu_synid10_bimm16>`
1250 s_sendmsg :ref:`msg<amdgpu_synid10_msg>`
1251 s_sendmsghalt :ref:`msg<amdgpu_synid10_msg>`
1252 s_sethalt :ref:`imm16<amdgpu_synid10_bimm16>`
1253 s_setkill :ref:`imm16<amdgpu_synid10_bimm16>`
1254 s_setprio :ref:`imm16<amdgpu_synid10_bimm16>`
1255 s_sleep :ref:`imm16<amdgpu_synid10_bimm16>`
1256 s_trap :ref:`imm16<amdgpu_synid10_bimm16>`
1258 s_ttracedata_imm :ref:`imm16<amdgpu_synid10_bimm16>`
1259 s_waitcnt :ref:`waitcnt<amdgpu_synid10_waitcnt>`
1263 -----------------------
1267 **INSTRUCTION** **DST** **SRC0** **SRC1**
1268 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1269 v_interp_mov_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`param<amdgpu_synid10_param>`::ref:`b32<amdgpu_synid10_type_dev>`, :ref:`attr<amdgpu_synid10_attr>`::ref:`b32<amdgpu_synid10_type_dev>`
1270 v_interp_p1_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`, :ref:`attr<amdgpu_synid10_attr>`::ref:`b32<amdgpu_synid10_type_dev>`
1271 v_interp_p2_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`, :ref:`attr<amdgpu_synid10_attr>`::ref:`b32<amdgpu_synid10_type_dev>`
1274 -----------------------
1278 **INSTRUCTION** **DST** **SRC**
1279 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1280 v_bfrev_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1281 v_ceil_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1282 v_ceil_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1283 v_ceil_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src64_0>`
1285 v_cos_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1286 v_cos_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1287 v_cvt_f16_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1288 v_cvt_f16_i16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1289 v_cvt_f16_u16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1290 v_cvt_f32_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1291 v_cvt_f32_f64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src64_0>`
1292 v_cvt_f32_i32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1293 v_cvt_f32_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1294 v_cvt_f32_ubyte0 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1295 v_cvt_f32_ubyte1 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1296 v_cvt_f32_ubyte2 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1297 v_cvt_f32_ubyte3 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1298 v_cvt_f64_f32 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1299 v_cvt_f64_i32 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1300 v_cvt_f64_u32 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1301 v_cvt_flr_i32_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1302 v_cvt_i16_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1303 v_cvt_i32_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1304 v_cvt_i32_f64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src64_0>`
1305 v_cvt_norm_i16_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1306 v_cvt_norm_u16_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1307 v_cvt_off_f32_i4 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1308 v_cvt_rpi_i32_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1309 v_cvt_u16_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1310 v_cvt_u32_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1311 v_cvt_u32_f64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src64_0>`
1312 v_exp_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1313 v_exp_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1314 v_ffbh_i32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1315 v_ffbh_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1316 v_ffbl_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1317 v_floor_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1318 v_floor_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1319 v_floor_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src64_0>`
1320 v_fract_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1321 v_fract_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1322 v_fract_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src64_0>`
1323 v_frexp_exp_i16_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1324 v_frexp_exp_i32_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1325 v_frexp_exp_i32_f64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src64_0>`
1326 v_frexp_mant_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1327 v_frexp_mant_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1328 v_frexp_mant_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src64_0>`
1329 v_log_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1330 v_log_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1331 v_mov_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1332 v_movreld_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1333 v_movrels_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`
1334 v_movrelsd_2_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`
1335 v_movrelsd_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`
1337 v_not_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1339 v_rcp_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1340 v_rcp_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1341 v_rcp_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src64_0>`
1342 v_rcp_iflag_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1343 v_readfirstlane_b32 :ref:`sdst<amdgpu_synid10_sdst32_2>`, :ref:`vsrc<amdgpu_synid10_vsrc32_1>`
1344 v_rndne_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1345 v_rndne_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1346 v_rndne_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src64_0>`
1347 v_rsq_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1348 v_rsq_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1349 v_rsq_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src64_0>`
1350 v_sat_pk_u8_i16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1351 v_sin_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1352 v_sin_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1353 v_sqrt_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1354 v_sqrt_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1355 v_sqrt_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src64_0>`
1356 v_swap_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`
1357 v_swaprel_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`
1358 v_trunc_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1359 v_trunc_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1360 v_trunc_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src64_0>`
1363 -----------------------
1367 **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2**
1368 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1369 v_add_co_ci_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>`
1370 v_add_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1371 v_add_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1372 v_add_nc_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1373 v_and_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1374 v_ashrrev_i32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_2>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1375 v_cndmask_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>`
1376 v_cvt_pkrtz_f16_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1377 v_fmaak_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`, :ref:`imm32<amdgpu_synid10_fimm16>`
1378 v_fmaak_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`, :ref:`imm32<amdgpu_synid10_fimm32>`
1379 v_fmac_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1380 v_fmac_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1381 v_fmamk_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`imm32<amdgpu_synid10_fimm16>`, :ref:`vsrc2<amdgpu_synid10_vsrc32_0>`
1382 v_fmamk_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`imm32<amdgpu_synid10_fimm32>`, :ref:`vsrc2<amdgpu_synid10_vsrc32_0>`
1383 v_ldexp_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`i16<amdgpu_synid10_type_dev>`
1384 v_lshlrev_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_2>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1385 v_lshrrev_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_2>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1386 v_mac_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1387 v_mac_legacy_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1388 v_madak_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`, :ref:`imm32<amdgpu_synid10_fimm32>`
1389 v_madmk_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`imm32<amdgpu_synid10_fimm32>`, :ref:`vsrc2<amdgpu_synid10_vsrc32_0>`
1390 v_max_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1391 v_max_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1392 v_max_i32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1393 v_max_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1394 v_min_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1395 v_min_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1396 v_min_i32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1397 v_min_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1398 v_mul_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1399 v_mul_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1400 v_mul_hi_i32_i24 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1401 v_mul_hi_u32_u24 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1402 v_mul_i32_i24 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1403 v_mul_legacy_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1404 v_mul_u32_u24 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1405 v_or_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1406 v_pk_fmac_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`::ref:`f16x2<amdgpu_synid10_type_dev>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`f16x2<amdgpu_synid10_type_dev>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`f16x2<amdgpu_synid10_type_dev>`
1407 v_sub_co_ci_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>`
1408 v_sub_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1409 v_sub_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1410 v_sub_nc_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1411 v_subrev_co_ci_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_2>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>`
1412 v_subrev_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_2>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1413 v_subrev_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_2>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1414 v_subrev_nc_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_2>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1415 v_xnor_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1416 v_xor_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1419 -----------------------
1423 **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
1424 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1425 v_add3_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`
1426 v_add_co_ci_u32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`ssrc2<amdgpu_synid10_wssrc>` :ref:`clamp<amdgpu_synid_clamp>`
1427 v_add_co_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`clamp<amdgpu_synid_clamp>`
1428 v_add_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1429 v_add_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1430 v_add_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1431 v_add_lshl_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`
1432 v_add_nc_i16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
1433 v_add_nc_i32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1434 v_add_nc_u16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1435 v_add_nc_u32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`clamp<amdgpu_synid_clamp>`
1436 v_alignbit_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`
1437 v_alignbyte_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`
1438 v_and_b32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1439 v_and_or_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`
1440 v_ashrrev_i16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_2>`::ref:`u16<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src32_2>`
1441 v_ashrrev_i32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_2>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src32_2>`
1442 v_ashrrev_i64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src0<amdgpu_synid10_src32_2>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src64_0>`
1443 v_bcnt_u32_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1444 v_bfe_i32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`u32<amdgpu_synid10_type_dev>`
1445 v_bfe_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`
1446 v_bfi_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`
1447 v_bfm_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1448 v_bfrev_b32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1449 v_ceil_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1450 v_ceil_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1451 v_ceil_f64_e64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1453 v_cmp_class_f16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`b32<amdgpu_synid10_type_dev>`
1454 v_cmp_class_f32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`b32<amdgpu_synid10_type_dev>`
1455 v_cmp_class_f64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`b32<amdgpu_synid10_type_dev>`
1456 v_cmp_eq_f16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1457 v_cmp_eq_f32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1458 v_cmp_eq_f64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1459 v_cmp_eq_i16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1460 v_cmp_eq_i32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1461 v_cmp_eq_i64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1462 v_cmp_eq_u16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1463 v_cmp_eq_u32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1464 v_cmp_eq_u64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1465 v_cmp_f_f16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1466 v_cmp_f_f32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1467 v_cmp_f_f64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1468 v_cmp_f_i32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1469 v_cmp_f_i64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1470 v_cmp_f_u32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1471 v_cmp_f_u64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1472 v_cmp_ge_f16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1473 v_cmp_ge_f32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1474 v_cmp_ge_f64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1475 v_cmp_ge_i16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1476 v_cmp_ge_i32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1477 v_cmp_ge_i64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1478 v_cmp_ge_u16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1479 v_cmp_ge_u32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1480 v_cmp_ge_u64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1481 v_cmp_gt_f16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1482 v_cmp_gt_f32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1483 v_cmp_gt_f64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1484 v_cmp_gt_i16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1485 v_cmp_gt_i32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1486 v_cmp_gt_i64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1487 v_cmp_gt_u16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1488 v_cmp_gt_u32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1489 v_cmp_gt_u64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1490 v_cmp_le_f16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1491 v_cmp_le_f32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1492 v_cmp_le_f64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1493 v_cmp_le_i16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1494 v_cmp_le_i32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1495 v_cmp_le_i64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1496 v_cmp_le_u16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1497 v_cmp_le_u32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1498 v_cmp_le_u64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1499 v_cmp_lg_f16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1500 v_cmp_lg_f32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1501 v_cmp_lg_f64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1502 v_cmp_lt_f16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1503 v_cmp_lt_f32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1504 v_cmp_lt_f64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1505 v_cmp_lt_i16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1506 v_cmp_lt_i32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1507 v_cmp_lt_i64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1508 v_cmp_lt_u16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1509 v_cmp_lt_u32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1510 v_cmp_lt_u64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1511 v_cmp_ne_i16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1512 v_cmp_ne_i32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1513 v_cmp_ne_i64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1514 v_cmp_ne_u16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1515 v_cmp_ne_u32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1516 v_cmp_ne_u64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1517 v_cmp_neq_f16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1518 v_cmp_neq_f32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1519 v_cmp_neq_f64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1520 v_cmp_nge_f16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1521 v_cmp_nge_f32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1522 v_cmp_nge_f64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1523 v_cmp_ngt_f16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1524 v_cmp_ngt_f32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1525 v_cmp_ngt_f64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1526 v_cmp_nle_f16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1527 v_cmp_nle_f32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1528 v_cmp_nle_f64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1529 v_cmp_nlg_f16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1530 v_cmp_nlg_f32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1531 v_cmp_nlg_f64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1532 v_cmp_nlt_f16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1533 v_cmp_nlt_f32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1534 v_cmp_nlt_f64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1535 v_cmp_o_f16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1536 v_cmp_o_f32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1537 v_cmp_o_f64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1538 v_cmp_t_i32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1539 v_cmp_t_i64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1540 v_cmp_t_u32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1541 v_cmp_t_u64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1542 v_cmp_tru_f16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1543 v_cmp_tru_f32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1544 v_cmp_tru_f64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1545 v_cmp_u_f16_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1546 v_cmp_u_f32_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1547 v_cmp_u_f64_e64 :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1548 v_cmpx_class_f16_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`b32<amdgpu_synid10_type_dev>`
1549 v_cmpx_class_f32_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`b32<amdgpu_synid10_type_dev>`
1550 v_cmpx_class_f64_e64 :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`b32<amdgpu_synid10_type_dev>`
1551 v_cmpx_eq_f16_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1552 v_cmpx_eq_f32_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1553 v_cmpx_eq_f64_e64 :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1554 v_cmpx_eq_i16_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1555 v_cmpx_eq_i32_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1556 v_cmpx_eq_i64_e64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1557 v_cmpx_eq_u16_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1558 v_cmpx_eq_u32_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1559 v_cmpx_eq_u64_e64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1560 v_cmpx_f_f16_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1561 v_cmpx_f_f32_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1562 v_cmpx_f_f64_e64 :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1563 v_cmpx_f_i32_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1564 v_cmpx_f_i64_e64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1565 v_cmpx_f_u32_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1566 v_cmpx_f_u64_e64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1567 v_cmpx_ge_f16_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1568 v_cmpx_ge_f32_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1569 v_cmpx_ge_f64_e64 :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1570 v_cmpx_ge_i16_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1571 v_cmpx_ge_i32_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1572 v_cmpx_ge_i64_e64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1573 v_cmpx_ge_u16_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1574 v_cmpx_ge_u32_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1575 v_cmpx_ge_u64_e64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1576 v_cmpx_gt_f16_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1577 v_cmpx_gt_f32_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1578 v_cmpx_gt_f64_e64 :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1579 v_cmpx_gt_i16_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1580 v_cmpx_gt_i32_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1581 v_cmpx_gt_i64_e64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1582 v_cmpx_gt_u16_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1583 v_cmpx_gt_u32_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1584 v_cmpx_gt_u64_e64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1585 v_cmpx_le_f16_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1586 v_cmpx_le_f32_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1587 v_cmpx_le_f64_e64 :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1588 v_cmpx_le_i16_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1589 v_cmpx_le_i32_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1590 v_cmpx_le_i64_e64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1591 v_cmpx_le_u16_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1592 v_cmpx_le_u32_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1593 v_cmpx_le_u64_e64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1594 v_cmpx_lg_f16_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1595 v_cmpx_lg_f32_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1596 v_cmpx_lg_f64_e64 :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1597 v_cmpx_lt_f16_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1598 v_cmpx_lt_f32_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1599 v_cmpx_lt_f64_e64 :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1600 v_cmpx_lt_i16_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1601 v_cmpx_lt_i32_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1602 v_cmpx_lt_i64_e64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1603 v_cmpx_lt_u16_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1604 v_cmpx_lt_u32_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1605 v_cmpx_lt_u64_e64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1606 v_cmpx_ne_i16_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1607 v_cmpx_ne_i32_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1608 v_cmpx_ne_i64_e64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1609 v_cmpx_ne_u16_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1610 v_cmpx_ne_u32_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1611 v_cmpx_ne_u64_e64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1612 v_cmpx_neq_f16_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1613 v_cmpx_neq_f32_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1614 v_cmpx_neq_f64_e64 :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1615 v_cmpx_nge_f16_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1616 v_cmpx_nge_f32_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1617 v_cmpx_nge_f64_e64 :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1618 v_cmpx_ngt_f16_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1619 v_cmpx_ngt_f32_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1620 v_cmpx_ngt_f64_e64 :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1621 v_cmpx_nle_f16_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1622 v_cmpx_nle_f32_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1623 v_cmpx_nle_f64_e64 :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1624 v_cmpx_nlg_f16_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1625 v_cmpx_nlg_f32_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1626 v_cmpx_nlg_f64_e64 :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1627 v_cmpx_nlt_f16_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1628 v_cmpx_nlt_f32_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1629 v_cmpx_nlt_f64_e64 :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1630 v_cmpx_o_f16_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1631 v_cmpx_o_f32_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1632 v_cmpx_o_f64_e64 :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1633 v_cmpx_t_i32_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1634 v_cmpx_t_i64_e64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1635 v_cmpx_t_u32_e64 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1636 v_cmpx_t_u64_e64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`
1637 v_cmpx_tru_f16_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1638 v_cmpx_tru_f32_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1639 v_cmpx_tru_f64_e64 :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1640 v_cmpx_u_f16_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1641 v_cmpx_u_f32_e64 :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1642 v_cmpx_u_f64_e64 :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1643 v_cndmask_b32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`ssrc2<amdgpu_synid10_wssrc>`
1644 v_cos_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1645 v_cos_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1646 v_cubeid_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1647 v_cubema_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1648 v_cubesc_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1649 v_cubetc_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1650 v_cvt_f16_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1651 v_cvt_f16_i16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>` :ref:`clamp<amdgpu_synid_clamp>`
1652 v_cvt_f16_u16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>` :ref:`clamp<amdgpu_synid_clamp>`
1653 v_cvt_f32_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1654 v_cvt_f32_f64_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1655 v_cvt_f32_i32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1656 v_cvt_f32_u32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1657 v_cvt_f32_ubyte0_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1658 v_cvt_f32_ubyte1_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1659 v_cvt_f32_ubyte2_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1660 v_cvt_f32_ubyte3_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1661 v_cvt_f64_f32_e64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1662 v_cvt_f64_i32_e64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1663 v_cvt_f64_u32_e64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1664 v_cvt_flr_i32_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`
1665 v_cvt_i16_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1666 v_cvt_i32_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1667 v_cvt_i32_f64_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1668 v_cvt_norm_i16_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`
1669 v_cvt_norm_u16_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`
1670 v_cvt_off_f32_i4_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1671 v_cvt_pk_i16_i32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1672 v_cvt_pk_u16_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1673 v_cvt_pk_u8_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`u32<amdgpu_synid10_type_dev>`
1674 v_cvt_pknorm_i16_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
1675 v_cvt_pknorm_i16_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`
1676 v_cvt_pknorm_u16_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
1677 v_cvt_pknorm_u16_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`
1678 v_cvt_pkrtz_f16_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1679 v_cvt_rpi_i32_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`
1680 v_cvt_u16_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1681 v_cvt_u32_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1682 v_cvt_u32_f64_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1683 v_div_fixup_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
1684 v_div_fixup_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1685 v_div_fixup_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1686 v_div_fmas_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1687 v_div_fmas_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1688 v_div_scale_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`
1689 v_div_scale_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`src1<amdgpu_synid10_src64_0>`, :ref:`src2<amdgpu_synid10_src64_0>`
1690 v_exp_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1691 v_exp_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1692 v_ffbh_i32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1693 v_ffbh_u32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1694 v_ffbl_b32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1695 v_floor_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1696 v_floor_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1697 v_floor_f64_e64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1698 v_fma_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
1699 v_fma_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1700 v_fma_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1701 v_fmac_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1702 v_fmac_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1703 v_fract_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1704 v_fract_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1705 v_fract_f64_e64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1706 v_frexp_exp_i16_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`
1707 v_frexp_exp_i32_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`
1708 v_frexp_exp_i32_f64_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`
1709 v_frexp_mant_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1710 v_frexp_mant_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1711 v_frexp_mant_f64_e64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1712 v_interp_p1ll_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`::ref:`f32<amdgpu_synid10_type_dev>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`::ref:`f32<amdgpu_synid10_type_dev>`, :ref:`attr<amdgpu_synid10_attr>`::ref:`b32<amdgpu_synid10_type_dev>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1713 v_interp_p1lv_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`::ref:`f32<amdgpu_synid10_type_dev>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`::ref:`f32<amdgpu_synid10_type_dev>`, :ref:`attr<amdgpu_synid10_attr>`::ref:`b32<amdgpu_synid10_type_dev>`, :ref:`vsrc2<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`::ref:`f16x2<amdgpu_synid10_type_dev>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1714 v_interp_p2_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`::ref:`f32<amdgpu_synid10_type_dev>`, :ref:`attr<amdgpu_synid10_attr>`::ref:`b32<amdgpu_synid10_type_dev>`, :ref:`vsrc2<amdgpu_synid10_vsrc32_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`::ref:`f32<amdgpu_synid10_type_dev>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>`
1715 v_ldexp_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`i16<amdgpu_synid10_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
1716 v_ldexp_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`i32<amdgpu_synid10_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1717 v_ldexp_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`i32<amdgpu_synid10_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1718 v_lerp_u8 :ref:`vdst<amdgpu_synid10_vdst32_0>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`b32<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`b32<amdgpu_synid10_type_dev>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`b32<amdgpu_synid10_type_dev>`
1719 v_log_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1720 v_log_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1721 v_lshl_add_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`
1722 v_lshl_or_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`src2<amdgpu_synid10_src32_2>`
1723 v_lshlrev_b16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_2>`::ref:`u16<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src32_2>`
1724 v_lshlrev_b32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_2>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src32_2>`
1725 v_lshlrev_b64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src0<amdgpu_synid10_src32_2>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src64_0>`
1726 v_lshrrev_b16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_2>`::ref:`u16<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src32_2>`
1727 v_lshrrev_b32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_2>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src32_2>`
1728 v_lshrrev_b64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src0<amdgpu_synid10_src32_2>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src64_0>`
1729 v_mac_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1730 v_mac_legacy_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1731 v_mad_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1732 v_mad_i16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
1733 v_mad_i32_i16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`i32<amdgpu_synid10_type_dev>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
1734 v_mad_i32_i24 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`i32<amdgpu_synid10_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
1735 v_mad_i64_i32 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src64_0>`::ref:`i64<amdgpu_synid10_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
1736 v_mad_legacy_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1737 v_mad_u16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
1738 v_mad_u32_u16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`u32<amdgpu_synid10_type_dev>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
1739 v_mad_u32_u24 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`u32<amdgpu_synid10_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
1740 v_mad_u64_u32 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src64_0>`::ref:`u64<amdgpu_synid10_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
1741 v_max3_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
1742 v_max3_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1743 v_max3_i16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
1744 v_max3_i32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`
1745 v_max3_u16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
1746 v_max3_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`
1747 v_max_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1748 v_max_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1749 v_max_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1750 v_max_i16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1751 v_max_i32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1752 v_max_u16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1753 v_max_u32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1754 v_mbcnt_hi_u32_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1755 v_mbcnt_lo_u32_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1756 v_med3_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
1757 v_med3_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1758 v_med3_i16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
1759 v_med3_i32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`
1760 v_med3_u16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
1761 v_med3_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`
1762 v_min3_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
1763 v_min3_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1764 v_min3_i16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
1765 v_min3_i32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`
1766 v_min3_u16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
1767 v_min3_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`
1768 v_min_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1769 v_min_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1770 v_min_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1771 v_min_i16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1772 v_min_i32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1773 v_min_u16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1774 v_min_u32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1775 v_mov_b32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1776 v_movreld_b32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1777 v_movrels_b32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`
1778 v_movrelsd_2_b32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`
1779 v_movrelsd_b32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vsrc<amdgpu_synid10_vsrc32_0>`
1780 v_mqsad_pk_u16_u8 :ref:`vdst<amdgpu_synid10_vdst64_0>`::ref:`b64<amdgpu_synid10_type_dev>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`b64<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`b32<amdgpu_synid10_type_dev>`, :ref:`src2<amdgpu_synid10_src64_0>`::ref:`b64<amdgpu_synid10_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
1781 v_mqsad_u32_u8 :ref:`vdst<amdgpu_synid10_vdst128_0>`::ref:`b128<amdgpu_synid10_type_dev>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`b64<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`b32<amdgpu_synid10_type_dev>`, :ref:`vsrc2<amdgpu_synid10_vsrc128_0>`::ref:`b128<amdgpu_synid10_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
1782 v_msad_u8 :ref:`vdst<amdgpu_synid10_vdst32_0>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`b32<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`b32<amdgpu_synid10_type_dev>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`b32<amdgpu_synid10_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
1783 v_mul_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1784 v_mul_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1785 v_mul_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1786 v_mul_hi_i32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1787 v_mul_hi_i32_i24_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1788 v_mul_hi_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1789 v_mul_hi_u32_u24_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1790 v_mul_i32_i24_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1791 v_mul_legacy_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1792 v_mul_lo_u16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1793 v_mul_lo_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1794 v_mul_u32_u24_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1795 v_mullit_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1797 v_not_b32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1798 v_or3_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`
1799 v_or_b32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1800 v_pack_b32_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
1801 v_perm_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`
1802 v_permlane16_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_3>`, :ref:`ssrc2<amdgpu_synid10_ssrc32_3>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
1803 v_permlanex16_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vdata<amdgpu_synid10_vdata32_0>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_3>`, :ref:`ssrc2<amdgpu_synid10_ssrc32_3>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
1805 v_qsad_pk_u16_u8 :ref:`vdst<amdgpu_synid10_vdst64_0>`::ref:`b64<amdgpu_synid10_type_dev>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`b64<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`b32<amdgpu_synid10_type_dev>`, :ref:`src2<amdgpu_synid10_src64_0>`::ref:`b64<amdgpu_synid10_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
1806 v_rcp_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1807 v_rcp_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1808 v_rcp_f64_e64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1809 v_rcp_iflag_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1810 v_readlane_b32 :ref:`sdst<amdgpu_synid10_sdst32_2>`, :ref:`vsrc0<amdgpu_synid10_vsrc32_1>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_4>`
1811 v_rndne_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1812 v_rndne_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1813 v_rndne_f64_e64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1814 v_rsq_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1815 v_rsq_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1816 v_rsq_f64_e64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1817 v_sad_hi_u8 :ref:`vdst<amdgpu_synid10_vdst32_0>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`u8x4<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`u8x4<amdgpu_synid10_type_dev>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`u32<amdgpu_synid10_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
1818 v_sad_u16 :ref:`vdst<amdgpu_synid10_vdst32_0>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`u16x2<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`u16x2<amdgpu_synid10_type_dev>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`u32<amdgpu_synid10_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
1819 v_sad_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>` :ref:`clamp<amdgpu_synid_clamp>`
1820 v_sad_u8 :ref:`vdst<amdgpu_synid10_vdst32_0>`::ref:`u32<amdgpu_synid10_type_dev>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`u8x4<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`u8x4<amdgpu_synid10_type_dev>`, :ref:`src2<amdgpu_synid10_src32_2>`::ref:`u32<amdgpu_synid10_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
1821 v_sat_pk_u8_i16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`
1822 v_sin_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1823 v_sin_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1824 v_sqrt_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1825 v_sqrt_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1826 v_sqrt_f64_e64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1827 v_sub_co_ci_u32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`ssrc2<amdgpu_synid10_wssrc>` :ref:`clamp<amdgpu_synid_clamp>`
1828 v_sub_co_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`clamp<amdgpu_synid_clamp>`
1829 v_sub_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1830 v_sub_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1831 v_sub_nc_i16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
1832 v_sub_nc_i32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1833 v_sub_nc_u16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1834 v_sub_nc_u32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`clamp<amdgpu_synid_clamp>`
1835 v_subrev_co_ci_u32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_2>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`ssrc2<amdgpu_synid10_wssrc>` :ref:`clamp<amdgpu_synid_clamp>`
1836 v_subrev_co_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`sdst<amdgpu_synid10_wsdst>`, :ref:`src0<amdgpu_synid10_src32_2>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`clamp<amdgpu_synid_clamp>`
1837 v_subrev_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1838 v_subrev_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1839 v_subrev_nc_u32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_2>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`clamp<amdgpu_synid_clamp>`
1840 v_trig_preop_f64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid10_src32_2>`::ref:`u32<amdgpu_synid10_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1841 v_trunc_f16_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
1842 v_trunc_f32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src<amdgpu_synid10_src32_1>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1843 v_trunc_f64_e64 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`src<amdgpu_synid10_src64_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1844 v_writelane_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`ssrc0<amdgpu_synid10_ssrc32_5>`, :ref:`ssrc1<amdgpu_synid10_ssrc32_4>`
1845 v_xad_u32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`
1846 v_xnor_b32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1847 v_xor3_b32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>`
1848 v_xor_b32_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`
1851 -----------------------
1855 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
1856 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1857 v_fma_mix_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_3>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid10_mad_type_dev>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid10_mad_type_dev>`, :ref:`src2<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid10_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
1858 v_fma_mixhi_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_3>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid10_mad_type_dev>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid10_mad_type_dev>`, :ref:`src2<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid10_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
1859 v_fma_mixlo_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_3>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid10_mad_type_dev>`, :ref:`src1<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid10_mad_type_dev>`, :ref:`src2<amdgpu_synid10_src32_0>`::ref:`m<amdgpu_synid10_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid10_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
1860 v_pk_add_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
1861 v_pk_add_i16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
1862 v_pk_add_u16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
1863 v_pk_ashrrev_i16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_2>`::ref:`u16x2<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
1864 v_pk_fma_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
1865 v_pk_lshlrev_b16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_2>`::ref:`u16x2<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
1866 v_pk_lshrrev_b16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_2>`::ref:`u16x2<amdgpu_synid10_type_dev>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
1867 v_pk_mad_i16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
1868 v_pk_mad_u16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>`, :ref:`src2<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
1869 v_pk_max_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
1870 v_pk_max_i16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
1871 v_pk_max_u16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
1872 v_pk_min_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
1873 v_pk_min_i16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
1874 v_pk_min_u16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
1875 v_pk_mul_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
1876 v_pk_mul_lo_u16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
1877 v_pk_sub_i16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
1878 v_pk_sub_u16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`src1<amdgpu_synid10_src32_2>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
1881 -----------------------
1885 **INSTRUCTION** **DST** **SRC0** **SRC1**
1886 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1887 v_cmp_class_f16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`b32<amdgpu_synid10_type_dev>`
1888 v_cmp_class_f32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`b32<amdgpu_synid10_type_dev>`
1889 v_cmp_class_f64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`b32<amdgpu_synid10_type_dev>`
1890 v_cmp_eq_f16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1891 v_cmp_eq_f32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1892 v_cmp_eq_f64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1893 v_cmp_eq_i16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1894 v_cmp_eq_i32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1895 v_cmp_eq_i64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1896 v_cmp_eq_u16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1897 v_cmp_eq_u32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1898 v_cmp_eq_u64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1899 v_cmp_f_f16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1900 v_cmp_f_f32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1901 v_cmp_f_f64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1902 v_cmp_f_i32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1903 v_cmp_f_i64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1904 v_cmp_f_u32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1905 v_cmp_f_u64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1906 v_cmp_ge_f16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1907 v_cmp_ge_f32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1908 v_cmp_ge_f64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1909 v_cmp_ge_i16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1910 v_cmp_ge_i32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1911 v_cmp_ge_i64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1912 v_cmp_ge_u16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1913 v_cmp_ge_u32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1914 v_cmp_ge_u64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1915 v_cmp_gt_f16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1916 v_cmp_gt_f32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1917 v_cmp_gt_f64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1918 v_cmp_gt_i16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1919 v_cmp_gt_i32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1920 v_cmp_gt_i64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1921 v_cmp_gt_u16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1922 v_cmp_gt_u32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1923 v_cmp_gt_u64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1924 v_cmp_le_f16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1925 v_cmp_le_f32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1926 v_cmp_le_f64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1927 v_cmp_le_i16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1928 v_cmp_le_i32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1929 v_cmp_le_i64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1930 v_cmp_le_u16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1931 v_cmp_le_u32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1932 v_cmp_le_u64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1933 v_cmp_lg_f16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1934 v_cmp_lg_f32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1935 v_cmp_lg_f64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1936 v_cmp_lt_f16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1937 v_cmp_lt_f32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1938 v_cmp_lt_f64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1939 v_cmp_lt_i16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1940 v_cmp_lt_i32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1941 v_cmp_lt_i64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1942 v_cmp_lt_u16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1943 v_cmp_lt_u32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1944 v_cmp_lt_u64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1945 v_cmp_ne_i16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1946 v_cmp_ne_i32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1947 v_cmp_ne_i64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1948 v_cmp_ne_u16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1949 v_cmp_ne_u32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1950 v_cmp_ne_u64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1951 v_cmp_neq_f16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1952 v_cmp_neq_f32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1953 v_cmp_neq_f64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1954 v_cmp_nge_f16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1955 v_cmp_nge_f32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1956 v_cmp_nge_f64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1957 v_cmp_ngt_f16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1958 v_cmp_ngt_f32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1959 v_cmp_ngt_f64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1960 v_cmp_nle_f16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1961 v_cmp_nle_f32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1962 v_cmp_nle_f64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1963 v_cmp_nlg_f16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1964 v_cmp_nlg_f32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1965 v_cmp_nlg_f64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1966 v_cmp_nlt_f16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1967 v_cmp_nlt_f32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1968 v_cmp_nlt_f64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1969 v_cmp_o_f16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1970 v_cmp_o_f32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1971 v_cmp_o_f64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1972 v_cmp_t_i32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1973 v_cmp_t_i64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1974 v_cmp_t_u32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1975 v_cmp_t_u64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1976 v_cmp_tru_f16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1977 v_cmp_tru_f32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1978 v_cmp_tru_f64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1979 v_cmp_u_f16 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1980 v_cmp_u_f32 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1981 v_cmp_u_f64 :ref:`vcc<amdgpu_synid10_vcc_32>`, :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1982 v_cmpx_class_f16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`b32<amdgpu_synid10_type_dev>`
1983 v_cmpx_class_f32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`b32<amdgpu_synid10_type_dev>`
1984 v_cmpx_class_f64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`::ref:`b32<amdgpu_synid10_type_dev>`
1985 v_cmpx_eq_f16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1986 v_cmpx_eq_f32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1987 v_cmpx_eq_f64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1988 v_cmpx_eq_i16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1989 v_cmpx_eq_i32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1990 v_cmpx_eq_i64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1991 v_cmpx_eq_u16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1992 v_cmpx_eq_u32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1993 v_cmpx_eq_u64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1994 v_cmpx_f_f16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1995 v_cmpx_f_f32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1996 v_cmpx_f_f64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1997 v_cmpx_f_i32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
1998 v_cmpx_f_i64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
1999 v_cmpx_f_u32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2000 v_cmpx_f_u64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2001 v_cmpx_ge_f16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2002 v_cmpx_ge_f32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2003 v_cmpx_ge_f64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2004 v_cmpx_ge_i16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2005 v_cmpx_ge_i32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2006 v_cmpx_ge_i64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2007 v_cmpx_ge_u16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2008 v_cmpx_ge_u32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2009 v_cmpx_ge_u64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2010 v_cmpx_gt_f16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2011 v_cmpx_gt_f32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2012 v_cmpx_gt_f64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2013 v_cmpx_gt_i16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2014 v_cmpx_gt_i32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2015 v_cmpx_gt_i64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2016 v_cmpx_gt_u16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2017 v_cmpx_gt_u32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2018 v_cmpx_gt_u64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2019 v_cmpx_le_f16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2020 v_cmpx_le_f32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2021 v_cmpx_le_f64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2022 v_cmpx_le_i16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2023 v_cmpx_le_i32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2024 v_cmpx_le_i64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2025 v_cmpx_le_u16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2026 v_cmpx_le_u32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2027 v_cmpx_le_u64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2028 v_cmpx_lg_f16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2029 v_cmpx_lg_f32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2030 v_cmpx_lg_f64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2031 v_cmpx_lt_f16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2032 v_cmpx_lt_f32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2033 v_cmpx_lt_f64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2034 v_cmpx_lt_i16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2035 v_cmpx_lt_i32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2036 v_cmpx_lt_i64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2037 v_cmpx_lt_u16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2038 v_cmpx_lt_u32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2039 v_cmpx_lt_u64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2040 v_cmpx_ne_i16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2041 v_cmpx_ne_i32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2042 v_cmpx_ne_i64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2043 v_cmpx_ne_u16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2044 v_cmpx_ne_u32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2045 v_cmpx_ne_u64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2046 v_cmpx_neq_f16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2047 v_cmpx_neq_f32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2048 v_cmpx_neq_f64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2049 v_cmpx_nge_f16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2050 v_cmpx_nge_f32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2051 v_cmpx_nge_f64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2052 v_cmpx_ngt_f16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2053 v_cmpx_ngt_f32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2054 v_cmpx_ngt_f64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2055 v_cmpx_nle_f16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2056 v_cmpx_nle_f32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2057 v_cmpx_nle_f64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2058 v_cmpx_nlg_f16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2059 v_cmpx_nlg_f32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2060 v_cmpx_nlg_f64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2061 v_cmpx_nlt_f16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2062 v_cmpx_nlt_f32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2063 v_cmpx_nlt_f64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2064 v_cmpx_o_f16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2065 v_cmpx_o_f32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2066 v_cmpx_o_f64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2067 v_cmpx_t_i32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2068 v_cmpx_t_i64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2069 v_cmpx_t_u32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2070 v_cmpx_t_u64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2071 v_cmpx_tru_f16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2072 v_cmpx_tru_f32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2073 v_cmpx_tru_f64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2074 v_cmpx_u_f16 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2075 v_cmpx_u_f32 :ref:`src0<amdgpu_synid10_src32_1>`, :ref:`vsrc1<amdgpu_synid10_vsrc32_0>`
2076 v_cmpx_u_f64 :ref:`src0<amdgpu_synid10_src64_0>`, :ref:`vsrc1<amdgpu_synid10_vsrc64_0>`
2078 .. |---| unicode:: U+02014 .. em dash
2103 gfx10_base_smem_addr
2105 gfx10_base_smem_scratch
2106 gfx10_data_buf_atomic128
2107 gfx10_data_buf_atomic32
2108 gfx10_data_buf_atomic64
2109 gfx10_data_mimg_atomic_cmp
2110 gfx10_data_mimg_atomic_reg
2111 gfx10_data_mimg_store
2112 gfx10_data_mimg_store_d16
2113 gfx10_data_smem_atomic128
2114 gfx10_data_smem_atomic32
2115 gfx10_data_smem_atomic64
2121 gfx10_dst_flat_atomic32
2122 gfx10_dst_flat_atomic64
2123 gfx10_dst_mimg_gather4
2124 gfx10_dst_mimg_regular
2125 gfx10_dst_mimg_regular_d16
2127 gfx10_offset_smem_buf
2128 gfx10_offset_smem_plain
2131 gfx10_saddr_flat_global
2132 gfx10_saddr_flat_scratch
2159 gfx10_vaddr_flat_global
2160 gfx10_vaddr_flat_scratch
2176 gfx10_mod_dpp_sdwa_abs_neg
2178 gfx10_mod_vop3_abs_neg