1 // RUN: llvm-tblgen -gen-asm-matcher -I %p/../../include %s | FileCheck %s
3 include "llvm/Target/Target.td"
5 def ArchInstrInfo : InstrInfo { }
8 let InstructionSet = ArchInstrInfo;
11 def Reg : Register<"reg">;
12 def RegClass : RegisterClass<"foo", [i32], 0, (add Reg)>;
14 def AsmCond1 : SubtargetFeature<"cond1", "cond1", "true", "">;
15 def AsmCond2 : SubtargetFeature<"cond2", "cond2", "true", "">;
17 def Subtarget1 : Predicate<"Pred1">, AssemblerPredicate<(all_of AsmCond1)>;
18 def Subtarget2 : Predicate<"Pred2">, AssemblerPredicate<(all_of AsmCond2)>;
20 multiclass DefInstruction<string name, dag outs, dag ins, Predicate pred> {
21 def "" : Instruction {
23 let OutOperandList = outs;
24 let InOperandList = ins;
26 let Predicates = [pred];
28 def : MnemonicAlias<name # "_alias", name>;
31 defm FooInst1 : DefInstruction<"foo", (outs), (ins), Subtarget1>;
33 defm FooInst2 : DefInstruction<"foo", (outs), (ins), Subtarget2>;
35 // Check that applyMnemonicAliases maps "foo_alias" to "foo" once only and
36 // without checking any predicates.
38 // CHECK: if (memcmp(Mnemonic.data()+0, "foo_alias", 9) != 0)
40 // CHECK-NEXT: Mnemonic = "foo"; // "foo_alias"
41 // CHECK-NEXT: return;