[Flang] remove whole-archive option for AIX linker (#76039)
[llvm-project.git] / clang / test / CodeGen / aarch64-sme2-intrinsics / acle_sme2_luti2_lane_zt.c
blobcb34db3695b2428192b73b2a6fe5273d631ec5cb
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
3 // REQUIRES: aarch64-registered-target
5 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sme2 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
6 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sme2 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
7 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sme2 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
9 #include <arm_sme_draft_spec_subject_to_change.h>
12 // CHECK-LABEL: @test_svluti2_lane_zt_u8(
13 // CHECK-NEXT: entry:
14 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.luti2.lane.zt.nxv16i8(i32 0, <vscale x 16 x i8> [[ZN:%.*]], i32 15)
15 // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
17 // CPP-CHECK-LABEL: @_Z23test_svluti2_lane_zt_u8u11__SVUint8_t(
18 // CPP-CHECK-NEXT: entry:
19 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.luti2.lane.zt.nxv16i8(i32 0, <vscale x 16 x i8> [[ZN:%.*]], i32 15)
20 // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
22 svuint8_t test_svluti2_lane_zt_u8(svuint8_t zn) __arm_streaming __arm_shared_za __arm_preserves_za {
23 return svluti2_lane_zt_u8(0, zn, 15);
27 // CHECK-LABEL: @test_svluti2_lane_zt_s8(
28 // CHECK-NEXT: entry:
29 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.luti2.lane.zt.nxv16i8(i32 0, <vscale x 16 x i8> [[ZN:%.*]], i32 15)
30 // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
32 // CPP-CHECK-LABEL: @_Z23test_svluti2_lane_zt_s8u11__SVUint8_t(
33 // CPP-CHECK-NEXT: entry:
34 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.luti2.lane.zt.nxv16i8(i32 0, <vscale x 16 x i8> [[ZN:%.*]], i32 15)
35 // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
37 svint8_t test_svluti2_lane_zt_s8(svuint8_t zn) __arm_streaming __arm_shared_za __arm_preserves_za {
38 return svluti2_lane_zt_s8(0, zn, 15);
41 // CHECK-LABEL: @test_svluti2_lane_zt_u16(
42 // CHECK-NEXT: entry:
43 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.luti2.lane.zt.nxv8i16(i32 0, <vscale x 16 x i8> [[ZN:%.*]], i32 15)
44 // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]
46 // CPP-CHECK-LABEL: @_Z24test_svluti2_lane_zt_u16u11__SVUint8_t(
47 // CPP-CHECK-NEXT: entry:
48 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.luti2.lane.zt.nxv8i16(i32 0, <vscale x 16 x i8> [[ZN:%.*]], i32 15)
49 // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]
51 svuint16_t test_svluti2_lane_zt_u16(svuint8_t zn) __arm_streaming __arm_shared_za __arm_preserves_za {
52 return svluti2_lane_zt_u16(0, zn, 15);
56 // CHECK-LABEL: @test_svluti2_lane_zt_s16(
57 // CHECK-NEXT: entry:
58 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.luti2.lane.zt.nxv8i16(i32 0, <vscale x 16 x i8> [[ZN:%.*]], i32 15)
59 // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]
61 // CPP-CHECK-LABEL: @_Z24test_svluti2_lane_zt_s16u11__SVUint8_t(
62 // CPP-CHECK-NEXT: entry:
63 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.luti2.lane.zt.nxv8i16(i32 0, <vscale x 16 x i8> [[ZN:%.*]], i32 15)
64 // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]
66 svint16_t test_svluti2_lane_zt_s16(svuint8_t zn) __arm_streaming __arm_shared_za __arm_preserves_za {
67 return svluti2_lane_zt_s16(0, zn, 15);
70 // CHECK-LABEL: @test_svluti2_lane_zt_f16(
71 // CHECK-NEXT: entry:
72 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sme.luti2.lane.zt.nxv8f16(i32 0, <vscale x 16 x i8> [[ZN:%.*]], i32 15)
73 // CHECK-NEXT: ret <vscale x 8 x half> [[TMP0]]
75 // CPP-CHECK-LABEL: @_Z24test_svluti2_lane_zt_f16u11__SVUint8_t(
76 // CPP-CHECK-NEXT: entry:
77 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sme.luti2.lane.zt.nxv8f16(i32 0, <vscale x 16 x i8> [[ZN:%.*]], i32 15)
78 // CPP-CHECK-NEXT: ret <vscale x 8 x half> [[TMP0]]
80 svfloat16_t test_svluti2_lane_zt_f16(svuint8_t zn) __arm_streaming __arm_shared_za __arm_preserves_za {
81 return svluti2_lane_zt_f16(0, zn, 15);
84 // CHECK-LABEL: @test_svluti2_lane_zt_bf16(
85 // CHECK-NEXT: entry:
86 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sme.luti2.lane.zt.nxv8bf16(i32 0, <vscale x 16 x i8> [[ZN:%.*]], i32 15)
87 // CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]
89 // CPP-CHECK-LABEL: @_Z25test_svluti2_lane_zt_bf16u11__SVUint8_t(
90 // CPP-CHECK-NEXT: entry:
91 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sme.luti2.lane.zt.nxv8bf16(i32 0, <vscale x 16 x i8> [[ZN:%.*]], i32 15)
92 // CPP-CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]
94 svbfloat16_t test_svluti2_lane_zt_bf16(svuint8_t zn) __arm_streaming __arm_shared_za __arm_preserves_za {
95 return svluti2_lane_zt_bf16(0, zn, 15);
98 // CHECK-LABEL: @test_svluti2_lane_zt_u32(
99 // CHECK-NEXT: entry:
100 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.luti2.lane.zt.nxv4i32(i32 0, <vscale x 16 x i8> [[ZN:%.*]], i32 15)
101 // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]
103 // CPP-CHECK-LABEL: @_Z24test_svluti2_lane_zt_u32u11__SVUint8_t(
104 // CPP-CHECK-NEXT: entry:
105 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.luti2.lane.zt.nxv4i32(i32 0, <vscale x 16 x i8> [[ZN:%.*]], i32 15)
106 // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]
108 svuint32_t test_svluti2_lane_zt_u32(svuint8_t zn) __arm_streaming __arm_shared_za __arm_preserves_za {
109 return svluti2_lane_zt_u32(0, zn, 15);
112 // CHECK-LABEL: @test_svluti2_lane_zt_s32(
113 // CHECK-NEXT: entry:
114 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.luti2.lane.zt.nxv4i32(i32 0, <vscale x 16 x i8> [[ZN:%.*]], i32 15)
115 // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]
117 // CPP-CHECK-LABEL: @_Z24test_svluti2_lane_zt_s32u11__SVUint8_t(
118 // CPP-CHECK-NEXT: entry:
119 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.luti2.lane.zt.nxv4i32(i32 0, <vscale x 16 x i8> [[ZN:%.*]], i32 15)
120 // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]
122 svint32_t test_svluti2_lane_zt_s32(svuint8_t zn) __arm_streaming __arm_shared_za __arm_preserves_za {
123 return svluti2_lane_zt_s32(0, zn, 15);
126 // CHECK-LABEL: @test_svluti2_lane_zt_f32(
127 // CHECK-NEXT: entry:
128 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sme.luti2.lane.zt.nxv4f32(i32 0, <vscale x 16 x i8> [[ZN:%.*]], i32 15)
129 // CHECK-NEXT: ret <vscale x 4 x float> [[TMP0]]
131 // CPP-CHECK-LABEL: @_Z24test_svluti2_lane_zt_f32u11__SVUint8_t(
132 // CPP-CHECK-NEXT: entry:
133 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sme.luti2.lane.zt.nxv4f32(i32 0, <vscale x 16 x i8> [[ZN:%.*]], i32 15)
134 // CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP0]]
136 svfloat32_t test_svluti2_lane_zt_f32(svuint8_t zn) __arm_streaming __arm_shared_za __arm_preserves_za {
137 return svluti2_lane_zt_f32(0, zn, 15);