1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // REQUIRES: aarch64-registered-target
3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -o - -emit-llvm %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s
4 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -o - -emit-llvm %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s
5 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -o /dev/null %s
8 #ifdef SVE_OVERLOADED_FORMS
9 // A simple used,unused... macro, long enough to represent any SVE builtin.
10 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
12 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
15 // CHECK-LABEL: @test_svst1w_s64(
17 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
18 // CHECK-NEXT: [[TMP1:%.*]] = trunc <vscale x 2 x i64> [[DATA:%.*]] to <vscale x 2 x i32>
19 // CHECK-NEXT: tail call void @llvm.masked.store.nxv2i32.p0(<vscale x 2 x i32> [[TMP1]], ptr [[BASE:%.*]], i32 1, <vscale x 2 x i1> [[TMP0]])
20 // CHECK-NEXT: ret void
22 void test_svst1w_s64(svbool_t pg
, int32_t *base
, svint64_t data
)
24 return SVE_ACLE_FUNC(svst1w
,_s64
,,)(pg
, base
, data
);
27 // CHECK-LABEL: @test_svst1w_u64(
29 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
30 // CHECK-NEXT: [[TMP1:%.*]] = trunc <vscale x 2 x i64> [[DATA:%.*]] to <vscale x 2 x i32>
31 // CHECK-NEXT: tail call void @llvm.masked.store.nxv2i32.p0(<vscale x 2 x i32> [[TMP1]], ptr [[BASE:%.*]], i32 1, <vscale x 2 x i1> [[TMP0]])
32 // CHECK-NEXT: ret void
34 void test_svst1w_u64(svbool_t pg
, uint32_t *base
, svuint64_t data
)
36 return SVE_ACLE_FUNC(svst1w
,_u64
,,)(pg
, base
, data
);
39 // CHECK-LABEL: @test_svst1w_vnum_s64(
41 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
42 // CHECK-NEXT: [[TMP1:%.*]] = getelementptr <vscale x 2 x i32>, ptr [[BASE:%.*]], i64 [[VNUM:%.*]]
43 // CHECK-NEXT: [[TMP2:%.*]] = trunc <vscale x 2 x i64> [[DATA:%.*]] to <vscale x 2 x i32>
44 // CHECK-NEXT: tail call void @llvm.masked.store.nxv2i32.p0(<vscale x 2 x i32> [[TMP2]], ptr [[TMP1]], i32 1, <vscale x 2 x i1> [[TMP0]])
45 // CHECK-NEXT: ret void
47 void test_svst1w_vnum_s64(svbool_t pg
, int32_t *base
, int64_t vnum
, svint64_t data
)
49 return SVE_ACLE_FUNC(svst1w_vnum
,_s64
,,)(pg
, base
, vnum
, data
);
52 // CHECK-LABEL: @test_svst1w_vnum_u64(
54 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
55 // CHECK-NEXT: [[TMP1:%.*]] = getelementptr <vscale x 2 x i32>, ptr [[BASE:%.*]], i64 [[VNUM:%.*]]
56 // CHECK-NEXT: [[TMP2:%.*]] = trunc <vscale x 2 x i64> [[DATA:%.*]] to <vscale x 2 x i32>
57 // CHECK-NEXT: tail call void @llvm.masked.store.nxv2i32.p0(<vscale x 2 x i32> [[TMP2]], ptr [[TMP1]], i32 1, <vscale x 2 x i1> [[TMP0]])
58 // CHECK-NEXT: ret void
60 void test_svst1w_vnum_u64(svbool_t pg
, uint32_t *base
, int64_t vnum
, svuint64_t data
)
62 return SVE_ACLE_FUNC(svst1w_vnum
,_u64
,,)(pg
, base
, vnum
, data
);
65 // CHECK-LABEL: @test_svst1w_scatter_u64base_s64(
67 // CHECK-NEXT: [[TMP0:%.*]] = trunc <vscale x 2 x i64> [[DATA:%.*]] to <vscale x 2 x i32>
68 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
69 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[BASES:%.*]], i64 0)
70 // CHECK-NEXT: ret void
72 void test_svst1w_scatter_u64base_s64(svbool_t pg
, svuint64_t bases
, svint64_t data
)
74 return SVE_ACLE_FUNC(svst1w_scatter
,_u64base
,,_s64
)(pg
, bases
, data
);
77 // CHECK-LABEL: @test_svst1w_scatter_u64base_u64(
79 // CHECK-NEXT: [[TMP0:%.*]] = trunc <vscale x 2 x i64> [[DATA:%.*]] to <vscale x 2 x i32>
80 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
81 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[BASES:%.*]], i64 0)
82 // CHECK-NEXT: ret void
84 void test_svst1w_scatter_u64base_u64(svbool_t pg
, svuint64_t bases
, svuint64_t data
)
86 return SVE_ACLE_FUNC(svst1w_scatter
,_u64base
,,_u64
)(pg
, bases
, data
);
89 // CHECK-LABEL: @test_svst1w_scatter_s64offset_s64(
91 // CHECK-NEXT: [[TMP0:%.*]] = trunc <vscale x 2 x i64> [[DATA:%.*]] to <vscale x 2 x i32>
92 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
93 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i1> [[TMP1]], ptr [[BASE:%.*]], <vscale x 2 x i64> [[OFFSETS:%.*]])
94 // CHECK-NEXT: ret void
96 void test_svst1w_scatter_s64offset_s64(svbool_t pg
, int32_t *base
, svint64_t offsets
, svint64_t data
)
98 return SVE_ACLE_FUNC(svst1w_scatter_
,s64
,offset
,_s64
)(pg
, base
, offsets
, data
);
101 // CHECK-LABEL: @test_svst1w_scatter_s64offset_u64(
102 // CHECK-NEXT: entry:
103 // CHECK-NEXT: [[TMP0:%.*]] = trunc <vscale x 2 x i64> [[DATA:%.*]] to <vscale x 2 x i32>
104 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
105 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i1> [[TMP1]], ptr [[BASE:%.*]], <vscale x 2 x i64> [[OFFSETS:%.*]])
106 // CHECK-NEXT: ret void
108 void test_svst1w_scatter_s64offset_u64(svbool_t pg
, uint32_t *base
, svint64_t offsets
, svuint64_t data
)
110 return SVE_ACLE_FUNC(svst1w_scatter_
,s64
,offset
,_u64
)(pg
, base
, offsets
, data
);
113 // CHECK-LABEL: @test_svst1w_scatter_u64offset_s64(
114 // CHECK-NEXT: entry:
115 // CHECK-NEXT: [[TMP0:%.*]] = trunc <vscale x 2 x i64> [[DATA:%.*]] to <vscale x 2 x i32>
116 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
117 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i1> [[TMP1]], ptr [[BASE:%.*]], <vscale x 2 x i64> [[OFFSETS:%.*]])
118 // CHECK-NEXT: ret void
120 void test_svst1w_scatter_u64offset_s64(svbool_t pg
, int32_t *base
, svuint64_t offsets
, svint64_t data
)
122 return SVE_ACLE_FUNC(svst1w_scatter_
,u64
,offset
,_s64
)(pg
, base
, offsets
, data
);
125 // CHECK-LABEL: @test_svst1w_scatter_u64offset_u64(
126 // CHECK-NEXT: entry:
127 // CHECK-NEXT: [[TMP0:%.*]] = trunc <vscale x 2 x i64> [[DATA:%.*]] to <vscale x 2 x i32>
128 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
129 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i1> [[TMP1]], ptr [[BASE:%.*]], <vscale x 2 x i64> [[OFFSETS:%.*]])
130 // CHECK-NEXT: ret void
132 void test_svst1w_scatter_u64offset_u64(svbool_t pg
, uint32_t *base
, svuint64_t offsets
, svuint64_t data
)
134 return SVE_ACLE_FUNC(svst1w_scatter_
,u64
,offset
,_u64
)(pg
, base
, offsets
, data
);
137 // CHECK-LABEL: @test_svst1w_scatter_u64base_offset_s64(
138 // CHECK-NEXT: entry:
139 // CHECK-NEXT: [[TMP0:%.*]] = trunc <vscale x 2 x i64> [[DATA:%.*]] to <vscale x 2 x i32>
140 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
141 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[BASES:%.*]], i64 [[OFFSET:%.*]])
142 // CHECK-NEXT: ret void
144 void test_svst1w_scatter_u64base_offset_s64(svbool_t pg
, svuint64_t bases
, int64_t offset
, svint64_t data
)
146 return SVE_ACLE_FUNC(svst1w_scatter
,_u64base
,_offset
,_s64
)(pg
, bases
, offset
, data
);
149 // CHECK-LABEL: @test_svst1w_scatter_u64base_offset_u64(
150 // CHECK-NEXT: entry:
151 // CHECK-NEXT: [[TMP0:%.*]] = trunc <vscale x 2 x i64> [[DATA:%.*]] to <vscale x 2 x i32>
152 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
153 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[BASES:%.*]], i64 [[OFFSET:%.*]])
154 // CHECK-NEXT: ret void
156 void test_svst1w_scatter_u64base_offset_u64(svbool_t pg
, svuint64_t bases
, int64_t offset
, svuint64_t data
)
158 return SVE_ACLE_FUNC(svst1w_scatter
,_u64base
,_offset
,_u64
)(pg
, bases
, offset
, data
);
161 // CHECK-LABEL: @test_svst1w_scatter_s64index_s64(
162 // CHECK-NEXT: entry:
163 // CHECK-NEXT: [[TMP0:%.*]] = trunc <vscale x 2 x i64> [[DATA:%.*]] to <vscale x 2 x i32>
164 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
165 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i1> [[TMP1]], ptr [[BASE:%.*]], <vscale x 2 x i64> [[INDICES:%.*]])
166 // CHECK-NEXT: ret void
168 void test_svst1w_scatter_s64index_s64(svbool_t pg
, int32_t *base
, svint64_t indices
, svint64_t data
)
170 return SVE_ACLE_FUNC(svst1w_scatter_
,s64
,index
,_s64
)(pg
, base
, indices
, data
);
173 // CHECK-LABEL: @test_svst1w_scatter_s64index_u64(
174 // CHECK-NEXT: entry:
175 // CHECK-NEXT: [[TMP0:%.*]] = trunc <vscale x 2 x i64> [[DATA:%.*]] to <vscale x 2 x i32>
176 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
177 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i1> [[TMP1]], ptr [[BASE:%.*]], <vscale x 2 x i64> [[INDICES:%.*]])
178 // CHECK-NEXT: ret void
180 void test_svst1w_scatter_s64index_u64(svbool_t pg
, uint32_t *base
, svint64_t indices
, svuint64_t data
)
182 return SVE_ACLE_FUNC(svst1w_scatter_
,s64
,index
,_u64
)(pg
, base
, indices
, data
);
185 // CHECK-LABEL: @test_svst1w_scatter_u64index_s64(
186 // CHECK-NEXT: entry:
187 // CHECK-NEXT: [[TMP0:%.*]] = trunc <vscale x 2 x i64> [[DATA:%.*]] to <vscale x 2 x i32>
188 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
189 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i1> [[TMP1]], ptr [[BASE:%.*]], <vscale x 2 x i64> [[INDICES:%.*]])
190 // CHECK-NEXT: ret void
192 void test_svst1w_scatter_u64index_s64(svbool_t pg
, int32_t *base
, svuint64_t indices
, svint64_t data
)
194 return SVE_ACLE_FUNC(svst1w_scatter_
,u64
,index
,_s64
)(pg
, base
, indices
, data
);
197 // CHECK-LABEL: @test_svst1w_scatter_u64index_u64(
198 // CHECK-NEXT: entry:
199 // CHECK-NEXT: [[TMP0:%.*]] = trunc <vscale x 2 x i64> [[DATA:%.*]] to <vscale x 2 x i32>
200 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
201 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i1> [[TMP1]], ptr [[BASE:%.*]], <vscale x 2 x i64> [[INDICES:%.*]])
202 // CHECK-NEXT: ret void
204 void test_svst1w_scatter_u64index_u64(svbool_t pg
, uint32_t *base
, svuint64_t indices
, svuint64_t data
)
206 return SVE_ACLE_FUNC(svst1w_scatter_
,u64
,index
,_u64
)(pg
, base
, indices
, data
);
209 // CHECK-LABEL: @test_svst1w_scatter_u64base_index_s64(
210 // CHECK-NEXT: entry:
211 // CHECK-NEXT: [[TMP0:%.*]] = trunc <vscale x 2 x i64> [[DATA:%.*]] to <vscale x 2 x i32>
212 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
213 // CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 2
214 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[BASES:%.*]], i64 [[TMP2]])
215 // CHECK-NEXT: ret void
217 void test_svst1w_scatter_u64base_index_s64(svbool_t pg
, svuint64_t bases
, int64_t index
, svint64_t data
)
219 return SVE_ACLE_FUNC(svst1w_scatter
,_u64base
,_index
,_s64
)(pg
, bases
, index
, data
);
222 // CHECK-LABEL: @test_svst1w_scatter_u64base_index_u64(
223 // CHECK-NEXT: entry:
224 // CHECK-NEXT: [[TMP0:%.*]] = trunc <vscale x 2 x i64> [[DATA:%.*]] to <vscale x 2 x i32>
225 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
226 // CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 2
227 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[BASES:%.*]], i64 [[TMP2]])
228 // CHECK-NEXT: ret void
230 void test_svst1w_scatter_u64base_index_u64(svbool_t pg
, svuint64_t bases
, int64_t index
, svuint64_t data
)
232 return SVE_ACLE_FUNC(svst1w_scatter
,_u64base
,_index
,_u64
)(pg
, bases
, index
, data
);