clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // REQUIRES: aarch64-registered-target
   3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s
   4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
   5 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
   6 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sme2 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
   7
   8 #include <arm_sve.h>
   9
  10 // CHECK-LABEL: @test_svcntp_c8_vlx2(
  11 // CHECK-NEXT:  entry:
  12 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c8(target("aarch64.svcount") [[PNN:%.*]], i32 2)
  13 // CHECK-NEXT:    ret i64 [[TMP0]]
  14 //
  15 // CPP-CHECK-LABEL: @_Z19test_svcntp_c8_vlx2u11__SVCount_t(
  16 // CPP-CHECK-NEXT:  entry:
  17 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c8(target("aarch64.svcount") [[PNN:%.*]], i32 2)
  18 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
  19 //
  20 uint64_t test_svcntp_c8_vlx2(svcount_t pnn) {
  21   return svcntp_c8(pnn, 2);
  22 }
  23
  24 // CHECK-LABEL: @test_svcntp_c8_vlx4(
  25 // CHECK-NEXT:  entry:
  26 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c8(target("aarch64.svcount") [[PNN:%.*]], i32 4)
  27 // CHECK-NEXT:    ret i64 [[TMP0]]
  28 //
  29 // CPP-CHECK-LABEL: @_Z19test_svcntp_c8_vlx4u11__SVCount_t(
  30 // CPP-CHECK-NEXT:  entry:
  31 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c8(target("aarch64.svcount") [[PNN:%.*]], i32 4)
  32 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
  33 //
  34 uint64_t test_svcntp_c8_vlx4(svcount_t pnn) {
  35   return svcntp_c8(pnn, 4);
  36 }
  37
  38 // CHECK-LABEL: @test_svcntp_c16_vlx2(
  39 // CHECK-NEXT:  entry:
  40 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c16(target("aarch64.svcount") [[PNN:%.*]], i32 2)
  41 // CHECK-NEXT:    ret i64 [[TMP0]]
  42 //
  43 // CPP-CHECK-LABEL: @_Z20test_svcntp_c16_vlx2u11__SVCount_t(
  44 // CPP-CHECK-NEXT:  entry:
  45 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c16(target("aarch64.svcount") [[PNN:%.*]], i32 2)
  46 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
  47 //
  48 uint64_t test_svcntp_c16_vlx2(svcount_t pnn) {
  49   return svcntp_c16(pnn, 2);
  50 }
  51
  52 // CHECK-LABEL: @test_svcntp_c16_vlx4(
  53 // CHECK-NEXT:  entry:
  54 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c16(target("aarch64.svcount") [[PNN:%.*]], i32 4)
  55 // CHECK-NEXT:    ret i64 [[TMP0]]
  56 //
  57 // CPP-CHECK-LABEL: @_Z20test_svcntp_c16_vlx4u11__SVCount_t(
  58 // CPP-CHECK-NEXT:  entry:
  59 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c16(target("aarch64.svcount") [[PNN:%.*]], i32 4)
  60 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
  61 //
  62 uint64_t test_svcntp_c16_vlx4(svcount_t pnn) {
  63   return svcntp_c16(pnn, 4);
  64 }
  65
  66 // CHECK-LABEL: @test_svcntp_c32_vlx2(
  67 // CHECK-NEXT:  entry:
  68 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c32(target("aarch64.svcount") [[PNN:%.*]], i32 2)
  69 // CHECK-NEXT:    ret i64 [[TMP0]]
  70 //
  71 // CPP-CHECK-LABEL: @_Z20test_svcntp_c32_vlx2u11__SVCount_t(
  72 // CPP-CHECK-NEXT:  entry:
  73 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c32(target("aarch64.svcount") [[PNN:%.*]], i32 2)
  74 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
  75 //
  76 uint64_t test_svcntp_c32_vlx2(svcount_t pnn) {
  77   return svcntp_c32(pnn, 2);
  78 }
  79
  80 // CHECK-LABEL: @test_svcntp_c32_vlx4(
  81 // CHECK-NEXT:  entry:
  82 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c32(target("aarch64.svcount") [[PNN:%.*]], i32 4)
  83 // CHECK-NEXT:    ret i64 [[TMP0]]
  84 //
  85 // CPP-CHECK-LABEL: @_Z20test_svcntp_c32_vlx4u11__SVCount_t(
  86 // CPP-CHECK-NEXT:  entry:
  87 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c32(target("aarch64.svcount") [[PNN:%.*]], i32 4)
  88 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
  89 //
  90 uint64_t test_svcntp_c32_vlx4(svcount_t pnn) {
  91   return svcntp_c32(pnn, 4);
  92 }
  93
  94 // CHECK-LABEL: @test_svcntp_c64_vlx2(
  95 // CHECK-NEXT:  entry:
  96 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c64(target("aarch64.svcount") [[PNN:%.*]], i32 2)
  97 // CHECK-NEXT:    ret i64 [[TMP0]]
  98 //
  99 // CPP-CHECK-LABEL: @_Z20test_svcntp_c64_vlx2u11__SVCount_t(
 100 // CPP-CHECK-NEXT:  entry:
 101 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c64(target("aarch64.svcount") [[PNN:%.*]], i32 2)
 102 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 103 //
 104 uint64_t test_svcntp_c64_vlx2(svcount_t pnn) {
 105   return svcntp_c64(pnn, 2);
 106 }
 107
 108 // CHECK-LABEL: @test_svcntp_c64_vlx4(
 109 // CHECK-NEXT:  entry:
 110 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c64(target("aarch64.svcount") [[PNN:%.*]], i32 4)
 111 // CHECK-NEXT:    ret i64 [[TMP0]]
 112 //
 113 // CPP-CHECK-LABEL: @_Z20test_svcntp_c64_vlx4u11__SVCount_t(
 114 // CPP-CHECK-NEXT:  entry:
 115 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c64(target("aarch64.svcount") [[PNN:%.*]], i32 4)
 116 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 117 //
 118 uint64_t test_svcntp_c64_vlx4(svcount_t pnn) {
 119   return svcntp_c64(pnn, 4);
 120 }