[Flang] remove whole-archive option for AIX linker (#76039)
[llvm-project.git] / clang / test / CodeGen / aarch64-sve2p1-intrinsics / acle_sve2p1_set4_bool.c
blob746a8280ac53f3036b5de2fa1f72b4115054c114
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s \
3 // RUN: | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s \
5 // RUN: | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
6 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s \
7 // RUN: | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
8 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s\
9 // RUN: | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
10 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
11 // REQUIRES: aarch64-registered-target
13 #include <arm_sve.h>
15 #ifdef SVE_OVERLOADED_FORMS
16 // A simple used,unused... macro, long enough to represent any SVE builtin.
17 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
18 #else
19 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
20 #endif
23 // CHECK-LABEL: @test_svset4_b8_0(
24 // CHECK-NEXT: entry:
25 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 64 x i1> @llvm.vector.insert.nxv64i1.nxv16i1(<vscale x 64 x i1> [[TUPLE:%.*]], <vscale x 16 x i1> [[X:%.*]], i64 0)
26 // CHECK-NEXT: ret <vscale x 64 x i1> [[TMP0]]
28 // CPP-CHECK-LABEL: @_Z16test_svset4_b8_010svboolx4_tu10__SVBool_t(
29 // CPP-CHECK-NEXT: entry:
30 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 64 x i1> @llvm.vector.insert.nxv64i1.nxv16i1(<vscale x 64 x i1> [[TUPLE:%.*]], <vscale x 16 x i1> [[X:%.*]], i64 0)
31 // CPP-CHECK-NEXT: ret <vscale x 64 x i1> [[TMP0]]
33 svboolx4_t test_svset4_b8_0(svboolx4_t tuple, svbool_t x)
35 return SVE_ACLE_FUNC(svset4,_b8,,)(tuple, 0, x);
38 // CHECK-LABEL: @test_svset4_b8_1(
39 // CHECK-NEXT: entry:
40 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 64 x i1> @llvm.vector.insert.nxv64i1.nxv16i1(<vscale x 64 x i1> [[TUPLE:%.*]], <vscale x 16 x i1> [[X:%.*]], i64 16)
41 // CHECK-NEXT: ret <vscale x 64 x i1> [[TMP0]]
43 // CPP-CHECK-LABEL: @_Z16test_svset4_b8_110svboolx4_tu10__SVBool_t(
44 // CPP-CHECK-NEXT: entry:
45 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 64 x i1> @llvm.vector.insert.nxv64i1.nxv16i1(<vscale x 64 x i1> [[TUPLE:%.*]], <vscale x 16 x i1> [[X:%.*]], i64 16)
46 // CPP-CHECK-NEXT: ret <vscale x 64 x i1> [[TMP0]]
48 svboolx4_t test_svset4_b8_1(svboolx4_t tuple, svbool_t x)
50 return SVE_ACLE_FUNC(svset4,_b8,,)(tuple, 1, x);
53 // CHECK-LABEL: @test_svset4_b8_3(
54 // CHECK-NEXT: entry:
55 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 64 x i1> @llvm.vector.insert.nxv64i1.nxv16i1(<vscale x 64 x i1> [[TUPLE:%.*]], <vscale x 16 x i1> [[X:%.*]], i64 48)
56 // CHECK-NEXT: ret <vscale x 64 x i1> [[TMP0]]
58 // CPP-CHECK-LABEL: @_Z16test_svset4_b8_310svboolx4_tu10__SVBool_t(
59 // CPP-CHECK-NEXT: entry:
60 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 64 x i1> @llvm.vector.insert.nxv64i1.nxv16i1(<vscale x 64 x i1> [[TUPLE:%.*]], <vscale x 16 x i1> [[X:%.*]], i64 48)
61 // CPP-CHECK-NEXT: ret <vscale x 64 x i1> [[TMP0]]
63 svboolx4_t test_svset4_b8_3(svboolx4_t tuple, svbool_t x)
65 return SVE_ACLE_FUNC(svset4,_b8,,)(tuple, 3, x);