llvm/lib/Target/M68k/M68k.td

   1 //===-- M68k.td - Motorola 680x0 target definitions --------*- tablegen -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 ///
   9 /// \file
  10 /// This is a target description file for the Motorola 680x0 family, referred
  11 /// to here as the "M68k" architecture.
  12 ///
  13 //===----------------------------------------------------------------------===//
  14
  15 include "llvm/Target/Target.td"
  16
  17 //===----------------------------------------------------------------------===//
  18 // M68k Subtarget features
  19 //===----------------------------------------------------------------------===//
  20
  21 def FeatureISA00
  22   : SubtargetFeature<"isa-68000", "SubtargetKind", "M00",
  23                      "Is M68000 ISA supported">;
  24
  25 def FeatureISA10
  26   : SubtargetFeature<"isa-68010", "SubtargetKind", "M10",
  27                      "Is M68010 ISA supported",
  28                      [ FeatureISA00 ]>;
  29
  30 def FeatureISA20
  31   : SubtargetFeature<"isa-68020", "SubtargetKind", "M20",
  32                      "Is M68020 ISA supported",
  33                      [ FeatureISA10 ]>;
  34
  35 def FeatureISA30
  36   : SubtargetFeature<"isa-68030", "SubtargetKind", "M30",
  37                      "Is M68030 ISA supported",
  38                      [ FeatureISA20 ]>;
  39
  40 def FeatureISA40
  41   : SubtargetFeature<"isa-68040", "SubtargetKind", "M40",
  42                      "Is M68040 ISA supported",
  43                      [ FeatureISA30 ]>;
  44
  45 def FeatureISA60
  46   : SubtargetFeature<"isa-68060", "SubtargetKind", "M60",
  47                      "Is M68060 ISA supported",
  48                      [ FeatureISA40 ]>;
  49
  50 foreach i = {0-6} in
  51   def FeatureReserveA#i :
  52       SubtargetFeature<"reserve-a"#i, "UserReservedRegister[M68k::A"#i#"]",
  53                        "true", "Reserve A"#i#" register">;
  54 foreach i = {0-7} in
  55   def FeatureReserveD#i :
  56       SubtargetFeature<"reserve-d"#i, "UserReservedRegister[M68k::D"#i#"]",
  57                        "true", "Reserve D"#i#" register">;
  58
  59 //===----------------------------------------------------------------------===//
  60 // M68k processors supported.
  61 //===----------------------------------------------------------------------===//
  62
  63 include "M68kSchedule.td"
  64
  65 class Proc<string Name, list<SubtargetFeature> Features>
  66     : ProcessorModel<Name, GenericM68kModel, Features>;
  67
  68 def : Proc<"generic", [ FeatureISA00 ]>;
  69 def : Proc<"M68000",  [ FeatureISA00 ]>;
  70 def : Proc<"M68010",  [ FeatureISA10 ]>;
  71 def : Proc<"M68020",  [ FeatureISA20 ]>;
  72 def : Proc<"M68030",  [ FeatureISA30 ]>;
  73 def : Proc<"M68040",  [ FeatureISA40 ]>;
  74 def : Proc<"M68060",  [ FeatureISA60 ]>;
  75
  76 //===----------------------------------------------------------------------===//
  77 // Register File Description
  78 //===----------------------------------------------------------------------===//
  79
  80 include "M68kRegisterInfo.td"
  81 include "GISel/M68kRegisterBanks.td"
  82
  83 //===----------------------------------------------------------------------===//
  84 // Instruction Descriptions
  85 //===----------------------------------------------------------------------===//
  86
  87 include "M68kInstrInfo.td"
  88
  89 def M68kInstrInfo : InstrInfo;
  90
  91 //===----------------------------------------------------------------------===//
  92 // Calling Conventions
  93 //===----------------------------------------------------------------------===//
  94
  95 include "M68kCallingConv.td"
  96
  97 //===---------------------------------------------------------------------===//
  98 // Assembly Printers
  99 //===---------------------------------------------------------------------===//
 100
 101 def M68kAsmWriter : AsmWriter {
 102  string AsmWriterClassName = "InstPrinter";
 103  bit isMCAsmWriter = 1;
 104 }
 105
 106 //===---------------------------------------------------------------------===//
 107 // Assembly Parsers
 108 //===---------------------------------------------------------------------===//
 109
 110 def M68kAsmParser : AsmParser {
 111   let ShouldEmitMatchRegisterName = 0;
 112   let ShouldEmitMatchRegisterAltName = 0;
 113 }
 114
 115 def M68kAsmParserVariant : AsmParserVariant {
 116   int Variant = 0;
 117 }
 118
 119 //===----------------------------------------------------------------------===//
 120 // Target
 121 //===----------------------------------------------------------------------===//
 122
 123 def M68k : Target {
 124   let InstructionSet = M68kInstrInfo;
 125   let AssemblyParsers = [M68kAsmParser];
 126   let AssemblyWriters = [M68kAsmWriter];
 127 }