| blob | ed84ec2ba9eaeb4c93d9865286f4b256db5f8a5d |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc --mattr=+sve -aarch64-enable-sink-fold=true < %s -mtriple aarch64-apple-darwin | FileCheck %s
3 ; RUN: llc --mattr=+sve -aarch64-enable-sink-fold=true < %s -mtriple aarch64_be-unknown-unknown | FileCheck --check-prefix CHECK-BE %s
5 define <4 x double> @test_ldnp_v4f64(ptr %A) {
6 ; CHECK-LABEL: test_ldnp_v4f64:
7 ; CHECK: ; %bb.0:
8 ; CHECK-NEXT: ldnp q0, q1, [x0]
9 ; CHECK-NEXT: ret
10 ;
11 ; CHECK-BE-LABEL: test_ldnp_v4f64:
12 ; CHECK-BE: // %bb.0:
13 ; CHECK-BE-NEXT: ldp q0, q1, [x0]
14 ; CHECK-BE-NEXT: ret
15 %lv = load <4 x double>, ptr %A, align 8, !nontemporal !0
16 ret <4 x double> %lv
17 }
19 define <4 x i64> @test_ldnp_v4i64(ptr %A) {
20 ; CHECK-LABEL: test_ldnp_v4i64:
21 ; CHECK: ; %bb.0:
22 ; CHECK-NEXT: ldnp q0, q1, [x0]
23 ; CHECK-NEXT: ret
24 ;
25 ; CHECK-BE-LABEL: test_ldnp_v4i64:
26 ; CHECK-BE: // %bb.0:
27 ; CHECK-BE-NEXT: ldp q0, q1, [x0]
28 ; CHECK-BE-NEXT: ret
29 %lv = load <4 x i64>, ptr %A, align 8, !nontemporal !0
30 ret <4 x i64> %lv
31 }
33 define <8 x i32> @test_ldnp_v8i32(ptr %A) {
34 ; CHECK-LABEL: test_ldnp_v8i32:
35 ; CHECK: ; %bb.0:
36 ; CHECK-NEXT: ldnp q0, q1, [x0]
37 ; CHECK-NEXT: ret
38 ;
39 ; CHECK-BE-LABEL: test_ldnp_v8i32:
40 ; CHECK-BE: // %bb.0:
41 ; CHECK-BE-NEXT: ldp q0, q1, [x0]
42 ; CHECK-BE-NEXT: ret
43 %lv = load <8 x i32>, ptr %A, align 8, !nontemporal !0
44 ret <8 x i32> %lv
45 }
47 define <8 x float> @test_ldnp_v8f32(ptr %A) {
48 ; CHECK-LABEL: test_ldnp_v8f32:
49 ; CHECK: ; %bb.0:
50 ; CHECK-NEXT: ldnp q0, q1, [x0]
51 ; CHECK-NEXT: ret
52 ;
53 ; CHECK-BE-LABEL: test_ldnp_v8f32:
54 ; CHECK-BE: // %bb.0:
55 ; CHECK-BE-NEXT: ldp q0, q1, [x0]
56 ; CHECK-BE-NEXT: ret
57 %lv = load <8 x float>, ptr %A, align 8, !nontemporal !0
58 ret <8 x float> %lv
59 }
61 define <16 x i16> @test_ldnp_v16i16(ptr %A) {
62 ; CHECK-LABEL: test_ldnp_v16i16:
63 ; CHECK: ; %bb.0:
64 ; CHECK-NEXT: ldnp q0, q1, [x0]
65 ; CHECK-NEXT: ret
66 ;
67 ; CHECK-BE-LABEL: test_ldnp_v16i16:
68 ; CHECK-BE: // %bb.0:
69 ; CHECK-BE-NEXT: ldp q0, q1, [x0]
70 ; CHECK-BE-NEXT: ret
71 %lv = load <16 x i16>, ptr %A, align 8, !nontemporal !0
72 ret <16 x i16> %lv
73 }
75 define <16 x half> @test_ldnp_v16f16(ptr %A) {
76 ; CHECK-LABEL: test_ldnp_v16f16:
77 ; CHECK: ; %bb.0:
78 ; CHECK-NEXT: ldnp q0, q1, [x0]
79 ; CHECK-NEXT: ret
80 ;
81 ; CHECK-BE-LABEL: test_ldnp_v16f16:
82 ; CHECK-BE: // %bb.0:
83 ; CHECK-BE-NEXT: ldp q0, q1, [x0]
84 ; CHECK-BE-NEXT: ret
85 %lv = load <16 x half>, ptr %A, align 8, !nontemporal !0
86 ret <16 x half> %lv
87 }
89 define <32 x i8> @test_ldnp_v32i8(ptr %A) {
90 ; CHECK-LABEL: test_ldnp_v32i8:
91 ; CHECK: ; %bb.0:
92 ; CHECK-NEXT: ldnp q0, q1, [x0]
93 ; CHECK-NEXT: ret
94 ;
95 ; CHECK-BE-LABEL: test_ldnp_v32i8:
96 ; CHECK-BE: // %bb.0:
97 ; CHECK-BE-NEXT: ldp q0, q1, [x0]
98 ; CHECK-BE-NEXT: ret
99 %lv = load <32 x i8>, ptr %A, align 8, !nontemporal !0
100 ret <32 x i8> %lv
101 }
103 define <4 x i32> @test_ldnp_v4i32(ptr %A) {
104 ; CHECK-LABEL: test_ldnp_v4i32:
105 ; CHECK: ; %bb.0:
106 ; CHECK-NEXT: ldr q0, [x0]
107 ; CHECK-NEXT: ret
108 ;
109 ; CHECK-BE-LABEL: test_ldnp_v4i32:
110 ; CHECK-BE: // %bb.0:
111 ; CHECK-BE-NEXT: ldr q0, [x0]
112 ; CHECK-BE-NEXT: ret
113 %lv = load<4 x i32>, ptr %A, align 8, !nontemporal !0
114 ret <4 x i32> %lv
115 }
117 define <4 x float> @test_ldnp_v4f32(ptr %A) {
118 ; CHECK-LABEL: test_ldnp_v4f32:
119 ; CHECK: ; %bb.0:
120 ; CHECK-NEXT: ldr q0, [x0]
121 ; CHECK-NEXT: ret
122 ;
123 ; CHECK-BE-LABEL: test_ldnp_v4f32:
124 ; CHECK-BE: // %bb.0:
125 ; CHECK-BE-NEXT: ldr q0, [x0]
126 ; CHECK-BE-NEXT: ret
127 %lv = load<4 x float>, ptr %A, align 8, !nontemporal !0
128 ret <4 x float> %lv
129 }
131 define <8 x i16> @test_ldnp_v8i16(ptr %A) {
132 ; CHECK-LABEL: test_ldnp_v8i16:
133 ; CHECK: ; %bb.0:
134 ; CHECK-NEXT: ldr q0, [x0]
135 ; CHECK-NEXT: ret
136 ;
137 ; CHECK-BE-LABEL: test_ldnp_v8i16:
138 ; CHECK-BE: // %bb.0:
139 ; CHECK-BE-NEXT: ldr q0, [x0]
140 ; CHECK-BE-NEXT: ret
141 %lv = load <8 x i16>, ptr %A, align 8, !nontemporal !0
142 ret <8 x i16> %lv
143 }
145 define <16 x i8> @test_ldnp_v16i8(ptr %A) {
146 ; CHECK-LABEL: test_ldnp_v16i8:
147 ; CHECK: ; %bb.0:
148 ; CHECK-NEXT: ldr q0, [x0]
149 ; CHECK-NEXT: ret
150 ;
151 ; CHECK-BE-LABEL: test_ldnp_v16i8:
152 ; CHECK-BE: // %bb.0:
153 ; CHECK-BE-NEXT: ldr q0, [x0]
154 ; CHECK-BE-NEXT: ret
155 %lv = load <16 x i8>, ptr %A, align 8, !nontemporal !0
156 ret <16 x i8> %lv
157 }
158 define <2 x double> @test_ldnp_v2f64(ptr %A) {
159 ; CHECK-LABEL: test_ldnp_v2f64:
160 ; CHECK: ; %bb.0:
161 ; CHECK-NEXT: ldr q0, [x0]
162 ; CHECK-NEXT: ret
163 ;
164 ; CHECK-BE-LABEL: test_ldnp_v2f64:
165 ; CHECK-BE: // %bb.0:
166 ; CHECK-BE-NEXT: ldr q0, [x0]
167 ; CHECK-BE-NEXT: ret
168 %lv = load <2 x double>, ptr %A, align 8, !nontemporal !0
169 ret <2 x double> %lv
170 }
172 define <2 x i32> @test_ldnp_v2i32(ptr %A) {
173 ; CHECK-LABEL: test_ldnp_v2i32:
174 ; CHECK: ; %bb.0:
175 ; CHECK-NEXT: ldr d0, [x0]
176 ; CHECK-NEXT: ret
177 ;
178 ; CHECK-BE-LABEL: test_ldnp_v2i32:
179 ; CHECK-BE: // %bb.0:
180 ; CHECK-BE-NEXT: ldr d0, [x0]
181 ; CHECK-BE-NEXT: ret
182 %lv = load <2 x i32>, ptr %A, align 8, !nontemporal !0
183 ret <2 x i32> %lv
184 }
186 define <2 x float> @test_ldnp_v2f32(ptr %A) {
187 ; CHECK-LABEL: test_ldnp_v2f32:
188 ; CHECK: ; %bb.0:
189 ; CHECK-NEXT: ldr d0, [x0]
190 ; CHECK-NEXT: ret
191 ;
192 ; CHECK-BE-LABEL: test_ldnp_v2f32:
193 ; CHECK-BE: // %bb.0:
194 ; CHECK-BE-NEXT: ldr d0, [x0]
195 ; CHECK-BE-NEXT: ret
196 %lv = load <2 x float>, ptr %A, align 8, !nontemporal !0
197 ret <2 x float> %lv
198 }
200 define <4 x i16> @test_ldnp_v4i16(ptr %A) {
201 ; CHECK-LABEL: test_ldnp_v4i16:
202 ; CHECK: ; %bb.0:
203 ; CHECK-NEXT: ldr d0, [x0]
204 ; CHECK-NEXT: ret
205 ;
206 ; CHECK-BE-LABEL: test_ldnp_v4i16:
207 ; CHECK-BE: // %bb.0:
208 ; CHECK-BE-NEXT: ldr d0, [x0]
209 ; CHECK-BE-NEXT: ret
210 %lv = load <4 x i16>, ptr %A, align 8, !nontemporal !0
211 ret <4 x i16> %lv
212 }
214 define <8 x i8> @test_ldnp_v8i8(ptr %A) {
215 ; CHECK-LABEL: test_ldnp_v8i8:
216 ; CHECK: ; %bb.0:
217 ; CHECK-NEXT: ldr d0, [x0]
218 ; CHECK-NEXT: ret
219 ;
220 ; CHECK-BE-LABEL: test_ldnp_v8i8:
221 ; CHECK-BE: // %bb.0:
222 ; CHECK-BE-NEXT: ldr d0, [x0]
223 ; CHECK-BE-NEXT: ret
224 %lv = load <8 x i8>, ptr %A, align 8, !nontemporal !0
225 ret <8 x i8> %lv
226 }
228 define <1 x double> @test_ldnp_v1f64(ptr %A) {
229 ; CHECK-LABEL: test_ldnp_v1f64:
230 ; CHECK: ; %bb.0:
231 ; CHECK-NEXT: ldr d0, [x0]
232 ; CHECK-NEXT: ret
233 ;
234 ; CHECK-BE-LABEL: test_ldnp_v1f64:
235 ; CHECK-BE: // %bb.0:
236 ; CHECK-BE-NEXT: ldr d0, [x0]
237 ; CHECK-BE-NEXT: ret
238 %lv = load <1 x double>, ptr %A, align 8, !nontemporal !0
239 ret <1 x double> %lv
240 }
242 define <1 x i64> @test_ldnp_v1i64(ptr %A) {
243 ; CHECK-LABEL: test_ldnp_v1i64:
244 ; CHECK: ; %bb.0:
245 ; CHECK-NEXT: ldr d0, [x0]
246 ; CHECK-NEXT: ret
247 ;
248 ; CHECK-BE-LABEL: test_ldnp_v1i64:
249 ; CHECK-BE: // %bb.0:
250 ; CHECK-BE-NEXT: ldr d0, [x0]
251 ; CHECK-BE-NEXT: ret
252 %lv = load <1 x i64>, ptr %A, align 8, !nontemporal !0
253 ret <1 x i64> %lv
254 }
256 define <32 x i16> @test_ldnp_v32i16(ptr %A) {
257 ; CHECK-LABEL: test_ldnp_v32i16:
258 ; CHECK: ; %bb.0:
259 ; CHECK-NEXT: ldnp q0, q1, [x0]
260 ; CHECK-NEXT: ldnp q2, q3, [x0, #32]
261 ; CHECK-NEXT: ret
262 ;
263 ; CHECK-BE-LABEL: test_ldnp_v32i16:
264 ; CHECK-BE: // %bb.0:
265 ; CHECK-BE-NEXT: ldp q0, q1, [x0]
266 ; CHECK-BE-NEXT: ldp q2, q3, [x0, #32]
267 ; CHECK-BE-NEXT: ret
268 %lv = load <32 x i16>, ptr %A, align 8, !nontemporal !0
269 ret <32 x i16> %lv
270 }
272 define <32 x half> @test_ldnp_v32f16(ptr %A) {
273 ; CHECK-LABEL: test_ldnp_v32f16:
274 ; CHECK: ; %bb.0:
275 ; CHECK-NEXT: ldnp q0, q1, [x0]
276 ; CHECK-NEXT: ldnp q2, q3, [x0, #32]
277 ; CHECK-NEXT: ret
278 ;
279 ; CHECK-BE-LABEL: test_ldnp_v32f16:
280 ; CHECK-BE: // %bb.0:
281 ; CHECK-BE-NEXT: ldp q0, q1, [x0]
282 ; CHECK-BE-NEXT: ldp q2, q3, [x0, #32]
283 ; CHECK-BE-NEXT: ret
284 %lv = load <32 x half>, ptr %A, align 8, !nontemporal !0
285 ret <32 x half> %lv
286 }
288 define <16 x i32> @test_ldnp_v16i32(ptr %A) {
289 ; CHECK-LABEL: test_ldnp_v16i32:
290 ; CHECK: ; %bb.0:
291 ; CHECK-NEXT: ldnp q0, q1, [x0]
292 ; CHECK-NEXT: ldnp q2, q3, [x0, #32]
293 ; CHECK-NEXT: ret
294 ;
295 ; CHECK-BE-LABEL: test_ldnp_v16i32:
296 ; CHECK-BE: // %bb.0:
297 ; CHECK-BE-NEXT: ldp q0, q1, [x0]
298 ; CHECK-BE-NEXT: ldp q2, q3, [x0, #32]
299 ; CHECK-BE-NEXT: ret
300 %lv = load <16 x i32>, ptr %A, align 8, !nontemporal !0
301 ret <16 x i32> %lv
302 }
304 define <16 x float> @test_ldnp_v16f32(ptr %A) {
305 ; CHECK-LABEL: test_ldnp_v16f32:
306 ; CHECK: ; %bb.0:
307 ; CHECK-NEXT: ldnp q0, q1, [x0]
308 ; CHECK-NEXT: ldnp q2, q3, [x0, #32]
309 ; CHECK-NEXT: ret
310 ;
311 ; CHECK-BE-LABEL: test_ldnp_v16f32:
312 ; CHECK-BE: // %bb.0:
313 ; CHECK-BE-NEXT: ldp q0, q1, [x0]
314 ; CHECK-BE-NEXT: ldp q2, q3, [x0, #32]
315 ; CHECK-BE-NEXT: ret
316 %lv = load <16 x float>, ptr %A, align 8, !nontemporal !0
317 ret <16 x float> %lv
318 }
320 define <17 x float> @test_ldnp_v17f32(ptr %A) {
321 ; CHECK-LABEL: test_ldnp_v17f32:
322 ; CHECK: ; %bb.0:
323 ; CHECK-NEXT: ldnp q0, q1, [x0, #32]
324 ; CHECK-NEXT: ldr s2, [x0, #64]
325 ; CHECK-NEXT: ldnp q3, q4, [x0]
326 ; CHECK-NEXT: stp q0, q1, [x8, #32]
327 ; CHECK-NEXT: stp q3, q4, [x8]
328 ; CHECK-NEXT: str s2, [x8, #64]
329 ; CHECK-NEXT: ret
330 ;
331 ; CHECK-BE-LABEL: test_ldnp_v17f32:
332 ; CHECK-BE: // %bb.0:
333 ; CHECK-BE-NEXT: add x9, x0, #48
334 ; CHECK-BE-NEXT: ld1 { v0.4s }, [x0]
335 ; CHECK-BE-NEXT: add x10, x0, #32
336 ; CHECK-BE-NEXT: ld1 { v2.4s }, [x9]
337 ; CHECK-BE-NEXT: add x9, x0, #16
338 ; CHECK-BE-NEXT: ldr s1, [x0, #64]
339 ; CHECK-BE-NEXT: ld1 { v3.4s }, [x9]
340 ; CHECK-BE-NEXT: ld1 { v4.4s }, [x10]
341 ; CHECK-BE-NEXT: add x9, x8, #48
342 ; CHECK-BE-NEXT: str s1, [x8, #64]
343 ; CHECK-BE-NEXT: add x10, x8, #32
344 ; CHECK-BE-NEXT: st1 { v0.4s }, [x8]
345 ; CHECK-BE-NEXT: add x8, x8, #16
346 ; CHECK-BE-NEXT: st1 { v2.4s }, [x9]
347 ; CHECK-BE-NEXT: st1 { v4.4s }, [x10]
348 ; CHECK-BE-NEXT: st1 { v3.4s }, [x8]
349 ; CHECK-BE-NEXT: ret
350 %lv = load <17 x float>, ptr %A, align 8, !nontemporal !0
351 ret <17 x float> %lv
352 }
354 define <33 x double> @test_ldnp_v33f64(ptr %A) {
355 ; CHECK-LABEL: test_ldnp_v33f64:
356 ; CHECK: ; %bb.0:
357 ; CHECK-NEXT: ldnp q0, q1, [x0]
358 ; CHECK-NEXT: ldr d20, [x0, #256]
359 ; CHECK-NEXT: ldnp q2, q3, [x0, #32]
360 ; CHECK-NEXT: ldnp q4, q5, [x0, #64]
361 ; CHECK-NEXT: ldnp q6, q7, [x0, #96]
362 ; CHECK-NEXT: ldnp q16, q17, [x0, #128]
363 ; CHECK-NEXT: ldnp q18, q19, [x0, #224]
364 ; CHECK-NEXT: ldnp q21, q22, [x0, #160]
365 ; CHECK-NEXT: ldnp q23, q24, [x0, #192]
366 ; CHECK-NEXT: stp q0, q1, [x8]
367 ; CHECK-NEXT: stp q2, q3, [x8, #32]
368 ; CHECK-NEXT: stp q4, q5, [x8, #64]
369 ; CHECK-NEXT: stp q6, q7, [x8, #96]
370 ; CHECK-NEXT: stp q16, q17, [x8, #128]
371 ; CHECK-NEXT: stp q21, q22, [x8, #160]
372 ; CHECK-NEXT: stp q23, q24, [x8, #192]
373 ; CHECK-NEXT: stp q18, q19, [x8, #224]
374 ; CHECK-NEXT: str d20, [x8, #256]
375 ; CHECK-NEXT: ret
376 ;
377 ; CHECK-BE-LABEL: test_ldnp_v33f64:
378 ; CHECK-BE: // %bb.0:
379 ; CHECK-BE-NEXT: add x9, x0, #16
380 ; CHECK-BE-NEXT: add x10, x0, #32
381 ; CHECK-BE-NEXT: add x11, x0, #48
382 ; CHECK-BE-NEXT: ld1 { v0.2d }, [x9]
383 ; CHECK-BE-NEXT: add x9, x0, #64
384 ; CHECK-BE-NEXT: ld1 { v1.2d }, [x10]
385 ; CHECK-BE-NEXT: add x10, x0, #80
386 ; CHECK-BE-NEXT: ld1 { v3.2d }, [x9]
387 ; CHECK-BE-NEXT: add x9, x0, #112
388 ; CHECK-BE-NEXT: ld1 { v4.2d }, [x10]
389 ; CHECK-BE-NEXT: add x10, x0, #128
390 ; CHECK-BE-NEXT: ld1 { v6.2d }, [x9]
391 ; CHECK-BE-NEXT: add x9, x0, #160
392 ; CHECK-BE-NEXT: ld1 { v7.2d }, [x10]
393 ; CHECK-BE-NEXT: add x10, x0, #176
394 ; CHECK-BE-NEXT: ld1 { v17.2d }, [x9]
395 ; CHECK-BE-NEXT: add x9, x0, #240
396 ; CHECK-BE-NEXT: ld1 { v2.2d }, [x11]
397 ; CHECK-BE-NEXT: add x11, x0, #96
398 ; CHECK-BE-NEXT: ld1 { v18.2d }, [x10]
399 ; CHECK-BE-NEXT: ld1 { v20.2d }, [x0]
400 ; CHECK-BE-NEXT: ld1 { v22.2d }, [x9]
401 ; CHECK-BE-NEXT: add x10, x0, #224
402 ; CHECK-BE-NEXT: ld1 { v5.2d }, [x11]
403 ; CHECK-BE-NEXT: add x11, x0, #144
404 ; CHECK-BE-NEXT: ldr d21, [x0, #256]
405 ; CHECK-BE-NEXT: add x9, x0, #208
406 ; CHECK-BE-NEXT: ld1 { v24.2d }, [x10]
407 ; CHECK-BE-NEXT: ld1 { v16.2d }, [x11]
408 ; CHECK-BE-NEXT: add x11, x0, #192
409 ; CHECK-BE-NEXT: ld1 { v23.2d }, [x9]
410 ; CHECK-BE-NEXT: add x9, x8, #240
411 ; CHECK-BE-NEXT: ld1 { v19.2d }, [x11]
412 ; CHECK-BE-NEXT: str d21, [x8, #256]
413 ; CHECK-BE-NEXT: st1 { v20.2d }, [x8]
414 ; CHECK-BE-NEXT: st1 { v22.2d }, [x9]
415 ; CHECK-BE-NEXT: add x9, x8, #224
416 ; CHECK-BE-NEXT: st1 { v24.2d }, [x9]
417 ; CHECK-BE-NEXT: add x9, x8, #208
418 ; CHECK-BE-NEXT: st1 { v23.2d }, [x9]
419 ; CHECK-BE-NEXT: add x9, x8, #192
420 ; CHECK-BE-NEXT: st1 { v19.2d }, [x9]
421 ; CHECK-BE-NEXT: add x9, x8, #176
422 ; CHECK-BE-NEXT: st1 { v18.2d }, [x9]
423 ; CHECK-BE-NEXT: add x9, x8, #160
424 ; CHECK-BE-NEXT: st1 { v17.2d }, [x9]
425 ; CHECK-BE-NEXT: add x9, x8, #144
426 ; CHECK-BE-NEXT: st1 { v16.2d }, [x9]
427 ; CHECK-BE-NEXT: add x9, x8, #128
428 ; CHECK-BE-NEXT: st1 { v7.2d }, [x9]
429 ; CHECK-BE-NEXT: add x9, x8, #112
430 ; CHECK-BE-NEXT: st1 { v6.2d }, [x9]
431 ; CHECK-BE-NEXT: add x9, x8, #96
432 ; CHECK-BE-NEXT: st1 { v5.2d }, [x9]
433 ; CHECK-BE-NEXT: add x9, x8, #80
434 ; CHECK-BE-NEXT: st1 { v4.2d }, [x9]
435 ; CHECK-BE-NEXT: add x9, x8, #64
436 ; CHECK-BE-NEXT: st1 { v3.2d }, [x9]
437 ; CHECK-BE-NEXT: add x9, x8, #48
438 ; CHECK-BE-NEXT: st1 { v2.2d }, [x9]
439 ; CHECK-BE-NEXT: add x9, x8, #32
440 ; CHECK-BE-NEXT: add x8, x8, #16
441 ; CHECK-BE-NEXT: st1 { v1.2d }, [x9]
442 ; CHECK-BE-NEXT: st1 { v0.2d }, [x8]
443 ; CHECK-BE-NEXT: ret
444 %lv = load <33 x double>, ptr %A, align 8, !nontemporal !0
445 ret <33 x double> %lv
446 }
448 define <33 x i8> @test_ldnp_v33i8(ptr %A) {
449 ; CHECK-LABEL: test_ldnp_v33i8:
450 ; CHECK: ; %bb.0:
451 ; CHECK-NEXT: ldnp q0, q1, [x0]
452 ; CHECK-NEXT: add x9, x8, #32
453 ; CHECK-NEXT: ldr b2, [x0, #32]
454 ; CHECK-NEXT: stp q0, q1, [x8]
455 ; CHECK-NEXT: st1.b { v2 }[0], [x9]
456 ; CHECK-NEXT: ret
457 ;
458 ; CHECK-BE-LABEL: test_ldnp_v33i8:
459 ; CHECK-BE: // %bb.0:
460 ; CHECK-BE-NEXT: add x9, x0, #16
461 ; CHECK-BE-NEXT: ld1 { v0.16b }, [x0]
462 ; CHECK-BE-NEXT: ldrb w10, [x0, #32]
463 ; CHECK-BE-NEXT: ld1 { v1.16b }, [x9]
464 ; CHECK-BE-NEXT: strb w10, [x8, #32]
465 ; CHECK-BE-NEXT: st1 { v0.16b }, [x8]
466 ; CHECK-BE-NEXT: add x8, x8, #16
467 ; CHECK-BE-NEXT: st1 { v1.16b }, [x8]
468 ; CHECK-BE-NEXT: ret
469 %lv = load<33 x i8>, ptr %A, align 8, !nontemporal !0
470 ret <33 x i8> %lv
471 }
473 define <4 x i65> @test_ldnp_v4i65(ptr %A) {
474 ; CHECK-LABEL: test_ldnp_v4i65:
475 ; CHECK: ; %bb.0:
476 ; CHECK-NEXT: ldp x8, x9, [x0, #16]
477 ; CHECK-NEXT: ldrb w11, [x0, #32]
478 ; CHECK-NEXT: ldp x0, x10, [x0]
479 ; CHECK-NEXT: ubfx x7, x11, #3, #1
480 ; CHECK-NEXT: extr x4, x9, x8, #2
481 ; CHECK-NEXT: extr x6, x11, x9, #3
482 ; CHECK-NEXT: ubfx x3, x8, #1, #1
483 ; CHECK-NEXT: extr x2, x8, x10, #1
484 ; CHECK-NEXT: ubfx x5, x9, #2, #1
485 ; CHECK-NEXT: and x1, x10, #0x1
486 ; CHECK-NEXT: ret
487 ;
488 ; CHECK-BE-LABEL: test_ldnp_v4i65:
489 ; CHECK-BE: // %bb.0:
490 ; CHECK-BE-NEXT: ldp x9, x8, [x0]
491 ; CHECK-BE-NEXT: ldrb w12, [x0, #32]
492 ; CHECK-BE-NEXT: ldp x10, x11, [x0, #16]
493 ; CHECK-BE-NEXT: extr x13, x9, x8, #56
494 ; CHECK-BE-NEXT: lsr x14, x9, #56
495 ; CHECK-BE-NEXT: lsr x16, x8, #56
496 ; CHECK-BE-NEXT: extr x15, x8, x10, #56
497 ; CHECK-BE-NEXT: orr x7, x12, x11, lsl #8
498 ; CHECK-BE-NEXT: extr x11, x10, x11, #56
499 ; CHECK-BE-NEXT: lsr x12, x10, #56
500 ; CHECK-BE-NEXT: extr x1, x14, x13, #3
501 ; CHECK-BE-NEXT: lsr x0, x9, #59
502 ; CHECK-BE-NEXT: ubfx x2, x8, #58, #1
503 ; CHECK-BE-NEXT: ubfx x4, x10, #57, #1
504 ; CHECK-BE-NEXT: extr x3, x16, x15, #2
505 ; CHECK-BE-NEXT: extr x5, x12, x11, #1
506 ; CHECK-BE-NEXT: and x6, x11, #0x1
507 ; CHECK-BE-NEXT: ret
508 %lv = load <4 x i65>, ptr %A, align 8, !nontemporal !0
509 ret <4 x i65> %lv
510 }
512 define <4 x i63> @test_ldnp_v4i63(ptr %A) {
513 ; CHECK-LABEL: test_ldnp_v4i63:
514 ; CHECK: ; %bb.0:
515 ; CHECK-NEXT: ldp x8, x9, [x0, #16]
516 ; CHECK-NEXT: ldp x10, x11, [x0]
517 ; CHECK-NEXT: extr x3, x9, x8, #61
518 ; CHECK-NEXT: extr x9, x11, x10, #63
519 ; CHECK-NEXT: extr x8, x8, x11, #62
520 ; CHECK-NEXT: and x0, x10, #0x7fffffffffffffff
521 ; CHECK-NEXT: and x1, x9, #0x7fffffffffffffff
522 ; CHECK-NEXT: and x2, x8, #0x7fffffffffffffff
523 ; CHECK-NEXT: ret
524 ;
525 ; CHECK-BE-LABEL: test_ldnp_v4i63:
526 ; CHECK-BE: // %bb.0:
527 ; CHECK-BE-NEXT: ldp x9, x8, [x0, #8]
528 ; CHECK-BE-NEXT: ldr x11, [x0, #24]
529 ; CHECK-BE-NEXT: ldr x10, [x0]
530 ; CHECK-BE-NEXT: and x3, x11, #0x7fffffffffffffff
531 ; CHECK-BE-NEXT: extr x12, x9, x8, #62
532 ; CHECK-BE-NEXT: extr x8, x8, x11, #63
533 ; CHECK-BE-NEXT: extr x0, x10, x9, #61
534 ; CHECK-BE-NEXT: and x1, x12, #0x7fffffffffffffff
535 ; CHECK-BE-NEXT: and x2, x8, #0x7fffffffffffffff
536 ; CHECK-BE-NEXT: ret
537 %lv = load <4 x i63>, ptr %A, align 8, !nontemporal !0
538 ret <4 x i63> %lv
539 }
541 define <5 x double> @test_ldnp_v5f64(ptr %A) {
542 ; CHECK-LABEL: test_ldnp_v5f64:
543 ; CHECK: ; %bb.0:
544 ; CHECK-NEXT: ldnp q0, q2, [x0]
545 ; CHECK-NEXT: ldr d4, [x0, #32]
546 ; CHECK-NEXT: ext.16b v1, v0, v0, #8
547 ; CHECK-NEXT: ext.16b v3, v2, v2, #8
548 ; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0
549 ; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q2
550 ; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q1
551 ; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q3
552 ; CHECK-NEXT: ret
553 ;
554 ; CHECK-BE-LABEL: test_ldnp_v5f64:
555 ; CHECK-BE: // %bb.0:
556 ; CHECK-BE-NEXT: add x8, x0, #16
557 ; CHECK-BE-NEXT: ld1 { v0.2d }, [x0]
558 ; CHECK-BE-NEXT: ldr d4, [x0, #32]
559 ; CHECK-BE-NEXT: ld1 { v2.2d }, [x8]
560 ; CHECK-BE-NEXT: // kill: def $d4 killed $d4 killed $q4
561 ; CHECK-BE-NEXT: ext v1.16b, v0.16b, v0.16b, #8
562 ; CHECK-BE-NEXT: // kill: def $d0 killed $d0 killed $q0
563 ; CHECK-BE-NEXT: ext v3.16b, v2.16b, v2.16b, #8
564 ; CHECK-BE-NEXT: // kill: def $d1 killed $d1 killed $q1
565 ; CHECK-BE-NEXT: // kill: def $d2 killed $d2 killed $q2
566 ; CHECK-BE-NEXT: // kill: def $d3 killed $d3 killed $q3
567 ; CHECK-BE-NEXT: ret
568 %lv = load<5 x double>, ptr %A, align 8, !nontemporal !0
569 ret <5 x double> %lv
570 }
572 define <16 x i64> @test_ldnp_v16i64(ptr %A) {
573 ; CHECK-LABEL: test_ldnp_v16i64:
574 ; CHECK: ; %bb.0:
575 ; CHECK-NEXT: ldnp q0, q1, [x0]
576 ; CHECK-NEXT: ldnp q2, q3, [x0, #32]
577 ; CHECK-NEXT: ldnp q4, q5, [x0, #64]
578 ; CHECK-NEXT: ldnp q6, q7, [x0, #96]
579 ; CHECK-NEXT: ret
580 ;
581 ; CHECK-BE-LABEL: test_ldnp_v16i64:
582 ; CHECK-BE: // %bb.0:
583 ; CHECK-BE-NEXT: ldp q0, q1, [x0]
584 ; CHECK-BE-NEXT: ldp q2, q3, [x0, #32]
585 ; CHECK-BE-NEXT: ldp q4, q5, [x0, #64]
586 ; CHECK-BE-NEXT: ldp q6, q7, [x0, #96]
587 ; CHECK-BE-NEXT: ret
588 %lv = load <16 x i64>, ptr %A, align 8, !nontemporal !0
589 ret <16 x i64> %lv
590 }
592 define <16 x double> @test_ldnp_v16f64(ptr %A) {
593 ; CHECK-LABEL: test_ldnp_v16f64:
594 ; CHECK: ; %bb.0:
595 ; CHECK-NEXT: ldnp q0, q1, [x0]
596 ; CHECK-NEXT: ldnp q2, q3, [x0, #32]
597 ; CHECK-NEXT: ldnp q4, q5, [x0, #64]
598 ; CHECK-NEXT: ldnp q6, q7, [x0, #96]
599 ; CHECK-NEXT: ret
600 ;
601 ; CHECK-BE-LABEL: test_ldnp_v16f64:
602 ; CHECK-BE: // %bb.0:
603 ; CHECK-BE-NEXT: ldp q0, q1, [x0]
604 ; CHECK-BE-NEXT: ldp q2, q3, [x0, #32]
605 ; CHECK-BE-NEXT: ldp q4, q5, [x0, #64]
606 ; CHECK-BE-NEXT: ldp q6, q7, [x0, #96]
607 ; CHECK-BE-NEXT: ret
608 %lv = load <16 x double>, ptr %A, align 8, !nontemporal !0
609 ret <16 x double> %lv
610 }
612 define <vscale x 20 x float> @test_ldnp_v20f32_vscale(ptr %A) {
613 ; CHECK-LABEL: test_ldnp_v20f32_vscale:
614 ; CHECK: ; %bb.0:
615 ; CHECK-NEXT: ptrue p0.s
616 ; CHECK-NEXT: ld1w { z0.s }, p0/z, [x0]
617 ; CHECK-NEXT: ld1w { z1.s }, p0/z, [x0, #1, mul vl]
618 ; CHECK-NEXT: ld1w { z2.s }, p0/z, [x0, #2, mul vl]
619 ; CHECK-NEXT: ld1w { z3.s }, p0/z, [x0, #3, mul vl]
620 ; CHECK-NEXT: ld1w { z4.s }, p0/z, [x0, #4, mul vl]
621 ; CHECK-NEXT: ret
622 ;
623 ; CHECK-BE-LABEL: test_ldnp_v20f32_vscale:
624 ; CHECK-BE: // %bb.0:
625 ; CHECK-BE-NEXT: ptrue p0.s
626 ; CHECK-BE-NEXT: ld1w { z0.s }, p0/z, [x0]
627 ; CHECK-BE-NEXT: ld1w { z1.s }, p0/z, [x0, #1, mul vl]
628 ; CHECK-BE-NEXT: ld1w { z2.s }, p0/z, [x0, #2, mul vl]
629 ; CHECK-BE-NEXT: ld1w { z3.s }, p0/z, [x0, #3, mul vl]
630 ; CHECK-BE-NEXT: ld1w { z4.s }, p0/z, [x0, #4, mul vl]
631 ; CHECK-BE-NEXT: ret
632 %lv = load<vscale x 20 x float>, ptr %A, align 8, !nontemporal !0
633 ret <vscale x 20 x float> %lv
634 }
636 !0 = !{i32 1}