| blob | 7d37d91ee21b5521d7a42f638d7affae30760894 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
2 ; RUN: llc < %s -mtriple=riscv32 -mattr=+v,+zvfh -verify-machineinstrs | FileCheck %s -check-prefixes=CHECK,RV32
3 ; RUN: llc < %s -mtriple=riscv64 -mattr=+v,+zvfh -verify-machineinstrs | FileCheck %s -check-prefixes=CHECK,RV64
5 define <vscale x 16 x i1> @match_nxv16i8_v1i8(<vscale x 16 x i8> %op1, <1 x i8> %op2, <vscale x 16 x i1> %mask) {
6 ; CHECK-LABEL: match_nxv16i8_v1i8:
7 ; CHECK: # %bb.0:
8 ; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma
9 ; CHECK-NEXT: vrgather.vi v12, v10, 0
10 ; CHECK-NEXT: vmseq.vv v10, v8, v12
11 ; CHECK-NEXT: vmand.mm v0, v10, v0
12 ; CHECK-NEXT: ret
13 %r = tail call <vscale x 16 x i1> @llvm.experimental.vector.match(<vscale x 16 x i8> %op1, <1 x i8> %op2, <vscale x 16 x i1> %mask)
14 ret <vscale x 16 x i1> %r
15 }
17 define <vscale x 16 x i1> @match_nxv16i8_v2i8(<vscale x 16 x i8> %op1, <2 x i8> %op2, <vscale x 16 x i1> %mask) {
18 ; CHECK-LABEL: match_nxv16i8_v2i8:
19 ; CHECK: # %bb.0:
20 ; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma
21 ; CHECK-NEXT: vrgather.vi v12, v10, 1
22 ; CHECK-NEXT: vmseq.vv v14, v8, v12
23 ; CHECK-NEXT: vrgather.vi v12, v10, 0
24 ; CHECK-NEXT: vmseq.vv v10, v8, v12
25 ; CHECK-NEXT: vmor.mm v8, v10, v14
26 ; CHECK-NEXT: vmand.mm v0, v8, v0
27 ; CHECK-NEXT: ret
28 %r = tail call <vscale x 16 x i1> @llvm.experimental.vector.match(<vscale x 16 x i8> %op1, <2 x i8> %op2, <vscale x 16 x i1> %mask)
29 ret <vscale x 16 x i1> %r
30 }
32 define <vscale x 16 x i1> @match_nxv16i8_v4i8(<vscale x 16 x i8> %op1, <4 x i8> %op2, <vscale x 16 x i1> %mask) {
33 ; CHECK-LABEL: match_nxv16i8_v4i8:
34 ; CHECK: # %bb.0:
35 ; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma
36 ; CHECK-NEXT: vrgather.vi v12, v10, 1
37 ; CHECK-NEXT: vmseq.vv v14, v8, v12
38 ; CHECK-NEXT: vrgather.vi v12, v10, 0
39 ; CHECK-NEXT: vmseq.vv v15, v8, v12
40 ; CHECK-NEXT: vmor.mm v12, v15, v14
41 ; CHECK-NEXT: vrgather.vi v14, v10, 2
42 ; CHECK-NEXT: vmseq.vv v13, v8, v14
43 ; CHECK-NEXT: vrgather.vi v14, v10, 3
44 ; CHECK-NEXT: vmor.mm v10, v12, v13
45 ; CHECK-NEXT: vmseq.vv v11, v8, v14
46 ; CHECK-NEXT: vmor.mm v8, v10, v11
47 ; CHECK-NEXT: vmand.mm v0, v8, v0
48 ; CHECK-NEXT: ret
49 %r = tail call <vscale x 16 x i1> @llvm.experimental.vector.match(<vscale x 16 x i8> %op1, <4 x i8> %op2, <vscale x 16 x i1> %mask)
50 ret <vscale x 16 x i1> %r
51 }
53 define <vscale x 16 x i1> @match_nxv16i8_v8i8(<vscale x 16 x i8> %op1, <8 x i8> %op2, <vscale x 16 x i1> %mask) {
54 ; CHECK-LABEL: match_nxv16i8_v8i8:
55 ; CHECK: # %bb.0:
56 ; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma
57 ; CHECK-NEXT: vrgather.vi v12, v10, 1
58 ; CHECK-NEXT: vmseq.vv v14, v8, v12
59 ; CHECK-NEXT: vrgather.vi v12, v10, 0
60 ; CHECK-NEXT: vmseq.vv v15, v8, v12
61 ; CHECK-NEXT: vmor.mm v12, v15, v14
62 ; CHECK-NEXT: vrgather.vi v14, v10, 2
63 ; CHECK-NEXT: vmseq.vv v13, v8, v14
64 ; CHECK-NEXT: vmor.mm v12, v12, v13
65 ; CHECK-NEXT: vrgather.vi v14, v10, 3
66 ; CHECK-NEXT: vmseq.vv v13, v8, v14
67 ; CHECK-NEXT: vmor.mm v12, v12, v13
68 ; CHECK-NEXT: vrgather.vi v14, v10, 4
69 ; CHECK-NEXT: vmseq.vv v13, v8, v14
70 ; CHECK-NEXT: vmor.mm v12, v12, v13
71 ; CHECK-NEXT: vrgather.vi v14, v10, 5
72 ; CHECK-NEXT: vmseq.vv v13, v8, v14
73 ; CHECK-NEXT: vmor.mm v12, v12, v13
74 ; CHECK-NEXT: vrgather.vi v14, v10, 6
75 ; CHECK-NEXT: vmseq.vv v13, v8, v14
76 ; CHECK-NEXT: vrgather.vi v14, v10, 7
77 ; CHECK-NEXT: vmor.mm v10, v12, v13
78 ; CHECK-NEXT: vmseq.vv v11, v8, v14
79 ; CHECK-NEXT: vmor.mm v8, v10, v11
80 ; CHECK-NEXT: vmand.mm v0, v8, v0
81 ; CHECK-NEXT: ret
82 %r = tail call <vscale x 16 x i1> @llvm.experimental.vector.match(<vscale x 16 x i8> %op1, <8 x i8> %op2, <vscale x 16 x i1> %mask)
83 ret <vscale x 16 x i1> %r
84 }
86 define <vscale x 16 x i1> @match_nxv16i8_v16i8(<vscale x 16 x i8> %op1, <16 x i8> %op2, <vscale x 16 x i1> %mask) {
87 ; CHECK-LABEL: match_nxv16i8_v16i8:
88 ; CHECK: # %bb.0:
89 ; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma
90 ; CHECK-NEXT: vrgather.vi v12, v10, 1
91 ; CHECK-NEXT: vmseq.vv v14, v8, v12
92 ; CHECK-NEXT: vrgather.vi v12, v10, 0
93 ; CHECK-NEXT: vmseq.vv v15, v8, v12
94 ; CHECK-NEXT: vmor.mm v12, v15, v14
95 ; CHECK-NEXT: vrgather.vi v14, v10, 2
96 ; CHECK-NEXT: vmseq.vv v13, v8, v14
97 ; CHECK-NEXT: vmor.mm v12, v12, v13
98 ; CHECK-NEXT: vrgather.vi v14, v10, 3
99 ; CHECK-NEXT: vmseq.vv v13, v8, v14
100 ; CHECK-NEXT: vmor.mm v12, v12, v13
101 ; CHECK-NEXT: vrgather.vi v14, v10, 4
102 ; CHECK-NEXT: vmseq.vv v13, v8, v14
103 ; CHECK-NEXT: vmor.mm v12, v12, v13
104 ; CHECK-NEXT: vrgather.vi v14, v10, 5
105 ; CHECK-NEXT: vmseq.vv v13, v8, v14
106 ; CHECK-NEXT: vmor.mm v12, v12, v13
107 ; CHECK-NEXT: vrgather.vi v14, v10, 6
108 ; CHECK-NEXT: vmseq.vv v13, v8, v14
109 ; CHECK-NEXT: vmor.mm v12, v12, v13
110 ; CHECK-NEXT: vrgather.vi v14, v10, 7
111 ; CHECK-NEXT: vmseq.vv v13, v8, v14
112 ; CHECK-NEXT: vmor.mm v12, v12, v13
113 ; CHECK-NEXT: vrgather.vi v14, v10, 8
114 ; CHECK-NEXT: vmseq.vv v13, v8, v14
115 ; CHECK-NEXT: vmor.mm v12, v12, v13
116 ; CHECK-NEXT: vrgather.vi v14, v10, 9
117 ; CHECK-NEXT: vmseq.vv v13, v8, v14
118 ; CHECK-NEXT: vmor.mm v12, v12, v13
119 ; CHECK-NEXT: vrgather.vi v14, v10, 10
120 ; CHECK-NEXT: vmseq.vv v13, v8, v14
121 ; CHECK-NEXT: vmor.mm v12, v12, v13
122 ; CHECK-NEXT: vrgather.vi v14, v10, 11
123 ; CHECK-NEXT: vmseq.vv v13, v8, v14
124 ; CHECK-NEXT: vmor.mm v12, v12, v13
125 ; CHECK-NEXT: vrgather.vi v14, v10, 12
126 ; CHECK-NEXT: vmseq.vv v13, v8, v14
127 ; CHECK-NEXT: vmor.mm v12, v12, v13
128 ; CHECK-NEXT: vrgather.vi v14, v10, 13
129 ; CHECK-NEXT: vmseq.vv v13, v8, v14
130 ; CHECK-NEXT: vmor.mm v12, v12, v13
131 ; CHECK-NEXT: vrgather.vi v14, v10, 14
132 ; CHECK-NEXT: vmseq.vv v13, v8, v14
133 ; CHECK-NEXT: vrgather.vi v14, v10, 15
134 ; CHECK-NEXT: vmor.mm v10, v12, v13
135 ; CHECK-NEXT: vmseq.vv v11, v8, v14
136 ; CHECK-NEXT: vmor.mm v8, v10, v11
137 ; CHECK-NEXT: vmand.mm v0, v8, v0
138 ; CHECK-NEXT: ret
139 %r = tail call <vscale x 16 x i1> @llvm.experimental.vector.match(<vscale x 16 x i8> %op1, <16 x i8> %op2, <vscale x 16 x i1> %mask)
140 ret <vscale x 16 x i1> %r
141 }
143 define <16 x i1> @match_v16i8_v1i8(<16 x i8> %op1, <1 x i8> %op2, <16 x i1> %mask) {
144 ; CHECK-LABEL: match_v16i8_v1i8:
145 ; CHECK: # %bb.0:
146 ; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma
147 ; CHECK-NEXT: vrgather.vi v10, v9, 0
148 ; CHECK-NEXT: vmseq.vv v8, v8, v10
149 ; CHECK-NEXT: vmand.mm v0, v8, v0
150 ; CHECK-NEXT: ret
151 %r = tail call <16 x i1> @llvm.experimental.vector.match(<16 x i8> %op1, <1 x i8> %op2, <16 x i1> %mask)
152 ret <16 x i1> %r
153 }
155 define <16 x i1> @match_v16i8_v2i8(<16 x i8> %op1, <2 x i8> %op2, <16 x i1> %mask) {
156 ; CHECK-LABEL: match_v16i8_v2i8:
157 ; CHECK: # %bb.0:
158 ; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma
159 ; CHECK-NEXT: vrgather.vi v10, v9, 1
160 ; CHECK-NEXT: vrgather.vi v11, v9, 0
161 ; CHECK-NEXT: vmseq.vv v9, v8, v10
162 ; CHECK-NEXT: vmseq.vv v8, v8, v11
163 ; CHECK-NEXT: vmor.mm v8, v8, v9
164 ; CHECK-NEXT: vmand.mm v0, v8, v0
165 ; CHECK-NEXT: ret
166 %r = tail call <16 x i1> @llvm.experimental.vector.match(<16 x i8> %op1, <2 x i8> %op2, <16 x i1> %mask)
167 ret <16 x i1> %r
168 }
170 define <16 x i1> @match_v16i8_v4i8(<16 x i8> %op1, <4 x i8> %op2, <16 x i1> %mask) {
171 ; CHECK-LABEL: match_v16i8_v4i8:
172 ; CHECK: # %bb.0:
173 ; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma
174 ; CHECK-NEXT: vrgather.vi v10, v9, 1
175 ; CHECK-NEXT: vrgather.vi v11, v9, 0
176 ; CHECK-NEXT: vmseq.vv v10, v8, v10
177 ; CHECK-NEXT: vmseq.vv v11, v8, v11
178 ; CHECK-NEXT: vmor.mm v10, v11, v10
179 ; CHECK-NEXT: vrgather.vi v11, v9, 2
180 ; CHECK-NEXT: vrgather.vi v12, v9, 3
181 ; CHECK-NEXT: vmseq.vv v9, v8, v11
182 ; CHECK-NEXT: vmor.mm v9, v10, v9
183 ; CHECK-NEXT: vmseq.vv v8, v8, v12
184 ; CHECK-NEXT: vmor.mm v8, v9, v8
185 ; CHECK-NEXT: vmand.mm v0, v8, v0
186 ; CHECK-NEXT: ret
187 %r = tail call <16 x i1> @llvm.experimental.vector.match(<16 x i8> %op1, <4 x i8> %op2, <16 x i1> %mask)
188 ret <16 x i1> %r
189 }
191 define <16 x i1> @match_v16i8_v8i8(<16 x i8> %op1, <8 x i8> %op2, <16 x i1> %mask) {
192 ; CHECK-LABEL: match_v16i8_v8i8:
193 ; CHECK: # %bb.0:
194 ; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma
195 ; CHECK-NEXT: vrgather.vi v10, v9, 1
196 ; CHECK-NEXT: vrgather.vi v11, v9, 0
197 ; CHECK-NEXT: vmseq.vv v10, v8, v10
198 ; CHECK-NEXT: vmseq.vv v11, v8, v11
199 ; CHECK-NEXT: vmor.mm v10, v11, v10
200 ; CHECK-NEXT: vrgather.vi v11, v9, 2
201 ; CHECK-NEXT: vmseq.vv v11, v8, v11
202 ; CHECK-NEXT: vmor.mm v10, v10, v11
203 ; CHECK-NEXT: vrgather.vi v11, v9, 3
204 ; CHECK-NEXT: vmseq.vv v11, v8, v11
205 ; CHECK-NEXT: vmor.mm v10, v10, v11
206 ; CHECK-NEXT: vrgather.vi v11, v9, 4
207 ; CHECK-NEXT: vmseq.vv v11, v8, v11
208 ; CHECK-NEXT: vmor.mm v10, v10, v11
209 ; CHECK-NEXT: vrgather.vi v11, v9, 5
210 ; CHECK-NEXT: vmseq.vv v11, v8, v11
211 ; CHECK-NEXT: vmor.mm v10, v10, v11
212 ; CHECK-NEXT: vrgather.vi v11, v9, 6
213 ; CHECK-NEXT: vrgather.vi v12, v9, 7
214 ; CHECK-NEXT: vmseq.vv v9, v8, v11
215 ; CHECK-NEXT: vmor.mm v9, v10, v9
216 ; CHECK-NEXT: vmseq.vv v8, v8, v12
217 ; CHECK-NEXT: vmor.mm v8, v9, v8
218 ; CHECK-NEXT: vmand.mm v0, v8, v0
219 ; CHECK-NEXT: ret
220 %r = tail call <16 x i1> @llvm.experimental.vector.match(<16 x i8> %op1, <8 x i8> %op2, <16 x i1> %mask)
221 ret <16 x i1> %r
222 }
224 define <16 x i1> @match_v16i8_v16i8(<16 x i8> %op1, <16 x i8> %op2, <16 x i1> %mask) {
225 ; CHECK-LABEL: match_v16i8_v16i8:
226 ; CHECK: # %bb.0:
227 ; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma
228 ; CHECK-NEXT: vrgather.vi v10, v9, 1
229 ; CHECK-NEXT: vrgather.vi v11, v9, 0
230 ; CHECK-NEXT: vmseq.vv v10, v8, v10
231 ; CHECK-NEXT: vmseq.vv v11, v8, v11
232 ; CHECK-NEXT: vmor.mm v10, v11, v10
233 ; CHECK-NEXT: vrgather.vi v11, v9, 2
234 ; CHECK-NEXT: vmseq.vv v11, v8, v11
235 ; CHECK-NEXT: vmor.mm v10, v10, v11
236 ; CHECK-NEXT: vrgather.vi v11, v9, 3
237 ; CHECK-NEXT: vmseq.vv v11, v8, v11
238 ; CHECK-NEXT: vmor.mm v10, v10, v11
239 ; CHECK-NEXT: vrgather.vi v11, v9, 4
240 ; CHECK-NEXT: vmseq.vv v11, v8, v11
241 ; CHECK-NEXT: vmor.mm v10, v10, v11
242 ; CHECK-NEXT: vrgather.vi v11, v9, 5
243 ; CHECK-NEXT: vmseq.vv v11, v8, v11
244 ; CHECK-NEXT: vmor.mm v10, v10, v11
245 ; CHECK-NEXT: vrgather.vi v11, v9, 6
246 ; CHECK-NEXT: vmseq.vv v11, v8, v11
247 ; CHECK-NEXT: vmor.mm v10, v10, v11
248 ; CHECK-NEXT: vrgather.vi v11, v9, 7
249 ; CHECK-NEXT: vmseq.vv v11, v8, v11
250 ; CHECK-NEXT: vmor.mm v10, v10, v11
251 ; CHECK-NEXT: vrgather.vi v11, v9, 8
252 ; CHECK-NEXT: vmseq.vv v11, v8, v11
253 ; CHECK-NEXT: vmor.mm v10, v10, v11
254 ; CHECK-NEXT: vrgather.vi v11, v9, 9
255 ; CHECK-NEXT: vmseq.vv v11, v8, v11
256 ; CHECK-NEXT: vmor.mm v10, v10, v11
257 ; CHECK-NEXT: vrgather.vi v11, v9, 10
258 ; CHECK-NEXT: vmseq.vv v11, v8, v11
259 ; CHECK-NEXT: vmor.mm v10, v10, v11
260 ; CHECK-NEXT: vrgather.vi v11, v9, 11
261 ; CHECK-NEXT: vmseq.vv v11, v8, v11
262 ; CHECK-NEXT: vmor.mm v10, v10, v11
263 ; CHECK-NEXT: vrgather.vi v11, v9, 12
264 ; CHECK-NEXT: vmseq.vv v11, v8, v11
265 ; CHECK-NEXT: vmor.mm v10, v10, v11
266 ; CHECK-NEXT: vrgather.vi v11, v9, 13
267 ; CHECK-NEXT: vmseq.vv v11, v8, v11
268 ; CHECK-NEXT: vmor.mm v10, v10, v11
269 ; CHECK-NEXT: vrgather.vi v11, v9, 14
270 ; CHECK-NEXT: vrgather.vi v12, v9, 15
271 ; CHECK-NEXT: vmseq.vv v9, v8, v11
272 ; CHECK-NEXT: vmor.mm v9, v10, v9
273 ; CHECK-NEXT: vmseq.vv v8, v8, v12
274 ; CHECK-NEXT: vmor.mm v8, v9, v8
275 ; CHECK-NEXT: vmand.mm v0, v8, v0
276 ; CHECK-NEXT: ret
277 %r = tail call <16 x i1> @llvm.experimental.vector.match(<16 x i8> %op1, <16 x i8> %op2, <16 x i1> %mask)
278 ret <16 x i1> %r
279 }
281 define <8 x i1> @match_v8i8_v8i8(<8 x i8> %op1, <8 x i8> %op2, <8 x i1> %mask) {
282 ; CHECK-LABEL: match_v8i8_v8i8:
283 ; CHECK: # %bb.0:
284 ; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
285 ; CHECK-NEXT: vrgather.vi v10, v9, 1
286 ; CHECK-NEXT: vrgather.vi v11, v9, 0
287 ; CHECK-NEXT: vmseq.vv v10, v8, v10
288 ; CHECK-NEXT: vmseq.vv v11, v8, v11
289 ; CHECK-NEXT: vmor.mm v10, v11, v10
290 ; CHECK-NEXT: vrgather.vi v11, v9, 2
291 ; CHECK-NEXT: vmseq.vv v11, v8, v11
292 ; CHECK-NEXT: vmor.mm v10, v10, v11
293 ; CHECK-NEXT: vrgather.vi v11, v9, 3
294 ; CHECK-NEXT: vmseq.vv v11, v8, v11
295 ; CHECK-NEXT: vmor.mm v10, v10, v11
296 ; CHECK-NEXT: vrgather.vi v11, v9, 4
297 ; CHECK-NEXT: vmseq.vv v11, v8, v11
298 ; CHECK-NEXT: vmor.mm v10, v10, v11
299 ; CHECK-NEXT: vrgather.vi v11, v9, 5
300 ; CHECK-NEXT: vmseq.vv v11, v8, v11
301 ; CHECK-NEXT: vmor.mm v10, v10, v11
302 ; CHECK-NEXT: vrgather.vi v11, v9, 6
303 ; CHECK-NEXT: vrgather.vi v12, v9, 7
304 ; CHECK-NEXT: vmseq.vv v9, v8, v11
305 ; CHECK-NEXT: vmor.mm v9, v10, v9
306 ; CHECK-NEXT: vmseq.vv v8, v8, v12
307 ; CHECK-NEXT: vmor.mm v8, v9, v8
308 ; CHECK-NEXT: vmand.mm v0, v8, v0
309 ; CHECK-NEXT: ret
310 %r = tail call <8 x i1> @llvm.experimental.vector.match(<8 x i8> %op1, <8 x i8> %op2, <8 x i1> %mask)
311 ret <8 x i1> %r
312 }
314 define <vscale x 8 x i1> @match_nxv8i16_v8i16(<vscale x 8 x i16> %op1, <8 x i16> %op2, <vscale x 8 x i1> %mask) {
315 ; CHECK-LABEL: match_nxv8i16_v8i16:
316 ; CHECK: # %bb.0:
317 ; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma
318 ; CHECK-NEXT: vrgather.vi v12, v10, 1
319 ; CHECK-NEXT: vmseq.vv v14, v8, v12
320 ; CHECK-NEXT: vrgather.vi v12, v10, 0
321 ; CHECK-NEXT: vmseq.vv v15, v8, v12
322 ; CHECK-NEXT: vmor.mm v12, v15, v14
323 ; CHECK-NEXT: vrgather.vi v14, v10, 2
324 ; CHECK-NEXT: vmseq.vv v13, v8, v14
325 ; CHECK-NEXT: vmor.mm v12, v12, v13
326 ; CHECK-NEXT: vrgather.vi v14, v10, 3
327 ; CHECK-NEXT: vmseq.vv v13, v8, v14
328 ; CHECK-NEXT: vmor.mm v12, v12, v13
329 ; CHECK-NEXT: vrgather.vi v14, v10, 4
330 ; CHECK-NEXT: vmseq.vv v13, v8, v14
331 ; CHECK-NEXT: vmor.mm v12, v12, v13
332 ; CHECK-NEXT: vrgather.vi v14, v10, 5
333 ; CHECK-NEXT: vmseq.vv v13, v8, v14
334 ; CHECK-NEXT: vmor.mm v12, v12, v13
335 ; CHECK-NEXT: vrgather.vi v14, v10, 6
336 ; CHECK-NEXT: vmseq.vv v13, v8, v14
337 ; CHECK-NEXT: vrgather.vi v14, v10, 7
338 ; CHECK-NEXT: vmor.mm v10, v12, v13
339 ; CHECK-NEXT: vmseq.vv v11, v8, v14
340 ; CHECK-NEXT: vmor.mm v8, v10, v11
341 ; CHECK-NEXT: vmand.mm v0, v8, v0
342 ; CHECK-NEXT: ret
343 %r = tail call <vscale x 8 x i1> @llvm.experimental.vector.match(<vscale x 8 x i16> %op1, <8 x i16> %op2, <vscale x 8 x i1> %mask)
344 ret <vscale x 8 x i1> %r
345 }
347 define <8 x i1> @match_v8i16(<8 x i16> %op1, <8 x i16> %op2, <8 x i1> %mask) {
348 ; CHECK-LABEL: match_v8i16:
349 ; CHECK: # %bb.0:
350 ; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma
351 ; CHECK-NEXT: vrgather.vi v10, v9, 1
352 ; CHECK-NEXT: vrgather.vi v11, v9, 0
353 ; CHECK-NEXT: vmseq.vv v10, v8, v10
354 ; CHECK-NEXT: vmseq.vv v11, v8, v11
355 ; CHECK-NEXT: vmor.mm v10, v11, v10
356 ; CHECK-NEXT: vrgather.vi v11, v9, 2
357 ; CHECK-NEXT: vmseq.vv v11, v8, v11
358 ; CHECK-NEXT: vmor.mm v10, v10, v11
359 ; CHECK-NEXT: vrgather.vi v11, v9, 3
360 ; CHECK-NEXT: vmseq.vv v11, v8, v11
361 ; CHECK-NEXT: vmor.mm v10, v10, v11
362 ; CHECK-NEXT: vrgather.vi v11, v9, 4
363 ; CHECK-NEXT: vmseq.vv v11, v8, v11
364 ; CHECK-NEXT: vmor.mm v10, v10, v11
365 ; CHECK-NEXT: vrgather.vi v11, v9, 5
366 ; CHECK-NEXT: vmseq.vv v11, v8, v11
367 ; CHECK-NEXT: vmor.mm v10, v10, v11
368 ; CHECK-NEXT: vrgather.vi v11, v9, 6
369 ; CHECK-NEXT: vrgather.vi v12, v9, 7
370 ; CHECK-NEXT: vmseq.vv v9, v8, v11
371 ; CHECK-NEXT: vmor.mm v9, v10, v9
372 ; CHECK-NEXT: vmseq.vv v8, v8, v12
373 ; CHECK-NEXT: vmor.mm v8, v9, v8
374 ; CHECK-NEXT: vmand.mm v0, v8, v0
375 ; CHECK-NEXT: ret
376 %r = tail call <8 x i1> @llvm.experimental.vector.match(<8 x i16> %op1, <8 x i16> %op2, <8 x i1> %mask)
377 ret <8 x i1> %r
378 }
380 ; Cases where op2 has more elements than op1.
382 define <8 x i1> @match_v8i8_v16i8(<8 x i8> %op1, <16 x i8> %op2, <8 x i1> %mask) {
383 ; CHECK-LABEL: match_v8i8_v16i8:
384 ; CHECK: # %bb.0:
385 ; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
386 ; CHECK-NEXT: vrgather.vi v10, v9, 1
387 ; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
388 ; CHECK-NEXT: vslidedown.vi v11, v9, 8
389 ; CHECK-NEXT: vmv.x.s a0, v11
390 ; CHECK-NEXT: vslidedown.vi v11, v9, 9
391 ; CHECK-NEXT: vmv.x.s a1, v11
392 ; CHECK-NEXT: vslidedown.vi v11, v9, 10
393 ; CHECK-NEXT: vmv.x.s a2, v11
394 ; CHECK-NEXT: vslidedown.vi v11, v9, 11
395 ; CHECK-NEXT: vmv.x.s a3, v11
396 ; CHECK-NEXT: vslidedown.vi v11, v9, 12
397 ; CHECK-NEXT: vmv.x.s a4, v11
398 ; CHECK-NEXT: vslidedown.vi v11, v9, 13
399 ; CHECK-NEXT: vmv.x.s a5, v11
400 ; CHECK-NEXT: vslidedown.vi v11, v9, 14
401 ; CHECK-NEXT: vmv.x.s a6, v11
402 ; CHECK-NEXT: vslidedown.vi v11, v9, 15
403 ; CHECK-NEXT: vmv.x.s a7, v11
404 ; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
405 ; CHECK-NEXT: vrgather.vi v11, v9, 0
406 ; CHECK-NEXT: vmseq.vv v10, v8, v10
407 ; CHECK-NEXT: vmseq.vv v11, v8, v11
408 ; CHECK-NEXT: vmor.mm v10, v11, v10
409 ; CHECK-NEXT: vrgather.vi v11, v9, 2
410 ; CHECK-NEXT: vmseq.vv v11, v8, v11
411 ; CHECK-NEXT: vmor.mm v10, v10, v11
412 ; CHECK-NEXT: vrgather.vi v11, v9, 3
413 ; CHECK-NEXT: vmseq.vv v11, v8, v11
414 ; CHECK-NEXT: vmor.mm v10, v10, v11
415 ; CHECK-NEXT: vrgather.vi v11, v9, 4
416 ; CHECK-NEXT: vmseq.vv v11, v8, v11
417 ; CHECK-NEXT: vmor.mm v10, v10, v11
418 ; CHECK-NEXT: vrgather.vi v11, v9, 5
419 ; CHECK-NEXT: vmseq.vv v11, v8, v11
420 ; CHECK-NEXT: vmor.mm v10, v10, v11
421 ; CHECK-NEXT: vrgather.vi v11, v9, 6
422 ; CHECK-NEXT: vmseq.vv v11, v8, v11
423 ; CHECK-NEXT: vmor.mm v10, v10, v11
424 ; CHECK-NEXT: vmseq.vx v11, v8, a0
425 ; CHECK-NEXT: vrgather.vi v12, v9, 7
426 ; CHECK-NEXT: vmseq.vv v9, v8, v12
427 ; CHECK-NEXT: vmor.mm v9, v10, v9
428 ; CHECK-NEXT: vmseq.vx v10, v8, a1
429 ; CHECK-NEXT: vmor.mm v9, v9, v11
430 ; CHECK-NEXT: vmseq.vx v11, v8, a2
431 ; CHECK-NEXT: vmor.mm v9, v9, v10
432 ; CHECK-NEXT: vmseq.vx v10, v8, a3
433 ; CHECK-NEXT: vmor.mm v9, v9, v11
434 ; CHECK-NEXT: vmseq.vx v11, v8, a4
435 ; CHECK-NEXT: vmor.mm v9, v9, v10
436 ; CHECK-NEXT: vmseq.vx v10, v8, a5
437 ; CHECK-NEXT: vmor.mm v9, v9, v11
438 ; CHECK-NEXT: vmseq.vx v11, v8, a6
439 ; CHECK-NEXT: vmor.mm v9, v9, v10
440 ; CHECK-NEXT: vmor.mm v9, v9, v11
441 ; CHECK-NEXT: vmseq.vx v8, v8, a7
442 ; CHECK-NEXT: vmor.mm v8, v9, v8
443 ; CHECK-NEXT: vmand.mm v0, v8, v0
444 ; CHECK-NEXT: ret
445 %r = tail call <8 x i1> @llvm.experimental.vector.match(<8 x i8> %op1, <16 x i8> %op2, <8 x i1> %mask)
446 ret <8 x i1> %r
447 }
449 define <vscale x 16 x i1> @match_nxv16i8_v32i8(<vscale x 16 x i8> %op1, <32 x i8> %op2, <vscale x 16 x i1> %mask) {
450 ; RV32-LABEL: match_nxv16i8_v32i8:
451 ; RV32: # %bb.0:
452 ; RV32-NEXT: addi sp, sp, -16
453 ; RV32-NEXT: .cfi_def_cfa_offset 16
454 ; RV32-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
455 ; RV32-NEXT: .cfi_offset s0, -4
456 ; RV32-NEXT: vsetvli a0, zero, e8, m2, ta, ma
457 ; RV32-NEXT: vrgather.vi v14, v10, 1
458 ; RV32-NEXT: vrgather.vi v16, v10, 0
459 ; RV32-NEXT: vrgather.vi v18, v10, 2
460 ; RV32-NEXT: vrgather.vi v20, v10, 3
461 ; RV32-NEXT: vrgather.vi v22, v10, 4
462 ; RV32-NEXT: vrgather.vi v24, v10, 5
463 ; RV32-NEXT: vrgather.vi v26, v10, 6
464 ; RV32-NEXT: vrgather.vi v28, v10, 7
465 ; RV32-NEXT: vmseq.vv v12, v8, v14
466 ; RV32-NEXT: vmseq.vv v13, v8, v16
467 ; RV32-NEXT: vrgather.vi v30, v10, 8
468 ; RV32-NEXT: vmseq.vv v14, v8, v18
469 ; RV32-NEXT: vmseq.vv v15, v8, v20
470 ; RV32-NEXT: vrgather.vi v6, v10, 9
471 ; RV32-NEXT: vmseq.vv v16, v8, v22
472 ; RV32-NEXT: vmseq.vv v17, v8, v24
473 ; RV32-NEXT: vrgather.vi v24, v10, 10
474 ; RV32-NEXT: vmseq.vv v18, v8, v26
475 ; RV32-NEXT: vmseq.vv v19, v8, v28
476 ; RV32-NEXT: vrgather.vi v26, v10, 11
477 ; RV32-NEXT: vmseq.vv v20, v8, v30
478 ; RV32-NEXT: vmseq.vv v21, v8, v6
479 ; RV32-NEXT: vrgather.vi v28, v10, 12
480 ; RV32-NEXT: vmseq.vv v22, v8, v24
481 ; RV32-NEXT: vmseq.vv v23, v8, v26
482 ; RV32-NEXT: vrgather.vi v26, v10, 13
483 ; RV32-NEXT: vmseq.vv v25, v8, v28
484 ; RV32-NEXT: vmseq.vv v24, v8, v26
485 ; RV32-NEXT: vslidedown.vi v26, v10, 16
486 ; RV32-NEXT: vmv.x.s a0, v26
487 ; RV32-NEXT: vslidedown.vi v26, v10, 17
488 ; RV32-NEXT: vmv.x.s a1, v26
489 ; RV32-NEXT: vslidedown.vi v26, v10, 18
490 ; RV32-NEXT: vmv.x.s a2, v26
491 ; RV32-NEXT: vslidedown.vi v26, v10, 19
492 ; RV32-NEXT: vmv.x.s a3, v26
493 ; RV32-NEXT: vslidedown.vi v26, v10, 20
494 ; RV32-NEXT: vmv.x.s a4, v26
495 ; RV32-NEXT: vslidedown.vi v26, v10, 21
496 ; RV32-NEXT: vmv.x.s a5, v26
497 ; RV32-NEXT: vslidedown.vi v26, v10, 22
498 ; RV32-NEXT: vmv.x.s a6, v26
499 ; RV32-NEXT: vslidedown.vi v26, v10, 23
500 ; RV32-NEXT: vmv.x.s a7, v26
501 ; RV32-NEXT: vslidedown.vi v26, v10, 24
502 ; RV32-NEXT: vmv.x.s t0, v26
503 ; RV32-NEXT: vslidedown.vi v26, v10, 25
504 ; RV32-NEXT: vmv.x.s t1, v26
505 ; RV32-NEXT: vslidedown.vi v26, v10, 26
506 ; RV32-NEXT: vmv.x.s t2, v26
507 ; RV32-NEXT: vslidedown.vi v26, v10, 27
508 ; RV32-NEXT: vmv.x.s t3, v26
509 ; RV32-NEXT: vslidedown.vi v26, v10, 28
510 ; RV32-NEXT: vmv.x.s t4, v26
511 ; RV32-NEXT: vslidedown.vi v26, v10, 29
512 ; RV32-NEXT: vmv.x.s t5, v26
513 ; RV32-NEXT: vslidedown.vi v26, v10, 30
514 ; RV32-NEXT: vmv.x.s t6, v26
515 ; RV32-NEXT: vslidedown.vi v26, v10, 31
516 ; RV32-NEXT: vmv.x.s s0, v26
517 ; RV32-NEXT: vrgather.vi v26, v10, 14
518 ; RV32-NEXT: vmseq.vv v28, v8, v26
519 ; RV32-NEXT: vrgather.vi v26, v10, 15
520 ; RV32-NEXT: vmseq.vv v10, v8, v26
521 ; RV32-NEXT: vmor.mm v11, v13, v12
522 ; RV32-NEXT: vmor.mm v11, v11, v14
523 ; RV32-NEXT: vmor.mm v11, v11, v15
524 ; RV32-NEXT: vmor.mm v11, v11, v16
525 ; RV32-NEXT: vmor.mm v11, v11, v17
526 ; RV32-NEXT: vmor.mm v11, v11, v18
527 ; RV32-NEXT: vmor.mm v11, v11, v19
528 ; RV32-NEXT: vmor.mm v11, v11, v20
529 ; RV32-NEXT: vmor.mm v11, v11, v21
530 ; RV32-NEXT: vmor.mm v11, v11, v22
531 ; RV32-NEXT: vmor.mm v11, v11, v23
532 ; RV32-NEXT: vmor.mm v11, v11, v25
533 ; RV32-NEXT: vmseq.vx v12, v8, a0
534 ; RV32-NEXT: vmor.mm v11, v11, v24
535 ; RV32-NEXT: vmseq.vx v13, v8, a1
536 ; RV32-NEXT: vmor.mm v11, v11, v28
537 ; RV32-NEXT: vmseq.vx v14, v8, a2
538 ; RV32-NEXT: vmor.mm v10, v11, v10
539 ; RV32-NEXT: vmseq.vx v11, v8, a3
540 ; RV32-NEXT: vmor.mm v10, v10, v12
541 ; RV32-NEXT: vmseq.vx v12, v8, a4
542 ; RV32-NEXT: vmor.mm v10, v10, v13
543 ; RV32-NEXT: vmseq.vx v13, v8, a5
544 ; RV32-NEXT: vmor.mm v10, v10, v14
545 ; RV32-NEXT: vmseq.vx v14, v8, a6
546 ; RV32-NEXT: vmor.mm v10, v10, v11
547 ; RV32-NEXT: vmseq.vx v11, v8, a7
548 ; RV32-NEXT: vmor.mm v10, v10, v12
549 ; RV32-NEXT: vmseq.vx v12, v8, t0
550 ; RV32-NEXT: vmor.mm v10, v10, v13
551 ; RV32-NEXT: vmseq.vx v13, v8, t1
552 ; RV32-NEXT: vmor.mm v10, v10, v14
553 ; RV32-NEXT: vmseq.vx v14, v8, t2
554 ; RV32-NEXT: vmor.mm v10, v10, v11
555 ; RV32-NEXT: vmseq.vx v11, v8, t3
556 ; RV32-NEXT: vmor.mm v10, v10, v12
557 ; RV32-NEXT: vmseq.vx v12, v8, t4
558 ; RV32-NEXT: vmor.mm v10, v10, v13
559 ; RV32-NEXT: vmseq.vx v13, v8, t5
560 ; RV32-NEXT: vmor.mm v10, v10, v14
561 ; RV32-NEXT: vmseq.vx v14, v8, t6
562 ; RV32-NEXT: vmor.mm v10, v10, v11
563 ; RV32-NEXT: vmor.mm v10, v10, v12
564 ; RV32-NEXT: vmor.mm v10, v10, v13
565 ; RV32-NEXT: vmor.mm v10, v10, v14
566 ; RV32-NEXT: vmseq.vx v11, v8, s0
567 ; RV32-NEXT: vmor.mm v8, v10, v11
568 ; RV32-NEXT: vmand.mm v0, v8, v0
569 ; RV32-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
570 ; RV32-NEXT: .cfi_restore s0
571 ; RV32-NEXT: addi sp, sp, 16
572 ; RV32-NEXT: .cfi_def_cfa_offset 0
573 ; RV32-NEXT: ret
574 ;
575 ; RV64-LABEL: match_nxv16i8_v32i8:
576 ; RV64: # %bb.0:
577 ; RV64-NEXT: addi sp, sp, -16
578 ; RV64-NEXT: .cfi_def_cfa_offset 16
579 ; RV64-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
580 ; RV64-NEXT: .cfi_offset s0, -8
581 ; RV64-NEXT: vsetvli a0, zero, e8, m2, ta, ma
582 ; RV64-NEXT: vrgather.vi v14, v10, 1
583 ; RV64-NEXT: vrgather.vi v16, v10, 0
584 ; RV64-NEXT: vrgather.vi v18, v10, 2
585 ; RV64-NEXT: vrgather.vi v20, v10, 3
586 ; RV64-NEXT: vrgather.vi v22, v10, 4
587 ; RV64-NEXT: vrgather.vi v24, v10, 5
588 ; RV64-NEXT: vrgather.vi v26, v10, 6
589 ; RV64-NEXT: vrgather.vi v28, v10, 7
590 ; RV64-NEXT: vmseq.vv v12, v8, v14
591 ; RV64-NEXT: vmseq.vv v13, v8, v16
592 ; RV64-NEXT: vrgather.vi v30, v10, 8
593 ; RV64-NEXT: vmseq.vv v14, v8, v18
594 ; RV64-NEXT: vmseq.vv v15, v8, v20
595 ; RV64-NEXT: vrgather.vi v6, v10, 9
596 ; RV64-NEXT: vmseq.vv v16, v8, v22
597 ; RV64-NEXT: vmseq.vv v17, v8, v24
598 ; RV64-NEXT: vrgather.vi v24, v10, 10
599 ; RV64-NEXT: vmseq.vv v18, v8, v26
600 ; RV64-NEXT: vmseq.vv v19, v8, v28
601 ; RV64-NEXT: vrgather.vi v26, v10, 11
602 ; RV64-NEXT: vmseq.vv v20, v8, v30
603 ; RV64-NEXT: vmseq.vv v21, v8, v6
604 ; RV64-NEXT: vrgather.vi v28, v10, 12
605 ; RV64-NEXT: vmseq.vv v22, v8, v24
606 ; RV64-NEXT: vmseq.vv v23, v8, v26
607 ; RV64-NEXT: vrgather.vi v26, v10, 13
608 ; RV64-NEXT: vmseq.vv v25, v8, v28
609 ; RV64-NEXT: vmseq.vv v24, v8, v26
610 ; RV64-NEXT: vslidedown.vi v26, v10, 16
611 ; RV64-NEXT: vmv.x.s a0, v26
612 ; RV64-NEXT: vslidedown.vi v26, v10, 17
613 ; RV64-NEXT: vmv.x.s a1, v26
614 ; RV64-NEXT: vslidedown.vi v26, v10, 18
615 ; RV64-NEXT: vmv.x.s a2, v26
616 ; RV64-NEXT: vslidedown.vi v26, v10, 19
617 ; RV64-NEXT: vmv.x.s a3, v26
618 ; RV64-NEXT: vslidedown.vi v26, v10, 20
619 ; RV64-NEXT: vmv.x.s a4, v26
620 ; RV64-NEXT: vslidedown.vi v26, v10, 21
621 ; RV64-NEXT: vmv.x.s a5, v26
622 ; RV64-NEXT: vslidedown.vi v26, v10, 22
623 ; RV64-NEXT: vmv.x.s a6, v26
624 ; RV64-NEXT: vslidedown.vi v26, v10, 23
625 ; RV64-NEXT: vmv.x.s a7, v26
626 ; RV64-NEXT: vslidedown.vi v26, v10, 24
627 ; RV64-NEXT: vmv.x.s t0, v26
628 ; RV64-NEXT: vslidedown.vi v26, v10, 25
629 ; RV64-NEXT: vmv.x.s t1, v26
630 ; RV64-NEXT: vslidedown.vi v26, v10, 26
631 ; RV64-NEXT: vmv.x.s t2, v26
632 ; RV64-NEXT: vslidedown.vi v26, v10, 27
633 ; RV64-NEXT: vmv.x.s t3, v26
634 ; RV64-NEXT: vslidedown.vi v26, v10, 28
635 ; RV64-NEXT: vmv.x.s t4, v26
636 ; RV64-NEXT: vslidedown.vi v26, v10, 29
637 ; RV64-NEXT: vmv.x.s t5, v26
638 ; RV64-NEXT: vslidedown.vi v26, v10, 30
639 ; RV64-NEXT: vmv.x.s t6, v26
640 ; RV64-NEXT: vslidedown.vi v26, v10, 31
641 ; RV64-NEXT: vmv.x.s s0, v26
642 ; RV64-NEXT: vrgather.vi v26, v10, 14
643 ; RV64-NEXT: vmseq.vv v28, v8, v26
644 ; RV64-NEXT: vrgather.vi v26, v10, 15
645 ; RV64-NEXT: vmseq.vv v10, v8, v26
646 ; RV64-NEXT: vmor.mm v11, v13, v12
647 ; RV64-NEXT: vmor.mm v11, v11, v14
648 ; RV64-NEXT: vmor.mm v11, v11, v15
649 ; RV64-NEXT: vmor.mm v11, v11, v16
650 ; RV64-NEXT: vmor.mm v11, v11, v17
651 ; RV64-NEXT: vmor.mm v11, v11, v18
652 ; RV64-NEXT: vmor.mm v11, v11, v19
653 ; RV64-NEXT: vmor.mm v11, v11, v20
654 ; RV64-NEXT: vmor.mm v11, v11, v21
655 ; RV64-NEXT: vmor.mm v11, v11, v22
656 ; RV64-NEXT: vmor.mm v11, v11, v23
657 ; RV64-NEXT: vmor.mm v11, v11, v25
658 ; RV64-NEXT: vmseq.vx v12, v8, a0
659 ; RV64-NEXT: vmor.mm v11, v11, v24
660 ; RV64-NEXT: vmseq.vx v13, v8, a1
661 ; RV64-NEXT: vmor.mm v11, v11, v28
662 ; RV64-NEXT: vmseq.vx v14, v8, a2
663 ; RV64-NEXT: vmor.mm v10, v11, v10
664 ; RV64-NEXT: vmseq.vx v11, v8, a3
665 ; RV64-NEXT: vmor.mm v10, v10, v12
666 ; RV64-NEXT: vmseq.vx v12, v8, a4
667 ; RV64-NEXT: vmor.mm v10, v10, v13
668 ; RV64-NEXT: vmseq.vx v13, v8, a5
669 ; RV64-NEXT: vmor.mm v10, v10, v14
670 ; RV64-NEXT: vmseq.vx v14, v8, a6
671 ; RV64-NEXT: vmor.mm v10, v10, v11
672 ; RV64-NEXT: vmseq.vx v11, v8, a7
673 ; RV64-NEXT: vmor.mm v10, v10, v12
674 ; RV64-NEXT: vmseq.vx v12, v8, t0
675 ; RV64-NEXT: vmor.mm v10, v10, v13
676 ; RV64-NEXT: vmseq.vx v13, v8, t1
677 ; RV64-NEXT: vmor.mm v10, v10, v14
678 ; RV64-NEXT: vmseq.vx v14, v8, t2
679 ; RV64-NEXT: vmor.mm v10, v10, v11
680 ; RV64-NEXT: vmseq.vx v11, v8, t3
681 ; RV64-NEXT: vmor.mm v10, v10, v12
682 ; RV64-NEXT: vmseq.vx v12, v8, t4
683 ; RV64-NEXT: vmor.mm v10, v10, v13
684 ; RV64-NEXT: vmseq.vx v13, v8, t5
685 ; RV64-NEXT: vmor.mm v10, v10, v14
686 ; RV64-NEXT: vmseq.vx v14, v8, t6
687 ; RV64-NEXT: vmor.mm v10, v10, v11
688 ; RV64-NEXT: vmor.mm v10, v10, v12
689 ; RV64-NEXT: vmor.mm v10, v10, v13
690 ; RV64-NEXT: vmor.mm v10, v10, v14
691 ; RV64-NEXT: vmseq.vx v11, v8, s0
692 ; RV64-NEXT: vmor.mm v8, v10, v11
693 ; RV64-NEXT: vmand.mm v0, v8, v0
694 ; RV64-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
695 ; RV64-NEXT: .cfi_restore s0
696 ; RV64-NEXT: addi sp, sp, 16
697 ; RV64-NEXT: .cfi_def_cfa_offset 0
698 ; RV64-NEXT: ret
699 %r = tail call <vscale x 16 x i1> @llvm.experimental.vector.match(<vscale x 16 x i8> %op1, <32 x i8> %op2, <vscale x 16 x i1> %mask)
700 ret <vscale x 16 x i1> %r
701 }
703 define <16 x i1> @match_v16i8_v32i8(<16 x i8> %op1, <32 x i8> %op2, <16 x i1> %mask) {
704 ; RV32-LABEL: match_v16i8_v32i8:
705 ; RV32: # %bb.0:
706 ; RV32-NEXT: addi sp, sp, -16
707 ; RV32-NEXT: .cfi_def_cfa_offset 16
708 ; RV32-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
709 ; RV32-NEXT: .cfi_offset s0, -4
710 ; RV32-NEXT: vsetivli zero, 16, e8, m1, ta, ma
711 ; RV32-NEXT: vrgather.vi v9, v10, 1
712 ; RV32-NEXT: vrgather.vi v12, v10, 0
713 ; RV32-NEXT: vrgather.vi v13, v10, 2
714 ; RV32-NEXT: vrgather.vi v14, v10, 3
715 ; RV32-NEXT: vrgather.vi v15, v10, 4
716 ; RV32-NEXT: vrgather.vi v16, v10, 5
717 ; RV32-NEXT: vrgather.vi v17, v10, 6
718 ; RV32-NEXT: vrgather.vi v18, v10, 7
719 ; RV32-NEXT: vrgather.vi v19, v10, 8
720 ; RV32-NEXT: vrgather.vi v20, v10, 9
721 ; RV32-NEXT: vrgather.vi v21, v10, 10
722 ; RV32-NEXT: vrgather.vi v22, v10, 11
723 ; RV32-NEXT: vrgather.vi v23, v10, 12
724 ; RV32-NEXT: vsetivli zero, 1, e8, m2, ta, ma
725 ; RV32-NEXT: vslidedown.vi v24, v10, 16
726 ; RV32-NEXT: vmv.x.s a0, v24
727 ; RV32-NEXT: vslidedown.vi v24, v10, 17
728 ; RV32-NEXT: vmv.x.s a1, v24
729 ; RV32-NEXT: vslidedown.vi v24, v10, 18
730 ; RV32-NEXT: vmv.x.s a2, v24
731 ; RV32-NEXT: vslidedown.vi v24, v10, 19
732 ; RV32-NEXT: vmv.x.s a3, v24
733 ; RV32-NEXT: vslidedown.vi v24, v10, 20
734 ; RV32-NEXT: vmv.x.s a4, v24
735 ; RV32-NEXT: vslidedown.vi v24, v10, 21
736 ; RV32-NEXT: vmv.x.s a5, v24
737 ; RV32-NEXT: vslidedown.vi v24, v10, 22
738 ; RV32-NEXT: vmv.x.s a6, v24
739 ; RV32-NEXT: vslidedown.vi v24, v10, 23
740 ; RV32-NEXT: vmv.x.s a7, v24
741 ; RV32-NEXT: vslidedown.vi v24, v10, 24
742 ; RV32-NEXT: vmv.x.s t0, v24
743 ; RV32-NEXT: vslidedown.vi v24, v10, 25
744 ; RV32-NEXT: vmv.x.s t1, v24
745 ; RV32-NEXT: vslidedown.vi v24, v10, 26
746 ; RV32-NEXT: vmv.x.s t2, v24
747 ; RV32-NEXT: vslidedown.vi v24, v10, 27
748 ; RV32-NEXT: vmv.x.s t3, v24
749 ; RV32-NEXT: vslidedown.vi v24, v10, 28
750 ; RV32-NEXT: vmv.x.s t4, v24
751 ; RV32-NEXT: vslidedown.vi v24, v10, 29
752 ; RV32-NEXT: vmv.x.s t5, v24
753 ; RV32-NEXT: vslidedown.vi v24, v10, 30
754 ; RV32-NEXT: vmv.x.s t6, v24
755 ; RV32-NEXT: vslidedown.vi v24, v10, 31
756 ; RV32-NEXT: vmv.x.s s0, v24
757 ; RV32-NEXT: vsetivli zero, 16, e8, m1, ta, ma
758 ; RV32-NEXT: vrgather.vi v11, v10, 13
759 ; RV32-NEXT: vrgather.vi v24, v10, 14
760 ; RV32-NEXT: vrgather.vi v25, v10, 15
761 ; RV32-NEXT: vmseq.vv v9, v8, v9
762 ; RV32-NEXT: vmseq.vv v10, v8, v12
763 ; RV32-NEXT: vmor.mm v9, v10, v9
764 ; RV32-NEXT: vmseq.vv v10, v8, v13
765 ; RV32-NEXT: vmor.mm v9, v9, v10
766 ; RV32-NEXT: vmseq.vv v10, v8, v14
767 ; RV32-NEXT: vmor.mm v9, v9, v10
768 ; RV32-NEXT: vmseq.vv v10, v8, v15
769 ; RV32-NEXT: vmor.mm v9, v9, v10
770 ; RV32-NEXT: vmseq.vv v10, v8, v16
771 ; RV32-NEXT: vmor.mm v9, v9, v10
772 ; RV32-NEXT: vmseq.vv v10, v8, v17
773 ; RV32-NEXT: vmor.mm v9, v9, v10
774 ; RV32-NEXT: vmseq.vv v10, v8, v18
775 ; RV32-NEXT: vmor.mm v9, v9, v10
776 ; RV32-NEXT: vmseq.vv v10, v8, v19
777 ; RV32-NEXT: vmor.mm v9, v9, v10
778 ; RV32-NEXT: vmseq.vv v10, v8, v20
779 ; RV32-NEXT: vmor.mm v9, v9, v10
780 ; RV32-NEXT: vmseq.vv v10, v8, v21
781 ; RV32-NEXT: vmor.mm v9, v9, v10
782 ; RV32-NEXT: vmseq.vv v10, v8, v22
783 ; RV32-NEXT: vmor.mm v9, v9, v10
784 ; RV32-NEXT: vmseq.vv v10, v8, v23
785 ; RV32-NEXT: vmor.mm v9, v9, v10
786 ; RV32-NEXT: vmseq.vx v10, v8, a0
787 ; RV32-NEXT: vmseq.vv v11, v8, v11
788 ; RV32-NEXT: vmor.mm v9, v9, v11
789 ; RV32-NEXT: vmseq.vx v11, v8, a1
790 ; RV32-NEXT: vmseq.vv v12, v8, v24
791 ; RV32-NEXT: vmor.mm v9, v9, v12
792 ; RV32-NEXT: vmseq.vx v12, v8, a2
793 ; RV32-NEXT: vmseq.vv v13, v8, v25
794 ; RV32-NEXT: vmor.mm v9, v9, v13
795 ; RV32-NEXT: vmseq.vx v13, v8, a3
796 ; RV32-NEXT: vmor.mm v9, v9, v10
797 ; RV32-NEXT: vmseq.vx v10, v8, a4
798 ; RV32-NEXT: vmor.mm v9, v9, v11
799 ; RV32-NEXT: vmseq.vx v11, v8, a5
800 ; RV32-NEXT: vmor.mm v9, v9, v12
801 ; RV32-NEXT: vmseq.vx v12, v8, a6
802 ; RV32-NEXT: vmor.mm v9, v9, v13
803 ; RV32-NEXT: vmseq.vx v13, v8, a7
804 ; RV32-NEXT: vmor.mm v9, v9, v10
805 ; RV32-NEXT: vmseq.vx v10, v8, t0
806 ; RV32-NEXT: vmor.mm v9, v9, v11
807 ; RV32-NEXT: vmseq.vx v11, v8, t1
808 ; RV32-NEXT: vmor.mm v9, v9, v12
809 ; RV32-NEXT: vmseq.vx v12, v8, t2
810 ; RV32-NEXT: vmor.mm v9, v9, v13
811 ; RV32-NEXT: vmseq.vx v13, v8, t3
812 ; RV32-NEXT: vmor.mm v9, v9, v10
813 ; RV32-NEXT: vmseq.vx v10, v8, t4
814 ; RV32-NEXT: vmor.mm v9, v9, v11
815 ; RV32-NEXT: vmseq.vx v11, v8, t5
816 ; RV32-NEXT: vmor.mm v9, v9, v12
817 ; RV32-NEXT: vmseq.vx v12, v8, t6
818 ; RV32-NEXT: vmor.mm v9, v9, v13
819 ; RV32-NEXT: vmor.mm v9, v9, v10
820 ; RV32-NEXT: vmor.mm v9, v9, v11
821 ; RV32-NEXT: vmor.mm v9, v9, v12
822 ; RV32-NEXT: vmseq.vx v8, v8, s0
823 ; RV32-NEXT: vmor.mm v8, v9, v8
824 ; RV32-NEXT: vmand.mm v0, v8, v0
825 ; RV32-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
826 ; RV32-NEXT: .cfi_restore s0
827 ; RV32-NEXT: addi sp, sp, 16
828 ; RV32-NEXT: .cfi_def_cfa_offset 0
829 ; RV32-NEXT: ret
830 ;
831 ; RV64-LABEL: match_v16i8_v32i8:
832 ; RV64: # %bb.0:
833 ; RV64-NEXT: addi sp, sp, -16
834 ; RV64-NEXT: .cfi_def_cfa_offset 16
835 ; RV64-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
836 ; RV64-NEXT: .cfi_offset s0, -8
837 ; RV64-NEXT: vsetivli zero, 16, e8, m1, ta, ma
838 ; RV64-NEXT: vrgather.vi v9, v10, 1
839 ; RV64-NEXT: vrgather.vi v12, v10, 0
840 ; RV64-NEXT: vrgather.vi v13, v10, 2
841 ; RV64-NEXT: vrgather.vi v14, v10, 3
842 ; RV64-NEXT: vrgather.vi v15, v10, 4
843 ; RV64-NEXT: vrgather.vi v16, v10, 5
844 ; RV64-NEXT: vrgather.vi v17, v10, 6
845 ; RV64-NEXT: vrgather.vi v18, v10, 7
846 ; RV64-NEXT: vrgather.vi v19, v10, 8
847 ; RV64-NEXT: vrgather.vi v20, v10, 9
848 ; RV64-NEXT: vrgather.vi v21, v10, 10
849 ; RV64-NEXT: vrgather.vi v22, v10, 11
850 ; RV64-NEXT: vrgather.vi v23, v10, 12
851 ; RV64-NEXT: vsetivli zero, 1, e8, m2, ta, ma
852 ; RV64-NEXT: vslidedown.vi v24, v10, 16
853 ; RV64-NEXT: vmv.x.s a0, v24
854 ; RV64-NEXT: vslidedown.vi v24, v10, 17
855 ; RV64-NEXT: vmv.x.s a1, v24
856 ; RV64-NEXT: vslidedown.vi v24, v10, 18
857 ; RV64-NEXT: vmv.x.s a2, v24
858 ; RV64-NEXT: vslidedown.vi v24, v10, 19
859 ; RV64-NEXT: vmv.x.s a3, v24
860 ; RV64-NEXT: vslidedown.vi v24, v10, 20
861 ; RV64-NEXT: vmv.x.s a4, v24
862 ; RV64-NEXT: vslidedown.vi v24, v10, 21
863 ; RV64-NEXT: vmv.x.s a5, v24
864 ; RV64-NEXT: vslidedown.vi v24, v10, 22
865 ; RV64-NEXT: vmv.x.s a6, v24
866 ; RV64-NEXT: vslidedown.vi v24, v10, 23
867 ; RV64-NEXT: vmv.x.s a7, v24
868 ; RV64-NEXT: vslidedown.vi v24, v10, 24
869 ; RV64-NEXT: vmv.x.s t0, v24
870 ; RV64-NEXT: vslidedown.vi v24, v10, 25
871 ; RV64-NEXT: vmv.x.s t1, v24
872 ; RV64-NEXT: vslidedown.vi v24, v10, 26
873 ; RV64-NEXT: vmv.x.s t2, v24
874 ; RV64-NEXT: vslidedown.vi v24, v10, 27
875 ; RV64-NEXT: vmv.x.s t3, v24
876 ; RV64-NEXT: vslidedown.vi v24, v10, 28
877 ; RV64-NEXT: vmv.x.s t4, v24
878 ; RV64-NEXT: vslidedown.vi v24, v10, 29
879 ; RV64-NEXT: vmv.x.s t5, v24
880 ; RV64-NEXT: vslidedown.vi v24, v10, 30
881 ; RV64-NEXT: vmv.x.s t6, v24
882 ; RV64-NEXT: vslidedown.vi v24, v10, 31
883 ; RV64-NEXT: vmv.x.s s0, v24
884 ; RV64-NEXT: vsetivli zero, 16, e8, m1, ta, ma
885 ; RV64-NEXT: vrgather.vi v11, v10, 13
886 ; RV64-NEXT: vrgather.vi v24, v10, 14
887 ; RV64-NEXT: vrgather.vi v25, v10, 15
888 ; RV64-NEXT: vmseq.vv v9, v8, v9
889 ; RV64-NEXT: vmseq.vv v10, v8, v12
890 ; RV64-NEXT: vmor.mm v9, v10, v9
891 ; RV64-NEXT: vmseq.vv v10, v8, v13
892 ; RV64-NEXT: vmor.mm v9, v9, v10
893 ; RV64-NEXT: vmseq.vv v10, v8, v14
894 ; RV64-NEXT: vmor.mm v9, v9, v10
895 ; RV64-NEXT: vmseq.vv v10, v8, v15
896 ; RV64-NEXT: vmor.mm v9, v9, v10
897 ; RV64-NEXT: vmseq.vv v10, v8, v16
898 ; RV64-NEXT: vmor.mm v9, v9, v10
899 ; RV64-NEXT: vmseq.vv v10, v8, v17
900 ; RV64-NEXT: vmor.mm v9, v9, v10
901 ; RV64-NEXT: vmseq.vv v10, v8, v18
902 ; RV64-NEXT: vmor.mm v9, v9, v10
903 ; RV64-NEXT: vmseq.vv v10, v8, v19
904 ; RV64-NEXT: vmor.mm v9, v9, v10
905 ; RV64-NEXT: vmseq.vv v10, v8, v20
906 ; RV64-NEXT: vmor.mm v9, v9, v10
907 ; RV64-NEXT: vmseq.vv v10, v8, v21
908 ; RV64-NEXT: vmor.mm v9, v9, v10
909 ; RV64-NEXT: vmseq.vv v10, v8, v22
910 ; RV64-NEXT: vmor.mm v9, v9, v10
911 ; RV64-NEXT: vmseq.vv v10, v8, v23
912 ; RV64-NEXT: vmor.mm v9, v9, v10
913 ; RV64-NEXT: vmseq.vx v10, v8, a0
914 ; RV64-NEXT: vmseq.vv v11, v8, v11
915 ; RV64-NEXT: vmor.mm v9, v9, v11
916 ; RV64-NEXT: vmseq.vx v11, v8, a1
917 ; RV64-NEXT: vmseq.vv v12, v8, v24
918 ; RV64-NEXT: vmor.mm v9, v9, v12
919 ; RV64-NEXT: vmseq.vx v12, v8, a2
920 ; RV64-NEXT: vmseq.vv v13, v8, v25
921 ; RV64-NEXT: vmor.mm v9, v9, v13
922 ; RV64-NEXT: vmseq.vx v13, v8, a3
923 ; RV64-NEXT: vmor.mm v9, v9, v10
924 ; RV64-NEXT: vmseq.vx v10, v8, a4
925 ; RV64-NEXT: vmor.mm v9, v9, v11
926 ; RV64-NEXT: vmseq.vx v11, v8, a5
927 ; RV64-NEXT: vmor.mm v9, v9, v12
928 ; RV64-NEXT: vmseq.vx v12, v8, a6
929 ; RV64-NEXT: vmor.mm v9, v9, v13
930 ; RV64-NEXT: vmseq.vx v13, v8, a7
931 ; RV64-NEXT: vmor.mm v9, v9, v10
932 ; RV64-NEXT: vmseq.vx v10, v8, t0
933 ; RV64-NEXT: vmor.mm v9, v9, v11
934 ; RV64-NEXT: vmseq.vx v11, v8, t1
935 ; RV64-NEXT: vmor.mm v9, v9, v12
936 ; RV64-NEXT: vmseq.vx v12, v8, t2
937 ; RV64-NEXT: vmor.mm v9, v9, v13
938 ; RV64-NEXT: vmseq.vx v13, v8, t3
939 ; RV64-NEXT: vmor.mm v9, v9, v10
940 ; RV64-NEXT: vmseq.vx v10, v8, t4
941 ; RV64-NEXT: vmor.mm v9, v9, v11
942 ; RV64-NEXT: vmseq.vx v11, v8, t5
943 ; RV64-NEXT: vmor.mm v9, v9, v12
944 ; RV64-NEXT: vmseq.vx v12, v8, t6
945 ; RV64-NEXT: vmor.mm v9, v9, v13
946 ; RV64-NEXT: vmor.mm v9, v9, v10
947 ; RV64-NEXT: vmor.mm v9, v9, v11
948 ; RV64-NEXT: vmor.mm v9, v9, v12
949 ; RV64-NEXT: vmseq.vx v8, v8, s0
950 ; RV64-NEXT: vmor.mm v8, v9, v8
951 ; RV64-NEXT: vmand.mm v0, v8, v0
952 ; RV64-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
953 ; RV64-NEXT: .cfi_restore s0
954 ; RV64-NEXT: addi sp, sp, 16
955 ; RV64-NEXT: .cfi_def_cfa_offset 0
956 ; RV64-NEXT: ret
957 %r = tail call <16 x i1> @llvm.experimental.vector.match(<16 x i8> %op1, <32 x i8> %op2, <16 x i1> %mask)
958 ret <16 x i1> %r
959 }
961 define <vscale x 4 x i1> @match_nxv4xi32_v4i32(<vscale x 4 x i32> %op1, <4 x i32> %op2, <vscale x 4 x i1> %mask) {
962 ; CHECK-LABEL: match_nxv4xi32_v4i32:
963 ; CHECK: # %bb.0:
964 ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
965 ; CHECK-NEXT: vrgather.vi v12, v10, 1
966 ; CHECK-NEXT: vmseq.vv v14, v8, v12
967 ; CHECK-NEXT: vrgather.vi v12, v10, 0
968 ; CHECK-NEXT: vmseq.vv v15, v8, v12
969 ; CHECK-NEXT: vmor.mm v12, v15, v14
970 ; CHECK-NEXT: vrgather.vi v14, v10, 2
971 ; CHECK-NEXT: vmseq.vv v13, v8, v14
972 ; CHECK-NEXT: vrgather.vi v14, v10, 3
973 ; CHECK-NEXT: vmor.mm v10, v12, v13
974 ; CHECK-NEXT: vmseq.vv v11, v8, v14
975 ; CHECK-NEXT: vmor.mm v8, v10, v11
976 ; CHECK-NEXT: vmand.mm v0, v8, v0
977 ; CHECK-NEXT: ret
978 %r = tail call <vscale x 4 x i1> @llvm.experimental.vector.match(<vscale x 4 x i32> %op1, <4 x i32> %op2, <vscale x 4 x i1> %mask)
979 ret <vscale x 4 x i1> %r
980 }
982 define <vscale x 2 x i1> @match_nxv2xi64_v2i64(<vscale x 2 x i64> %op1, <2 x i64> %op2, <vscale x 2 x i1> %mask) {
983 ; CHECK-LABEL: match_nxv2xi64_v2i64:
984 ; CHECK: # %bb.0:
985 ; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma
986 ; CHECK-NEXT: vrgather.vi v12, v10, 1
987 ; CHECK-NEXT: vmseq.vv v14, v8, v12
988 ; CHECK-NEXT: vrgather.vi v12, v10, 0
989 ; CHECK-NEXT: vmseq.vv v10, v8, v12
990 ; CHECK-NEXT: vmor.mm v8, v10, v14
991 ; CHECK-NEXT: vmand.mm v0, v8, v0
992 ; CHECK-NEXT: ret
993 %r = tail call <vscale x 2 x i1> @llvm.experimental.vector.match(<vscale x 2 x i64> %op1, <2 x i64> %op2, <vscale x 2 x i1> %mask)
994 ret <vscale x 2 x i1> %r
995 }
997 define <4 x i1> @match_v4xi32_v4i32(<4 x i32> %op1, <4 x i32> %op2, <4 x i1> %mask) {
998 ; CHECK-LABEL: match_v4xi32_v4i32:
999 ; CHECK: # %bb.0:
1000 ; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
1001 ; CHECK-NEXT: vrgather.vi v10, v9, 1
1002 ; CHECK-NEXT: vrgather.vi v11, v9, 0
1003 ; CHECK-NEXT: vmseq.vv v10, v8, v10
1004 ; CHECK-NEXT: vmseq.vv v11, v8, v11
1005 ; CHECK-NEXT: vmor.mm v10, v11, v10
1006 ; CHECK-NEXT: vrgather.vi v11, v9, 2
1007 ; CHECK-NEXT: vrgather.vi v12, v9, 3
1008 ; CHECK-NEXT: vmseq.vv v9, v8, v11
1009 ; CHECK-NEXT: vmor.mm v9, v10, v9
1010 ; CHECK-NEXT: vmseq.vv v8, v8, v12
1011 ; CHECK-NEXT: vmor.mm v8, v9, v8
1012 ; CHECK-NEXT: vmand.mm v0, v8, v0
1013 ; CHECK-NEXT: ret
1014 %r = tail call <4 x i1> @llvm.experimental.vector.match(<4 x i32> %op1, <4 x i32> %op2, <4 x i1> %mask)
1015 ret <4 x i1> %r
1016 }
1018 define <2 x i1> @match_v2xi64_v2i64(<2 x i64> %op1, <2 x i64> %op2, <2 x i1> %mask) {
1019 ; CHECK-LABEL: match_v2xi64_v2i64:
1020 ; CHECK: # %bb.0:
1021 ; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma
1022 ; CHECK-NEXT: vrgather.vi v10, v9, 1
1023 ; CHECK-NEXT: vrgather.vi v11, v9, 0
1024 ; CHECK-NEXT: vmseq.vv v9, v8, v10
1025 ; CHECK-NEXT: vmseq.vv v8, v8, v11
1026 ; CHECK-NEXT: vmor.mm v8, v8, v9
1027 ; CHECK-NEXT: vmand.mm v0, v8, v0
1028 ; CHECK-NEXT: ret
1029 %r = tail call <2 x i1> @llvm.experimental.vector.match(<2 x i64> %op1, <2 x i64> %op2, <2 x i1> %mask)
1030 ret <2 x i1> %r
1031 }