| blob | cf73dceaae3064562e315f470666f1d68fff94ab |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
2 ; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-RV32
3 ; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-RV64
4 ; RUN: llc -mtriple=riscv32 -mattr=+v,+zvkb -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK-ZVKB,CHECK-ZVKB-NOZBB,CHECK-ZVKB32
5 ; RUN: llc -mtriple=riscv64 -mattr=+v,+zvkb -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK-ZVKB,CHECK-ZVKB-NOZBB,CHECK-ZVKB64
6 ; RUN: llc -mtriple=riscv32 -mattr=+v,+zvkb,+zbb -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK-ZVKB,CHECK-ZVKB-ZBB,CHECK-ZVKB32
7 ; RUN: llc -mtriple=riscv64 -mattr=+v,+zvkb,+zbb -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK-ZVKB,CHECK-ZVKB-ZBB,CHECK-ZVKB64
9 define <vscale x 1 x i8> @vandn_vv_nxv1i8(<vscale x 1 x i8> %x, <vscale x 1 x i8> %y) {
10 ; CHECK-LABEL: vandn_vv_nxv1i8:
11 ; CHECK: # %bb.0:
12 ; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma
13 ; CHECK-NEXT: vnot.v v8, v8
14 ; CHECK-NEXT: vand.vv v8, v8, v9
15 ; CHECK-NEXT: ret
16 ;
17 ; CHECK-ZVKB-LABEL: vandn_vv_nxv1i8:
18 ; CHECK-ZVKB: # %bb.0:
19 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e8, mf8, ta, ma
20 ; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8
21 ; CHECK-ZVKB-NEXT: ret
22 %a = xor <vscale x 1 x i8> %x, splat (i8 -1)
23 %b = and <vscale x 1 x i8> %a, %y
24 ret <vscale x 1 x i8> %b
25 }
27 define <vscale x 1 x i8> @vandn_vv_swapped_nxv1i8(<vscale x 1 x i8> %x, <vscale x 1 x i8> %y) {
28 ; CHECK-LABEL: vandn_vv_swapped_nxv1i8:
29 ; CHECK: # %bb.0:
30 ; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma
31 ; CHECK-NEXT: vnot.v v8, v8
32 ; CHECK-NEXT: vand.vv v8, v9, v8
33 ; CHECK-NEXT: ret
34 ;
35 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv1i8:
36 ; CHECK-ZVKB: # %bb.0:
37 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e8, mf8, ta, ma
38 ; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8
39 ; CHECK-ZVKB-NEXT: ret
40 %a = xor <vscale x 1 x i8> %x, splat (i8 -1)
41 %b = and <vscale x 1 x i8> %y, %a
42 ret <vscale x 1 x i8> %b
43 }
45 define <vscale x 1 x i8> @vandn_vx_nxv1i8(i8 %x, <vscale x 1 x i8> %y) {
46 ; CHECK-LABEL: vandn_vx_nxv1i8:
47 ; CHECK: # %bb.0:
48 ; CHECK-NEXT: not a0, a0
49 ; CHECK-NEXT: vsetvli a1, zero, e8, mf8, ta, ma
50 ; CHECK-NEXT: vand.vx v8, v8, a0
51 ; CHECK-NEXT: ret
52 ;
53 ; CHECK-ZVKB-LABEL: vandn_vx_nxv1i8:
54 ; CHECK-ZVKB: # %bb.0:
55 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e8, mf8, ta, ma
56 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
57 ; CHECK-ZVKB-NEXT: ret
58 %a = xor i8 %x, -1
59 %head = insertelement <vscale x 1 x i8> poison, i8 %a, i32 0
60 %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
61 %b = and <vscale x 1 x i8> %splat, %y
62 ret <vscale x 1 x i8> %b
63 }
65 define <vscale x 1 x i8> @vandn_vx_swapped_nxv1i8(i8 %x, <vscale x 1 x i8> %y) {
66 ; CHECK-LABEL: vandn_vx_swapped_nxv1i8:
67 ; CHECK: # %bb.0:
68 ; CHECK-NEXT: not a0, a0
69 ; CHECK-NEXT: vsetvli a1, zero, e8, mf8, ta, ma
70 ; CHECK-NEXT: vand.vx v8, v8, a0
71 ; CHECK-NEXT: ret
72 ;
73 ; CHECK-ZVKB-LABEL: vandn_vx_swapped_nxv1i8:
74 ; CHECK-ZVKB: # %bb.0:
75 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e8, mf8, ta, ma
76 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
77 ; CHECK-ZVKB-NEXT: ret
78 %a = xor i8 %x, -1
79 %head = insertelement <vscale x 1 x i8> poison, i8 %a, i32 0
80 %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
81 %b = and <vscale x 1 x i8> %splat, %y
82 ret <vscale x 1 x i8> %b
83 }
85 define <vscale x 2 x i8> @vandn_vv_nxv2i8(<vscale x 2 x i8> %x, <vscale x 2 x i8> %y) {
86 ; CHECK-LABEL: vandn_vv_nxv2i8:
87 ; CHECK: # %bb.0:
88 ; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma
89 ; CHECK-NEXT: vnot.v v8, v8
90 ; CHECK-NEXT: vand.vv v8, v8, v9
91 ; CHECK-NEXT: ret
92 ;
93 ; CHECK-ZVKB-LABEL: vandn_vv_nxv2i8:
94 ; CHECK-ZVKB: # %bb.0:
95 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e8, mf4, ta, ma
96 ; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8
97 ; CHECK-ZVKB-NEXT: ret
98 %a = xor <vscale x 2 x i8> %x, splat (i8 -1)
99 %b = and <vscale x 2 x i8> %a, %y
100 ret <vscale x 2 x i8> %b
101 }
103 define <vscale x 2 x i8> @vandn_vv_swapped_nxv2i8(<vscale x 2 x i8> %x, <vscale x 2 x i8> %y) {
104 ; CHECK-LABEL: vandn_vv_swapped_nxv2i8:
105 ; CHECK: # %bb.0:
106 ; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma
107 ; CHECK-NEXT: vnot.v v8, v8
108 ; CHECK-NEXT: vand.vv v8, v9, v8
109 ; CHECK-NEXT: ret
110 ;
111 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv2i8:
112 ; CHECK-ZVKB: # %bb.0:
113 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e8, mf4, ta, ma
114 ; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8
115 ; CHECK-ZVKB-NEXT: ret
116 %a = xor <vscale x 2 x i8> %x, splat (i8 -1)
117 %b = and <vscale x 2 x i8> %y, %a
118 ret <vscale x 2 x i8> %b
119 }
121 define <vscale x 2 x i8> @vandn_vx_nxv2i8(i8 %x, <vscale x 2 x i8> %y) {
122 ; CHECK-LABEL: vandn_vx_nxv2i8:
123 ; CHECK: # %bb.0:
124 ; CHECK-NEXT: not a0, a0
125 ; CHECK-NEXT: vsetvli a1, zero, e8, mf4, ta, ma
126 ; CHECK-NEXT: vand.vx v8, v8, a0
127 ; CHECK-NEXT: ret
128 ;
129 ; CHECK-ZVKB-LABEL: vandn_vx_nxv2i8:
130 ; CHECK-ZVKB: # %bb.0:
131 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e8, mf4, ta, ma
132 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
133 ; CHECK-ZVKB-NEXT: ret
134 %a = xor i8 %x, -1
135 %head = insertelement <vscale x 2 x i8> poison, i8 %a, i32 0
136 %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
137 %b = and <vscale x 2 x i8> %splat, %y
138 ret <vscale x 2 x i8> %b
139 }
141 define <vscale x 2 x i8> @vandn_vx_swapped_nxv2i8(i8 %x, <vscale x 2 x i8> %y) {
142 ; CHECK-LABEL: vandn_vx_swapped_nxv2i8:
143 ; CHECK: # %bb.0:
144 ; CHECK-NEXT: not a0, a0
145 ; CHECK-NEXT: vsetvli a1, zero, e8, mf4, ta, ma
146 ; CHECK-NEXT: vand.vx v8, v8, a0
147 ; CHECK-NEXT: ret
148 ;
149 ; CHECK-ZVKB-LABEL: vandn_vx_swapped_nxv2i8:
150 ; CHECK-ZVKB: # %bb.0:
151 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e8, mf4, ta, ma
152 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
153 ; CHECK-ZVKB-NEXT: ret
154 %a = xor i8 %x, -1
155 %head = insertelement <vscale x 2 x i8> poison, i8 %a, i32 0
156 %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
157 %b = and <vscale x 2 x i8> %splat, %y
158 ret <vscale x 2 x i8> %b
159 }
161 define <vscale x 4 x i8> @vandn_vv_nxv4i8(<vscale x 4 x i8> %x, <vscale x 4 x i8> %y) {
162 ; CHECK-LABEL: vandn_vv_nxv4i8:
163 ; CHECK: # %bb.0:
164 ; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma
165 ; CHECK-NEXT: vnot.v v8, v8
166 ; CHECK-NEXT: vand.vv v8, v8, v9
167 ; CHECK-NEXT: ret
168 ;
169 ; CHECK-ZVKB-LABEL: vandn_vv_nxv4i8:
170 ; CHECK-ZVKB: # %bb.0:
171 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e8, mf2, ta, ma
172 ; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8
173 ; CHECK-ZVKB-NEXT: ret
174 %a = xor <vscale x 4 x i8> %x, splat (i8 -1)
175 %b = and <vscale x 4 x i8> %a, %y
176 ret <vscale x 4 x i8> %b
177 }
179 define <vscale x 4 x i8> @vandn_vv_swapped_nxv4i8(<vscale x 4 x i8> %x, <vscale x 4 x i8> %y) {
180 ; CHECK-LABEL: vandn_vv_swapped_nxv4i8:
181 ; CHECK: # %bb.0:
182 ; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma
183 ; CHECK-NEXT: vnot.v v8, v8
184 ; CHECK-NEXT: vand.vv v8, v9, v8
185 ; CHECK-NEXT: ret
186 ;
187 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv4i8:
188 ; CHECK-ZVKB: # %bb.0:
189 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e8, mf2, ta, ma
190 ; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8
191 ; CHECK-ZVKB-NEXT: ret
192 %a = xor <vscale x 4 x i8> %x, splat (i8 -1)
193 %b = and <vscale x 4 x i8> %y, %a
194 ret <vscale x 4 x i8> %b
195 }
197 define <vscale x 4 x i8> @vandn_vx_nxv4i8(i8 %x, <vscale x 4 x i8> %y) {
198 ; CHECK-LABEL: vandn_vx_nxv4i8:
199 ; CHECK: # %bb.0:
200 ; CHECK-NEXT: not a0, a0
201 ; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, ma
202 ; CHECK-NEXT: vand.vx v8, v8, a0
203 ; CHECK-NEXT: ret
204 ;
205 ; CHECK-ZVKB-LABEL: vandn_vx_nxv4i8:
206 ; CHECK-ZVKB: # %bb.0:
207 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e8, mf2, ta, ma
208 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
209 ; CHECK-ZVKB-NEXT: ret
210 %a = xor i8 %x, -1
211 %head = insertelement <vscale x 4 x i8> poison, i8 %a, i32 0
212 %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
213 %b = and <vscale x 4 x i8> %splat, %y
214 ret <vscale x 4 x i8> %b
215 }
217 define <vscale x 4 x i8> @vandn_vx_swapped_nxv4i8(i8 %x, <vscale x 4 x i8> %y) {
218 ; CHECK-LABEL: vandn_vx_swapped_nxv4i8:
219 ; CHECK: # %bb.0:
220 ; CHECK-NEXT: not a0, a0
221 ; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, ma
222 ; CHECK-NEXT: vand.vx v8, v8, a0
223 ; CHECK-NEXT: ret
224 ;
225 ; CHECK-ZVKB-LABEL: vandn_vx_swapped_nxv4i8:
226 ; CHECK-ZVKB: # %bb.0:
227 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e8, mf2, ta, ma
228 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
229 ; CHECK-ZVKB-NEXT: ret
230 %a = xor i8 %x, -1
231 %head = insertelement <vscale x 4 x i8> poison, i8 %a, i32 0
232 %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
233 %b = and <vscale x 4 x i8> %splat, %y
234 ret <vscale x 4 x i8> %b
235 }
237 define <vscale x 8 x i8> @vandn_vv_nxv8i8(<vscale x 8 x i8> %x, <vscale x 8 x i8> %y) {
238 ; CHECK-LABEL: vandn_vv_nxv8i8:
239 ; CHECK: # %bb.0:
240 ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma
241 ; CHECK-NEXT: vnot.v v8, v8
242 ; CHECK-NEXT: vand.vv v8, v8, v9
243 ; CHECK-NEXT: ret
244 ;
245 ; CHECK-ZVKB-LABEL: vandn_vv_nxv8i8:
246 ; CHECK-ZVKB: # %bb.0:
247 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e8, m1, ta, ma
248 ; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8
249 ; CHECK-ZVKB-NEXT: ret
250 %a = xor <vscale x 8 x i8> %x, splat (i8 -1)
251 %b = and <vscale x 8 x i8> %a, %y
252 ret <vscale x 8 x i8> %b
253 }
255 define <vscale x 8 x i8> @vandn_vv_swapped_nxv8i8(<vscale x 8 x i8> %x, <vscale x 8 x i8> %y) {
256 ; CHECK-LABEL: vandn_vv_swapped_nxv8i8:
257 ; CHECK: # %bb.0:
258 ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma
259 ; CHECK-NEXT: vnot.v v8, v8
260 ; CHECK-NEXT: vand.vv v8, v9, v8
261 ; CHECK-NEXT: ret
262 ;
263 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv8i8:
264 ; CHECK-ZVKB: # %bb.0:
265 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e8, m1, ta, ma
266 ; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8
267 ; CHECK-ZVKB-NEXT: ret
268 %a = xor <vscale x 8 x i8> %x, splat (i8 -1)
269 %b = and <vscale x 8 x i8> %y, %a
270 ret <vscale x 8 x i8> %b
271 }
273 define <vscale x 8 x i8> @vandn_vx_nxv8i8(i8 %x, <vscale x 8 x i8> %y) {
274 ; CHECK-LABEL: vandn_vx_nxv8i8:
275 ; CHECK: # %bb.0:
276 ; CHECK-NEXT: not a0, a0
277 ; CHECK-NEXT: vsetvli a1, zero, e8, m1, ta, ma
278 ; CHECK-NEXT: vand.vx v8, v8, a0
279 ; CHECK-NEXT: ret
280 ;
281 ; CHECK-ZVKB-LABEL: vandn_vx_nxv8i8:
282 ; CHECK-ZVKB: # %bb.0:
283 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e8, m1, ta, ma
284 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
285 ; CHECK-ZVKB-NEXT: ret
286 %a = xor i8 %x, -1
287 %head = insertelement <vscale x 8 x i8> poison, i8 %a, i32 0
288 %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
289 %b = and <vscale x 8 x i8> %splat, %y
290 ret <vscale x 8 x i8> %b
291 }
293 define <vscale x 8 x i8> @vandn_vx_swapped_nxv8i8(i8 %x, <vscale x 8 x i8> %y) {
294 ; CHECK-LABEL: vandn_vx_swapped_nxv8i8:
295 ; CHECK: # %bb.0:
296 ; CHECK-NEXT: not a0, a0
297 ; CHECK-NEXT: vsetvli a1, zero, e8, m1, ta, ma
298 ; CHECK-NEXT: vand.vx v8, v8, a0
299 ; CHECK-NEXT: ret
300 ;
301 ; CHECK-ZVKB-LABEL: vandn_vx_swapped_nxv8i8:
302 ; CHECK-ZVKB: # %bb.0:
303 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e8, m1, ta, ma
304 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
305 ; CHECK-ZVKB-NEXT: ret
306 %a = xor i8 %x, -1
307 %head = insertelement <vscale x 8 x i8> poison, i8 %a, i32 0
308 %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
309 %b = and <vscale x 8 x i8> %splat, %y
310 ret <vscale x 8 x i8> %b
311 }
313 define <vscale x 16 x i8> @vandn_vv_nxv16i8(<vscale x 16 x i8> %x, <vscale x 16 x i8> %y) {
314 ; CHECK-LABEL: vandn_vv_nxv16i8:
315 ; CHECK: # %bb.0:
316 ; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma
317 ; CHECK-NEXT: vnot.v v8, v8
318 ; CHECK-NEXT: vand.vv v8, v8, v10
319 ; CHECK-NEXT: ret
320 ;
321 ; CHECK-ZVKB-LABEL: vandn_vv_nxv16i8:
322 ; CHECK-ZVKB: # %bb.0:
323 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e8, m2, ta, ma
324 ; CHECK-ZVKB-NEXT: vandn.vv v8, v10, v8
325 ; CHECK-ZVKB-NEXT: ret
326 %a = xor <vscale x 16 x i8> %x, splat (i8 -1)
327 %b = and <vscale x 16 x i8> %a, %y
328 ret <vscale x 16 x i8> %b
329 }
331 define <vscale x 16 x i8> @vandn_vv_swapped_nxv16i8(<vscale x 16 x i8> %x, <vscale x 16 x i8> %y) {
332 ; CHECK-LABEL: vandn_vv_swapped_nxv16i8:
333 ; CHECK: # %bb.0:
334 ; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma
335 ; CHECK-NEXT: vnot.v v8, v8
336 ; CHECK-NEXT: vand.vv v8, v10, v8
337 ; CHECK-NEXT: ret
338 ;
339 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv16i8:
340 ; CHECK-ZVKB: # %bb.0:
341 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e8, m2, ta, ma
342 ; CHECK-ZVKB-NEXT: vandn.vv v8, v10, v8
343 ; CHECK-ZVKB-NEXT: ret
344 %a = xor <vscale x 16 x i8> %x, splat (i8 -1)
345 %b = and <vscale x 16 x i8> %y, %a
346 ret <vscale x 16 x i8> %b
347 }
349 define <vscale x 16 x i8> @vandn_vx_nxv16i8(i8 %x, <vscale x 16 x i8> %y) {
350 ; CHECK-LABEL: vandn_vx_nxv16i8:
351 ; CHECK: # %bb.0:
352 ; CHECK-NEXT: not a0, a0
353 ; CHECK-NEXT: vsetvli a1, zero, e8, m2, ta, ma
354 ; CHECK-NEXT: vand.vx v8, v8, a0
355 ; CHECK-NEXT: ret
356 ;
357 ; CHECK-ZVKB-LABEL: vandn_vx_nxv16i8:
358 ; CHECK-ZVKB: # %bb.0:
359 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e8, m2, ta, ma
360 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
361 ; CHECK-ZVKB-NEXT: ret
362 %a = xor i8 %x, -1
363 %head = insertelement <vscale x 16 x i8> poison, i8 %a, i32 0
364 %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
365 %b = and <vscale x 16 x i8> %splat, %y
366 ret <vscale x 16 x i8> %b
367 }
369 define <vscale x 16 x i8> @vandn_vx_swapped_nxv16i8(i8 %x, <vscale x 16 x i8> %y) {
370 ; CHECK-LABEL: vandn_vx_swapped_nxv16i8:
371 ; CHECK: # %bb.0:
372 ; CHECK-NEXT: not a0, a0
373 ; CHECK-NEXT: vsetvli a1, zero, e8, m2, ta, ma
374 ; CHECK-NEXT: vand.vx v8, v8, a0
375 ; CHECK-NEXT: ret
376 ;
377 ; CHECK-ZVKB-LABEL: vandn_vx_swapped_nxv16i8:
378 ; CHECK-ZVKB: # %bb.0:
379 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e8, m2, ta, ma
380 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
381 ; CHECK-ZVKB-NEXT: ret
382 %a = xor i8 %x, -1
383 %head = insertelement <vscale x 16 x i8> poison, i8 %a, i32 0
384 %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
385 %b = and <vscale x 16 x i8> %splat, %y
386 ret <vscale x 16 x i8> %b
387 }
389 define <vscale x 32 x i8> @vandn_vv_nxv32i8(<vscale x 32 x i8> %x, <vscale x 32 x i8> %y) {
390 ; CHECK-LABEL: vandn_vv_nxv32i8:
391 ; CHECK: # %bb.0:
392 ; CHECK-NEXT: vsetvli a0, zero, e8, m4, ta, ma
393 ; CHECK-NEXT: vnot.v v8, v8
394 ; CHECK-NEXT: vand.vv v8, v8, v12
395 ; CHECK-NEXT: ret
396 ;
397 ; CHECK-ZVKB-LABEL: vandn_vv_nxv32i8:
398 ; CHECK-ZVKB: # %bb.0:
399 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e8, m4, ta, ma
400 ; CHECK-ZVKB-NEXT: vandn.vv v8, v12, v8
401 ; CHECK-ZVKB-NEXT: ret
402 %a = xor <vscale x 32 x i8> %x, splat (i8 -1)
403 %b = and <vscale x 32 x i8> %a, %y
404 ret <vscale x 32 x i8> %b
405 }
407 define <vscale x 32 x i8> @vandn_vv_swapped_nxv32i8(<vscale x 32 x i8> %x, <vscale x 32 x i8> %y) {
408 ; CHECK-LABEL: vandn_vv_swapped_nxv32i8:
409 ; CHECK: # %bb.0:
410 ; CHECK-NEXT: vsetvli a0, zero, e8, m4, ta, ma
411 ; CHECK-NEXT: vnot.v v8, v8
412 ; CHECK-NEXT: vand.vv v8, v12, v8
413 ; CHECK-NEXT: ret
414 ;
415 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv32i8:
416 ; CHECK-ZVKB: # %bb.0:
417 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e8, m4, ta, ma
418 ; CHECK-ZVKB-NEXT: vandn.vv v8, v12, v8
419 ; CHECK-ZVKB-NEXT: ret
420 %a = xor <vscale x 32 x i8> %x, splat (i8 -1)
421 %b = and <vscale x 32 x i8> %y, %a
422 ret <vscale x 32 x i8> %b
423 }
425 define <vscale x 32 x i8> @vandn_vx_nxv32i8(i8 %x, <vscale x 32 x i8> %y) {
426 ; CHECK-LABEL: vandn_vx_nxv32i8:
427 ; CHECK: # %bb.0:
428 ; CHECK-NEXT: not a0, a0
429 ; CHECK-NEXT: vsetvli a1, zero, e8, m4, ta, ma
430 ; CHECK-NEXT: vand.vx v8, v8, a0
431 ; CHECK-NEXT: ret
432 ;
433 ; CHECK-ZVKB-LABEL: vandn_vx_nxv32i8:
434 ; CHECK-ZVKB: # %bb.0:
435 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e8, m4, ta, ma
436 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
437 ; CHECK-ZVKB-NEXT: ret
438 %a = xor i8 %x, -1
439 %head = insertelement <vscale x 32 x i8> poison, i8 %a, i32 0
440 %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
441 %b = and <vscale x 32 x i8> %splat, %y
442 ret <vscale x 32 x i8> %b
443 }
445 define <vscale x 32 x i8> @vandn_vx_swapped_nxv32i8(i8 %x, <vscale x 32 x i8> %y) {
446 ; CHECK-LABEL: vandn_vx_swapped_nxv32i8:
447 ; CHECK: # %bb.0:
448 ; CHECK-NEXT: not a0, a0
449 ; CHECK-NEXT: vsetvli a1, zero, e8, m4, ta, ma
450 ; CHECK-NEXT: vand.vx v8, v8, a0
451 ; CHECK-NEXT: ret
452 ;
453 ; CHECK-ZVKB-LABEL: vandn_vx_swapped_nxv32i8:
454 ; CHECK-ZVKB: # %bb.0:
455 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e8, m4, ta, ma
456 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
457 ; CHECK-ZVKB-NEXT: ret
458 %a = xor i8 %x, -1
459 %head = insertelement <vscale x 32 x i8> poison, i8 %a, i32 0
460 %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
461 %b = and <vscale x 32 x i8> %splat, %y
462 ret <vscale x 32 x i8> %b
463 }
465 define <vscale x 64 x i8> @vandn_vv_nxv64i8(<vscale x 64 x i8> %x, <vscale x 64 x i8> %y) {
466 ; CHECK-LABEL: vandn_vv_nxv64i8:
467 ; CHECK: # %bb.0:
468 ; CHECK-NEXT: vsetvli a0, zero, e8, m8, ta, ma
469 ; CHECK-NEXT: vnot.v v8, v8
470 ; CHECK-NEXT: vand.vv v8, v8, v16
471 ; CHECK-NEXT: ret
472 ;
473 ; CHECK-ZVKB-LABEL: vandn_vv_nxv64i8:
474 ; CHECK-ZVKB: # %bb.0:
475 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e8, m8, ta, ma
476 ; CHECK-ZVKB-NEXT: vandn.vv v8, v16, v8
477 ; CHECK-ZVKB-NEXT: ret
478 %a = xor <vscale x 64 x i8> %x, splat (i8 -1)
479 %b = and <vscale x 64 x i8> %a, %y
480 ret <vscale x 64 x i8> %b
481 }
483 define <vscale x 64 x i8> @vandn_vv_swapped_nxv64i8(<vscale x 64 x i8> %x, <vscale x 64 x i8> %y) {
484 ; CHECK-LABEL: vandn_vv_swapped_nxv64i8:
485 ; CHECK: # %bb.0:
486 ; CHECK-NEXT: vsetvli a0, zero, e8, m8, ta, ma
487 ; CHECK-NEXT: vnot.v v8, v8
488 ; CHECK-NEXT: vand.vv v8, v16, v8
489 ; CHECK-NEXT: ret
490 ;
491 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv64i8:
492 ; CHECK-ZVKB: # %bb.0:
493 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e8, m8, ta, ma
494 ; CHECK-ZVKB-NEXT: vandn.vv v8, v16, v8
495 ; CHECK-ZVKB-NEXT: ret
496 %a = xor <vscale x 64 x i8> %x, splat (i8 -1)
497 %b = and <vscale x 64 x i8> %y, %a
498 ret <vscale x 64 x i8> %b
499 }
501 define <vscale x 64 x i8> @vandn_vx_nxv64i8(i8 %x, <vscale x 64 x i8> %y) {
502 ; CHECK-LABEL: vandn_vx_nxv64i8:
503 ; CHECK: # %bb.0:
504 ; CHECK-NEXT: not a0, a0
505 ; CHECK-NEXT: vsetvli a1, zero, e8, m8, ta, ma
506 ; CHECK-NEXT: vand.vx v8, v8, a0
507 ; CHECK-NEXT: ret
508 ;
509 ; CHECK-ZVKB-LABEL: vandn_vx_nxv64i8:
510 ; CHECK-ZVKB: # %bb.0:
511 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e8, m8, ta, ma
512 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
513 ; CHECK-ZVKB-NEXT: ret
514 %a = xor i8 %x, -1
515 %head = insertelement <vscale x 64 x i8> poison, i8 %a, i32 0
516 %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
517 %b = and <vscale x 64 x i8> %splat, %y
518 ret <vscale x 64 x i8> %b
519 }
521 define <vscale x 64 x i8> @vandn_vx_swapped_nxv64i8(i8 %x, <vscale x 64 x i8> %y) {
522 ; CHECK-LABEL: vandn_vx_swapped_nxv64i8:
523 ; CHECK: # %bb.0:
524 ; CHECK-NEXT: not a0, a0
525 ; CHECK-NEXT: vsetvli a1, zero, e8, m8, ta, ma
526 ; CHECK-NEXT: vand.vx v8, v8, a0
527 ; CHECK-NEXT: ret
528 ;
529 ; CHECK-ZVKB-LABEL: vandn_vx_swapped_nxv64i8:
530 ; CHECK-ZVKB: # %bb.0:
531 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e8, m8, ta, ma
532 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
533 ; CHECK-ZVKB-NEXT: ret
534 %a = xor i8 %x, -1
535 %head = insertelement <vscale x 64 x i8> poison, i8 %a, i32 0
536 %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
537 %b = and <vscale x 64 x i8> %splat, %y
538 ret <vscale x 64 x i8> %b
539 }
541 define <vscale x 1 x i16> @vandn_vv_nxv1i16(<vscale x 1 x i16> %x, <vscale x 1 x i16> %y) {
542 ; CHECK-LABEL: vandn_vv_nxv1i16:
543 ; CHECK: # %bb.0:
544 ; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma
545 ; CHECK-NEXT: vnot.v v8, v8
546 ; CHECK-NEXT: vand.vv v8, v8, v9
547 ; CHECK-NEXT: ret
548 ;
549 ; CHECK-ZVKB-LABEL: vandn_vv_nxv1i16:
550 ; CHECK-ZVKB: # %bb.0:
551 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e16, mf4, ta, ma
552 ; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8
553 ; CHECK-ZVKB-NEXT: ret
554 %a = xor <vscale x 1 x i16> %x, splat (i16 -1)
555 %b = and <vscale x 1 x i16> %a, %y
556 ret <vscale x 1 x i16> %b
557 }
559 define <vscale x 1 x i16> @vandn_vv_swapped_nxv1i16(<vscale x 1 x i16> %x, <vscale x 1 x i16> %y) {
560 ; CHECK-LABEL: vandn_vv_swapped_nxv1i16:
561 ; CHECK: # %bb.0:
562 ; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma
563 ; CHECK-NEXT: vnot.v v8, v8
564 ; CHECK-NEXT: vand.vv v8, v9, v8
565 ; CHECK-NEXT: ret
566 ;
567 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv1i16:
568 ; CHECK-ZVKB: # %bb.0:
569 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e16, mf4, ta, ma
570 ; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8
571 ; CHECK-ZVKB-NEXT: ret
572 %a = xor <vscale x 1 x i16> %x, splat (i16 -1)
573 %b = and <vscale x 1 x i16> %y, %a
574 ret <vscale x 1 x i16> %b
575 }
577 define <vscale x 1 x i16> @vandn_vx_nxv1i16(i16 %x, <vscale x 1 x i16> %y) {
578 ; CHECK-LABEL: vandn_vx_nxv1i16:
579 ; CHECK: # %bb.0:
580 ; CHECK-NEXT: not a0, a0
581 ; CHECK-NEXT: vsetvli a1, zero, e16, mf4, ta, ma
582 ; CHECK-NEXT: vand.vx v8, v8, a0
583 ; CHECK-NEXT: ret
584 ;
585 ; CHECK-ZVKB-LABEL: vandn_vx_nxv1i16:
586 ; CHECK-ZVKB: # %bb.0:
587 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e16, mf4, ta, ma
588 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
589 ; CHECK-ZVKB-NEXT: ret
590 %a = xor i16 %x, -1
591 %head = insertelement <vscale x 1 x i16> poison, i16 %a, i32 0
592 %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
593 %b = and <vscale x 1 x i16> %splat, %y
594 ret <vscale x 1 x i16> %b
595 }
597 define <vscale x 1 x i16> @vandn_vx_swapped_nxv1i16(i16 %x, <vscale x 1 x i16> %y) {
598 ; CHECK-LABEL: vandn_vx_swapped_nxv1i16:
599 ; CHECK: # %bb.0:
600 ; CHECK-NEXT: not a0, a0
601 ; CHECK-NEXT: vsetvli a1, zero, e16, mf4, ta, ma
602 ; CHECK-NEXT: vand.vx v8, v8, a0
603 ; CHECK-NEXT: ret
604 ;
605 ; CHECK-ZVKB-LABEL: vandn_vx_swapped_nxv1i16:
606 ; CHECK-ZVKB: # %bb.0:
607 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e16, mf4, ta, ma
608 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
609 ; CHECK-ZVKB-NEXT: ret
610 %a = xor i16 %x, -1
611 %head = insertelement <vscale x 1 x i16> poison, i16 %a, i32 0
612 %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
613 %b = and <vscale x 1 x i16> %splat, %y
614 ret <vscale x 1 x i16> %b
615 }
617 define <vscale x 2 x i16> @vandn_vv_nxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i16> %y) {
618 ; CHECK-LABEL: vandn_vv_nxv2i16:
619 ; CHECK: # %bb.0:
620 ; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
621 ; CHECK-NEXT: vnot.v v8, v8
622 ; CHECK-NEXT: vand.vv v8, v8, v9
623 ; CHECK-NEXT: ret
624 ;
625 ; CHECK-ZVKB-LABEL: vandn_vv_nxv2i16:
626 ; CHECK-ZVKB: # %bb.0:
627 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
628 ; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8
629 ; CHECK-ZVKB-NEXT: ret
630 %a = xor <vscale x 2 x i16> %x, splat (i16 -1)
631 %b = and <vscale x 2 x i16> %a, %y
632 ret <vscale x 2 x i16> %b
633 }
635 define <vscale x 2 x i16> @vandn_vv_swapped_nxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i16> %y) {
636 ; CHECK-LABEL: vandn_vv_swapped_nxv2i16:
637 ; CHECK: # %bb.0:
638 ; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
639 ; CHECK-NEXT: vnot.v v8, v8
640 ; CHECK-NEXT: vand.vv v8, v9, v8
641 ; CHECK-NEXT: ret
642 ;
643 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv2i16:
644 ; CHECK-ZVKB: # %bb.0:
645 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
646 ; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8
647 ; CHECK-ZVKB-NEXT: ret
648 %a = xor <vscale x 2 x i16> %x, splat (i16 -1)
649 %b = and <vscale x 2 x i16> %y, %a
650 ret <vscale x 2 x i16> %b
651 }
653 define <vscale x 2 x i16> @vandn_vx_nxv2i16(i16 %x, <vscale x 2 x i16> %y) {
654 ; CHECK-LABEL: vandn_vx_nxv2i16:
655 ; CHECK: # %bb.0:
656 ; CHECK-NEXT: not a0, a0
657 ; CHECK-NEXT: vsetvli a1, zero, e16, mf2, ta, ma
658 ; CHECK-NEXT: vand.vx v8, v8, a0
659 ; CHECK-NEXT: ret
660 ;
661 ; CHECK-ZVKB-LABEL: vandn_vx_nxv2i16:
662 ; CHECK-ZVKB: # %bb.0:
663 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e16, mf2, ta, ma
664 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
665 ; CHECK-ZVKB-NEXT: ret
666 %a = xor i16 %x, -1
667 %head = insertelement <vscale x 2 x i16> poison, i16 %a, i32 0
668 %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
669 %b = and <vscale x 2 x i16> %splat, %y
670 ret <vscale x 2 x i16> %b
671 }
673 define <vscale x 2 x i16> @vandn_vx_swapped_nxv2i16(i16 %x, <vscale x 2 x i16> %y) {
674 ; CHECK-LABEL: vandn_vx_swapped_nxv2i16:
675 ; CHECK: # %bb.0:
676 ; CHECK-NEXT: not a0, a0
677 ; CHECK-NEXT: vsetvli a1, zero, e16, mf2, ta, ma
678 ; CHECK-NEXT: vand.vx v8, v8, a0
679 ; CHECK-NEXT: ret
680 ;
681 ; CHECK-ZVKB-LABEL: vandn_vx_swapped_nxv2i16:
682 ; CHECK-ZVKB: # %bb.0:
683 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e16, mf2, ta, ma
684 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
685 ; CHECK-ZVKB-NEXT: ret
686 %a = xor i16 %x, -1
687 %head = insertelement <vscale x 2 x i16> poison, i16 %a, i32 0
688 %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
689 %b = and <vscale x 2 x i16> %splat, %y
690 ret <vscale x 2 x i16> %b
691 }
693 define <vscale x 4 x i16> @vandn_vv_nxv4i16(<vscale x 4 x i16> %x, <vscale x 4 x i16> %y) {
694 ; CHECK-LABEL: vandn_vv_nxv4i16:
695 ; CHECK: # %bb.0:
696 ; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma
697 ; CHECK-NEXT: vnot.v v8, v8
698 ; CHECK-NEXT: vand.vv v8, v8, v9
699 ; CHECK-NEXT: ret
700 ;
701 ; CHECK-ZVKB-LABEL: vandn_vv_nxv4i16:
702 ; CHECK-ZVKB: # %bb.0:
703 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e16, m1, ta, ma
704 ; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8
705 ; CHECK-ZVKB-NEXT: ret
706 %a = xor <vscale x 4 x i16> %x, splat (i16 -1)
707 %b = and <vscale x 4 x i16> %a, %y
708 ret <vscale x 4 x i16> %b
709 }
711 define <vscale x 4 x i16> @vandn_vv_swapped_nxv4i16(<vscale x 4 x i16> %x, <vscale x 4 x i16> %y) {
712 ; CHECK-LABEL: vandn_vv_swapped_nxv4i16:
713 ; CHECK: # %bb.0:
714 ; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma
715 ; CHECK-NEXT: vnot.v v8, v8
716 ; CHECK-NEXT: vand.vv v8, v9, v8
717 ; CHECK-NEXT: ret
718 ;
719 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv4i16:
720 ; CHECK-ZVKB: # %bb.0:
721 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e16, m1, ta, ma
722 ; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8
723 ; CHECK-ZVKB-NEXT: ret
724 %a = xor <vscale x 4 x i16> %x, splat (i16 -1)
725 %b = and <vscale x 4 x i16> %y, %a
726 ret <vscale x 4 x i16> %b
727 }
729 define <vscale x 4 x i16> @vandn_vx_nxv4i16(i16 %x, <vscale x 4 x i16> %y) {
730 ; CHECK-LABEL: vandn_vx_nxv4i16:
731 ; CHECK: # %bb.0:
732 ; CHECK-NEXT: not a0, a0
733 ; CHECK-NEXT: vsetvli a1, zero, e16, m1, ta, ma
734 ; CHECK-NEXT: vand.vx v8, v8, a0
735 ; CHECK-NEXT: ret
736 ;
737 ; CHECK-ZVKB-LABEL: vandn_vx_nxv4i16:
738 ; CHECK-ZVKB: # %bb.0:
739 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e16, m1, ta, ma
740 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
741 ; CHECK-ZVKB-NEXT: ret
742 %a = xor i16 %x, -1
743 %head = insertelement <vscale x 4 x i16> poison, i16 %a, i32 0
744 %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
745 %b = and <vscale x 4 x i16> %splat, %y
746 ret <vscale x 4 x i16> %b
747 }
749 define <vscale x 4 x i16> @vandn_vx_swapped_nxv4i16(i16 %x, <vscale x 4 x i16> %y) {
750 ; CHECK-LABEL: vandn_vx_swapped_nxv4i16:
751 ; CHECK: # %bb.0:
752 ; CHECK-NEXT: not a0, a0
753 ; CHECK-NEXT: vsetvli a1, zero, e16, m1, ta, ma
754 ; CHECK-NEXT: vand.vx v8, v8, a0
755 ; CHECK-NEXT: ret
756 ;
757 ; CHECK-ZVKB-LABEL: vandn_vx_swapped_nxv4i16:
758 ; CHECK-ZVKB: # %bb.0:
759 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e16, m1, ta, ma
760 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
761 ; CHECK-ZVKB-NEXT: ret
762 %a = xor i16 %x, -1
763 %head = insertelement <vscale x 4 x i16> poison, i16 %a, i32 0
764 %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
765 %b = and <vscale x 4 x i16> %splat, %y
766 ret <vscale x 4 x i16> %b
767 }
769 define <vscale x 8 x i16> @vandn_vv_nxv8i16(<vscale x 8 x i16> %x, <vscale x 8 x i16> %y) {
770 ; CHECK-LABEL: vandn_vv_nxv8i16:
771 ; CHECK: # %bb.0:
772 ; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma
773 ; CHECK-NEXT: vnot.v v8, v8
774 ; CHECK-NEXT: vand.vv v8, v8, v10
775 ; CHECK-NEXT: ret
776 ;
777 ; CHECK-ZVKB-LABEL: vandn_vv_nxv8i16:
778 ; CHECK-ZVKB: # %bb.0:
779 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e16, m2, ta, ma
780 ; CHECK-ZVKB-NEXT: vandn.vv v8, v10, v8
781 ; CHECK-ZVKB-NEXT: ret
782 %a = xor <vscale x 8 x i16> %x, splat (i16 -1)
783 %b = and <vscale x 8 x i16> %a, %y
784 ret <vscale x 8 x i16> %b
785 }
787 define <vscale x 8 x i16> @vandn_vv_swapped_nxv8i16(<vscale x 8 x i16> %x, <vscale x 8 x i16> %y) {
788 ; CHECK-LABEL: vandn_vv_swapped_nxv8i16:
789 ; CHECK: # %bb.0:
790 ; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma
791 ; CHECK-NEXT: vnot.v v8, v8
792 ; CHECK-NEXT: vand.vv v8, v10, v8
793 ; CHECK-NEXT: ret
794 ;
795 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv8i16:
796 ; CHECK-ZVKB: # %bb.0:
797 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e16, m2, ta, ma
798 ; CHECK-ZVKB-NEXT: vandn.vv v8, v10, v8
799 ; CHECK-ZVKB-NEXT: ret
800 %a = xor <vscale x 8 x i16> %x, splat (i16 -1)
801 %b = and <vscale x 8 x i16> %y, %a
802 ret <vscale x 8 x i16> %b
803 }
805 define <vscale x 8 x i16> @vandn_vx_nxv8i16(i16 %x, <vscale x 8 x i16> %y) {
806 ; CHECK-LABEL: vandn_vx_nxv8i16:
807 ; CHECK: # %bb.0:
808 ; CHECK-NEXT: not a0, a0
809 ; CHECK-NEXT: vsetvli a1, zero, e16, m2, ta, ma
810 ; CHECK-NEXT: vand.vx v8, v8, a0
811 ; CHECK-NEXT: ret
812 ;
813 ; CHECK-ZVKB-LABEL: vandn_vx_nxv8i16:
814 ; CHECK-ZVKB: # %bb.0:
815 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e16, m2, ta, ma
816 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
817 ; CHECK-ZVKB-NEXT: ret
818 %a = xor i16 %x, -1
819 %head = insertelement <vscale x 8 x i16> poison, i16 %a, i32 0
820 %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
821 %b = and <vscale x 8 x i16> %splat, %y
822 ret <vscale x 8 x i16> %b
823 }
825 define <vscale x 8 x i16> @vandn_vx_swapped_nxv8i16(i16 %x, <vscale x 8 x i16> %y) {
826 ; CHECK-LABEL: vandn_vx_swapped_nxv8i16:
827 ; CHECK: # %bb.0:
828 ; CHECK-NEXT: not a0, a0
829 ; CHECK-NEXT: vsetvli a1, zero, e16, m2, ta, ma
830 ; CHECK-NEXT: vand.vx v8, v8, a0
831 ; CHECK-NEXT: ret
832 ;
833 ; CHECK-ZVKB-LABEL: vandn_vx_swapped_nxv8i16:
834 ; CHECK-ZVKB: # %bb.0:
835 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e16, m2, ta, ma
836 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
837 ; CHECK-ZVKB-NEXT: ret
838 %a = xor i16 %x, -1
839 %head = insertelement <vscale x 8 x i16> poison, i16 %a, i32 0
840 %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
841 %b = and <vscale x 8 x i16> %splat, %y
842 ret <vscale x 8 x i16> %b
843 }
845 define <vscale x 16 x i16> @vandn_vv_nxv16i16(<vscale x 16 x i16> %x, <vscale x 16 x i16> %y) {
846 ; CHECK-LABEL: vandn_vv_nxv16i16:
847 ; CHECK: # %bb.0:
848 ; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma
849 ; CHECK-NEXT: vnot.v v8, v8
850 ; CHECK-NEXT: vand.vv v8, v8, v12
851 ; CHECK-NEXT: ret
852 ;
853 ; CHECK-ZVKB-LABEL: vandn_vv_nxv16i16:
854 ; CHECK-ZVKB: # %bb.0:
855 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e16, m4, ta, ma
856 ; CHECK-ZVKB-NEXT: vandn.vv v8, v12, v8
857 ; CHECK-ZVKB-NEXT: ret
858 %a = xor <vscale x 16 x i16> %x, splat (i16 -1)
859 %b = and <vscale x 16 x i16> %a, %y
860 ret <vscale x 16 x i16> %b
861 }
863 define <vscale x 16 x i16> @vandn_vv_swapped_nxv16i16(<vscale x 16 x i16> %x, <vscale x 16 x i16> %y) {
864 ; CHECK-LABEL: vandn_vv_swapped_nxv16i16:
865 ; CHECK: # %bb.0:
866 ; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma
867 ; CHECK-NEXT: vnot.v v8, v8
868 ; CHECK-NEXT: vand.vv v8, v12, v8
869 ; CHECK-NEXT: ret
870 ;
871 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv16i16:
872 ; CHECK-ZVKB: # %bb.0:
873 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e16, m4, ta, ma
874 ; CHECK-ZVKB-NEXT: vandn.vv v8, v12, v8
875 ; CHECK-ZVKB-NEXT: ret
876 %a = xor <vscale x 16 x i16> %x, splat (i16 -1)
877 %b = and <vscale x 16 x i16> %y, %a
878 ret <vscale x 16 x i16> %b
879 }
881 define <vscale x 16 x i16> @vandn_vx_nxv16i16(i16 %x, <vscale x 16 x i16> %y) {
882 ; CHECK-LABEL: vandn_vx_nxv16i16:
883 ; CHECK: # %bb.0:
884 ; CHECK-NEXT: not a0, a0
885 ; CHECK-NEXT: vsetvli a1, zero, e16, m4, ta, ma
886 ; CHECK-NEXT: vand.vx v8, v8, a0
887 ; CHECK-NEXT: ret
888 ;
889 ; CHECK-ZVKB-LABEL: vandn_vx_nxv16i16:
890 ; CHECK-ZVKB: # %bb.0:
891 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e16, m4, ta, ma
892 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
893 ; CHECK-ZVKB-NEXT: ret
894 %a = xor i16 %x, -1
895 %head = insertelement <vscale x 16 x i16> poison, i16 %a, i32 0
896 %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
897 %b = and <vscale x 16 x i16> %splat, %y
898 ret <vscale x 16 x i16> %b
899 }
901 define <vscale x 16 x i16> @vandn_vx_swapped_nxv16i16(i16 %x, <vscale x 16 x i16> %y) {
902 ; CHECK-LABEL: vandn_vx_swapped_nxv16i16:
903 ; CHECK: # %bb.0:
904 ; CHECK-NEXT: not a0, a0
905 ; CHECK-NEXT: vsetvli a1, zero, e16, m4, ta, ma
906 ; CHECK-NEXT: vand.vx v8, v8, a0
907 ; CHECK-NEXT: ret
908 ;
909 ; CHECK-ZVKB-LABEL: vandn_vx_swapped_nxv16i16:
910 ; CHECK-ZVKB: # %bb.0:
911 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e16, m4, ta, ma
912 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
913 ; CHECK-ZVKB-NEXT: ret
914 %a = xor i16 %x, -1
915 %head = insertelement <vscale x 16 x i16> poison, i16 %a, i32 0
916 %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
917 %b = and <vscale x 16 x i16> %splat, %y
918 ret <vscale x 16 x i16> %b
919 }
921 define <vscale x 32 x i16> @vandn_vv_nxv32i16(<vscale x 32 x i16> %x, <vscale x 32 x i16> %y) {
922 ; CHECK-LABEL: vandn_vv_nxv32i16:
923 ; CHECK: # %bb.0:
924 ; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma
925 ; CHECK-NEXT: vnot.v v8, v8
926 ; CHECK-NEXT: vand.vv v8, v8, v16
927 ; CHECK-NEXT: ret
928 ;
929 ; CHECK-ZVKB-LABEL: vandn_vv_nxv32i16:
930 ; CHECK-ZVKB: # %bb.0:
931 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e16, m8, ta, ma
932 ; CHECK-ZVKB-NEXT: vandn.vv v8, v16, v8
933 ; CHECK-ZVKB-NEXT: ret
934 %a = xor <vscale x 32 x i16> %x, splat (i16 -1)
935 %b = and <vscale x 32 x i16> %a, %y
936 ret <vscale x 32 x i16> %b
937 }
939 define <vscale x 32 x i16> @vandn_vv_swapped_nxv32i16(<vscale x 32 x i16> %x, <vscale x 32 x i16> %y) {
940 ; CHECK-LABEL: vandn_vv_swapped_nxv32i16:
941 ; CHECK: # %bb.0:
942 ; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma
943 ; CHECK-NEXT: vnot.v v8, v8
944 ; CHECK-NEXT: vand.vv v8, v16, v8
945 ; CHECK-NEXT: ret
946 ;
947 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv32i16:
948 ; CHECK-ZVKB: # %bb.0:
949 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e16, m8, ta, ma
950 ; CHECK-ZVKB-NEXT: vandn.vv v8, v16, v8
951 ; CHECK-ZVKB-NEXT: ret
952 %a = xor <vscale x 32 x i16> %x, splat (i16 -1)
953 %b = and <vscale x 32 x i16> %y, %a
954 ret <vscale x 32 x i16> %b
955 }
957 define <vscale x 32 x i16> @vandn_vx_nxv32i16(i16 %x, <vscale x 32 x i16> %y) {
958 ; CHECK-LABEL: vandn_vx_nxv32i16:
959 ; CHECK: # %bb.0:
960 ; CHECK-NEXT: not a0, a0
961 ; CHECK-NEXT: vsetvli a1, zero, e16, m8, ta, ma
962 ; CHECK-NEXT: vand.vx v8, v8, a0
963 ; CHECK-NEXT: ret
964 ;
965 ; CHECK-ZVKB-LABEL: vandn_vx_nxv32i16:
966 ; CHECK-ZVKB: # %bb.0:
967 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e16, m8, ta, ma
968 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
969 ; CHECK-ZVKB-NEXT: ret
970 %a = xor i16 %x, -1
971 %head = insertelement <vscale x 32 x i16> poison, i16 %a, i32 0
972 %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
973 %b = and <vscale x 32 x i16> %splat, %y
974 ret <vscale x 32 x i16> %b
975 }
977 define <vscale x 32 x i16> @vandn_vx_swapped_nxv32i16(i16 %x, <vscale x 32 x i16> %y) {
978 ; CHECK-LABEL: vandn_vx_swapped_nxv32i16:
979 ; CHECK: # %bb.0:
980 ; CHECK-NEXT: not a0, a0
981 ; CHECK-NEXT: vsetvli a1, zero, e16, m8, ta, ma
982 ; CHECK-NEXT: vand.vx v8, v8, a0
983 ; CHECK-NEXT: ret
984 ;
985 ; CHECK-ZVKB-LABEL: vandn_vx_swapped_nxv32i16:
986 ; CHECK-ZVKB: # %bb.0:
987 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e16, m8, ta, ma
988 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
989 ; CHECK-ZVKB-NEXT: ret
990 %a = xor i16 %x, -1
991 %head = insertelement <vscale x 32 x i16> poison, i16 %a, i32 0
992 %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
993 %b = and <vscale x 32 x i16> %splat, %y
994 ret <vscale x 32 x i16> %b
995 }
997 define <vscale x 1 x i32> @vandn_vv_nxv1i32(<vscale x 1 x i32> %x, <vscale x 1 x i32> %y) {
998 ; CHECK-LABEL: vandn_vv_nxv1i32:
999 ; CHECK: # %bb.0:
1000 ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
1001 ; CHECK-NEXT: vnot.v v8, v8
1002 ; CHECK-NEXT: vand.vv v8, v8, v9
1003 ; CHECK-NEXT: ret
1004 ;
1005 ; CHECK-ZVKB-LABEL: vandn_vv_nxv1i32:
1006 ; CHECK-ZVKB: # %bb.0:
1007 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
1008 ; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8
1009 ; CHECK-ZVKB-NEXT: ret
1010 %a = xor <vscale x 1 x i32> %x, splat (i32 -1)
1011 %b = and <vscale x 1 x i32> %a, %y
1012 ret <vscale x 1 x i32> %b
1013 }
1015 define <vscale x 1 x i32> @vandn_vv_swapped_nxv1i32(<vscale x 1 x i32> %x, <vscale x 1 x i32> %y) {
1016 ; CHECK-LABEL: vandn_vv_swapped_nxv1i32:
1017 ; CHECK: # %bb.0:
1018 ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
1019 ; CHECK-NEXT: vnot.v v8, v8
1020 ; CHECK-NEXT: vand.vv v8, v9, v8
1021 ; CHECK-NEXT: ret
1022 ;
1023 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv1i32:
1024 ; CHECK-ZVKB: # %bb.0:
1025 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
1026 ; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8
1027 ; CHECK-ZVKB-NEXT: ret
1028 %a = xor <vscale x 1 x i32> %x, splat (i32 -1)
1029 %b = and <vscale x 1 x i32> %y, %a
1030 ret <vscale x 1 x i32> %b
1031 }
1033 define <vscale x 1 x i32> @vandn_vx_nxv1i32(i32 %x, <vscale x 1 x i32> %y) {
1034 ; CHECK-LABEL: vandn_vx_nxv1i32:
1035 ; CHECK: # %bb.0:
1036 ; CHECK-NEXT: not a0, a0
1037 ; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma
1038 ; CHECK-NEXT: vand.vx v8, v8, a0
1039 ; CHECK-NEXT: ret
1040 ;
1041 ; CHECK-ZVKB-LABEL: vandn_vx_nxv1i32:
1042 ; CHECK-ZVKB: # %bb.0:
1043 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e32, mf2, ta, ma
1044 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
1045 ; CHECK-ZVKB-NEXT: ret
1046 %a = xor i32 %x, -1
1047 %head = insertelement <vscale x 1 x i32> poison, i32 %a, i32 0
1048 %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
1049 %b = and <vscale x 1 x i32> %splat, %y
1050 ret <vscale x 1 x i32> %b
1051 }
1053 define <vscale x 1 x i32> @vandn_vx_swapped_nxv1i32(i32 %x, <vscale x 1 x i32> %y) {
1054 ; CHECK-LABEL: vandn_vx_swapped_nxv1i32:
1055 ; CHECK: # %bb.0:
1056 ; CHECK-NEXT: not a0, a0
1057 ; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma
1058 ; CHECK-NEXT: vand.vx v8, v8, a0
1059 ; CHECK-NEXT: ret
1060 ;
1061 ; CHECK-ZVKB-LABEL: vandn_vx_swapped_nxv1i32:
1062 ; CHECK-ZVKB: # %bb.0:
1063 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e32, mf2, ta, ma
1064 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
1065 ; CHECK-ZVKB-NEXT: ret
1066 %a = xor i32 %x, -1
1067 %head = insertelement <vscale x 1 x i32> poison, i32 %a, i32 0
1068 %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
1069 %b = and <vscale x 1 x i32> %splat, %y
1070 ret <vscale x 1 x i32> %b
1071 }
1073 define <vscale x 2 x i32> @vandn_vv_nxv2i32(<vscale x 2 x i32> %x, <vscale x 2 x i32> %y) {
1074 ; CHECK-LABEL: vandn_vv_nxv2i32:
1075 ; CHECK: # %bb.0:
1076 ; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma
1077 ; CHECK-NEXT: vnot.v v8, v8
1078 ; CHECK-NEXT: vand.vv v8, v8, v9
1079 ; CHECK-NEXT: ret
1080 ;
1081 ; CHECK-ZVKB-LABEL: vandn_vv_nxv2i32:
1082 ; CHECK-ZVKB: # %bb.0:
1083 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e32, m1, ta, ma
1084 ; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8
1085 ; CHECK-ZVKB-NEXT: ret
1086 %a = xor <vscale x 2 x i32> %x, splat (i32 -1)
1087 %b = and <vscale x 2 x i32> %a, %y
1088 ret <vscale x 2 x i32> %b
1089 }
1091 define <vscale x 2 x i32> @vandn_vv_swapped_nxv2i32(<vscale x 2 x i32> %x, <vscale x 2 x i32> %y) {
1092 ; CHECK-LABEL: vandn_vv_swapped_nxv2i32:
1093 ; CHECK: # %bb.0:
1094 ; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma
1095 ; CHECK-NEXT: vnot.v v8, v8
1096 ; CHECK-NEXT: vand.vv v8, v9, v8
1097 ; CHECK-NEXT: ret
1098 ;
1099 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv2i32:
1100 ; CHECK-ZVKB: # %bb.0:
1101 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e32, m1, ta, ma
1102 ; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8
1103 ; CHECK-ZVKB-NEXT: ret
1104 %a = xor <vscale x 2 x i32> %x, splat (i32 -1)
1105 %b = and <vscale x 2 x i32> %y, %a
1106 ret <vscale x 2 x i32> %b
1107 }
1109 define <vscale x 2 x i32> @vandn_vx_nxv2i32(i32 %x, <vscale x 2 x i32> %y) {
1110 ; CHECK-LABEL: vandn_vx_nxv2i32:
1111 ; CHECK: # %bb.0:
1112 ; CHECK-NEXT: not a0, a0
1113 ; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma
1114 ; CHECK-NEXT: vand.vx v8, v8, a0
1115 ; CHECK-NEXT: ret
1116 ;
1117 ; CHECK-ZVKB-LABEL: vandn_vx_nxv2i32:
1118 ; CHECK-ZVKB: # %bb.0:
1119 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e32, m1, ta, ma
1120 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
1121 ; CHECK-ZVKB-NEXT: ret
1122 %a = xor i32 %x, -1
1123 %head = insertelement <vscale x 2 x i32> poison, i32 %a, i32 0
1124 %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
1125 %b = and <vscale x 2 x i32> %splat, %y
1126 ret <vscale x 2 x i32> %b
1127 }
1129 define <vscale x 2 x i32> @vandn_vx_swapped_nxv2i32(i32 %x, <vscale x 2 x i32> %y) {
1130 ; CHECK-LABEL: vandn_vx_swapped_nxv2i32:
1131 ; CHECK: # %bb.0:
1132 ; CHECK-NEXT: not a0, a0
1133 ; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma
1134 ; CHECK-NEXT: vand.vx v8, v8, a0
1135 ; CHECK-NEXT: ret
1136 ;
1137 ; CHECK-ZVKB-LABEL: vandn_vx_swapped_nxv2i32:
1138 ; CHECK-ZVKB: # %bb.0:
1139 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e32, m1, ta, ma
1140 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
1141 ; CHECK-ZVKB-NEXT: ret
1142 %a = xor i32 %x, -1
1143 %head = insertelement <vscale x 2 x i32> poison, i32 %a, i32 0
1144 %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
1145 %b = and <vscale x 2 x i32> %splat, %y
1146 ret <vscale x 2 x i32> %b
1147 }
1149 define <vscale x 4 x i32> @vandn_vv_nxv4i32(<vscale x 4 x i32> %x, <vscale x 4 x i32> %y) {
1150 ; CHECK-LABEL: vandn_vv_nxv4i32:
1151 ; CHECK: # %bb.0:
1152 ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
1153 ; CHECK-NEXT: vnot.v v8, v8
1154 ; CHECK-NEXT: vand.vv v8, v8, v10
1155 ; CHECK-NEXT: ret
1156 ;
1157 ; CHECK-ZVKB-LABEL: vandn_vv_nxv4i32:
1158 ; CHECK-ZVKB: # %bb.0:
1159 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e32, m2, ta, ma
1160 ; CHECK-ZVKB-NEXT: vandn.vv v8, v10, v8
1161 ; CHECK-ZVKB-NEXT: ret
1162 %a = xor <vscale x 4 x i32> %x, splat (i32 -1)
1163 %b = and <vscale x 4 x i32> %a, %y
1164 ret <vscale x 4 x i32> %b
1165 }
1167 define <vscale x 4 x i32> @vandn_vv_swapped_nxv4i32(<vscale x 4 x i32> %x, <vscale x 4 x i32> %y) {
1168 ; CHECK-LABEL: vandn_vv_swapped_nxv4i32:
1169 ; CHECK: # %bb.0:
1170 ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
1171 ; CHECK-NEXT: vnot.v v8, v8
1172 ; CHECK-NEXT: vand.vv v8, v10, v8
1173 ; CHECK-NEXT: ret
1174 ;
1175 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv4i32:
1176 ; CHECK-ZVKB: # %bb.0:
1177 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e32, m2, ta, ma
1178 ; CHECK-ZVKB-NEXT: vandn.vv v8, v10, v8
1179 ; CHECK-ZVKB-NEXT: ret
1180 %a = xor <vscale x 4 x i32> %x, splat (i32 -1)
1181 %b = and <vscale x 4 x i32> %y, %a
1182 ret <vscale x 4 x i32> %b
1183 }
1185 define <vscale x 4 x i32> @vandn_vx_nxv4i32(i32 %x, <vscale x 4 x i32> %y) {
1186 ; CHECK-LABEL: vandn_vx_nxv4i32:
1187 ; CHECK: # %bb.0:
1188 ; CHECK-NEXT: not a0, a0
1189 ; CHECK-NEXT: vsetvli a1, zero, e32, m2, ta, ma
1190 ; CHECK-NEXT: vand.vx v8, v8, a0
1191 ; CHECK-NEXT: ret
1192 ;
1193 ; CHECK-ZVKB-LABEL: vandn_vx_nxv4i32:
1194 ; CHECK-ZVKB: # %bb.0:
1195 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e32, m2, ta, ma
1196 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
1197 ; CHECK-ZVKB-NEXT: ret
1198 %a = xor i32 %x, -1
1199 %head = insertelement <vscale x 4 x i32> poison, i32 %a, i32 0
1200 %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
1201 %b = and <vscale x 4 x i32> %splat, %y
1202 ret <vscale x 4 x i32> %b
1203 }
1205 define <vscale x 4 x i32> @vandn_vx_swapped_nxv4i32(i32 %x, <vscale x 4 x i32> %y) {
1206 ; CHECK-LABEL: vandn_vx_swapped_nxv4i32:
1207 ; CHECK: # %bb.0:
1208 ; CHECK-NEXT: not a0, a0
1209 ; CHECK-NEXT: vsetvli a1, zero, e32, m2, ta, ma
1210 ; CHECK-NEXT: vand.vx v8, v8, a0
1211 ; CHECK-NEXT: ret
1212 ;
1213 ; CHECK-ZVKB-LABEL: vandn_vx_swapped_nxv4i32:
1214 ; CHECK-ZVKB: # %bb.0:
1215 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e32, m2, ta, ma
1216 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
1217 ; CHECK-ZVKB-NEXT: ret
1218 %a = xor i32 %x, -1
1219 %head = insertelement <vscale x 4 x i32> poison, i32 %a, i32 0
1220 %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
1221 %b = and <vscale x 4 x i32> %splat, %y
1222 ret <vscale x 4 x i32> %b
1223 }
1225 define <vscale x 8 x i32> @vandn_vv_nxv8i32(<vscale x 8 x i32> %x, <vscale x 8 x i32> %y) {
1226 ; CHECK-LABEL: vandn_vv_nxv8i32:
1227 ; CHECK: # %bb.0:
1228 ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
1229 ; CHECK-NEXT: vnot.v v8, v8
1230 ; CHECK-NEXT: vand.vv v8, v8, v12
1231 ; CHECK-NEXT: ret
1232 ;
1233 ; CHECK-ZVKB-LABEL: vandn_vv_nxv8i32:
1234 ; CHECK-ZVKB: # %bb.0:
1235 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e32, m4, ta, ma
1236 ; CHECK-ZVKB-NEXT: vandn.vv v8, v12, v8
1237 ; CHECK-ZVKB-NEXT: ret
1238 %a = xor <vscale x 8 x i32> %x, splat (i32 -1)
1239 %b = and <vscale x 8 x i32> %a, %y
1240 ret <vscale x 8 x i32> %b
1241 }
1243 define <vscale x 8 x i32> @vandn_vv_swapped_nxv8i32(<vscale x 8 x i32> %x, <vscale x 8 x i32> %y) {
1244 ; CHECK-LABEL: vandn_vv_swapped_nxv8i32:
1245 ; CHECK: # %bb.0:
1246 ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
1247 ; CHECK-NEXT: vnot.v v8, v8
1248 ; CHECK-NEXT: vand.vv v8, v12, v8
1249 ; CHECK-NEXT: ret
1250 ;
1251 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv8i32:
1252 ; CHECK-ZVKB: # %bb.0:
1253 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e32, m4, ta, ma
1254 ; CHECK-ZVKB-NEXT: vandn.vv v8, v12, v8
1255 ; CHECK-ZVKB-NEXT: ret
1256 %a = xor <vscale x 8 x i32> %x, splat (i32 -1)
1257 %b = and <vscale x 8 x i32> %y, %a
1258 ret <vscale x 8 x i32> %b
1259 }
1261 define <vscale x 8 x i32> @vandn_vx_nxv8i32(i32 %x, <vscale x 8 x i32> %y) {
1262 ; CHECK-LABEL: vandn_vx_nxv8i32:
1263 ; CHECK: # %bb.0:
1264 ; CHECK-NEXT: not a0, a0
1265 ; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma
1266 ; CHECK-NEXT: vand.vx v8, v8, a0
1267 ; CHECK-NEXT: ret
1268 ;
1269 ; CHECK-ZVKB-LABEL: vandn_vx_nxv8i32:
1270 ; CHECK-ZVKB: # %bb.0:
1271 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e32, m4, ta, ma
1272 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
1273 ; CHECK-ZVKB-NEXT: ret
1274 %a = xor i32 %x, -1
1275 %head = insertelement <vscale x 8 x i32> poison, i32 %a, i32 0
1276 %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
1277 %b = and <vscale x 8 x i32> %splat, %y
1278 ret <vscale x 8 x i32> %b
1279 }
1281 define <vscale x 8 x i32> @vandn_vx_swapped_nxv8i32(i32 %x, <vscale x 8 x i32> %y) {
1282 ; CHECK-LABEL: vandn_vx_swapped_nxv8i32:
1283 ; CHECK: # %bb.0:
1284 ; CHECK-NEXT: not a0, a0
1285 ; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma
1286 ; CHECK-NEXT: vand.vx v8, v8, a0
1287 ; CHECK-NEXT: ret
1288 ;
1289 ; CHECK-ZVKB-LABEL: vandn_vx_swapped_nxv8i32:
1290 ; CHECK-ZVKB: # %bb.0:
1291 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e32, m4, ta, ma
1292 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
1293 ; CHECK-ZVKB-NEXT: ret
1294 %a = xor i32 %x, -1
1295 %head = insertelement <vscale x 8 x i32> poison, i32 %a, i32 0
1296 %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
1297 %b = and <vscale x 8 x i32> %splat, %y
1298 ret <vscale x 8 x i32> %b
1299 }
1301 define <vscale x 16 x i32> @vandn_vv_nxv16i32(<vscale x 16 x i32> %x, <vscale x 16 x i32> %y) {
1302 ; CHECK-LABEL: vandn_vv_nxv16i32:
1303 ; CHECK: # %bb.0:
1304 ; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma
1305 ; CHECK-NEXT: vnot.v v8, v8
1306 ; CHECK-NEXT: vand.vv v8, v8, v16
1307 ; CHECK-NEXT: ret
1308 ;
1309 ; CHECK-ZVKB-LABEL: vandn_vv_nxv16i32:
1310 ; CHECK-ZVKB: # %bb.0:
1311 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e32, m8, ta, ma
1312 ; CHECK-ZVKB-NEXT: vandn.vv v8, v16, v8
1313 ; CHECK-ZVKB-NEXT: ret
1314 %a = xor <vscale x 16 x i32> %x, splat (i32 -1)
1315 %b = and <vscale x 16 x i32> %a, %y
1316 ret <vscale x 16 x i32> %b
1317 }
1319 define <vscale x 16 x i32> @vandn_vv_swapped_nxv16i32(<vscale x 16 x i32> %x, <vscale x 16 x i32> %y) {
1320 ; CHECK-LABEL: vandn_vv_swapped_nxv16i32:
1321 ; CHECK: # %bb.0:
1322 ; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma
1323 ; CHECK-NEXT: vnot.v v8, v8
1324 ; CHECK-NEXT: vand.vv v8, v16, v8
1325 ; CHECK-NEXT: ret
1326 ;
1327 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv16i32:
1328 ; CHECK-ZVKB: # %bb.0:
1329 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e32, m8, ta, ma
1330 ; CHECK-ZVKB-NEXT: vandn.vv v8, v16, v8
1331 ; CHECK-ZVKB-NEXT: ret
1332 %a = xor <vscale x 16 x i32> %x, splat (i32 -1)
1333 %b = and <vscale x 16 x i32> %y, %a
1334 ret <vscale x 16 x i32> %b
1335 }
1337 define <vscale x 16 x i32> @vandn_vx_nxv16i32(i32 %x, <vscale x 16 x i32> %y) {
1338 ; CHECK-LABEL: vandn_vx_nxv16i32:
1339 ; CHECK: # %bb.0:
1340 ; CHECK-NEXT: not a0, a0
1341 ; CHECK-NEXT: vsetvli a1, zero, e32, m8, ta, ma
1342 ; CHECK-NEXT: vand.vx v8, v8, a0
1343 ; CHECK-NEXT: ret
1344 ;
1345 ; CHECK-ZVKB-LABEL: vandn_vx_nxv16i32:
1346 ; CHECK-ZVKB: # %bb.0:
1347 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e32, m8, ta, ma
1348 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
1349 ; CHECK-ZVKB-NEXT: ret
1350 %a = xor i32 %x, -1
1351 %head = insertelement <vscale x 16 x i32> poison, i32 %a, i32 0
1352 %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
1353 %b = and <vscale x 16 x i32> %splat, %y
1354 ret <vscale x 16 x i32> %b
1355 }
1357 define <vscale x 16 x i32> @vandn_vx_swapped_nxv16i32(i32 %x, <vscale x 16 x i32> %y) {
1358 ; CHECK-LABEL: vandn_vx_swapped_nxv16i32:
1359 ; CHECK: # %bb.0:
1360 ; CHECK-NEXT: not a0, a0
1361 ; CHECK-NEXT: vsetvli a1, zero, e32, m8, ta, ma
1362 ; CHECK-NEXT: vand.vx v8, v8, a0
1363 ; CHECK-NEXT: ret
1364 ;
1365 ; CHECK-ZVKB-LABEL: vandn_vx_swapped_nxv16i32:
1366 ; CHECK-ZVKB: # %bb.0:
1367 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e32, m8, ta, ma
1368 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
1369 ; CHECK-ZVKB-NEXT: ret
1370 %a = xor i32 %x, -1
1371 %head = insertelement <vscale x 16 x i32> poison, i32 %a, i32 0
1372 %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
1373 %b = and <vscale x 16 x i32> %splat, %y
1374 ret <vscale x 16 x i32> %b
1375 }
1377 define <vscale x 1 x i64> @vandn_vv_nxv1i64(<vscale x 1 x i64> %x, <vscale x 1 x i64> %y) {
1378 ; CHECK-LABEL: vandn_vv_nxv1i64:
1379 ; CHECK: # %bb.0:
1380 ; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma
1381 ; CHECK-NEXT: vnot.v v8, v8
1382 ; CHECK-NEXT: vand.vv v8, v8, v9
1383 ; CHECK-NEXT: ret
1384 ;
1385 ; CHECK-ZVKB-LABEL: vandn_vv_nxv1i64:
1386 ; CHECK-ZVKB: # %bb.0:
1387 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e64, m1, ta, ma
1388 ; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8
1389 ; CHECK-ZVKB-NEXT: ret
1390 %a = xor <vscale x 1 x i64> %x, splat (i64 -1)
1391 %b = and <vscale x 1 x i64> %a, %y
1392 ret <vscale x 1 x i64> %b
1393 }
1395 define <vscale x 1 x i64> @vandn_vv_swapped_nxv1i64(<vscale x 1 x i64> %x, <vscale x 1 x i64> %y) {
1396 ; CHECK-LABEL: vandn_vv_swapped_nxv1i64:
1397 ; CHECK: # %bb.0:
1398 ; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma
1399 ; CHECK-NEXT: vnot.v v8, v8
1400 ; CHECK-NEXT: vand.vv v8, v9, v8
1401 ; CHECK-NEXT: ret
1402 ;
1403 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv1i64:
1404 ; CHECK-ZVKB: # %bb.0:
1405 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e64, m1, ta, ma
1406 ; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8
1407 ; CHECK-ZVKB-NEXT: ret
1408 %a = xor <vscale x 1 x i64> %x, splat (i64 -1)
1409 %b = and <vscale x 1 x i64> %y, %a
1410 ret <vscale x 1 x i64> %b
1411 }
1413 define <vscale x 1 x i64> @vandn_vx_nxv1i64(i64 %x, <vscale x 1 x i64> %y) {
1414 ; CHECK-RV32-LABEL: vandn_vx_nxv1i64:
1415 ; CHECK-RV32: # %bb.0:
1416 ; CHECK-RV32-NEXT: addi sp, sp, -16
1417 ; CHECK-RV32-NEXT: .cfi_def_cfa_offset 16
1418 ; CHECK-RV32-NEXT: not a0, a0
1419 ; CHECK-RV32-NEXT: not a1, a1
1420 ; CHECK-RV32-NEXT: sw a0, 8(sp)
1421 ; CHECK-RV32-NEXT: sw a1, 12(sp)
1422 ; CHECK-RV32-NEXT: addi a0, sp, 8
1423 ; CHECK-RV32-NEXT: vsetvli a1, zero, e64, m1, ta, ma
1424 ; CHECK-RV32-NEXT: vlse64.v v9, (a0), zero
1425 ; CHECK-RV32-NEXT: vand.vv v8, v9, v8
1426 ; CHECK-RV32-NEXT: addi sp, sp, 16
1427 ; CHECK-RV32-NEXT: .cfi_def_cfa_offset 0
1428 ; CHECK-RV32-NEXT: ret
1429 ;
1430 ; CHECK-RV64-LABEL: vandn_vx_nxv1i64:
1431 ; CHECK-RV64: # %bb.0:
1432 ; CHECK-RV64-NEXT: not a0, a0
1433 ; CHECK-RV64-NEXT: vsetvli a1, zero, e64, m1, ta, ma
1434 ; CHECK-RV64-NEXT: vand.vx v8, v8, a0
1435 ; CHECK-RV64-NEXT: ret
1436 ;
1437 ; CHECK-ZVKB32-LABEL: vandn_vx_nxv1i64:
1438 ; CHECK-ZVKB32: # %bb.0:
1439 ; CHECK-ZVKB32-NEXT: addi sp, sp, -16
1440 ; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 16
1441 ; CHECK-ZVKB32-NEXT: not a0, a0
1442 ; CHECK-ZVKB32-NEXT: not a1, a1
1443 ; CHECK-ZVKB32-NEXT: sw a0, 8(sp)
1444 ; CHECK-ZVKB32-NEXT: sw a1, 12(sp)
1445 ; CHECK-ZVKB32-NEXT: addi a0, sp, 8
1446 ; CHECK-ZVKB32-NEXT: vsetvli a1, zero, e64, m1, ta, ma
1447 ; CHECK-ZVKB32-NEXT: vlse64.v v9, (a0), zero
1448 ; CHECK-ZVKB32-NEXT: vand.vv v8, v9, v8
1449 ; CHECK-ZVKB32-NEXT: addi sp, sp, 16
1450 ; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 0
1451 ; CHECK-ZVKB32-NEXT: ret
1452 ;
1453 ; CHECK-ZVKB64-LABEL: vandn_vx_nxv1i64:
1454 ; CHECK-ZVKB64: # %bb.0:
1455 ; CHECK-ZVKB64-NEXT: vsetvli a1, zero, e64, m1, ta, ma
1456 ; CHECK-ZVKB64-NEXT: vandn.vx v8, v8, a0
1457 ; CHECK-ZVKB64-NEXT: ret
1458 %a = xor i64 %x, -1
1459 %head = insertelement <vscale x 1 x i64> poison, i64 %a, i32 0
1460 %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
1461 %b = and <vscale x 1 x i64> %splat, %y
1462 ret <vscale x 1 x i64> %b
1463 }
1465 define <vscale x 1 x i64> @vandn_vx_swapped_nxv1i64(i64 %x, <vscale x 1 x i64> %y) {
1466 ; CHECK-RV32-LABEL: vandn_vx_swapped_nxv1i64:
1467 ; CHECK-RV32: # %bb.0:
1468 ; CHECK-RV32-NEXT: addi sp, sp, -16
1469 ; CHECK-RV32-NEXT: .cfi_def_cfa_offset 16
1470 ; CHECK-RV32-NEXT: not a0, a0
1471 ; CHECK-RV32-NEXT: not a1, a1
1472 ; CHECK-RV32-NEXT: sw a0, 8(sp)
1473 ; CHECK-RV32-NEXT: sw a1, 12(sp)
1474 ; CHECK-RV32-NEXT: addi a0, sp, 8
1475 ; CHECK-RV32-NEXT: vsetvli a1, zero, e64, m1, ta, ma
1476 ; CHECK-RV32-NEXT: vlse64.v v9, (a0), zero
1477 ; CHECK-RV32-NEXT: vand.vv v8, v9, v8
1478 ; CHECK-RV32-NEXT: addi sp, sp, 16
1479 ; CHECK-RV32-NEXT: .cfi_def_cfa_offset 0
1480 ; CHECK-RV32-NEXT: ret
1481 ;
1482 ; CHECK-RV64-LABEL: vandn_vx_swapped_nxv1i64:
1483 ; CHECK-RV64: # %bb.0:
1484 ; CHECK-RV64-NEXT: not a0, a0
1485 ; CHECK-RV64-NEXT: vsetvli a1, zero, e64, m1, ta, ma
1486 ; CHECK-RV64-NEXT: vand.vx v8, v8, a0
1487 ; CHECK-RV64-NEXT: ret
1488 ;
1489 ; CHECK-ZVKB32-LABEL: vandn_vx_swapped_nxv1i64:
1490 ; CHECK-ZVKB32: # %bb.0:
1491 ; CHECK-ZVKB32-NEXT: addi sp, sp, -16
1492 ; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 16
1493 ; CHECK-ZVKB32-NEXT: not a0, a0
1494 ; CHECK-ZVKB32-NEXT: not a1, a1
1495 ; CHECK-ZVKB32-NEXT: sw a0, 8(sp)
1496 ; CHECK-ZVKB32-NEXT: sw a1, 12(sp)
1497 ; CHECK-ZVKB32-NEXT: addi a0, sp, 8
1498 ; CHECK-ZVKB32-NEXT: vsetvli a1, zero, e64, m1, ta, ma
1499 ; CHECK-ZVKB32-NEXT: vlse64.v v9, (a0), zero
1500 ; CHECK-ZVKB32-NEXT: vand.vv v8, v9, v8
1501 ; CHECK-ZVKB32-NEXT: addi sp, sp, 16
1502 ; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 0
1503 ; CHECK-ZVKB32-NEXT: ret
1504 ;
1505 ; CHECK-ZVKB64-LABEL: vandn_vx_swapped_nxv1i64:
1506 ; CHECK-ZVKB64: # %bb.0:
1507 ; CHECK-ZVKB64-NEXT: vsetvli a1, zero, e64, m1, ta, ma
1508 ; CHECK-ZVKB64-NEXT: vandn.vx v8, v8, a0
1509 ; CHECK-ZVKB64-NEXT: ret
1510 %a = xor i64 %x, -1
1511 %head = insertelement <vscale x 1 x i64> poison, i64 %a, i32 0
1512 %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
1513 %b = and <vscale x 1 x i64> %splat, %y
1514 ret <vscale x 1 x i64> %b
1515 }
1517 define <vscale x 2 x i64> @vandn_vv_nxv2i64(<vscale x 2 x i64> %x, <vscale x 2 x i64> %y) {
1518 ; CHECK-LABEL: vandn_vv_nxv2i64:
1519 ; CHECK: # %bb.0:
1520 ; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma
1521 ; CHECK-NEXT: vnot.v v8, v8
1522 ; CHECK-NEXT: vand.vv v8, v8, v10
1523 ; CHECK-NEXT: ret
1524 ;
1525 ; CHECK-ZVKB-LABEL: vandn_vv_nxv2i64:
1526 ; CHECK-ZVKB: # %bb.0:
1527 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e64, m2, ta, ma
1528 ; CHECK-ZVKB-NEXT: vandn.vv v8, v10, v8
1529 ; CHECK-ZVKB-NEXT: ret
1530 %a = xor <vscale x 2 x i64> %x, splat (i64 -1)
1531 %b = and <vscale x 2 x i64> %a, %y
1532 ret <vscale x 2 x i64> %b
1533 }
1535 define <vscale x 2 x i64> @vandn_vv_swapped_nxv2i64(<vscale x 2 x i64> %x, <vscale x 2 x i64> %y) {
1536 ; CHECK-LABEL: vandn_vv_swapped_nxv2i64:
1537 ; CHECK: # %bb.0:
1538 ; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma
1539 ; CHECK-NEXT: vnot.v v8, v8
1540 ; CHECK-NEXT: vand.vv v8, v10, v8
1541 ; CHECK-NEXT: ret
1542 ;
1543 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv2i64:
1544 ; CHECK-ZVKB: # %bb.0:
1545 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e64, m2, ta, ma
1546 ; CHECK-ZVKB-NEXT: vandn.vv v8, v10, v8
1547 ; CHECK-ZVKB-NEXT: ret
1548 %a = xor <vscale x 2 x i64> %x, splat (i64 -1)
1549 %b = and <vscale x 2 x i64> %y, %a
1550 ret <vscale x 2 x i64> %b
1551 }
1553 define <vscale x 2 x i64> @vandn_vx_nxv2i64(i64 %x, <vscale x 2 x i64> %y) {
1554 ; CHECK-RV32-LABEL: vandn_vx_nxv2i64:
1555 ; CHECK-RV32: # %bb.0:
1556 ; CHECK-RV32-NEXT: addi sp, sp, -16
1557 ; CHECK-RV32-NEXT: .cfi_def_cfa_offset 16
1558 ; CHECK-RV32-NEXT: not a0, a0
1559 ; CHECK-RV32-NEXT: not a1, a1
1560 ; CHECK-RV32-NEXT: sw a0, 8(sp)
1561 ; CHECK-RV32-NEXT: sw a1, 12(sp)
1562 ; CHECK-RV32-NEXT: addi a0, sp, 8
1563 ; CHECK-RV32-NEXT: vsetvli a1, zero, e64, m2, ta, ma
1564 ; CHECK-RV32-NEXT: vlse64.v v10, (a0), zero
1565 ; CHECK-RV32-NEXT: vand.vv v8, v10, v8
1566 ; CHECK-RV32-NEXT: addi sp, sp, 16
1567 ; CHECK-RV32-NEXT: .cfi_def_cfa_offset 0
1568 ; CHECK-RV32-NEXT: ret
1569 ;
1570 ; CHECK-RV64-LABEL: vandn_vx_nxv2i64:
1571 ; CHECK-RV64: # %bb.0:
1572 ; CHECK-RV64-NEXT: not a0, a0
1573 ; CHECK-RV64-NEXT: vsetvli a1, zero, e64, m2, ta, ma
1574 ; CHECK-RV64-NEXT: vand.vx v8, v8, a0
1575 ; CHECK-RV64-NEXT: ret
1576 ;
1577 ; CHECK-ZVKB32-LABEL: vandn_vx_nxv2i64:
1578 ; CHECK-ZVKB32: # %bb.0:
1579 ; CHECK-ZVKB32-NEXT: addi sp, sp, -16
1580 ; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 16
1581 ; CHECK-ZVKB32-NEXT: not a0, a0
1582 ; CHECK-ZVKB32-NEXT: not a1, a1
1583 ; CHECK-ZVKB32-NEXT: sw a0, 8(sp)
1584 ; CHECK-ZVKB32-NEXT: sw a1, 12(sp)
1585 ; CHECK-ZVKB32-NEXT: addi a0, sp, 8
1586 ; CHECK-ZVKB32-NEXT: vsetvli a1, zero, e64, m2, ta, ma
1587 ; CHECK-ZVKB32-NEXT: vlse64.v v10, (a0), zero
1588 ; CHECK-ZVKB32-NEXT: vand.vv v8, v10, v8
1589 ; CHECK-ZVKB32-NEXT: addi sp, sp, 16
1590 ; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 0
1591 ; CHECK-ZVKB32-NEXT: ret
1592 ;
1593 ; CHECK-ZVKB64-LABEL: vandn_vx_nxv2i64:
1594 ; CHECK-ZVKB64: # %bb.0:
1595 ; CHECK-ZVKB64-NEXT: vsetvli a1, zero, e64, m2, ta, ma
1596 ; CHECK-ZVKB64-NEXT: vandn.vx v8, v8, a0
1597 ; CHECK-ZVKB64-NEXT: ret
1598 %a = xor i64 %x, -1
1599 %head = insertelement <vscale x 2 x i64> poison, i64 %a, i32 0
1600 %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
1601 %b = and <vscale x 2 x i64> %splat, %y
1602 ret <vscale x 2 x i64> %b
1603 }
1605 define <vscale x 2 x i64> @vandn_vx_swapped_nxv2i64(i64 %x, <vscale x 2 x i64> %y) {
1606 ; CHECK-RV32-LABEL: vandn_vx_swapped_nxv2i64:
1607 ; CHECK-RV32: # %bb.0:
1608 ; CHECK-RV32-NEXT: addi sp, sp, -16
1609 ; CHECK-RV32-NEXT: .cfi_def_cfa_offset 16
1610 ; CHECK-RV32-NEXT: not a0, a0
1611 ; CHECK-RV32-NEXT: not a1, a1
1612 ; CHECK-RV32-NEXT: sw a0, 8(sp)
1613 ; CHECK-RV32-NEXT: sw a1, 12(sp)
1614 ; CHECK-RV32-NEXT: addi a0, sp, 8
1615 ; CHECK-RV32-NEXT: vsetvli a1, zero, e64, m2, ta, ma
1616 ; CHECK-RV32-NEXT: vlse64.v v10, (a0), zero
1617 ; CHECK-RV32-NEXT: vand.vv v8, v10, v8
1618 ; CHECK-RV32-NEXT: addi sp, sp, 16
1619 ; CHECK-RV32-NEXT: .cfi_def_cfa_offset 0
1620 ; CHECK-RV32-NEXT: ret
1621 ;
1622 ; CHECK-RV64-LABEL: vandn_vx_swapped_nxv2i64:
1623 ; CHECK-RV64: # %bb.0:
1624 ; CHECK-RV64-NEXT: not a0, a0
1625 ; CHECK-RV64-NEXT: vsetvli a1, zero, e64, m2, ta, ma
1626 ; CHECK-RV64-NEXT: vand.vx v8, v8, a0
1627 ; CHECK-RV64-NEXT: ret
1628 ;
1629 ; CHECK-ZVKB32-LABEL: vandn_vx_swapped_nxv2i64:
1630 ; CHECK-ZVKB32: # %bb.0:
1631 ; CHECK-ZVKB32-NEXT: addi sp, sp, -16
1632 ; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 16
1633 ; CHECK-ZVKB32-NEXT: not a0, a0
1634 ; CHECK-ZVKB32-NEXT: not a1, a1
1635 ; CHECK-ZVKB32-NEXT: sw a0, 8(sp)
1636 ; CHECK-ZVKB32-NEXT: sw a1, 12(sp)
1637 ; CHECK-ZVKB32-NEXT: addi a0, sp, 8
1638 ; CHECK-ZVKB32-NEXT: vsetvli a1, zero, e64, m2, ta, ma
1639 ; CHECK-ZVKB32-NEXT: vlse64.v v10, (a0), zero
1640 ; CHECK-ZVKB32-NEXT: vand.vv v8, v10, v8
1641 ; CHECK-ZVKB32-NEXT: addi sp, sp, 16
1642 ; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 0
1643 ; CHECK-ZVKB32-NEXT: ret
1644 ;
1645 ; CHECK-ZVKB64-LABEL: vandn_vx_swapped_nxv2i64:
1646 ; CHECK-ZVKB64: # %bb.0:
1647 ; CHECK-ZVKB64-NEXT: vsetvli a1, zero, e64, m2, ta, ma
1648 ; CHECK-ZVKB64-NEXT: vandn.vx v8, v8, a0
1649 ; CHECK-ZVKB64-NEXT: ret
1650 %a = xor i64 %x, -1
1651 %head = insertelement <vscale x 2 x i64> poison, i64 %a, i32 0
1652 %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
1653 %b = and <vscale x 2 x i64> %splat, %y
1654 ret <vscale x 2 x i64> %b
1655 }
1657 define <vscale x 4 x i64> @vandn_vv_nxv4i64(<vscale x 4 x i64> %x, <vscale x 4 x i64> %y) {
1658 ; CHECK-LABEL: vandn_vv_nxv4i64:
1659 ; CHECK: # %bb.0:
1660 ; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma
1661 ; CHECK-NEXT: vnot.v v8, v8
1662 ; CHECK-NEXT: vand.vv v8, v8, v12
1663 ; CHECK-NEXT: ret
1664 ;
1665 ; CHECK-ZVKB-LABEL: vandn_vv_nxv4i64:
1666 ; CHECK-ZVKB: # %bb.0:
1667 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e64, m4, ta, ma
1668 ; CHECK-ZVKB-NEXT: vandn.vv v8, v12, v8
1669 ; CHECK-ZVKB-NEXT: ret
1670 %a = xor <vscale x 4 x i64> %x, splat (i64 -1)
1671 %b = and <vscale x 4 x i64> %a, %y
1672 ret <vscale x 4 x i64> %b
1673 }
1675 define <vscale x 4 x i64> @vandn_vv_swapped_nxv4i64(<vscale x 4 x i64> %x, <vscale x 4 x i64> %y) {
1676 ; CHECK-LABEL: vandn_vv_swapped_nxv4i64:
1677 ; CHECK: # %bb.0:
1678 ; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma
1679 ; CHECK-NEXT: vnot.v v8, v8
1680 ; CHECK-NEXT: vand.vv v8, v12, v8
1681 ; CHECK-NEXT: ret
1682 ;
1683 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv4i64:
1684 ; CHECK-ZVKB: # %bb.0:
1685 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e64, m4, ta, ma
1686 ; CHECK-ZVKB-NEXT: vandn.vv v8, v12, v8
1687 ; CHECK-ZVKB-NEXT: ret
1688 %a = xor <vscale x 4 x i64> %x, splat (i64 -1)
1689 %b = and <vscale x 4 x i64> %y, %a
1690 ret <vscale x 4 x i64> %b
1691 }
1693 define <vscale x 4 x i64> @vandn_vx_nxv4i64(i64 %x, <vscale x 4 x i64> %y) {
1694 ; CHECK-RV32-LABEL: vandn_vx_nxv4i64:
1695 ; CHECK-RV32: # %bb.0:
1696 ; CHECK-RV32-NEXT: addi sp, sp, -16
1697 ; CHECK-RV32-NEXT: .cfi_def_cfa_offset 16
1698 ; CHECK-RV32-NEXT: not a0, a0
1699 ; CHECK-RV32-NEXT: not a1, a1
1700 ; CHECK-RV32-NEXT: sw a0, 8(sp)
1701 ; CHECK-RV32-NEXT: sw a1, 12(sp)
1702 ; CHECK-RV32-NEXT: addi a0, sp, 8
1703 ; CHECK-RV32-NEXT: vsetvli a1, zero, e64, m4, ta, ma
1704 ; CHECK-RV32-NEXT: vlse64.v v12, (a0), zero
1705 ; CHECK-RV32-NEXT: vand.vv v8, v12, v8
1706 ; CHECK-RV32-NEXT: addi sp, sp, 16
1707 ; CHECK-RV32-NEXT: .cfi_def_cfa_offset 0
1708 ; CHECK-RV32-NEXT: ret
1709 ;
1710 ; CHECK-RV64-LABEL: vandn_vx_nxv4i64:
1711 ; CHECK-RV64: # %bb.0:
1712 ; CHECK-RV64-NEXT: not a0, a0
1713 ; CHECK-RV64-NEXT: vsetvli a1, zero, e64, m4, ta, ma
1714 ; CHECK-RV64-NEXT: vand.vx v8, v8, a0
1715 ; CHECK-RV64-NEXT: ret
1716 ;
1717 ; CHECK-ZVKB32-LABEL: vandn_vx_nxv4i64:
1718 ; CHECK-ZVKB32: # %bb.0:
1719 ; CHECK-ZVKB32-NEXT: addi sp, sp, -16
1720 ; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 16
1721 ; CHECK-ZVKB32-NEXT: not a0, a0
1722 ; CHECK-ZVKB32-NEXT: not a1, a1
1723 ; CHECK-ZVKB32-NEXT: sw a0, 8(sp)
1724 ; CHECK-ZVKB32-NEXT: sw a1, 12(sp)
1725 ; CHECK-ZVKB32-NEXT: addi a0, sp, 8
1726 ; CHECK-ZVKB32-NEXT: vsetvli a1, zero, e64, m4, ta, ma
1727 ; CHECK-ZVKB32-NEXT: vlse64.v v12, (a0), zero
1728 ; CHECK-ZVKB32-NEXT: vand.vv v8, v12, v8
1729 ; CHECK-ZVKB32-NEXT: addi sp, sp, 16
1730 ; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 0
1731 ; CHECK-ZVKB32-NEXT: ret
1732 ;
1733 ; CHECK-ZVKB64-LABEL: vandn_vx_nxv4i64:
1734 ; CHECK-ZVKB64: # %bb.0:
1735 ; CHECK-ZVKB64-NEXT: vsetvli a1, zero, e64, m4, ta, ma
1736 ; CHECK-ZVKB64-NEXT: vandn.vx v8, v8, a0
1737 ; CHECK-ZVKB64-NEXT: ret
1738 %a = xor i64 %x, -1
1739 %head = insertelement <vscale x 4 x i64> poison, i64 %a, i32 0
1740 %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
1741 %b = and <vscale x 4 x i64> %splat, %y
1742 ret <vscale x 4 x i64> %b
1743 }
1745 define <vscale x 4 x i64> @vandn_vx_swapped_nxv4i64(i64 %x, <vscale x 4 x i64> %y) {
1746 ; CHECK-RV32-LABEL: vandn_vx_swapped_nxv4i64:
1747 ; CHECK-RV32: # %bb.0:
1748 ; CHECK-RV32-NEXT: addi sp, sp, -16
1749 ; CHECK-RV32-NEXT: .cfi_def_cfa_offset 16
1750 ; CHECK-RV32-NEXT: not a0, a0
1751 ; CHECK-RV32-NEXT: not a1, a1
1752 ; CHECK-RV32-NEXT: sw a0, 8(sp)
1753 ; CHECK-RV32-NEXT: sw a1, 12(sp)
1754 ; CHECK-RV32-NEXT: addi a0, sp, 8
1755 ; CHECK-RV32-NEXT: vsetvli a1, zero, e64, m4, ta, ma
1756 ; CHECK-RV32-NEXT: vlse64.v v12, (a0), zero
1757 ; CHECK-RV32-NEXT: vand.vv v8, v12, v8
1758 ; CHECK-RV32-NEXT: addi sp, sp, 16
1759 ; CHECK-RV32-NEXT: .cfi_def_cfa_offset 0
1760 ; CHECK-RV32-NEXT: ret
1761 ;
1762 ; CHECK-RV64-LABEL: vandn_vx_swapped_nxv4i64:
1763 ; CHECK-RV64: # %bb.0:
1764 ; CHECK-RV64-NEXT: not a0, a0
1765 ; CHECK-RV64-NEXT: vsetvli a1, zero, e64, m4, ta, ma
1766 ; CHECK-RV64-NEXT: vand.vx v8, v8, a0
1767 ; CHECK-RV64-NEXT: ret
1768 ;
1769 ; CHECK-ZVKB32-LABEL: vandn_vx_swapped_nxv4i64:
1770 ; CHECK-ZVKB32: # %bb.0:
1771 ; CHECK-ZVKB32-NEXT: addi sp, sp, -16
1772 ; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 16
1773 ; CHECK-ZVKB32-NEXT: not a0, a0
1774 ; CHECK-ZVKB32-NEXT: not a1, a1
1775 ; CHECK-ZVKB32-NEXT: sw a0, 8(sp)
1776 ; CHECK-ZVKB32-NEXT: sw a1, 12(sp)
1777 ; CHECK-ZVKB32-NEXT: addi a0, sp, 8
1778 ; CHECK-ZVKB32-NEXT: vsetvli a1, zero, e64, m4, ta, ma
1779 ; CHECK-ZVKB32-NEXT: vlse64.v v12, (a0), zero
1780 ; CHECK-ZVKB32-NEXT: vand.vv v8, v12, v8
1781 ; CHECK-ZVKB32-NEXT: addi sp, sp, 16
1782 ; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 0
1783 ; CHECK-ZVKB32-NEXT: ret
1784 ;
1785 ; CHECK-ZVKB64-LABEL: vandn_vx_swapped_nxv4i64:
1786 ; CHECK-ZVKB64: # %bb.0:
1787 ; CHECK-ZVKB64-NEXT: vsetvli a1, zero, e64, m4, ta, ma
1788 ; CHECK-ZVKB64-NEXT: vandn.vx v8, v8, a0
1789 ; CHECK-ZVKB64-NEXT: ret
1790 %a = xor i64 %x, -1
1791 %head = insertelement <vscale x 4 x i64> poison, i64 %a, i32 0
1792 %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
1793 %b = and <vscale x 4 x i64> %splat, %y
1794 ret <vscale x 4 x i64> %b
1795 }
1797 define <vscale x 8 x i64> @vandn_vv_nxv8i64(<vscale x 8 x i64> %x, <vscale x 8 x i64> %y) {
1798 ; CHECK-LABEL: vandn_vv_nxv8i64:
1799 ; CHECK: # %bb.0:
1800 ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma
1801 ; CHECK-NEXT: vnot.v v8, v8
1802 ; CHECK-NEXT: vand.vv v8, v8, v16
1803 ; CHECK-NEXT: ret
1804 ;
1805 ; CHECK-ZVKB-LABEL: vandn_vv_nxv8i64:
1806 ; CHECK-ZVKB: # %bb.0:
1807 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e64, m8, ta, ma
1808 ; CHECK-ZVKB-NEXT: vandn.vv v8, v16, v8
1809 ; CHECK-ZVKB-NEXT: ret
1810 %a = xor <vscale x 8 x i64> %x, splat (i64 -1)
1811 %b = and <vscale x 8 x i64> %a, %y
1812 ret <vscale x 8 x i64> %b
1813 }
1815 define <vscale x 8 x i64> @vandn_vv_swapped_nxv8i64(<vscale x 8 x i64> %x, <vscale x 8 x i64> %y) {
1816 ; CHECK-LABEL: vandn_vv_swapped_nxv8i64:
1817 ; CHECK: # %bb.0:
1818 ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma
1819 ; CHECK-NEXT: vnot.v v8, v8
1820 ; CHECK-NEXT: vand.vv v8, v16, v8
1821 ; CHECK-NEXT: ret
1822 ;
1823 ; CHECK-ZVKB-LABEL: vandn_vv_swapped_nxv8i64:
1824 ; CHECK-ZVKB: # %bb.0:
1825 ; CHECK-ZVKB-NEXT: vsetvli a0, zero, e64, m8, ta, ma
1826 ; CHECK-ZVKB-NEXT: vandn.vv v8, v16, v8
1827 ; CHECK-ZVKB-NEXT: ret
1828 %a = xor <vscale x 8 x i64> %x, splat (i64 -1)
1829 %b = and <vscale x 8 x i64> %y, %a
1830 ret <vscale x 8 x i64> %b
1831 }
1833 define <vscale x 8 x i64> @vandn_vx_nxv8i64(i64 %x, <vscale x 8 x i64> %y) {
1834 ; CHECK-RV32-LABEL: vandn_vx_nxv8i64:
1835 ; CHECK-RV32: # %bb.0:
1836 ; CHECK-RV32-NEXT: addi sp, sp, -16
1837 ; CHECK-RV32-NEXT: .cfi_def_cfa_offset 16
1838 ; CHECK-RV32-NEXT: not a0, a0
1839 ; CHECK-RV32-NEXT: not a1, a1
1840 ; CHECK-RV32-NEXT: sw a0, 8(sp)
1841 ; CHECK-RV32-NEXT: sw a1, 12(sp)
1842 ; CHECK-RV32-NEXT: addi a0, sp, 8
1843 ; CHECK-RV32-NEXT: vsetvli a1, zero, e64, m8, ta, ma
1844 ; CHECK-RV32-NEXT: vlse64.v v16, (a0), zero
1845 ; CHECK-RV32-NEXT: vand.vv v8, v16, v8
1846 ; CHECK-RV32-NEXT: addi sp, sp, 16
1847 ; CHECK-RV32-NEXT: .cfi_def_cfa_offset 0
1848 ; CHECK-RV32-NEXT: ret
1849 ;
1850 ; CHECK-RV64-LABEL: vandn_vx_nxv8i64:
1851 ; CHECK-RV64: # %bb.0:
1852 ; CHECK-RV64-NEXT: not a0, a0
1853 ; CHECK-RV64-NEXT: vsetvli a1, zero, e64, m8, ta, ma
1854 ; CHECK-RV64-NEXT: vand.vx v8, v8, a0
1855 ; CHECK-RV64-NEXT: ret
1856 ;
1857 ; CHECK-ZVKB32-LABEL: vandn_vx_nxv8i64:
1858 ; CHECK-ZVKB32: # %bb.0:
1859 ; CHECK-ZVKB32-NEXT: addi sp, sp, -16
1860 ; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 16
1861 ; CHECK-ZVKB32-NEXT: not a0, a0
1862 ; CHECK-ZVKB32-NEXT: not a1, a1
1863 ; CHECK-ZVKB32-NEXT: sw a0, 8(sp)
1864 ; CHECK-ZVKB32-NEXT: sw a1, 12(sp)
1865 ; CHECK-ZVKB32-NEXT: addi a0, sp, 8
1866 ; CHECK-ZVKB32-NEXT: vsetvli a1, zero, e64, m8, ta, ma
1867 ; CHECK-ZVKB32-NEXT: vlse64.v v16, (a0), zero
1868 ; CHECK-ZVKB32-NEXT: vand.vv v8, v16, v8
1869 ; CHECK-ZVKB32-NEXT: addi sp, sp, 16
1870 ; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 0
1871 ; CHECK-ZVKB32-NEXT: ret
1872 ;
1873 ; CHECK-ZVKB64-LABEL: vandn_vx_nxv8i64:
1874 ; CHECK-ZVKB64: # %bb.0:
1875 ; CHECK-ZVKB64-NEXT: vsetvli a1, zero, e64, m8, ta, ma
1876 ; CHECK-ZVKB64-NEXT: vandn.vx v8, v8, a0
1877 ; CHECK-ZVKB64-NEXT: ret
1878 %a = xor i64 %x, -1
1879 %head = insertelement <vscale x 8 x i64> poison, i64 %a, i32 0
1880 %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
1881 %b = and <vscale x 8 x i64> %splat, %y
1882 ret <vscale x 8 x i64> %b
1883 }
1885 define <vscale x 8 x i64> @vandn_vx_swapped_nxv8i64(i64 %x, <vscale x 8 x i64> %y) {
1886 ; CHECK-RV32-LABEL: vandn_vx_swapped_nxv8i64:
1887 ; CHECK-RV32: # %bb.0:
1888 ; CHECK-RV32-NEXT: addi sp, sp, -16
1889 ; CHECK-RV32-NEXT: .cfi_def_cfa_offset 16
1890 ; CHECK-RV32-NEXT: not a0, a0
1891 ; CHECK-RV32-NEXT: not a1, a1
1892 ; CHECK-RV32-NEXT: sw a0, 8(sp)
1893 ; CHECK-RV32-NEXT: sw a1, 12(sp)
1894 ; CHECK-RV32-NEXT: addi a0, sp, 8
1895 ; CHECK-RV32-NEXT: vsetvli a1, zero, e64, m8, ta, ma
1896 ; CHECK-RV32-NEXT: vlse64.v v16, (a0), zero
1897 ; CHECK-RV32-NEXT: vand.vv v8, v16, v8
1898 ; CHECK-RV32-NEXT: addi sp, sp, 16
1899 ; CHECK-RV32-NEXT: .cfi_def_cfa_offset 0
1900 ; CHECK-RV32-NEXT: ret
1901 ;
1902 ; CHECK-RV64-LABEL: vandn_vx_swapped_nxv8i64:
1903 ; CHECK-RV64: # %bb.0:
1904 ; CHECK-RV64-NEXT: not a0, a0
1905 ; CHECK-RV64-NEXT: vsetvli a1, zero, e64, m8, ta, ma
1906 ; CHECK-RV64-NEXT: vand.vx v8, v8, a0
1907 ; CHECK-RV64-NEXT: ret
1908 ;
1909 ; CHECK-ZVKB32-LABEL: vandn_vx_swapped_nxv8i64:
1910 ; CHECK-ZVKB32: # %bb.0:
1911 ; CHECK-ZVKB32-NEXT: addi sp, sp, -16
1912 ; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 16
1913 ; CHECK-ZVKB32-NEXT: not a0, a0
1914 ; CHECK-ZVKB32-NEXT: not a1, a1
1915 ; CHECK-ZVKB32-NEXT: sw a0, 8(sp)
1916 ; CHECK-ZVKB32-NEXT: sw a1, 12(sp)
1917 ; CHECK-ZVKB32-NEXT: addi a0, sp, 8
1918 ; CHECK-ZVKB32-NEXT: vsetvli a1, zero, e64, m8, ta, ma
1919 ; CHECK-ZVKB32-NEXT: vlse64.v v16, (a0), zero
1920 ; CHECK-ZVKB32-NEXT: vand.vv v8, v16, v8
1921 ; CHECK-ZVKB32-NEXT: addi sp, sp, 16
1922 ; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 0
1923 ; CHECK-ZVKB32-NEXT: ret
1924 ;
1925 ; CHECK-ZVKB64-LABEL: vandn_vx_swapped_nxv8i64:
1926 ; CHECK-ZVKB64: # %bb.0:
1927 ; CHECK-ZVKB64-NEXT: vsetvli a1, zero, e64, m8, ta, ma
1928 ; CHECK-ZVKB64-NEXT: vandn.vx v8, v8, a0
1929 ; CHECK-ZVKB64-NEXT: ret
1930 %a = xor i64 %x, -1
1931 %head = insertelement <vscale x 8 x i64> poison, i64 %a, i32 0
1932 %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
1933 %b = and <vscale x 8 x i64> %splat, %y
1934 ret <vscale x 8 x i64> %b
1935 }
1937 define <vscale x 1 x i16> @vandn_vx_imm16(<vscale x 1 x i16> %x) {
1938 ; CHECK-LABEL: vandn_vx_imm16:
1939 ; CHECK: # %bb.0:
1940 ; CHECK-NEXT: lui a0, 8
1941 ; CHECK-NEXT: addi a0, a0, -1
1942 ; CHECK-NEXT: vsetvli a1, zero, e16, mf4, ta, ma
1943 ; CHECK-NEXT: vand.vx v8, v8, a0
1944 ; CHECK-NEXT: ret
1945 ;
1946 ; CHECK-ZVKB-LABEL: vandn_vx_imm16:
1947 ; CHECK-ZVKB: # %bb.0:
1948 ; CHECK-ZVKB-NEXT: lui a0, 1048568
1949 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e16, mf4, ta, ma
1950 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
1951 ; CHECK-ZVKB-NEXT: ret
1952 %a = and <vscale x 1 x i16> splat (i16 32767), %x
1953 ret <vscale x 1 x i16> %a
1954 }
1956 define <vscale x 1 x i16> @vandn_vx_swapped_imm16(<vscale x 1 x i16> %x) {
1957 ; CHECK-LABEL: vandn_vx_swapped_imm16:
1958 ; CHECK: # %bb.0:
1959 ; CHECK-NEXT: lui a0, 8
1960 ; CHECK-NEXT: addi a0, a0, -1
1961 ; CHECK-NEXT: vsetvli a1, zero, e16, mf4, ta, ma
1962 ; CHECK-NEXT: vand.vx v8, v8, a0
1963 ; CHECK-NEXT: ret
1964 ;
1965 ; CHECK-ZVKB-LABEL: vandn_vx_swapped_imm16:
1966 ; CHECK-ZVKB: # %bb.0:
1967 ; CHECK-ZVKB-NEXT: lui a0, 1048568
1968 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e16, mf4, ta, ma
1969 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
1970 ; CHECK-ZVKB-NEXT: ret
1971 %a = and <vscale x 1 x i16> %x, splat (i16 32767)
1972 ret <vscale x 1 x i16> %a
1973 }
1975 define <vscale x 1 x i64> @vandn_vx_imm64(<vscale x 1 x i64> %x) {
1976 ; CHECK-RV32-LABEL: vandn_vx_imm64:
1977 ; CHECK-RV32: # %bb.0:
1978 ; CHECK-RV32-NEXT: addi sp, sp, -16
1979 ; CHECK-RV32-NEXT: .cfi_def_cfa_offset 16
1980 ; CHECK-RV32-NEXT: lui a0, 1044480
1981 ; CHECK-RV32-NEXT: li a1, 255
1982 ; CHECK-RV32-NEXT: sw a1, 8(sp)
1983 ; CHECK-RV32-NEXT: sw a0, 12(sp)
1984 ; CHECK-RV32-NEXT: addi a0, sp, 8
1985 ; CHECK-RV32-NEXT: vsetvli a1, zero, e64, m1, ta, ma
1986 ; CHECK-RV32-NEXT: vlse64.v v9, (a0), zero
1987 ; CHECK-RV32-NEXT: vand.vv v8, v8, v9
1988 ; CHECK-RV32-NEXT: addi sp, sp, 16
1989 ; CHECK-RV32-NEXT: .cfi_def_cfa_offset 0
1990 ; CHECK-RV32-NEXT: ret
1991 ;
1992 ; CHECK-RV64-LABEL: vandn_vx_imm64:
1993 ; CHECK-RV64: # %bb.0:
1994 ; CHECK-RV64-NEXT: li a0, -1
1995 ; CHECK-RV64-NEXT: slli a0, a0, 56
1996 ; CHECK-RV64-NEXT: addi a0, a0, 255
1997 ; CHECK-RV64-NEXT: vsetvli a1, zero, e64, m1, ta, ma
1998 ; CHECK-RV64-NEXT: vand.vx v8, v8, a0
1999 ; CHECK-RV64-NEXT: ret
2000 ;
2001 ; CHECK-ZVKB32-LABEL: vandn_vx_imm64:
2002 ; CHECK-ZVKB32: # %bb.0:
2003 ; CHECK-ZVKB32-NEXT: addi sp, sp, -16
2004 ; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 16
2005 ; CHECK-ZVKB32-NEXT: lui a0, 1044480
2006 ; CHECK-ZVKB32-NEXT: li a1, 255
2007 ; CHECK-ZVKB32-NEXT: sw a1, 8(sp)
2008 ; CHECK-ZVKB32-NEXT: sw a0, 12(sp)
2009 ; CHECK-ZVKB32-NEXT: addi a0, sp, 8
2010 ; CHECK-ZVKB32-NEXT: vsetvli a1, zero, e64, m1, ta, ma
2011 ; CHECK-ZVKB32-NEXT: vlse64.v v9, (a0), zero
2012 ; CHECK-ZVKB32-NEXT: vand.vv v8, v8, v9
2013 ; CHECK-ZVKB32-NEXT: addi sp, sp, 16
2014 ; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 0
2015 ; CHECK-ZVKB32-NEXT: ret
2016 ;
2017 ; CHECK-ZVKB64-LABEL: vandn_vx_imm64:
2018 ; CHECK-ZVKB64: # %bb.0:
2019 ; CHECK-ZVKB64-NEXT: lui a0, 1048560
2020 ; CHECK-ZVKB64-NEXT: srli a0, a0, 8
2021 ; CHECK-ZVKB64-NEXT: vsetvli a1, zero, e64, m1, ta, ma
2022 ; CHECK-ZVKB64-NEXT: vandn.vx v8, v8, a0
2023 ; CHECK-ZVKB64-NEXT: ret
2024 %a = and <vscale x 1 x i64> %x, splat (i64 -72057594037927681)
2025 ret <vscale x 1 x i64> %a
2026 }
2028 define <vscale x 1 x i16> @vandn_vx_multi_imm16(<vscale x 1 x i16> %x, <vscale x 1 x i16> %y) {
2029 ; CHECK-LABEL: vandn_vx_multi_imm16:
2030 ; CHECK: # %bb.0:
2031 ; CHECK-NEXT: lui a0, 4
2032 ; CHECK-NEXT: addi a0, a0, -1
2033 ; CHECK-NEXT: vsetvli a1, zero, e16, mf4, ta, ma
2034 ; CHECK-NEXT: vand.vx v8, v8, a0
2035 ; CHECK-NEXT: vand.vx v9, v9, a0
2036 ; CHECK-NEXT: vadd.vv v8, v8, v9
2037 ; CHECK-NEXT: ret
2038 ;
2039 ; CHECK-ZVKB-LABEL: vandn_vx_multi_imm16:
2040 ; CHECK-ZVKB: # %bb.0:
2041 ; CHECK-ZVKB-NEXT: lui a0, 1048572
2042 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e16, mf4, ta, ma
2043 ; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0
2044 ; CHECK-ZVKB-NEXT: vandn.vx v9, v9, a0
2045 ; CHECK-ZVKB-NEXT: vadd.vv v8, v8, v9
2046 ; CHECK-ZVKB-NEXT: ret
2047 %a = and <vscale x 1 x i16> %x, splat (i16 16383)
2048 %b = and <vscale x 1 x i16> %y, splat (i16 16383)
2049 %c = add <vscale x 1 x i16> %a, %b
2050 ret <vscale x 1 x i16> %c
2051 }
2053 define <vscale x 1 x i16> @vandn_vx_multi_scalar_imm16(<vscale x 1 x i16> %x, i16 %y) {
2054 ; CHECK-LABEL: vandn_vx_multi_scalar_imm16:
2055 ; CHECK: # %bb.0:
2056 ; CHECK-NEXT: lui a1, 8
2057 ; CHECK-NEXT: addi a1, a1, -1
2058 ; CHECK-NEXT: vsetvli a2, zero, e16, mf4, ta, ma
2059 ; CHECK-NEXT: vand.vx v8, v8, a1
2060 ; CHECK-NEXT: or a0, a0, a1
2061 ; CHECK-NEXT: vadd.vx v8, v8, a0
2062 ; CHECK-NEXT: ret
2063 ;
2064 ; CHECK-ZVKB-NOZBB-LABEL: vandn_vx_multi_scalar_imm16:
2065 ; CHECK-ZVKB-NOZBB: # %bb.0:
2066 ; CHECK-ZVKB-NOZBB-NEXT: lui a1, 8
2067 ; CHECK-ZVKB-NOZBB-NEXT: addi a1, a1, -1
2068 ; CHECK-ZVKB-NOZBB-NEXT: vsetvli a2, zero, e16, mf4, ta, ma
2069 ; CHECK-ZVKB-NOZBB-NEXT: vand.vx v8, v8, a1
2070 ; CHECK-ZVKB-NOZBB-NEXT: or a0, a0, a1
2071 ; CHECK-ZVKB-NOZBB-NEXT: vadd.vx v8, v8, a0
2072 ; CHECK-ZVKB-NOZBB-NEXT: ret
2073 ;
2074 ; CHECK-ZVKB-ZBB-LABEL: vandn_vx_multi_scalar_imm16:
2075 ; CHECK-ZVKB-ZBB: # %bb.0:
2076 ; CHECK-ZVKB-ZBB-NEXT: lui a1, 1048568
2077 ; CHECK-ZVKB-ZBB-NEXT: vsetvli a2, zero, e16, mf4, ta, ma
2078 ; CHECK-ZVKB-ZBB-NEXT: vandn.vx v8, v8, a1
2079 ; CHECK-ZVKB-ZBB-NEXT: orn a0, a0, a1
2080 ; CHECK-ZVKB-ZBB-NEXT: vadd.vx v8, v8, a0
2081 ; CHECK-ZVKB-ZBB-NEXT: ret
2082 %a = and <vscale x 1 x i16> %x, splat (i16 32767)
2083 %b = or i16 %y, 32767
2084 %head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0
2085 %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
2086 %c = add <vscale x 1 x i16> %a, %splat
2087 ret <vscale x 1 x i16> %c
2088 }
2090 define <vscale x 1 x i16> @vand_vadd_vx_imm16(<vscale x 1 x i16> %x) {
2091 ; CHECK-LABEL: vand_vadd_vx_imm16:
2092 ; CHECK: # %bb.0:
2093 ; CHECK-NEXT: lui a0, 8
2094 ; CHECK-NEXT: addi a0, a0, -1
2095 ; CHECK-NEXT: vsetvli a1, zero, e16, mf4, ta, ma
2096 ; CHECK-NEXT: vand.vx v8, v8, a0
2097 ; CHECK-NEXT: vadd.vx v8, v8, a0
2098 ; CHECK-NEXT: ret
2099 ;
2100 ; CHECK-ZVKB-LABEL: vand_vadd_vx_imm16:
2101 ; CHECK-ZVKB: # %bb.0:
2102 ; CHECK-ZVKB-NEXT: lui a0, 8
2103 ; CHECK-ZVKB-NEXT: addi a0, a0, -1
2104 ; CHECK-ZVKB-NEXT: vsetvli a1, zero, e16, mf4, ta, ma
2105 ; CHECK-ZVKB-NEXT: vand.vx v8, v8, a0
2106 ; CHECK-ZVKB-NEXT: vadd.vx v8, v8, a0
2107 ; CHECK-ZVKB-NEXT: ret
2108 %a = and <vscale x 1 x i16> %x, splat (i16 32767)
2109 %b = add <vscale x 1 x i16> %a, splat (i16 32767)
2110 ret <vscale x 1 x i16> %b
2111 }