1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -mattr=+v,+zvfh,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,NOZFMIN,ZVFH
3 ; RUN: llc -mtriple=riscv64 -mattr=+v,+zvfh,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,NOZFMIN,ZVFH
4 ; RUN: llc -mtriple=riscv32 -mattr=+v,+zvfhmin,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,NOZFMIN,ZVFHMIN
5 ; RUN: llc -mtriple=riscv64 -mattr=+v,+zvfhmin,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,NOZFMIN,ZVFHMIN
6 ; RUN: llc -mtriple=riscv32 -mattr=+v,+zfhmin,+zfbfmin,+zvfhmin,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZFMIN
7 ; RUN: llc -mtriple=riscv64 -mattr=+v,+zfhmin,+zfbfmin,+zvfhmin,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZFMIN
9 define <vscale x 8 x bfloat> @vsplat_nxv8bf16(bfloat %f) {
10 ; NOZFMIN-LABEL: vsplat_nxv8bf16:
12 ; NOZFMIN-NEXT: fmv.x.w a0, fa0
13 ; NOZFMIN-NEXT: vsetvli a1, zero, e16, m2, ta, ma
14 ; NOZFMIN-NEXT: vmv.v.x v8, a0
17 ; ZFMIN-LABEL: vsplat_nxv8bf16:
19 ; ZFMIN-NEXT: fmv.x.h a0, fa0
20 ; ZFMIN-NEXT: vsetvli a1, zero, e16, m2, ta, ma
21 ; ZFMIN-NEXT: vmv.v.x v8, a0
23 %head = insertelement <vscale x 8 x bfloat> poison, bfloat %f, i32 0
24 %splat = shufflevector <vscale x 8 x bfloat> %head, <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer
25 ret <vscale x 8 x bfloat> %splat
28 define <vscale x 8 x bfloat> @vsplat_zero_nxv8bf16() {
29 ; CHECK-LABEL: vsplat_zero_nxv8bf16:
31 ; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma
32 ; CHECK-NEXT: vmv.v.i v8, 0
34 ret <vscale x 8 x bfloat> splat (bfloat zeroinitializer)
37 define <vscale x 8 x half> @vsplat_nxv8f16(half %f) {
38 ; ZVFH-LABEL: vsplat_nxv8f16:
40 ; ZVFH-NEXT: vsetvli a0, zero, e16, m2, ta, ma
41 ; ZVFH-NEXT: vfmv.v.f v8, fa0
44 ; ZVFHMIN-LABEL: vsplat_nxv8f16:
46 ; ZVFHMIN-NEXT: fmv.x.w a0, fa0
47 ; ZVFHMIN-NEXT: vsetvli a1, zero, e16, m2, ta, ma
48 ; ZVFHMIN-NEXT: vmv.v.x v8, a0
51 ; ZFMIN-LABEL: vsplat_nxv8f16:
53 ; ZFMIN-NEXT: fmv.x.h a0, fa0
54 ; ZFMIN-NEXT: vsetvli a1, zero, e16, m2, ta, ma
55 ; ZFMIN-NEXT: vmv.v.x v8, a0
57 %head = insertelement <vscale x 8 x half> poison, half %f, i32 0
58 %splat = shufflevector <vscale x 8 x half> %head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
59 ret <vscale x 8 x half> %splat
62 define <vscale x 8 x half> @vsplat_zero_nxv8f16() {
63 ; CHECK-LABEL: vsplat_zero_nxv8f16:
65 ; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma
66 ; CHECK-NEXT: vmv.v.i v8, 0
68 ret <vscale x 8 x half> splat (half zeroinitializer)
71 define <vscale x 8 x float> @vsplat_nxv8f32(float %f) {
72 ; CHECK-LABEL: vsplat_nxv8f32:
74 ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
75 ; CHECK-NEXT: vfmv.v.f v8, fa0
77 %head = insertelement <vscale x 8 x float> poison, float %f, i32 0
78 %splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
79 ret <vscale x 8 x float> %splat
82 define <vscale x 8 x float> @vsplat_zero_nxv8f32() {
83 ; CHECK-LABEL: vsplat_zero_nxv8f32:
85 ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
86 ; CHECK-NEXT: vmv.v.i v8, 0
88 ret <vscale x 8 x float> splat (float zeroinitializer)
91 define <vscale x 8 x double> @vsplat_nxv8f64(double %f) {
92 ; CHECK-LABEL: vsplat_nxv8f64:
94 ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma
95 ; CHECK-NEXT: vfmv.v.f v8, fa0
97 %head = insertelement <vscale x 8 x double> poison, double %f, i32 0
98 %splat = shufflevector <vscale x 8 x double> %head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
99 ret <vscale x 8 x double> %splat
102 define <vscale x 8 x double> @vsplat_zero_nxv8f64() {
103 ; CHECK-LABEL: vsplat_zero_nxv8f64:
105 ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma
106 ; CHECK-NEXT: vmv.v.i v8, 0
108 ret <vscale x 8 x double> splat (double zeroinitializer)
111 define <vscale x 8 x float> @vsplat_load_nxv8f32(ptr %ptr) {
112 ; CHECK-LABEL: vsplat_load_nxv8f32:
114 ; CHECK-NEXT: flw fa5, 0(a0)
115 ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
116 ; CHECK-NEXT: vfmv.v.f v8, fa5
118 %f = load float, ptr %ptr
119 %head = insertelement <vscale x 8 x float> poison, float %f, i32 0
120 %splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
121 ret <vscale x 8 x float> %splat
124 ; Test that we fold this to a vlse with 0 stride.
125 define <vscale x 8 x float> @vsplat_load_nxv8f32_optimized(ptr %ptr) "target-features"="+optimized-zero-stride-load" {
126 ; CHECK-LABEL: vsplat_load_nxv8f32_optimized:
128 ; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma
129 ; CHECK-NEXT: vlse32.v v8, (a0), zero
131 %f = load float, ptr %ptr
132 %head = insertelement <vscale x 8 x float> poison, float %f, i32 0
133 %splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
134 ret <vscale x 8 x float> %splat